pch_gpio.c 7.2 KB

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  1. /*
  2. * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; version 2 of the License.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/gpio.h>
  20. #define PCH_GPIO_ALL_PINS 0xfff /* Mask for GPIO pins 0 to 11 */
  21. #define GPIO_NUM_PINS 12 /* Specifies number of GPIO PINS GPIO0-GPIO11 */
  22. struct pch_regs {
  23. u32 ien;
  24. u32 istatus;
  25. u32 idisp;
  26. u32 iclr;
  27. u32 imask;
  28. u32 imaskclr;
  29. u32 po;
  30. u32 pi;
  31. u32 pm;
  32. u32 im0;
  33. u32 im1;
  34. u32 reserved[4];
  35. u32 reset;
  36. };
  37. /**
  38. * struct pch_gpio_reg_data - The register store data.
  39. * @po_reg: To store contents of PO register.
  40. * @pm_reg: To store contents of PM register.
  41. */
  42. struct pch_gpio_reg_data {
  43. u32 po_reg;
  44. u32 pm_reg;
  45. };
  46. /**
  47. * struct pch_gpio - GPIO private data structure.
  48. * @base: PCI base address of Memory mapped I/O register.
  49. * @reg: Memory mapped PCH GPIO register list.
  50. * @dev: Pointer to device structure.
  51. * @gpio: Data for GPIO infrastructure.
  52. * @pch_gpio_reg: Memory mapped Register data is saved here
  53. * when suspend.
  54. */
  55. struct pch_gpio {
  56. void __iomem *base;
  57. struct pch_regs __iomem *reg;
  58. struct device *dev;
  59. struct gpio_chip gpio;
  60. struct pch_gpio_reg_data pch_gpio_reg;
  61. struct mutex lock;
  62. };
  63. static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
  64. {
  65. u32 reg_val;
  66. struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
  67. mutex_lock(&chip->lock);
  68. reg_val = ioread32(&chip->reg->po);
  69. if (val)
  70. reg_val |= (1 << nr);
  71. else
  72. reg_val &= ~(1 << nr);
  73. iowrite32(reg_val, &chip->reg->po);
  74. mutex_unlock(&chip->lock);
  75. }
  76. static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr)
  77. {
  78. struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
  79. return ioread32(&chip->reg->pi) & (1 << nr);
  80. }
  81. static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
  82. int val)
  83. {
  84. struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
  85. u32 pm;
  86. u32 reg_val;
  87. mutex_lock(&chip->lock);
  88. pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS;
  89. pm |= (1 << nr);
  90. iowrite32(pm, &chip->reg->pm);
  91. reg_val = ioread32(&chip->reg->po);
  92. if (val)
  93. reg_val |= (1 << nr);
  94. else
  95. reg_val &= ~(1 << nr);
  96. mutex_unlock(&chip->lock);
  97. return 0;
  98. }
  99. static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
  100. {
  101. struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio);
  102. u32 pm;
  103. mutex_lock(&chip->lock);
  104. pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS; /*bits 0-11*/
  105. pm &= ~(1 << nr);
  106. iowrite32(pm, &chip->reg->pm);
  107. mutex_unlock(&chip->lock);
  108. return 0;
  109. }
  110. /*
  111. * Save register configuration and disable interrupts.
  112. */
  113. static void pch_gpio_save_reg_conf(struct pch_gpio *chip)
  114. {
  115. chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po);
  116. chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm);
  117. }
  118. /*
  119. * This function restores the register configuration of the GPIO device.
  120. */
  121. static void pch_gpio_restore_reg_conf(struct pch_gpio *chip)
  122. {
  123. /* to store contents of PO register */
  124. iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po);
  125. /* to store contents of PM register */
  126. iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm);
  127. }
  128. static void pch_gpio_setup(struct pch_gpio *chip)
  129. {
  130. struct gpio_chip *gpio = &chip->gpio;
  131. gpio->label = dev_name(chip->dev);
  132. gpio->owner = THIS_MODULE;
  133. gpio->direction_input = pch_gpio_direction_input;
  134. gpio->get = pch_gpio_get;
  135. gpio->direction_output = pch_gpio_direction_output;
  136. gpio->set = pch_gpio_set;
  137. gpio->dbg_show = NULL;
  138. gpio->base = -1;
  139. gpio->ngpio = GPIO_NUM_PINS;
  140. gpio->can_sleep = 0;
  141. }
  142. static int __devinit pch_gpio_probe(struct pci_dev *pdev,
  143. const struct pci_device_id *id)
  144. {
  145. s32 ret;
  146. struct pch_gpio *chip;
  147. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  148. if (chip == NULL)
  149. return -ENOMEM;
  150. chip->dev = &pdev->dev;
  151. ret = pci_enable_device(pdev);
  152. if (ret) {
  153. dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__);
  154. goto err_pci_enable;
  155. }
  156. ret = pci_request_regions(pdev, KBUILD_MODNAME);
  157. if (ret) {
  158. dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret);
  159. goto err_request_regions;
  160. }
  161. chip->base = pci_iomap(pdev, 1, 0);
  162. if (chip->base == 0) {
  163. dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__);
  164. ret = -ENOMEM;
  165. goto err_iomap;
  166. }
  167. chip->reg = chip->base;
  168. pci_set_drvdata(pdev, chip);
  169. mutex_init(&chip->lock);
  170. pch_gpio_setup(chip);
  171. ret = gpiochip_add(&chip->gpio);
  172. if (ret) {
  173. dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n");
  174. goto err_gpiochip_add;
  175. }
  176. return 0;
  177. err_gpiochip_add:
  178. pci_iounmap(pdev, chip->base);
  179. err_iomap:
  180. pci_release_regions(pdev);
  181. err_request_regions:
  182. pci_disable_device(pdev);
  183. err_pci_enable:
  184. kfree(chip);
  185. dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret);
  186. return ret;
  187. }
  188. static void __devexit pch_gpio_remove(struct pci_dev *pdev)
  189. {
  190. int err;
  191. struct pch_gpio *chip = pci_get_drvdata(pdev);
  192. err = gpiochip_remove(&chip->gpio);
  193. if (err)
  194. dev_err(&pdev->dev, "Failed gpiochip_remove\n");
  195. pci_iounmap(pdev, chip->base);
  196. pci_release_regions(pdev);
  197. pci_disable_device(pdev);
  198. kfree(chip);
  199. }
  200. #ifdef CONFIG_PM
  201. static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
  202. {
  203. s32 ret;
  204. struct pch_gpio *chip = pci_get_drvdata(pdev);
  205. pch_gpio_save_reg_conf(chip);
  206. pch_gpio_restore_reg_conf(chip);
  207. ret = pci_save_state(pdev);
  208. if (ret) {
  209. dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret);
  210. return ret;
  211. }
  212. pci_disable_device(pdev);
  213. pci_set_power_state(pdev, PCI_D0);
  214. ret = pci_enable_wake(pdev, PCI_D0, 1);
  215. if (ret)
  216. dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret);
  217. return 0;
  218. }
  219. static int pch_gpio_resume(struct pci_dev *pdev)
  220. {
  221. s32 ret;
  222. struct pch_gpio *chip = pci_get_drvdata(pdev);
  223. ret = pci_enable_wake(pdev, PCI_D0, 0);
  224. pci_set_power_state(pdev, PCI_D0);
  225. ret = pci_enable_device(pdev);
  226. if (ret) {
  227. dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret);
  228. return ret;
  229. }
  230. pci_restore_state(pdev);
  231. iowrite32(0x01, &chip->reg->reset);
  232. iowrite32(0x00, &chip->reg->reset);
  233. pch_gpio_restore_reg_conf(chip);
  234. return 0;
  235. }
  236. #else
  237. #define pch_gpio_suspend NULL
  238. #define pch_gpio_resume NULL
  239. #endif
  240. static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = {
  241. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) },
  242. { 0, }
  243. };
  244. static struct pci_driver pch_gpio_driver = {
  245. .name = "pch_gpio",
  246. .id_table = pch_gpio_pcidev_id,
  247. .probe = pch_gpio_probe,
  248. .remove = __devexit_p(pch_gpio_remove),
  249. .suspend = pch_gpio_suspend,
  250. .resume = pch_gpio_resume
  251. };
  252. static int __init pch_gpio_pci_init(void)
  253. {
  254. return pci_register_driver(&pch_gpio_driver);
  255. }
  256. module_init(pch_gpio_pci_init);
  257. static void __exit pch_gpio_pci_exit(void)
  258. {
  259. pci_unregister_driver(&pch_gpio_driver);
  260. }
  261. module_exit(pch_gpio_pci_exit);
  262. MODULE_DESCRIPTION("PCH GPIO PCI Driver");
  263. MODULE_LICENSE("GPL");