basic_mmio_gpio.c 8.0 KB

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  1. /*
  2. * Driver for basic memory-mapped GPIO controllers.
  3. *
  4. * Copyright 2008 MontaVista Software, Inc.
  5. * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. * ....``.```~~~~````.`.`.`.`.```````'',,,.........`````......`.......
  13. * ...`` ```````..
  14. * ..The simplest form of a GPIO controller that the driver supports is``
  15. * `.just a single "data" register, where GPIO state can be read and/or `
  16. * `,..written. ,,..``~~~~ .....``.`.`.~~.```.`.........``````.```````
  17. * `````````
  18. ___
  19. _/~~|___/~| . ```~~~~~~ ___/___\___ ,~.`.`.`.`````.~~...,,,,...
  20. __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO .
  21. o ` ~~~~\___/~~~~ ` controller in FPGA is ,.`
  22. `....trivial..'~`.```.```
  23. * ```````
  24. * .```````~~~~`..`.``.``.
  25. * . The driver supports `... ,..```.`~~~```````````````....````.``,,
  26. * . big-endian notation, just`. .. A bit more sophisticated controllers ,
  27. * . register the device with -be`. .with a pair of set/clear-bit registers ,
  28. * `.. suffix. ```~~`````....`.` . affecting the data register and the .`
  29. * ``.`.``...``` ```.. output pins are also supported.`
  30. * ^^ `````.`````````.,``~``~``~~``````
  31. * . ^^
  32. * ,..`.`.`...````````````......`.`.`.`.`.`..`.`.`..
  33. * .. The expectation is that in at least some cases . ,-~~~-,
  34. * .this will be used with roll-your-own ASIC/FPGA .` \ /
  35. * .logic in Verilog or VHDL. ~~~`````````..`````~~` \ /
  36. * ..````````......``````````` \o_
  37. * |
  38. * ^^ / \
  39. *
  40. * ...`````~~`.....``.`..........``````.`.``.```........``.
  41. * ` 8, 16, 32 and 64 bits registers are supported, and``.
  42. * . the number of GPIOs is determined by the width of ~
  43. * .. the registers. ,............```.`.`..`.`.~~~.`.`.`~
  44. * `.......````.```
  45. */
  46. #include <linux/init.h>
  47. #include <linux/bug.h>
  48. #include <linux/kernel.h>
  49. #include <linux/module.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/compiler.h>
  52. #include <linux/types.h>
  53. #include <linux/errno.h>
  54. #include <linux/log2.h>
  55. #include <linux/ioport.h>
  56. #include <linux/io.h>
  57. #include <linux/gpio.h>
  58. #include <linux/slab.h>
  59. #include <linux/platform_device.h>
  60. #include <linux/mod_devicetable.h>
  61. #include <linux/basic_mmio_gpio.h>
  62. struct bgpio_chip {
  63. struct gpio_chip gc;
  64. void __iomem *reg_dat;
  65. void __iomem *reg_set;
  66. void __iomem *reg_clr;
  67. /* Number of bits (GPIOs): <register width> * 8. */
  68. int bits;
  69. /*
  70. * Some GPIO controllers work with the big-endian bits notation,
  71. * e.g. in a 8-bits register, GPIO7 is the least significant bit.
  72. */
  73. int big_endian_bits;
  74. /*
  75. * Used to lock bgpio_chip->data. Also, this is needed to keep
  76. * shadowed and real data registers writes together.
  77. */
  78. spinlock_t lock;
  79. /* Shadowed data register to clear/set bits safely. */
  80. unsigned long data;
  81. };
  82. static struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
  83. {
  84. return container_of(gc, struct bgpio_chip, gc);
  85. }
  86. static unsigned long bgpio_in(struct bgpio_chip *bgc)
  87. {
  88. switch (bgc->bits) {
  89. case 8:
  90. return __raw_readb(bgc->reg_dat);
  91. case 16:
  92. return __raw_readw(bgc->reg_dat);
  93. case 32:
  94. return __raw_readl(bgc->reg_dat);
  95. #if BITS_PER_LONG >= 64
  96. case 64:
  97. return __raw_readq(bgc->reg_dat);
  98. #endif
  99. }
  100. return -EINVAL;
  101. }
  102. static void bgpio_out(struct bgpio_chip *bgc, void __iomem *reg,
  103. unsigned long data)
  104. {
  105. switch (bgc->bits) {
  106. case 8:
  107. __raw_writeb(data, reg);
  108. return;
  109. case 16:
  110. __raw_writew(data, reg);
  111. return;
  112. case 32:
  113. __raw_writel(data, reg);
  114. return;
  115. #if BITS_PER_LONG >= 64
  116. case 64:
  117. __raw_writeq(data, reg);
  118. return;
  119. #endif
  120. }
  121. }
  122. static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
  123. {
  124. if (bgc->big_endian_bits)
  125. return 1 << (bgc->bits - 1 - pin);
  126. else
  127. return 1 << pin;
  128. }
  129. static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
  130. {
  131. struct bgpio_chip *bgc = to_bgpio_chip(gc);
  132. return bgpio_in(bgc) & bgpio_pin2mask(bgc, gpio);
  133. }
  134. static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  135. {
  136. struct bgpio_chip *bgc = to_bgpio_chip(gc);
  137. unsigned long mask = bgpio_pin2mask(bgc, gpio);
  138. unsigned long flags;
  139. if (bgc->reg_set) {
  140. if (val)
  141. bgpio_out(bgc, bgc->reg_set, mask);
  142. else
  143. bgpio_out(bgc, bgc->reg_clr, mask);
  144. return;
  145. }
  146. spin_lock_irqsave(&bgc->lock, flags);
  147. if (val)
  148. bgc->data |= mask;
  149. else
  150. bgc->data &= ~mask;
  151. bgpio_out(bgc, bgc->reg_dat, bgc->data);
  152. spin_unlock_irqrestore(&bgc->lock, flags);
  153. }
  154. static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  155. {
  156. return 0;
  157. }
  158. static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  159. {
  160. bgpio_set(gc, gpio, val);
  161. return 0;
  162. }
  163. static int __devinit bgpio_probe(struct platform_device *pdev)
  164. {
  165. const struct platform_device_id *platid = platform_get_device_id(pdev);
  166. struct device *dev = &pdev->dev;
  167. struct bgpio_pdata *pdata = dev_get_platdata(dev);
  168. struct bgpio_chip *bgc;
  169. struct resource *res_dat;
  170. struct resource *res_set;
  171. struct resource *res_clr;
  172. resource_size_t dat_sz;
  173. int bits;
  174. int ret;
  175. res_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
  176. if (!res_dat)
  177. return -EINVAL;
  178. dat_sz = resource_size(res_dat);
  179. if (!is_power_of_2(dat_sz))
  180. return -EINVAL;
  181. bits = dat_sz * 8;
  182. if (bits > BITS_PER_LONG)
  183. return -EINVAL;
  184. bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL);
  185. if (!bgc)
  186. return -ENOMEM;
  187. bgc->reg_dat = devm_ioremap(dev, res_dat->start, dat_sz);
  188. if (!bgc->reg_dat)
  189. return -ENOMEM;
  190. res_set = platform_get_resource_byname(pdev, IORESOURCE_MEM, "set");
  191. res_clr = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clr");
  192. if (res_set && res_clr) {
  193. if (resource_size(res_set) != resource_size(res_clr) ||
  194. resource_size(res_set) != dat_sz)
  195. return -EINVAL;
  196. bgc->reg_set = devm_ioremap(dev, res_set->start, dat_sz);
  197. bgc->reg_clr = devm_ioremap(dev, res_clr->start, dat_sz);
  198. if (!bgc->reg_set || !bgc->reg_clr)
  199. return -ENOMEM;
  200. } else if (res_set || res_clr) {
  201. return -EINVAL;
  202. }
  203. spin_lock_init(&bgc->lock);
  204. bgc->bits = bits;
  205. bgc->big_endian_bits = !strcmp(platid->name, "basic-mmio-gpio-be");
  206. bgc->data = bgpio_in(bgc);
  207. bgc->gc.ngpio = bits;
  208. bgc->gc.direction_input = bgpio_dir_in;
  209. bgc->gc.direction_output = bgpio_dir_out;
  210. bgc->gc.get = bgpio_get;
  211. bgc->gc.set = bgpio_set;
  212. bgc->gc.dev = dev;
  213. bgc->gc.label = dev_name(dev);
  214. if (pdata)
  215. bgc->gc.base = pdata->base;
  216. else
  217. bgc->gc.base = -1;
  218. dev_set_drvdata(dev, bgc);
  219. ret = gpiochip_add(&bgc->gc);
  220. if (ret)
  221. dev_err(dev, "gpiochip_add() failed: %d\n", ret);
  222. return ret;
  223. }
  224. static int __devexit bgpio_remove(struct platform_device *pdev)
  225. {
  226. struct bgpio_chip *bgc = dev_get_drvdata(&pdev->dev);
  227. return gpiochip_remove(&bgc->gc);
  228. }
  229. static const struct platform_device_id bgpio_id_table[] = {
  230. { "basic-mmio-gpio", },
  231. { "basic-mmio-gpio-be", },
  232. {},
  233. };
  234. MODULE_DEVICE_TABLE(platform, bgpio_id_table);
  235. static struct platform_driver bgpio_driver = {
  236. .driver = {
  237. .name = "basic-mmio-gpio",
  238. },
  239. .id_table = bgpio_id_table,
  240. .probe = bgpio_probe,
  241. .remove = __devexit_p(bgpio_remove),
  242. };
  243. static int __init bgpio_init(void)
  244. {
  245. return platform_driver_register(&bgpio_driver);
  246. }
  247. module_init(bgpio_init);
  248. static void __exit bgpio_exit(void)
  249. {
  250. platform_driver_unregister(&bgpio_driver);
  251. }
  252. module_exit(bgpio_exit);
  253. MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");
  254. MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>");
  255. MODULE_LICENSE("GPL");