mce_amd.h 2.3 KB

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  1. #ifndef _EDAC_MCE_AMD_H
  2. #define _EDAC_MCE_AMD_H
  3. #include <linux/notifier.h>
  4. #include <asm/mce.h>
  5. #define BIT_64(n) (U64_C(1) << (n))
  6. #define EC(x) ((x) & 0xffff)
  7. #define XEC(x, mask) (((x) >> 16) & mask)
  8. #define LOW_SYNDROME(x) (((x) >> 15) & 0xff)
  9. #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff)
  10. #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
  11. #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
  12. #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
  13. #define TT(x) (((x) >> 2) & 0x3)
  14. #define TT_MSG(x) tt_msgs[TT(x)]
  15. #define II(x) (((x) >> 2) & 0x3)
  16. #define II_MSG(x) ii_msgs[II(x)]
  17. #define LL(x) ((x) & 0x3)
  18. #define LL_MSG(x) ll_msgs[LL(x)]
  19. #define TO(x) (((x) >> 8) & 0x1)
  20. #define TO_MSG(x) to_msgs[TO(x)]
  21. #define PP(x) (((x) >> 9) & 0x3)
  22. #define PP_MSG(x) pp_msgs[PP(x)]
  23. #define R4(x) (((x) >> 4) & 0xf)
  24. #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
  25. #define K8_NBSH 0x4C
  26. #define K8_NBSH_VALID_BIT BIT(31)
  27. #define K8_NBSH_OVERFLOW BIT(30)
  28. #define K8_NBSH_UC_ERR BIT(29)
  29. #define K8_NBSH_ERR_EN BIT(28)
  30. #define K8_NBSH_MISCV BIT(27)
  31. #define K8_NBSH_VALID_ERROR_ADDR BIT(26)
  32. #define K8_NBSH_PCC BIT(25)
  33. #define K8_NBSH_ERR_CPU_VAL BIT(24)
  34. #define K8_NBSH_CECC BIT(14)
  35. #define K8_NBSH_UECC BIT(13)
  36. #define K8_NBSH_ERR_SCRUBER BIT(8)
  37. enum tt_ids {
  38. TT_INSTR = 0,
  39. TT_DATA,
  40. TT_GEN,
  41. TT_RESV,
  42. };
  43. enum ll_ids {
  44. LL_RESV = 0,
  45. LL_L1,
  46. LL_L2,
  47. LL_LG,
  48. };
  49. enum ii_ids {
  50. II_MEM = 0,
  51. II_RESV,
  52. II_IO,
  53. II_GEN,
  54. };
  55. enum rrrr_ids {
  56. R4_GEN = 0,
  57. R4_RD,
  58. R4_WR,
  59. R4_DRD,
  60. R4_DWR,
  61. R4_IRD,
  62. R4_PREF,
  63. R4_EVICT,
  64. R4_SNOOP,
  65. };
  66. extern const char *tt_msgs[];
  67. extern const char *ll_msgs[];
  68. extern const char *rrrr_msgs[];
  69. extern const char *pp_msgs[];
  70. extern const char *to_msgs[];
  71. extern const char *ii_msgs[];
  72. /*
  73. * relevant NB regs
  74. */
  75. struct err_regs {
  76. u32 nbcfg;
  77. u32 nbsh;
  78. u32 nbsl;
  79. u32 nbeah;
  80. u32 nbeal;
  81. };
  82. /*
  83. * per-family decoder ops
  84. */
  85. struct amd_decoder_ops {
  86. bool (*dc_mce)(u16, u8);
  87. bool (*ic_mce)(u16, u8);
  88. bool (*nb_mce)(u16, u8);
  89. };
  90. void amd_report_gart_errors(bool);
  91. void amd_register_ecc_decoder(void (*f)(int, struct mce *, u32));
  92. void amd_unregister_ecc_decoder(void (*f)(int, struct mce *, u32));
  93. void amd_decode_nb_mce(int, struct mce *, u32);
  94. int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data);
  95. #endif /* _EDAC_MCE_AMD_H */