dmatest.c 16 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/dmaengine.h>
  12. #include <linux/init.h>
  13. #include <linux/kthread.h>
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/random.h>
  17. #include <linux/slab.h>
  18. #include <linux/wait.h>
  19. static unsigned int test_buf_size = 16384;
  20. module_param(test_buf_size, uint, S_IRUGO);
  21. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  22. static char test_channel[20];
  23. module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  24. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  25. static char test_device[20];
  26. module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  27. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  28. static unsigned int threads_per_chan = 1;
  29. module_param(threads_per_chan, uint, S_IRUGO);
  30. MODULE_PARM_DESC(threads_per_chan,
  31. "Number of threads to start per channel (default: 1)");
  32. static unsigned int max_channels;
  33. module_param(max_channels, uint, S_IRUGO);
  34. MODULE_PARM_DESC(max_channels,
  35. "Maximum number of channels to use (default: all)");
  36. static unsigned int iterations;
  37. module_param(iterations, uint, S_IRUGO);
  38. MODULE_PARM_DESC(iterations,
  39. "Iterations before stopping test (default: infinite)");
  40. static unsigned int xor_sources = 3;
  41. module_param(xor_sources, uint, S_IRUGO);
  42. MODULE_PARM_DESC(xor_sources,
  43. "Number of xor source buffers (default: 3)");
  44. static unsigned int pq_sources = 3;
  45. module_param(pq_sources, uint, S_IRUGO);
  46. MODULE_PARM_DESC(pq_sources,
  47. "Number of p+q source buffers (default: 3)");
  48. /*
  49. * Initialization patterns. All bytes in the source buffer has bit 7
  50. * set, all bytes in the destination buffer has bit 7 cleared.
  51. *
  52. * Bit 6 is set for all bytes which are to be copied by the DMA
  53. * engine. Bit 5 is set for all bytes which are to be overwritten by
  54. * the DMA engine.
  55. *
  56. * The remaining bits are the inverse of a counter which increments by
  57. * one for each byte address.
  58. */
  59. #define PATTERN_SRC 0x80
  60. #define PATTERN_DST 0x00
  61. #define PATTERN_COPY 0x40
  62. #define PATTERN_OVERWRITE 0x20
  63. #define PATTERN_COUNT_MASK 0x1f
  64. struct dmatest_thread {
  65. struct list_head node;
  66. struct task_struct *task;
  67. struct dma_chan *chan;
  68. u8 **srcs;
  69. u8 **dsts;
  70. enum dma_transaction_type type;
  71. };
  72. struct dmatest_chan {
  73. struct list_head node;
  74. struct dma_chan *chan;
  75. struct list_head threads;
  76. };
  77. /*
  78. * These are protected by dma_list_mutex since they're only used by
  79. * the DMA filter function callback
  80. */
  81. static LIST_HEAD(dmatest_channels);
  82. static unsigned int nr_channels;
  83. static bool dmatest_match_channel(struct dma_chan *chan)
  84. {
  85. if (test_channel[0] == '\0')
  86. return true;
  87. return strcmp(dma_chan_name(chan), test_channel) == 0;
  88. }
  89. static bool dmatest_match_device(struct dma_device *device)
  90. {
  91. if (test_device[0] == '\0')
  92. return true;
  93. return strcmp(dev_name(device->dev), test_device) == 0;
  94. }
  95. static unsigned long dmatest_random(void)
  96. {
  97. unsigned long buf;
  98. get_random_bytes(&buf, sizeof(buf));
  99. return buf;
  100. }
  101. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
  102. {
  103. unsigned int i;
  104. u8 *buf;
  105. for (; (buf = *bufs); bufs++) {
  106. for (i = 0; i < start; i++)
  107. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  108. for ( ; i < start + len; i++)
  109. buf[i] = PATTERN_SRC | PATTERN_COPY
  110. | (~i & PATTERN_COUNT_MASK);
  111. for ( ; i < test_buf_size; i++)
  112. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  113. buf++;
  114. }
  115. }
  116. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
  117. {
  118. unsigned int i;
  119. u8 *buf;
  120. for (; (buf = *bufs); bufs++) {
  121. for (i = 0; i < start; i++)
  122. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  123. for ( ; i < start + len; i++)
  124. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  125. | (~i & PATTERN_COUNT_MASK);
  126. for ( ; i < test_buf_size; i++)
  127. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  128. }
  129. }
  130. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  131. unsigned int counter, bool is_srcbuf)
  132. {
  133. u8 diff = actual ^ pattern;
  134. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  135. const char *thread_name = current->comm;
  136. if (is_srcbuf)
  137. pr_warning("%s: srcbuf[0x%x] overwritten!"
  138. " Expected %02x, got %02x\n",
  139. thread_name, index, expected, actual);
  140. else if ((pattern & PATTERN_COPY)
  141. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  142. pr_warning("%s: dstbuf[0x%x] not copied!"
  143. " Expected %02x, got %02x\n",
  144. thread_name, index, expected, actual);
  145. else if (diff & PATTERN_SRC)
  146. pr_warning("%s: dstbuf[0x%x] was copied!"
  147. " Expected %02x, got %02x\n",
  148. thread_name, index, expected, actual);
  149. else
  150. pr_warning("%s: dstbuf[0x%x] mismatch!"
  151. " Expected %02x, got %02x\n",
  152. thread_name, index, expected, actual);
  153. }
  154. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  155. unsigned int end, unsigned int counter, u8 pattern,
  156. bool is_srcbuf)
  157. {
  158. unsigned int i;
  159. unsigned int error_count = 0;
  160. u8 actual;
  161. u8 expected;
  162. u8 *buf;
  163. unsigned int counter_orig = counter;
  164. for (; (buf = *bufs); bufs++) {
  165. counter = counter_orig;
  166. for (i = start; i < end; i++) {
  167. actual = buf[i];
  168. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  169. if (actual != expected) {
  170. if (error_count < 32)
  171. dmatest_mismatch(actual, pattern, i,
  172. counter, is_srcbuf);
  173. error_count++;
  174. }
  175. counter++;
  176. }
  177. }
  178. if (error_count > 32)
  179. pr_warning("%s: %u errors suppressed\n",
  180. current->comm, error_count - 32);
  181. return error_count;
  182. }
  183. static void dmatest_callback(void *completion)
  184. {
  185. complete(completion);
  186. }
  187. /*
  188. * This function repeatedly tests DMA transfers of various lengths and
  189. * offsets for a given operation type until it is told to exit by
  190. * kthread_stop(). There may be multiple threads running this function
  191. * in parallel for a single channel, and there may be multiple channels
  192. * being tested in parallel.
  193. *
  194. * Before each test, the source and destination buffer is initialized
  195. * with a known pattern. This pattern is different depending on
  196. * whether it's in an area which is supposed to be copied or
  197. * overwritten, and different in the source and destination buffers.
  198. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  199. * we'll notice.
  200. */
  201. static int dmatest_func(void *data)
  202. {
  203. struct dmatest_thread *thread = data;
  204. struct dma_chan *chan;
  205. const char *thread_name;
  206. unsigned int src_off, dst_off, len;
  207. unsigned int error_count;
  208. unsigned int failed_tests = 0;
  209. unsigned int total_tests = 0;
  210. dma_cookie_t cookie;
  211. enum dma_status status;
  212. enum dma_ctrl_flags flags;
  213. u8 pq_coefs[pq_sources + 1];
  214. int ret;
  215. int src_cnt;
  216. int dst_cnt;
  217. int i;
  218. thread_name = current->comm;
  219. ret = -ENOMEM;
  220. smp_rmb();
  221. chan = thread->chan;
  222. if (thread->type == DMA_MEMCPY)
  223. src_cnt = dst_cnt = 1;
  224. else if (thread->type == DMA_XOR) {
  225. src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
  226. dst_cnt = 1;
  227. } else if (thread->type == DMA_PQ) {
  228. src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
  229. dst_cnt = 2;
  230. for (i = 0; i < src_cnt; i++)
  231. pq_coefs[i] = 1;
  232. } else
  233. goto err_srcs;
  234. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  235. if (!thread->srcs)
  236. goto err_srcs;
  237. for (i = 0; i < src_cnt; i++) {
  238. thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
  239. if (!thread->srcs[i])
  240. goto err_srcbuf;
  241. }
  242. thread->srcs[i] = NULL;
  243. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  244. if (!thread->dsts)
  245. goto err_dsts;
  246. for (i = 0; i < dst_cnt; i++) {
  247. thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
  248. if (!thread->dsts[i])
  249. goto err_dstbuf;
  250. }
  251. thread->dsts[i] = NULL;
  252. set_user_nice(current, 10);
  253. flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
  254. while (!kthread_should_stop()
  255. && !(iterations && total_tests >= iterations)) {
  256. struct dma_device *dev = chan->device;
  257. struct dma_async_tx_descriptor *tx = NULL;
  258. dma_addr_t dma_srcs[src_cnt];
  259. dma_addr_t dma_dsts[dst_cnt];
  260. struct completion cmp;
  261. unsigned long tmo = msecs_to_jiffies(3000);
  262. u8 align = 0;
  263. total_tests++;
  264. /* honor alignment restrictions */
  265. if (thread->type == DMA_MEMCPY)
  266. align = dev->copy_align;
  267. else if (thread->type == DMA_XOR)
  268. align = dev->xor_align;
  269. else if (thread->type == DMA_PQ)
  270. align = dev->pq_align;
  271. if (1 << align > test_buf_size) {
  272. pr_err("%u-byte buffer too small for %d-byte alignment\n",
  273. test_buf_size, 1 << align);
  274. break;
  275. }
  276. len = dmatest_random() % test_buf_size + 1;
  277. len = (len >> align) << align;
  278. if (!len)
  279. len = 1 << align;
  280. src_off = dmatest_random() % (test_buf_size - len + 1);
  281. dst_off = dmatest_random() % (test_buf_size - len + 1);
  282. src_off = (src_off >> align) << align;
  283. dst_off = (dst_off >> align) << align;
  284. dmatest_init_srcs(thread->srcs, src_off, len);
  285. dmatest_init_dsts(thread->dsts, dst_off, len);
  286. for (i = 0; i < src_cnt; i++) {
  287. u8 *buf = thread->srcs[i] + src_off;
  288. dma_srcs[i] = dma_map_single(dev->dev, buf, len,
  289. DMA_TO_DEVICE);
  290. }
  291. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  292. for (i = 0; i < dst_cnt; i++) {
  293. dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
  294. test_buf_size,
  295. DMA_BIDIRECTIONAL);
  296. }
  297. if (thread->type == DMA_MEMCPY)
  298. tx = dev->device_prep_dma_memcpy(chan,
  299. dma_dsts[0] + dst_off,
  300. dma_srcs[0], len,
  301. flags);
  302. else if (thread->type == DMA_XOR)
  303. tx = dev->device_prep_dma_xor(chan,
  304. dma_dsts[0] + dst_off,
  305. dma_srcs, src_cnt,
  306. len, flags);
  307. else if (thread->type == DMA_PQ) {
  308. dma_addr_t dma_pq[dst_cnt];
  309. for (i = 0; i < dst_cnt; i++)
  310. dma_pq[i] = dma_dsts[i] + dst_off;
  311. tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
  312. src_cnt, pq_coefs,
  313. len, flags);
  314. }
  315. if (!tx) {
  316. for (i = 0; i < src_cnt; i++)
  317. dma_unmap_single(dev->dev, dma_srcs[i], len,
  318. DMA_TO_DEVICE);
  319. for (i = 0; i < dst_cnt; i++)
  320. dma_unmap_single(dev->dev, dma_dsts[i],
  321. test_buf_size,
  322. DMA_BIDIRECTIONAL);
  323. pr_warning("%s: #%u: prep error with src_off=0x%x "
  324. "dst_off=0x%x len=0x%x\n",
  325. thread_name, total_tests - 1,
  326. src_off, dst_off, len);
  327. msleep(100);
  328. failed_tests++;
  329. continue;
  330. }
  331. init_completion(&cmp);
  332. tx->callback = dmatest_callback;
  333. tx->callback_param = &cmp;
  334. cookie = tx->tx_submit(tx);
  335. if (dma_submit_error(cookie)) {
  336. pr_warning("%s: #%u: submit error %d with src_off=0x%x "
  337. "dst_off=0x%x len=0x%x\n",
  338. thread_name, total_tests - 1, cookie,
  339. src_off, dst_off, len);
  340. msleep(100);
  341. failed_tests++;
  342. continue;
  343. }
  344. dma_async_issue_pending(chan);
  345. tmo = wait_for_completion_timeout(&cmp, tmo);
  346. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  347. if (tmo == 0) {
  348. pr_warning("%s: #%u: test timed out\n",
  349. thread_name, total_tests - 1);
  350. failed_tests++;
  351. continue;
  352. } else if (status != DMA_SUCCESS) {
  353. pr_warning("%s: #%u: got completion callback,"
  354. " but status is \'%s\'\n",
  355. thread_name, total_tests - 1,
  356. status == DMA_ERROR ? "error" : "in progress");
  357. failed_tests++;
  358. continue;
  359. }
  360. /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
  361. for (i = 0; i < dst_cnt; i++)
  362. dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
  363. DMA_BIDIRECTIONAL);
  364. error_count = 0;
  365. pr_debug("%s: verifying source buffer...\n", thread_name);
  366. error_count += dmatest_verify(thread->srcs, 0, src_off,
  367. 0, PATTERN_SRC, true);
  368. error_count += dmatest_verify(thread->srcs, src_off,
  369. src_off + len, src_off,
  370. PATTERN_SRC | PATTERN_COPY, true);
  371. error_count += dmatest_verify(thread->srcs, src_off + len,
  372. test_buf_size, src_off + len,
  373. PATTERN_SRC, true);
  374. pr_debug("%s: verifying dest buffer...\n",
  375. thread->task->comm);
  376. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  377. 0, PATTERN_DST, false);
  378. error_count += dmatest_verify(thread->dsts, dst_off,
  379. dst_off + len, src_off,
  380. PATTERN_SRC | PATTERN_COPY, false);
  381. error_count += dmatest_verify(thread->dsts, dst_off + len,
  382. test_buf_size, dst_off + len,
  383. PATTERN_DST, false);
  384. if (error_count) {
  385. pr_warning("%s: #%u: %u errors with "
  386. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  387. thread_name, total_tests - 1, error_count,
  388. src_off, dst_off, len);
  389. failed_tests++;
  390. } else {
  391. pr_debug("%s: #%u: No errors with "
  392. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  393. thread_name, total_tests - 1,
  394. src_off, dst_off, len);
  395. }
  396. }
  397. ret = 0;
  398. for (i = 0; thread->dsts[i]; i++)
  399. kfree(thread->dsts[i]);
  400. err_dstbuf:
  401. kfree(thread->dsts);
  402. err_dsts:
  403. for (i = 0; thread->srcs[i]; i++)
  404. kfree(thread->srcs[i]);
  405. err_srcbuf:
  406. kfree(thread->srcs);
  407. err_srcs:
  408. pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
  409. thread_name, total_tests, failed_tests, ret);
  410. if (iterations > 0)
  411. while (!kthread_should_stop()) {
  412. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
  413. interruptible_sleep_on(&wait_dmatest_exit);
  414. }
  415. return ret;
  416. }
  417. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  418. {
  419. struct dmatest_thread *thread;
  420. struct dmatest_thread *_thread;
  421. int ret;
  422. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  423. ret = kthread_stop(thread->task);
  424. pr_debug("dmatest: thread %s exited with status %d\n",
  425. thread->task->comm, ret);
  426. list_del(&thread->node);
  427. kfree(thread);
  428. }
  429. kfree(dtc);
  430. }
  431. static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
  432. {
  433. struct dmatest_thread *thread;
  434. struct dma_chan *chan = dtc->chan;
  435. char *op;
  436. unsigned int i;
  437. if (type == DMA_MEMCPY)
  438. op = "copy";
  439. else if (type == DMA_XOR)
  440. op = "xor";
  441. else if (type == DMA_PQ)
  442. op = "pq";
  443. else
  444. return -EINVAL;
  445. for (i = 0; i < threads_per_chan; i++) {
  446. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  447. if (!thread) {
  448. pr_warning("dmatest: No memory for %s-%s%u\n",
  449. dma_chan_name(chan), op, i);
  450. break;
  451. }
  452. thread->chan = dtc->chan;
  453. thread->type = type;
  454. smp_wmb();
  455. thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
  456. dma_chan_name(chan), op, i);
  457. if (IS_ERR(thread->task)) {
  458. pr_warning("dmatest: Failed to run thread %s-%s%u\n",
  459. dma_chan_name(chan), op, i);
  460. kfree(thread);
  461. break;
  462. }
  463. /* srcbuf and dstbuf are allocated by the thread itself */
  464. list_add_tail(&thread->node, &dtc->threads);
  465. }
  466. return i;
  467. }
  468. static int dmatest_add_channel(struct dma_chan *chan)
  469. {
  470. struct dmatest_chan *dtc;
  471. struct dma_device *dma_dev = chan->device;
  472. unsigned int thread_count = 0;
  473. int cnt;
  474. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  475. if (!dtc) {
  476. pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
  477. return -ENOMEM;
  478. }
  479. dtc->chan = chan;
  480. INIT_LIST_HEAD(&dtc->threads);
  481. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  482. cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
  483. thread_count += cnt > 0 ? cnt : 0;
  484. }
  485. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  486. cnt = dmatest_add_threads(dtc, DMA_XOR);
  487. thread_count += cnt > 0 ? cnt : 0;
  488. }
  489. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  490. cnt = dmatest_add_threads(dtc, DMA_PQ);
  491. thread_count += cnt > 0 ?: 0;
  492. }
  493. pr_info("dmatest: Started %u threads using %s\n",
  494. thread_count, dma_chan_name(chan));
  495. list_add_tail(&dtc->node, &dmatest_channels);
  496. nr_channels++;
  497. return 0;
  498. }
  499. static bool filter(struct dma_chan *chan, void *param)
  500. {
  501. if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
  502. return false;
  503. else
  504. return true;
  505. }
  506. static int __init dmatest_init(void)
  507. {
  508. dma_cap_mask_t mask;
  509. struct dma_chan *chan;
  510. int err = 0;
  511. dma_cap_zero(mask);
  512. dma_cap_set(DMA_MEMCPY, mask);
  513. for (;;) {
  514. chan = dma_request_channel(mask, filter, NULL);
  515. if (chan) {
  516. err = dmatest_add_channel(chan);
  517. if (err) {
  518. dma_release_channel(chan);
  519. break; /* add_channel failed, punt */
  520. }
  521. } else
  522. break; /* no more channels available */
  523. if (max_channels && nr_channels >= max_channels)
  524. break; /* we have all we need */
  525. }
  526. return err;
  527. }
  528. /* when compiled-in wait for drivers to load first */
  529. late_initcall(dmatest_init);
  530. static void __exit dmatest_exit(void)
  531. {
  532. struct dmatest_chan *dtc, *_dtc;
  533. struct dma_chan *chan;
  534. list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
  535. list_del(&dtc->node);
  536. chan = dtc->chan;
  537. dmatest_cleanup_channel(dtc);
  538. pr_debug("dmatest: dropped channel %s\n",
  539. dma_chan_name(chan));
  540. dma_release_channel(chan);
  541. }
  542. }
  543. module_exit(dmatest_exit);
  544. MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
  545. MODULE_LICENSE("GPL v2");