hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <asm/current.h>
  37. #include <asm/system.h>
  38. #include <asm/irq.h>
  39. #include <asm/div64.h>
  40. #include <linux/acpi.h>
  41. #include <acpi/acpi_bus.h>
  42. #include <linux/hpet.h>
  43. /*
  44. * The High Precision Event Timer driver.
  45. * This driver is closely modelled after the rtc.c driver.
  46. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  47. */
  48. #define HPET_USER_FREQ (64)
  49. #define HPET_DRIFT (500)
  50. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  51. /* WARNING -- don't get confused. These macros are never used
  52. * to write the (single) counter, and rarely to read it.
  53. * They're badly named; to fix, someday.
  54. */
  55. #if BITS_PER_LONG == 64
  56. #define write_counter(V, MC) writeq(V, MC)
  57. #define read_counter(MC) readq(MC)
  58. #else
  59. #define write_counter(V, MC) writel(V, MC)
  60. #define read_counter(MC) readl(MC)
  61. #endif
  62. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  63. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  64. /* This clocksource driver currently only works on ia64 */
  65. #ifdef CONFIG_IA64
  66. static void __iomem *hpet_mctr;
  67. static cycle_t read_hpet(struct clocksource *cs)
  68. {
  69. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  70. }
  71. static struct clocksource clocksource_hpet = {
  72. .name = "hpet",
  73. .rating = 250,
  74. .read = read_hpet,
  75. .mask = CLOCKSOURCE_MASK(64),
  76. .mult = 0, /* to be calculated */
  77. .shift = 10,
  78. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  79. };
  80. static struct clocksource *hpet_clocksource;
  81. #endif
  82. /* A lock for concurrent access by app and isr hpet activity. */
  83. static DEFINE_SPINLOCK(hpet_lock);
  84. #define HPET_DEV_NAME (7)
  85. struct hpet_dev {
  86. struct hpets *hd_hpets;
  87. struct hpet __iomem *hd_hpet;
  88. struct hpet_timer __iomem *hd_timer;
  89. unsigned long hd_ireqfreq;
  90. unsigned long hd_irqdata;
  91. wait_queue_head_t hd_waitqueue;
  92. struct fasync_struct *hd_async_queue;
  93. unsigned int hd_flags;
  94. unsigned int hd_irq;
  95. unsigned int hd_hdwirq;
  96. char hd_name[HPET_DEV_NAME];
  97. };
  98. struct hpets {
  99. struct hpets *hp_next;
  100. struct hpet __iomem *hp_hpet;
  101. unsigned long hp_hpet_phys;
  102. struct clocksource *hp_clocksource;
  103. unsigned long long hp_tick_freq;
  104. unsigned long hp_delta;
  105. unsigned int hp_ntimer;
  106. unsigned int hp_which;
  107. struct hpet_dev hp_dev[1];
  108. };
  109. static struct hpets *hpets;
  110. #define HPET_OPEN 0x0001
  111. #define HPET_IE 0x0002 /* interrupt enabled */
  112. #define HPET_PERIODIC 0x0004
  113. #define HPET_SHARED_IRQ 0x0008
  114. #ifndef readq
  115. static inline unsigned long long readq(void __iomem *addr)
  116. {
  117. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  118. }
  119. #endif
  120. #ifndef writeq
  121. static inline void writeq(unsigned long long v, void __iomem *addr)
  122. {
  123. writel(v & 0xffffffff, addr);
  124. writel(v >> 32, addr + 4);
  125. }
  126. #endif
  127. static irqreturn_t hpet_interrupt(int irq, void *data)
  128. {
  129. struct hpet_dev *devp;
  130. unsigned long isr;
  131. devp = data;
  132. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  133. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  134. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  135. return IRQ_NONE;
  136. spin_lock(&hpet_lock);
  137. devp->hd_irqdata++;
  138. /*
  139. * For non-periodic timers, increment the accumulator.
  140. * This has the effect of treating non-periodic like periodic.
  141. */
  142. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  143. unsigned long m, t;
  144. t = devp->hd_ireqfreq;
  145. m = read_counter(&devp->hd_timer->hpet_compare);
  146. write_counter(t + m, &devp->hd_timer->hpet_compare);
  147. }
  148. if (devp->hd_flags & HPET_SHARED_IRQ)
  149. writel(isr, &devp->hd_hpet->hpet_isr);
  150. spin_unlock(&hpet_lock);
  151. wake_up_interruptible(&devp->hd_waitqueue);
  152. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  153. return IRQ_HANDLED;
  154. }
  155. static void hpet_timer_set_irq(struct hpet_dev *devp)
  156. {
  157. unsigned long v;
  158. int irq, gsi;
  159. struct hpet_timer __iomem *timer;
  160. spin_lock_irq(&hpet_lock);
  161. if (devp->hd_hdwirq) {
  162. spin_unlock_irq(&hpet_lock);
  163. return;
  164. }
  165. timer = devp->hd_timer;
  166. /* we prefer level triggered mode */
  167. v = readl(&timer->hpet_config);
  168. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  169. v |= Tn_INT_TYPE_CNF_MASK;
  170. writel(v, &timer->hpet_config);
  171. }
  172. spin_unlock_irq(&hpet_lock);
  173. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  174. Tn_INT_ROUTE_CAP_SHIFT;
  175. /*
  176. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  177. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  178. */
  179. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  180. v &= ~0xf3df;
  181. else
  182. v &= ~0xffff;
  183. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  184. if (irq >= nr_irqs) {
  185. irq = HPET_MAX_IRQ;
  186. break;
  187. }
  188. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  189. ACPI_ACTIVE_LOW);
  190. if (gsi > 0)
  191. break;
  192. /* FIXME: Setup interrupt source table */
  193. }
  194. if (irq < HPET_MAX_IRQ) {
  195. spin_lock_irq(&hpet_lock);
  196. v = readl(&timer->hpet_config);
  197. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  198. writel(v, &timer->hpet_config);
  199. devp->hd_hdwirq = gsi;
  200. spin_unlock_irq(&hpet_lock);
  201. }
  202. return;
  203. }
  204. static int hpet_open(struct inode *inode, struct file *file)
  205. {
  206. struct hpet_dev *devp;
  207. struct hpets *hpetp;
  208. int i;
  209. if (file->f_mode & FMODE_WRITE)
  210. return -EINVAL;
  211. mutex_lock(&hpet_mutex);
  212. spin_lock_irq(&hpet_lock);
  213. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  214. for (i = 0; i < hpetp->hp_ntimer; i++)
  215. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  216. continue;
  217. else {
  218. devp = &hpetp->hp_dev[i];
  219. break;
  220. }
  221. if (!devp) {
  222. spin_unlock_irq(&hpet_lock);
  223. mutex_unlock(&hpet_mutex);
  224. return -EBUSY;
  225. }
  226. file->private_data = devp;
  227. devp->hd_irqdata = 0;
  228. devp->hd_flags |= HPET_OPEN;
  229. spin_unlock_irq(&hpet_lock);
  230. mutex_unlock(&hpet_mutex);
  231. hpet_timer_set_irq(devp);
  232. return 0;
  233. }
  234. static ssize_t
  235. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  236. {
  237. DECLARE_WAITQUEUE(wait, current);
  238. unsigned long data;
  239. ssize_t retval;
  240. struct hpet_dev *devp;
  241. devp = file->private_data;
  242. if (!devp->hd_ireqfreq)
  243. return -EIO;
  244. if (count < sizeof(unsigned long))
  245. return -EINVAL;
  246. add_wait_queue(&devp->hd_waitqueue, &wait);
  247. for ( ; ; ) {
  248. set_current_state(TASK_INTERRUPTIBLE);
  249. spin_lock_irq(&hpet_lock);
  250. data = devp->hd_irqdata;
  251. devp->hd_irqdata = 0;
  252. spin_unlock_irq(&hpet_lock);
  253. if (data)
  254. break;
  255. else if (file->f_flags & O_NONBLOCK) {
  256. retval = -EAGAIN;
  257. goto out;
  258. } else if (signal_pending(current)) {
  259. retval = -ERESTARTSYS;
  260. goto out;
  261. }
  262. schedule();
  263. }
  264. retval = put_user(data, (unsigned long __user *)buf);
  265. if (!retval)
  266. retval = sizeof(unsigned long);
  267. out:
  268. __set_current_state(TASK_RUNNING);
  269. remove_wait_queue(&devp->hd_waitqueue, &wait);
  270. return retval;
  271. }
  272. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  273. {
  274. unsigned long v;
  275. struct hpet_dev *devp;
  276. devp = file->private_data;
  277. if (!devp->hd_ireqfreq)
  278. return 0;
  279. poll_wait(file, &devp->hd_waitqueue, wait);
  280. spin_lock_irq(&hpet_lock);
  281. v = devp->hd_irqdata;
  282. spin_unlock_irq(&hpet_lock);
  283. if (v != 0)
  284. return POLLIN | POLLRDNORM;
  285. return 0;
  286. }
  287. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  288. {
  289. #ifdef CONFIG_HPET_MMAP
  290. struct hpet_dev *devp;
  291. unsigned long addr;
  292. if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
  293. return -EINVAL;
  294. devp = file->private_data;
  295. addr = devp->hd_hpets->hp_hpet_phys;
  296. if (addr & (PAGE_SIZE - 1))
  297. return -ENOSYS;
  298. vma->vm_flags |= VM_IO;
  299. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  300. if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
  301. PAGE_SIZE, vma->vm_page_prot)) {
  302. printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
  303. __func__);
  304. return -EAGAIN;
  305. }
  306. return 0;
  307. #else
  308. return -ENOSYS;
  309. #endif
  310. }
  311. static int hpet_fasync(int fd, struct file *file, int on)
  312. {
  313. struct hpet_dev *devp;
  314. devp = file->private_data;
  315. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  316. return 0;
  317. else
  318. return -EIO;
  319. }
  320. static int hpet_release(struct inode *inode, struct file *file)
  321. {
  322. struct hpet_dev *devp;
  323. struct hpet_timer __iomem *timer;
  324. int irq = 0;
  325. devp = file->private_data;
  326. timer = devp->hd_timer;
  327. spin_lock_irq(&hpet_lock);
  328. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  329. &timer->hpet_config);
  330. irq = devp->hd_irq;
  331. devp->hd_irq = 0;
  332. devp->hd_ireqfreq = 0;
  333. if (devp->hd_flags & HPET_PERIODIC
  334. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  335. unsigned long v;
  336. v = readq(&timer->hpet_config);
  337. v ^= Tn_TYPE_CNF_MASK;
  338. writeq(v, &timer->hpet_config);
  339. }
  340. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  341. spin_unlock_irq(&hpet_lock);
  342. if (irq)
  343. free_irq(irq, devp);
  344. file->private_data = NULL;
  345. return 0;
  346. }
  347. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  348. {
  349. struct hpet_timer __iomem *timer;
  350. struct hpet __iomem *hpet;
  351. struct hpets *hpetp;
  352. int irq;
  353. unsigned long g, v, t, m;
  354. unsigned long flags, isr;
  355. timer = devp->hd_timer;
  356. hpet = devp->hd_hpet;
  357. hpetp = devp->hd_hpets;
  358. if (!devp->hd_ireqfreq)
  359. return -EIO;
  360. spin_lock_irq(&hpet_lock);
  361. if (devp->hd_flags & HPET_IE) {
  362. spin_unlock_irq(&hpet_lock);
  363. return -EBUSY;
  364. }
  365. devp->hd_flags |= HPET_IE;
  366. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  367. devp->hd_flags |= HPET_SHARED_IRQ;
  368. spin_unlock_irq(&hpet_lock);
  369. irq = devp->hd_hdwirq;
  370. if (irq) {
  371. unsigned long irq_flags;
  372. if (devp->hd_flags & HPET_SHARED_IRQ) {
  373. /*
  374. * To prevent the interrupt handler from seeing an
  375. * unwanted interrupt status bit, program the timer
  376. * so that it will not fire in the near future ...
  377. */
  378. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  379. &timer->hpet_config);
  380. write_counter(read_counter(&hpet->hpet_mc),
  381. &timer->hpet_compare);
  382. /* ... and clear any left-over status. */
  383. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  384. writel(isr, &hpet->hpet_isr);
  385. }
  386. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  387. irq_flags = devp->hd_flags & HPET_SHARED_IRQ
  388. ? IRQF_SHARED : IRQF_DISABLED;
  389. if (request_irq(irq, hpet_interrupt, irq_flags,
  390. devp->hd_name, (void *)devp)) {
  391. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  392. irq = 0;
  393. }
  394. }
  395. if (irq == 0) {
  396. spin_lock_irq(&hpet_lock);
  397. devp->hd_flags ^= HPET_IE;
  398. spin_unlock_irq(&hpet_lock);
  399. return -EIO;
  400. }
  401. devp->hd_irq = irq;
  402. t = devp->hd_ireqfreq;
  403. v = readq(&timer->hpet_config);
  404. /* 64-bit comparators are not yet supported through the ioctls,
  405. * so force this into 32-bit mode if it supports both modes
  406. */
  407. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  408. if (devp->hd_flags & HPET_PERIODIC) {
  409. g |= Tn_TYPE_CNF_MASK;
  410. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  411. writeq(v, &timer->hpet_config);
  412. local_irq_save(flags);
  413. /*
  414. * NOTE: First we modify the hidden accumulator
  415. * register supported by periodic-capable comparators.
  416. * We never want to modify the (single) counter; that
  417. * would affect all the comparators. The value written
  418. * is the counter value when the first interrupt is due.
  419. */
  420. m = read_counter(&hpet->hpet_mc);
  421. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  422. /*
  423. * Then we modify the comparator, indicating the period
  424. * for subsequent interrupt.
  425. */
  426. write_counter(t, &timer->hpet_compare);
  427. } else {
  428. local_irq_save(flags);
  429. m = read_counter(&hpet->hpet_mc);
  430. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  431. }
  432. if (devp->hd_flags & HPET_SHARED_IRQ) {
  433. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  434. writel(isr, &hpet->hpet_isr);
  435. }
  436. writeq(g, &timer->hpet_config);
  437. local_irq_restore(flags);
  438. return 0;
  439. }
  440. /* converts Hz to number of timer ticks */
  441. static inline unsigned long hpet_time_div(struct hpets *hpets,
  442. unsigned long dis)
  443. {
  444. unsigned long long m;
  445. m = hpets->hp_tick_freq + (dis >> 1);
  446. do_div(m, dis);
  447. return (unsigned long)m;
  448. }
  449. static int
  450. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  451. struct hpet_info *info)
  452. {
  453. struct hpet_timer __iomem *timer;
  454. struct hpet __iomem *hpet;
  455. struct hpets *hpetp;
  456. int err;
  457. unsigned long v;
  458. switch (cmd) {
  459. case HPET_IE_OFF:
  460. case HPET_INFO:
  461. case HPET_EPI:
  462. case HPET_DPI:
  463. case HPET_IRQFREQ:
  464. timer = devp->hd_timer;
  465. hpet = devp->hd_hpet;
  466. hpetp = devp->hd_hpets;
  467. break;
  468. case HPET_IE_ON:
  469. return hpet_ioctl_ieon(devp);
  470. default:
  471. return -EINVAL;
  472. }
  473. err = 0;
  474. switch (cmd) {
  475. case HPET_IE_OFF:
  476. if ((devp->hd_flags & HPET_IE) == 0)
  477. break;
  478. v = readq(&timer->hpet_config);
  479. v &= ~Tn_INT_ENB_CNF_MASK;
  480. writeq(v, &timer->hpet_config);
  481. if (devp->hd_irq) {
  482. free_irq(devp->hd_irq, devp);
  483. devp->hd_irq = 0;
  484. }
  485. devp->hd_flags ^= HPET_IE;
  486. break;
  487. case HPET_INFO:
  488. {
  489. memset(info, 0, sizeof(*info));
  490. if (devp->hd_ireqfreq)
  491. info->hi_ireqfreq =
  492. hpet_time_div(hpetp, devp->hd_ireqfreq);
  493. info->hi_flags =
  494. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  495. info->hi_hpet = hpetp->hp_which;
  496. info->hi_timer = devp - hpetp->hp_dev;
  497. break;
  498. }
  499. case HPET_EPI:
  500. v = readq(&timer->hpet_config);
  501. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  502. err = -ENXIO;
  503. break;
  504. }
  505. devp->hd_flags |= HPET_PERIODIC;
  506. break;
  507. case HPET_DPI:
  508. v = readq(&timer->hpet_config);
  509. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  510. err = -ENXIO;
  511. break;
  512. }
  513. if (devp->hd_flags & HPET_PERIODIC &&
  514. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  515. v = readq(&timer->hpet_config);
  516. v ^= Tn_TYPE_CNF_MASK;
  517. writeq(v, &timer->hpet_config);
  518. }
  519. devp->hd_flags &= ~HPET_PERIODIC;
  520. break;
  521. case HPET_IRQFREQ:
  522. if ((arg > hpet_max_freq) &&
  523. !capable(CAP_SYS_RESOURCE)) {
  524. err = -EACCES;
  525. break;
  526. }
  527. if (!arg) {
  528. err = -EINVAL;
  529. break;
  530. }
  531. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  532. }
  533. return err;
  534. }
  535. static long
  536. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  537. {
  538. struct hpet_info info;
  539. int err;
  540. mutex_lock(&hpet_mutex);
  541. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  542. mutex_unlock(&hpet_mutex);
  543. if ((cmd == HPET_INFO) && !err &&
  544. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  545. err = -EFAULT;
  546. return err;
  547. }
  548. #ifdef CONFIG_COMPAT
  549. struct compat_hpet_info {
  550. compat_ulong_t hi_ireqfreq; /* Hz */
  551. compat_ulong_t hi_flags; /* information */
  552. unsigned short hi_hpet;
  553. unsigned short hi_timer;
  554. };
  555. static long
  556. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  557. {
  558. struct hpet_info info;
  559. int err;
  560. mutex_lock(&hpet_mutex);
  561. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  562. mutex_unlock(&hpet_mutex);
  563. if ((cmd == HPET_INFO) && !err) {
  564. struct compat_hpet_info __user *u = compat_ptr(arg);
  565. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  566. put_user(info.hi_flags, &u->hi_flags) ||
  567. put_user(info.hi_hpet, &u->hi_hpet) ||
  568. put_user(info.hi_timer, &u->hi_timer))
  569. err = -EFAULT;
  570. }
  571. return err;
  572. }
  573. #endif
  574. static const struct file_operations hpet_fops = {
  575. .owner = THIS_MODULE,
  576. .llseek = no_llseek,
  577. .read = hpet_read,
  578. .poll = hpet_poll,
  579. .unlocked_ioctl = hpet_ioctl,
  580. #ifdef CONFIG_COMPAT
  581. .compat_ioctl = hpet_compat_ioctl,
  582. #endif
  583. .open = hpet_open,
  584. .release = hpet_release,
  585. .fasync = hpet_fasync,
  586. .mmap = hpet_mmap,
  587. };
  588. static int hpet_is_known(struct hpet_data *hdp)
  589. {
  590. struct hpets *hpetp;
  591. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  592. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  593. return 1;
  594. return 0;
  595. }
  596. static ctl_table hpet_table[] = {
  597. {
  598. .procname = "max-user-freq",
  599. .data = &hpet_max_freq,
  600. .maxlen = sizeof(int),
  601. .mode = 0644,
  602. .proc_handler = proc_dointvec,
  603. },
  604. {}
  605. };
  606. static ctl_table hpet_root[] = {
  607. {
  608. .procname = "hpet",
  609. .maxlen = 0,
  610. .mode = 0555,
  611. .child = hpet_table,
  612. },
  613. {}
  614. };
  615. static ctl_table dev_root[] = {
  616. {
  617. .procname = "dev",
  618. .maxlen = 0,
  619. .mode = 0555,
  620. .child = hpet_root,
  621. },
  622. {}
  623. };
  624. static struct ctl_table_header *sysctl_header;
  625. /*
  626. * Adjustment for when arming the timer with
  627. * initial conditions. That is, main counter
  628. * ticks expired before interrupts are enabled.
  629. */
  630. #define TICK_CALIBRATE (1000UL)
  631. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  632. {
  633. struct hpet_timer __iomem *timer = NULL;
  634. unsigned long t, m, count, i, flags, start;
  635. struct hpet_dev *devp;
  636. int j;
  637. struct hpet __iomem *hpet;
  638. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  639. if ((devp->hd_flags & HPET_OPEN) == 0) {
  640. timer = devp->hd_timer;
  641. break;
  642. }
  643. if (!timer)
  644. return 0;
  645. hpet = hpetp->hp_hpet;
  646. t = read_counter(&timer->hpet_compare);
  647. i = 0;
  648. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  649. local_irq_save(flags);
  650. start = read_counter(&hpet->hpet_mc);
  651. do {
  652. m = read_counter(&hpet->hpet_mc);
  653. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  654. } while (i++, (m - start) < count);
  655. local_irq_restore(flags);
  656. return (m - start) / i;
  657. }
  658. static unsigned long hpet_calibrate(struct hpets *hpetp)
  659. {
  660. unsigned long ret = -1;
  661. unsigned long tmp;
  662. /*
  663. * Try to calibrate until return value becomes stable small value.
  664. * If SMI interruption occurs in calibration loop, the return value
  665. * will be big. This avoids its impact.
  666. */
  667. for ( ; ; ) {
  668. tmp = __hpet_calibrate(hpetp);
  669. if (ret <= tmp)
  670. break;
  671. ret = tmp;
  672. }
  673. return ret;
  674. }
  675. int hpet_alloc(struct hpet_data *hdp)
  676. {
  677. u64 cap, mcfg;
  678. struct hpet_dev *devp;
  679. u32 i, ntimer;
  680. struct hpets *hpetp;
  681. size_t siz;
  682. struct hpet __iomem *hpet;
  683. static struct hpets *last;
  684. unsigned long period;
  685. unsigned long long temp;
  686. u32 remainder;
  687. /*
  688. * hpet_alloc can be called by platform dependent code.
  689. * If platform dependent code has allocated the hpet that
  690. * ACPI has also reported, then we catch it here.
  691. */
  692. if (hpet_is_known(hdp)) {
  693. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  694. __func__);
  695. return 0;
  696. }
  697. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  698. sizeof(struct hpet_dev));
  699. hpetp = kzalloc(siz, GFP_KERNEL);
  700. if (!hpetp)
  701. return -ENOMEM;
  702. hpetp->hp_which = hpet_nhpet++;
  703. hpetp->hp_hpet = hdp->hd_address;
  704. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  705. hpetp->hp_ntimer = hdp->hd_nirqs;
  706. for (i = 0; i < hdp->hd_nirqs; i++)
  707. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  708. hpet = hpetp->hp_hpet;
  709. cap = readq(&hpet->hpet_cap);
  710. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  711. if (hpetp->hp_ntimer != ntimer) {
  712. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  713. " with number of timers\n");
  714. kfree(hpetp);
  715. return -ENODEV;
  716. }
  717. if (last)
  718. last->hp_next = hpetp;
  719. else
  720. hpets = hpetp;
  721. last = hpetp;
  722. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  723. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  724. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  725. temp += period >> 1; /* round */
  726. do_div(temp, period);
  727. hpetp->hp_tick_freq = temp; /* ticks per second */
  728. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  729. hpetp->hp_which, hdp->hd_phys_address,
  730. hpetp->hp_ntimer > 1 ? "s" : "");
  731. for (i = 0; i < hpetp->hp_ntimer; i++)
  732. printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  733. printk("\n");
  734. temp = hpetp->hp_tick_freq;
  735. remainder = do_div(temp, 1000000);
  736. printk(KERN_INFO
  737. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  738. hpetp->hp_which, hpetp->hp_ntimer,
  739. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  740. (unsigned) temp, remainder);
  741. mcfg = readq(&hpet->hpet_config);
  742. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  743. write_counter(0L, &hpet->hpet_mc);
  744. mcfg |= HPET_ENABLE_CNF_MASK;
  745. writeq(mcfg, &hpet->hpet_config);
  746. }
  747. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  748. struct hpet_timer __iomem *timer;
  749. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  750. devp->hd_hpets = hpetp;
  751. devp->hd_hpet = hpet;
  752. devp->hd_timer = timer;
  753. /*
  754. * If the timer was reserved by platform code,
  755. * then make timer unavailable for opens.
  756. */
  757. if (hdp->hd_state & (1 << i)) {
  758. devp->hd_flags = HPET_OPEN;
  759. continue;
  760. }
  761. init_waitqueue_head(&devp->hd_waitqueue);
  762. }
  763. hpetp->hp_delta = hpet_calibrate(hpetp);
  764. /* This clocksource driver currently only works on ia64 */
  765. #ifdef CONFIG_IA64
  766. if (!hpet_clocksource) {
  767. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  768. CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
  769. clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
  770. clocksource_hpet.shift);
  771. clocksource_register(&clocksource_hpet);
  772. hpetp->hp_clocksource = &clocksource_hpet;
  773. hpet_clocksource = &clocksource_hpet;
  774. }
  775. #endif
  776. return 0;
  777. }
  778. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  779. {
  780. struct hpet_data *hdp;
  781. acpi_status status;
  782. struct acpi_resource_address64 addr;
  783. hdp = data;
  784. status = acpi_resource_to_address64(res, &addr);
  785. if (ACPI_SUCCESS(status)) {
  786. hdp->hd_phys_address = addr.minimum;
  787. hdp->hd_address = ioremap(addr.minimum, addr.address_length);
  788. if (hpet_is_known(hdp)) {
  789. iounmap(hdp->hd_address);
  790. return AE_ALREADY_EXISTS;
  791. }
  792. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  793. struct acpi_resource_fixed_memory32 *fixmem32;
  794. fixmem32 = &res->data.fixed_memory32;
  795. if (!fixmem32)
  796. return AE_NO_MEMORY;
  797. hdp->hd_phys_address = fixmem32->address;
  798. hdp->hd_address = ioremap(fixmem32->address,
  799. HPET_RANGE_SIZE);
  800. if (hpet_is_known(hdp)) {
  801. iounmap(hdp->hd_address);
  802. return AE_ALREADY_EXISTS;
  803. }
  804. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  805. struct acpi_resource_extended_irq *irqp;
  806. int i, irq;
  807. irqp = &res->data.extended_irq;
  808. for (i = 0; i < irqp->interrupt_count; i++) {
  809. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  810. irqp->triggering, irqp->polarity);
  811. if (irq < 0)
  812. return AE_ERROR;
  813. hdp->hd_irq[hdp->hd_nirqs] = irq;
  814. hdp->hd_nirqs++;
  815. }
  816. }
  817. return AE_OK;
  818. }
  819. static int hpet_acpi_add(struct acpi_device *device)
  820. {
  821. acpi_status result;
  822. struct hpet_data data;
  823. memset(&data, 0, sizeof(data));
  824. result =
  825. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  826. hpet_resources, &data);
  827. if (ACPI_FAILURE(result))
  828. return -ENODEV;
  829. if (!data.hd_address || !data.hd_nirqs) {
  830. if (data.hd_address)
  831. iounmap(data.hd_address);
  832. printk("%s: no address or irqs in _CRS\n", __func__);
  833. return -ENODEV;
  834. }
  835. return hpet_alloc(&data);
  836. }
  837. static int hpet_acpi_remove(struct acpi_device *device, int type)
  838. {
  839. /* XXX need to unregister clocksource, dealloc mem, etc */
  840. return -EINVAL;
  841. }
  842. static const struct acpi_device_id hpet_device_ids[] = {
  843. {"PNP0103", 0},
  844. {"", 0},
  845. };
  846. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  847. static struct acpi_driver hpet_acpi_driver = {
  848. .name = "hpet",
  849. .ids = hpet_device_ids,
  850. .ops = {
  851. .add = hpet_acpi_add,
  852. .remove = hpet_acpi_remove,
  853. },
  854. };
  855. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  856. static int __init hpet_init(void)
  857. {
  858. int result;
  859. result = misc_register(&hpet_misc);
  860. if (result < 0)
  861. return -ENODEV;
  862. sysctl_header = register_sysctl_table(dev_root);
  863. result = acpi_bus_register_driver(&hpet_acpi_driver);
  864. if (result < 0) {
  865. if (sysctl_header)
  866. unregister_sysctl_table(sysctl_header);
  867. misc_deregister(&hpet_misc);
  868. return result;
  869. }
  870. return 0;
  871. }
  872. static void __exit hpet_exit(void)
  873. {
  874. acpi_bus_unregister_driver(&hpet_acpi_driver);
  875. if (sysctl_header)
  876. unregister_sysctl_table(sysctl_header);
  877. misc_deregister(&hpet_misc);
  878. return;
  879. }
  880. module_init(hpet_init);
  881. module_exit(hpet_exit);
  882. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  883. MODULE_LICENSE("GPL");