pata_at91.c 8.6 KB

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  1. /*
  2. * PATA driver for AT91SAM9260 Static Memory Controller
  3. * with CompactFlash interface in True IDE mode
  4. *
  5. * Copyright (C) 2009 Matyukevich Sergey
  6. *
  7. * Based on:
  8. * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
  9. * * pata_at32 driver by Kristoffer Nyborg Gregertsen
  10. * * at91_ide driver by Stanislaw Gruszka
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License version 2
  14. * as published by the Free Software Foundation.
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/blkdev.h>
  21. #include <linux/gfp.h>
  22. #include <scsi/scsi_host.h>
  23. #include <linux/ata.h>
  24. #include <linux/clk.h>
  25. #include <linux/libata.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/ata_platform.h>
  28. #include <mach/at91sam9_smc.h>
  29. #include <mach/board.h>
  30. #include <mach/gpio.h>
  31. #define DRV_NAME "pata_at91"
  32. #define DRV_VERSION "0.1"
  33. #define CF_IDE_OFFSET 0x00c00000
  34. #define CF_ALT_IDE_OFFSET 0x00e00000
  35. #define CF_IDE_RES_SIZE 0x08
  36. struct at91_ide_info {
  37. unsigned long mode;
  38. unsigned int cs;
  39. struct clk *mck;
  40. void __iomem *ide_addr;
  41. void __iomem *alt_addr;
  42. };
  43. static const struct ata_timing initial_timing =
  44. {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
  45. static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
  46. {
  47. unsigned long mul;
  48. /*
  49. * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
  50. * x * (f / 1_000_000_000) =
  51. * x * ((f * 65536) / 1_000_000_000) / 65536 =
  52. * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
  53. */
  54. mul = (mck_hz / 10000) << 16;
  55. mul /= 100000;
  56. return (ns * mul + 65536) >> 16; /* rounding */
  57. }
  58. static void set_smc_mode(struct at91_ide_info *info)
  59. {
  60. at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
  61. return;
  62. }
  63. static void set_smc_timing(struct device *dev,
  64. struct at91_ide_info *info, const struct ata_timing *ata)
  65. {
  66. unsigned long read_cycle, write_cycle, active, recover;
  67. unsigned long nrd_setup, nrd_pulse, nrd_recover;
  68. unsigned long nwe_setup, nwe_pulse;
  69. unsigned long ncs_write_setup, ncs_write_pulse;
  70. unsigned long ncs_read_setup, ncs_read_pulse;
  71. unsigned long mck_hz;
  72. read_cycle = ata->cyc8b;
  73. nrd_setup = ata->setup;
  74. nrd_pulse = ata->act8b;
  75. nrd_recover = ata->rec8b;
  76. mck_hz = clk_get_rate(info->mck);
  77. read_cycle = calc_mck_cycles(read_cycle, mck_hz);
  78. nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
  79. nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
  80. nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
  81. active = nrd_setup + nrd_pulse;
  82. recover = read_cycle - active;
  83. /* Need at least two cycles recovery */
  84. if (recover < 2)
  85. read_cycle = active + 2;
  86. /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
  87. ncs_read_setup = 1;
  88. ncs_read_pulse = read_cycle - 2;
  89. /* Write timings same as read timings */
  90. write_cycle = read_cycle;
  91. nwe_setup = nrd_setup;
  92. nwe_pulse = nrd_pulse;
  93. ncs_write_setup = ncs_read_setup;
  94. ncs_write_pulse = ncs_read_pulse;
  95. dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
  96. nrd_setup, nrd_pulse, read_cycle);
  97. dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
  98. nwe_setup, nwe_pulse, write_cycle);
  99. dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
  100. ncs_read_setup, ncs_read_pulse);
  101. dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
  102. ncs_write_setup, ncs_write_pulse);
  103. at91_sys_write(AT91_SMC_SETUP(info->cs),
  104. AT91_SMC_NWESETUP_(nwe_setup) |
  105. AT91_SMC_NRDSETUP_(nrd_setup) |
  106. AT91_SMC_NCS_WRSETUP_(ncs_write_setup) |
  107. AT91_SMC_NCS_RDSETUP_(ncs_read_setup));
  108. at91_sys_write(AT91_SMC_PULSE(info->cs),
  109. AT91_SMC_NWEPULSE_(nwe_pulse) |
  110. AT91_SMC_NRDPULSE_(nrd_pulse) |
  111. AT91_SMC_NCS_WRPULSE_(ncs_write_pulse) |
  112. AT91_SMC_NCS_RDPULSE_(ncs_read_pulse));
  113. at91_sys_write(AT91_SMC_CYCLE(info->cs),
  114. AT91_SMC_NWECYCLE_(write_cycle) |
  115. AT91_SMC_NRDCYCLE_(read_cycle));
  116. return;
  117. }
  118. static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
  119. {
  120. struct at91_ide_info *info = ap->host->private_data;
  121. struct ata_timing timing;
  122. int ret;
  123. /* Compute ATA timing and set it to SMC */
  124. ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
  125. if (ret) {
  126. dev_warn(ap->dev, "Failed to compute ATA timing %d, "
  127. "set PIO_0 timing\n", ret);
  128. set_smc_timing(ap->dev, info, &initial_timing);
  129. } else {
  130. set_smc_timing(ap->dev, info, &timing);
  131. }
  132. /* Setup SMC mode */
  133. set_smc_mode(info);
  134. return;
  135. }
  136. static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
  137. unsigned char *buf, unsigned int buflen, int rw)
  138. {
  139. struct at91_ide_info *info = dev->link->ap->host->private_data;
  140. unsigned int consumed;
  141. unsigned long flags;
  142. unsigned int mode;
  143. local_irq_save(flags);
  144. mode = at91_sys_read(AT91_SMC_MODE(info->cs));
  145. /* set 16bit mode before writing data */
  146. at91_sys_write(AT91_SMC_MODE(info->cs),
  147. (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
  148. consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
  149. /* restore 8bit mode after data is written */
  150. at91_sys_write(AT91_SMC_MODE(info->cs),
  151. (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
  152. local_irq_restore(flags);
  153. return consumed;
  154. }
  155. static struct scsi_host_template pata_at91_sht = {
  156. ATA_PIO_SHT(DRV_NAME),
  157. };
  158. static struct ata_port_operations pata_at91_port_ops = {
  159. .inherits = &ata_sff_port_ops,
  160. .sff_data_xfer = pata_at91_data_xfer_noirq,
  161. .set_piomode = pata_at91_set_piomode,
  162. .cable_detect = ata_cable_40wire,
  163. };
  164. static int __devinit pata_at91_probe(struct platform_device *pdev)
  165. {
  166. struct at91_cf_data *board = pdev->dev.platform_data;
  167. struct device *dev = &pdev->dev;
  168. struct at91_ide_info *info;
  169. struct resource *mem_res;
  170. struct ata_host *host;
  171. struct ata_port *ap;
  172. int irq_flags = 0;
  173. int irq = 0;
  174. int ret;
  175. /* get platform resources: IO/CTL memories and irq/rst pins */
  176. if (pdev->num_resources != 1) {
  177. dev_err(&pdev->dev, "invalid number of resources\n");
  178. return -EINVAL;
  179. }
  180. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  181. if (!mem_res) {
  182. dev_err(dev, "failed to get mem resource\n");
  183. return -EINVAL;
  184. }
  185. irq = board->irq_pin;
  186. /* init ata host */
  187. host = ata_host_alloc(dev, 1);
  188. if (!host)
  189. return -ENOMEM;
  190. ap = host->ports[0];
  191. ap->ops = &pata_at91_port_ops;
  192. ap->flags |= ATA_FLAG_SLAVE_POSS;
  193. ap->pio_mask = ATA_PIO4;
  194. if (!irq) {
  195. ap->flags |= ATA_FLAG_PIO_POLLING;
  196. ata_port_desc(ap, "no IRQ, using PIO polling");
  197. }
  198. info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
  199. if (!info) {
  200. dev_err(dev, "failed to allocate memory for private data\n");
  201. return -ENOMEM;
  202. }
  203. info->mck = clk_get(NULL, "mck");
  204. if (IS_ERR(info->mck)) {
  205. dev_err(dev, "failed to get access to mck clock\n");
  206. return -ENODEV;
  207. }
  208. info->cs = board->chipselect;
  209. info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
  210. AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
  211. AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
  212. info->ide_addr = devm_ioremap(dev,
  213. mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
  214. if (!info->ide_addr) {
  215. dev_err(dev, "failed to map IO base\n");
  216. ret = -ENOMEM;
  217. goto err_put;
  218. }
  219. info->alt_addr = devm_ioremap(dev,
  220. mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
  221. if (!info->alt_addr) {
  222. dev_err(dev, "failed to map CTL base\n");
  223. ret = -ENOMEM;
  224. goto err_put;
  225. }
  226. ap->ioaddr.cmd_addr = info->ide_addr;
  227. ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
  228. ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
  229. ata_sff_std_ports(&ap->ioaddr);
  230. ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
  231. (unsigned long long)mem_res->start + CF_IDE_OFFSET,
  232. (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
  233. host->private_data = info;
  234. return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0,
  235. irq ? ata_sff_interrupt : NULL,
  236. irq_flags, &pata_at91_sht);
  237. err_put:
  238. clk_put(info->mck);
  239. return ret;
  240. }
  241. static int __devexit pata_at91_remove(struct platform_device *pdev)
  242. {
  243. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  244. struct at91_ide_info *info;
  245. if (!host)
  246. return 0;
  247. info = host->private_data;
  248. ata_host_detach(host);
  249. if (!info)
  250. return 0;
  251. clk_put(info->mck);
  252. return 0;
  253. }
  254. static struct platform_driver pata_at91_driver = {
  255. .probe = pata_at91_probe,
  256. .remove = __devexit_p(pata_at91_remove),
  257. .driver = {
  258. .name = DRV_NAME,
  259. .owner = THIS_MODULE,
  260. },
  261. };
  262. static int __init pata_at91_init(void)
  263. {
  264. return platform_driver_register(&pata_at91_driver);
  265. }
  266. static void __exit pata_at91_exit(void)
  267. {
  268. platform_driver_unregister(&pata_at91_driver);
  269. }
  270. module_init(pata_at91_init);
  271. module_exit(pata_at91_exit);
  272. MODULE_LICENSE("GPL");
  273. MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
  274. MODULE_AUTHOR("Matyukevich Sergey");
  275. MODULE_VERSION(DRV_VERSION);