ata_generic.c 8.5 KB

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  1. /*
  2. * ata_generic.c - Generic PATA/SATA controller driver.
  3. * Copyright 2005 Red Hat Inc, all rights reserved.
  4. *
  5. * Elements from ide/pci/generic.c
  6. * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
  7. * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com>
  8. *
  9. * May be copied or modified under the terms of the GNU General Public License
  10. *
  11. * Driver for PCI IDE interfaces implementing the standard bus mastering
  12. * interface functionality. This assumes the BIOS did the drive set up and
  13. * tuning for us. By default we do not grab all IDE class devices as they
  14. * may have other drivers or need fixups to avoid problems. Instead we keep
  15. * a default list of stuff without documentation/driver that appears to
  16. * work.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/pci.h>
  21. #include <linux/init.h>
  22. #include <linux/blkdev.h>
  23. #include <linux/delay.h>
  24. #include <scsi/scsi_host.h>
  25. #include <linux/libata.h>
  26. #define DRV_NAME "ata_generic"
  27. #define DRV_VERSION "0.2.15"
  28. /*
  29. * A generic parallel ATA driver using libata
  30. */
  31. enum {
  32. ATA_GEN_CLASS_MATCH = (1 << 0),
  33. ATA_GEN_FORCE_DMA = (1 << 1),
  34. ATA_GEN_INTEL_IDER = (1 << 2),
  35. };
  36. /**
  37. * generic_set_mode - mode setting
  38. * @link: link to set up
  39. * @unused: returned device on error
  40. *
  41. * Use a non standard set_mode function. We don't want to be tuned.
  42. * The BIOS configured everything. Our job is not to fiddle. We
  43. * read the dma enabled bits from the PCI configuration of the device
  44. * and respect them.
  45. */
  46. static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
  47. {
  48. struct ata_port *ap = link->ap;
  49. const struct pci_device_id *id = ap->host->private_data;
  50. int dma_enabled = 0;
  51. struct ata_device *dev;
  52. if (id->driver_data & ATA_GEN_FORCE_DMA) {
  53. dma_enabled = 0xff;
  54. } else if (ap->ioaddr.bmdma_addr) {
  55. /* Bits 5 and 6 indicate if DMA is active on master/slave */
  56. dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
  57. }
  58. ata_for_each_dev(dev, link, ENABLED) {
  59. /* We don't really care */
  60. dev->pio_mode = XFER_PIO_0;
  61. dev->dma_mode = XFER_MW_DMA_0;
  62. /* We do need the right mode information for DMA or PIO
  63. and this comes from the current configuration flags */
  64. if (dma_enabled & (1 << (5 + dev->devno))) {
  65. unsigned int xfer_mask = ata_id_xfermask(dev->id);
  66. const char *name;
  67. if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
  68. name = ata_mode_string(xfer_mask);
  69. else {
  70. /* SWDMA perhaps? */
  71. name = "DMA";
  72. xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
  73. }
  74. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  75. name);
  76. dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
  77. dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
  78. dev->flags &= ~ATA_DFLAG_PIO;
  79. } else {
  80. ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
  81. dev->xfer_mode = XFER_PIO_0;
  82. dev->xfer_shift = ATA_SHIFT_PIO;
  83. dev->flags |= ATA_DFLAG_PIO;
  84. }
  85. }
  86. return 0;
  87. }
  88. static struct scsi_host_template generic_sht = {
  89. ATA_BMDMA_SHT(DRV_NAME),
  90. };
  91. static struct ata_port_operations generic_port_ops = {
  92. .inherits = &ata_bmdma_port_ops,
  93. .cable_detect = ata_cable_unknown,
  94. .set_mode = generic_set_mode,
  95. };
  96. static int all_generic_ide; /* Set to claim all devices */
  97. /**
  98. * is_intel_ider - identify intel IDE-R devices
  99. * @dev: PCI device
  100. *
  101. * Distinguish Intel IDE-R controller devices from other Intel IDE
  102. * devices. IDE-R devices have no timing registers and are in
  103. * most respects virtual. They should be driven by the ata_generic
  104. * driver.
  105. *
  106. * IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
  107. * it non zero. All Intel ATA has 0x40 writable (timing), but it is
  108. * not writable on IDE-R devices (this is guaranteed).
  109. */
  110. static int is_intel_ider(struct pci_dev *dev)
  111. {
  112. /* For Intel IDE the value at 0xF8 is only zero on IDE-R
  113. interfaces */
  114. u32 r;
  115. u16 t;
  116. /* Check the manufacturing ID, it will be zero for IDE-R */
  117. pci_read_config_dword(dev, 0xF8, &r);
  118. /* Not IDE-R: punt so that ata_(old)piix gets it */
  119. if (r != 0)
  120. return 0;
  121. /* 0xF8 will also be zero on some early Intel IDE devices
  122. but they will have a sane timing register */
  123. pci_read_config_word(dev, 0x40, &t);
  124. if (t != 0)
  125. return 0;
  126. /* Finally check if the timing register is writable so that
  127. we eliminate any early devices hot-docked in a docking
  128. station */
  129. pci_write_config_word(dev, 0x40, 1);
  130. pci_read_config_word(dev, 0x40, &t);
  131. if (t) {
  132. pci_write_config_word(dev, 0x40, 0);
  133. return 0;
  134. }
  135. return 1;
  136. }
  137. /**
  138. * ata_generic_init - attach generic IDE
  139. * @dev: PCI device found
  140. * @id: match entry
  141. *
  142. * Called each time a matching IDE interface is found. We check if the
  143. * interface is one we wish to claim and if so we perform any chip
  144. * specific hacks then let the ATA layer do the heavy lifting.
  145. */
  146. static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  147. {
  148. u16 command;
  149. static const struct ata_port_info info = {
  150. .flags = ATA_FLAG_SLAVE_POSS,
  151. .pio_mask = ATA_PIO4,
  152. .mwdma_mask = ATA_MWDMA2,
  153. .udma_mask = ATA_UDMA5,
  154. .port_ops = &generic_port_ops
  155. };
  156. const struct ata_port_info *ppi[] = { &info, NULL };
  157. /* Don't use the generic entry unless instructed to do so */
  158. if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
  159. return -ENODEV;
  160. if (id->driver_data & ATA_GEN_INTEL_IDER)
  161. if (!is_intel_ider(dev))
  162. return -ENODEV;
  163. /* Devices that need care */
  164. if (dev->vendor == PCI_VENDOR_ID_UMC &&
  165. dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
  166. (!(PCI_FUNC(dev->devfn) & 1)))
  167. return -ENODEV;
  168. if (dev->vendor == PCI_VENDOR_ID_OPTI &&
  169. dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
  170. (!(PCI_FUNC(dev->devfn) & 1)))
  171. return -ENODEV;
  172. /* Don't re-enable devices in generic mode or we will break some
  173. motherboards with disabled and unused IDE controllers */
  174. pci_read_config_word(dev, PCI_COMMAND, &command);
  175. if (!(command & PCI_COMMAND_IO))
  176. return -ENODEV;
  177. if (dev->vendor == PCI_VENDOR_ID_AL)
  178. ata_pci_bmdma_clear_simplex(dev);
  179. if (dev->vendor == PCI_VENDOR_ID_ATI) {
  180. int rc = pcim_enable_device(dev);
  181. if (rc < 0)
  182. return rc;
  183. pcim_pin_device(dev);
  184. }
  185. return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
  186. }
  187. static struct pci_device_id ata_generic[] = {
  188. { PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
  189. { PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
  190. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8673F), },
  191. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886A), },
  192. { PCI_DEVICE(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF), },
  193. { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), },
  194. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), },
  195. { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), },
  196. { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
  197. .driver_data = ATA_GEN_FORCE_DMA },
  198. /*
  199. * For some reason, MCP89 on MacBook 7,1 doesn't work with
  200. * ahci, use ata_generic instead.
  201. */
  202. { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA,
  203. PCI_VENDOR_ID_APPLE, 0xcb89,
  204. .driver_data = ATA_GEN_FORCE_DMA },
  205. #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
  206. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
  207. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), },
  208. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), },
  209. { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), },
  210. #endif
  211. /* Intel, IDE class device */
  212. { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  213. PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
  214. .driver_data = ATA_GEN_INTEL_IDER },
  215. /* Must come last. If you add entries adjust this table appropriately */
  216. { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
  217. .driver_data = ATA_GEN_CLASS_MATCH },
  218. { 0, },
  219. };
  220. static struct pci_driver ata_generic_pci_driver = {
  221. .name = DRV_NAME,
  222. .id_table = ata_generic,
  223. .probe = ata_generic_init_one,
  224. .remove = ata_pci_remove_one,
  225. #ifdef CONFIG_PM
  226. .suspend = ata_pci_device_suspend,
  227. .resume = ata_pci_device_resume,
  228. #endif
  229. };
  230. static int __init ata_generic_init(void)
  231. {
  232. return pci_register_driver(&ata_generic_pci_driver);
  233. }
  234. static void __exit ata_generic_exit(void)
  235. {
  236. pci_unregister_driver(&ata_generic_pci_driver);
  237. }
  238. MODULE_AUTHOR("Alan Cox");
  239. MODULE_DESCRIPTION("low-level driver for generic ATA");
  240. MODULE_LICENSE("GPL");
  241. MODULE_DEVICE_TABLE(pci, ata_generic);
  242. MODULE_VERSION(DRV_VERSION);
  243. module_init(ata_generic_init);
  244. module_exit(ata_generic_exit);
  245. module_param(all_generic_ide, int, 0);