cpu.c 4.3 KB

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  1. /* linux/arch/arm/mach-s5pv310/cpu.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/sched.h>
  11. #include <linux/sysdev.h>
  12. #include <asm/mach/map.h>
  13. #include <asm/mach/irq.h>
  14. #include <asm/proc-fns.h>
  15. #include <asm/hardware/cache-l2x0.h>
  16. #include <plat/cpu.h>
  17. #include <plat/clock.h>
  18. #include <plat/s5pv310.h>
  19. #include <plat/sdhci.h>
  20. #include <mach/regs-irq.h>
  21. extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
  22. unsigned int irq_start);
  23. extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
  24. /* Initial IO mappings */
  25. static struct map_desc s5pv310_iodesc[] __initdata = {
  26. {
  27. .virtual = (unsigned long)S5P_VA_SYSRAM,
  28. .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
  29. .length = SZ_4K,
  30. .type = MT_DEVICE,
  31. }, {
  32. .virtual = (unsigned long)S5P_VA_CMU,
  33. .pfn = __phys_to_pfn(S5PV310_PA_CMU),
  34. .length = SZ_128K,
  35. .type = MT_DEVICE,
  36. }, {
  37. .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
  38. .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
  39. .length = SZ_4K,
  40. .type = MT_DEVICE,
  41. }, {
  42. .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
  43. .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
  44. .length = SZ_8K,
  45. .type = MT_DEVICE,
  46. }, {
  47. .virtual = (unsigned long)S5P_VA_L2CC,
  48. .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
  49. .length = SZ_4K,
  50. .type = MT_DEVICE,
  51. }, {
  52. .virtual = (unsigned long)S5P_VA_GPIO1,
  53. .pfn = __phys_to_pfn(S5PV310_PA_GPIO1),
  54. .length = SZ_4K,
  55. .type = MT_DEVICE,
  56. }, {
  57. .virtual = (unsigned long)S5P_VA_GPIO2,
  58. .pfn = __phys_to_pfn(S5PV310_PA_GPIO2),
  59. .length = SZ_4K,
  60. .type = MT_DEVICE,
  61. }, {
  62. .virtual = (unsigned long)S5P_VA_GPIO3,
  63. .pfn = __phys_to_pfn(S5PV310_PA_GPIO3),
  64. .length = SZ_256,
  65. .type = MT_DEVICE,
  66. }, {
  67. .virtual = (unsigned long)S3C_VA_UART,
  68. .pfn = __phys_to_pfn(S3C_PA_UART),
  69. .length = SZ_512K,
  70. .type = MT_DEVICE,
  71. }, {
  72. .virtual = (unsigned long)S5P_VA_SROMC,
  73. .pfn = __phys_to_pfn(S5PV310_PA_SROMC),
  74. .length = SZ_4K,
  75. .type = MT_DEVICE,
  76. },
  77. };
  78. static void s5pv310_idle(void)
  79. {
  80. if (!need_resched())
  81. cpu_do_idle();
  82. local_irq_enable();
  83. }
  84. /* s5pv310_map_io
  85. *
  86. * register the standard cpu IO areas
  87. */
  88. void __init s5pv310_map_io(void)
  89. {
  90. iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
  91. /* initialize device information early */
  92. s5pv310_default_sdhci0();
  93. s5pv310_default_sdhci1();
  94. s5pv310_default_sdhci2();
  95. s5pv310_default_sdhci3();
  96. }
  97. void __init s5pv310_init_clocks(int xtal)
  98. {
  99. printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
  100. s3c24xx_register_baseclocks(xtal);
  101. s5p_register_clocks(xtal);
  102. s5pv310_register_clocks();
  103. s5pv310_setup_clocks();
  104. }
  105. void __init s5pv310_init_irq(void)
  106. {
  107. int irq;
  108. gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
  109. for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
  110. combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
  111. COMBINER_IRQ(irq, 0));
  112. combiner_cascade_irq(irq, IRQ_SPI(irq));
  113. }
  114. /* The parameters of s5p_init_irq() are for VIC init.
  115. * Theses parameters should be NULL and 0 because S5PV310
  116. * uses GIC instead of VIC.
  117. */
  118. s5p_init_irq(NULL, 0);
  119. }
  120. struct sysdev_class s5pv310_sysclass = {
  121. .name = "s5pv310-core",
  122. };
  123. static struct sys_device s5pv310_sysdev = {
  124. .cls = &s5pv310_sysclass,
  125. };
  126. static int __init s5pv310_core_init(void)
  127. {
  128. return sysdev_class_register(&s5pv310_sysclass);
  129. }
  130. core_initcall(s5pv310_core_init);
  131. #ifdef CONFIG_CACHE_L2X0
  132. static int __init s5pv310_l2x0_cache_init(void)
  133. {
  134. /* TAG, Data Latency Control: 2cycle */
  135. __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
  136. __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
  137. /* L2X0 Prefetch Control */
  138. __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
  139. /* L2X0 Power Control */
  140. __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
  141. S5P_VA_L2CC + L2X0_POWER_CTRL);
  142. l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff);
  143. return 0;
  144. }
  145. early_initcall(s5pv310_l2x0_cache_init);
  146. #endif
  147. int __init s5pv310_init(void)
  148. {
  149. printk(KERN_INFO "S5PV310: Initializing architecture\n");
  150. /* set idle function */
  151. pm_idle = s5pv310_idle;
  152. return sysdev_register(&s5pv310_sysdev);
  153. }