events.c 25 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <asm/desc.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/irq.h>
  33. #include <asm/idle.h>
  34. #include <asm/sync_bitops.h>
  35. #include <asm/xen/hypercall.h>
  36. #include <asm/xen/hypervisor.h>
  37. #include <xen/xen.h>
  38. #include <xen/hvm.h>
  39. #include <xen/xen-ops.h>
  40. #include <xen/events.h>
  41. #include <xen/interface/xen.h>
  42. #include <xen/interface/event_channel.h>
  43. #include <xen/interface/hvm/hvm_op.h>
  44. #include <xen/interface/hvm/params.h>
  45. /*
  46. * This lock protects updates to the following mapping and reference-count
  47. * arrays. The lock does not need to be acquired to read the mapping tables.
  48. */
  49. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  50. /* IRQ <-> VIRQ mapping. */
  51. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  52. /* IRQ <-> IPI mapping */
  53. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  54. /* Interrupt types. */
  55. enum xen_irq_type {
  56. IRQT_UNBOUND = 0,
  57. IRQT_PIRQ,
  58. IRQT_VIRQ,
  59. IRQT_IPI,
  60. IRQT_EVTCHN
  61. };
  62. /*
  63. * Packed IRQ information:
  64. * type - enum xen_irq_type
  65. * event channel - irq->event channel mapping
  66. * cpu - cpu this event channel is bound to
  67. * index - type-specific information:
  68. * PIRQ - vector, with MSB being "needs EIO"
  69. * VIRQ - virq number
  70. * IPI - IPI vector
  71. * EVTCHN -
  72. */
  73. struct irq_info
  74. {
  75. enum xen_irq_type type; /* type */
  76. unsigned short evtchn; /* event channel */
  77. unsigned short cpu; /* cpu bound */
  78. union {
  79. unsigned short virq;
  80. enum ipi_vector ipi;
  81. struct {
  82. unsigned short gsi;
  83. unsigned short vector;
  84. } pirq;
  85. } u;
  86. };
  87. static struct irq_info irq_info[NR_IRQS];
  88. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  89. [0 ... NR_EVENT_CHANNELS-1] = -1
  90. };
  91. struct cpu_evtchn_s {
  92. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  93. };
  94. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  95. static inline unsigned long *cpu_evtchn_mask(int cpu)
  96. {
  97. return cpu_evtchn_mask_p[cpu].bits;
  98. }
  99. /* Xen will never allocate port zero for any purpose. */
  100. #define VALID_EVTCHN(chn) ((chn) != 0)
  101. static struct irq_chip xen_dynamic_chip;
  102. static struct irq_chip xen_percpu_chip;
  103. /* Constructor for packed IRQ information. */
  104. static struct irq_info mk_unbound_info(void)
  105. {
  106. return (struct irq_info) { .type = IRQT_UNBOUND };
  107. }
  108. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  109. {
  110. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  111. .cpu = 0 };
  112. }
  113. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  114. {
  115. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  116. .cpu = 0, .u.ipi = ipi };
  117. }
  118. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  119. {
  120. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  121. .cpu = 0, .u.virq = virq };
  122. }
  123. static struct irq_info mk_pirq_info(unsigned short evtchn,
  124. unsigned short gsi, unsigned short vector)
  125. {
  126. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  127. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  128. }
  129. /*
  130. * Accessors for packed IRQ information.
  131. */
  132. static struct irq_info *info_for_irq(unsigned irq)
  133. {
  134. return &irq_info[irq];
  135. }
  136. static unsigned int evtchn_from_irq(unsigned irq)
  137. {
  138. return info_for_irq(irq)->evtchn;
  139. }
  140. unsigned irq_from_evtchn(unsigned int evtchn)
  141. {
  142. return evtchn_to_irq[evtchn];
  143. }
  144. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  145. static enum ipi_vector ipi_from_irq(unsigned irq)
  146. {
  147. struct irq_info *info = info_for_irq(irq);
  148. BUG_ON(info == NULL);
  149. BUG_ON(info->type != IRQT_IPI);
  150. return info->u.ipi;
  151. }
  152. static unsigned virq_from_irq(unsigned irq)
  153. {
  154. struct irq_info *info = info_for_irq(irq);
  155. BUG_ON(info == NULL);
  156. BUG_ON(info->type != IRQT_VIRQ);
  157. return info->u.virq;
  158. }
  159. static unsigned gsi_from_irq(unsigned irq)
  160. {
  161. struct irq_info *info = info_for_irq(irq);
  162. BUG_ON(info == NULL);
  163. BUG_ON(info->type != IRQT_PIRQ);
  164. return info->u.pirq.gsi;
  165. }
  166. static unsigned vector_from_irq(unsigned irq)
  167. {
  168. struct irq_info *info = info_for_irq(irq);
  169. BUG_ON(info == NULL);
  170. BUG_ON(info->type != IRQT_PIRQ);
  171. return info->u.pirq.vector;
  172. }
  173. static enum xen_irq_type type_from_irq(unsigned irq)
  174. {
  175. return info_for_irq(irq)->type;
  176. }
  177. static unsigned cpu_from_irq(unsigned irq)
  178. {
  179. return info_for_irq(irq)->cpu;
  180. }
  181. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  182. {
  183. int irq = evtchn_to_irq[evtchn];
  184. unsigned ret = 0;
  185. if (irq != -1)
  186. ret = cpu_from_irq(irq);
  187. return ret;
  188. }
  189. static inline unsigned long active_evtchns(unsigned int cpu,
  190. struct shared_info *sh,
  191. unsigned int idx)
  192. {
  193. return (sh->evtchn_pending[idx] &
  194. cpu_evtchn_mask(cpu)[idx] &
  195. ~sh->evtchn_mask[idx]);
  196. }
  197. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  198. {
  199. int irq = evtchn_to_irq[chn];
  200. BUG_ON(irq == -1);
  201. #ifdef CONFIG_SMP
  202. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  203. #endif
  204. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  205. __set_bit(chn, cpu_evtchn_mask(cpu));
  206. irq_info[irq].cpu = cpu;
  207. }
  208. static void init_evtchn_cpu_bindings(void)
  209. {
  210. #ifdef CONFIG_SMP
  211. struct irq_desc *desc;
  212. int i;
  213. /* By default all event channels notify CPU#0. */
  214. for_each_irq_desc(i, desc) {
  215. cpumask_copy(desc->affinity, cpumask_of(0));
  216. }
  217. #endif
  218. memset(cpu_evtchn_mask(0), ~0, sizeof(struct cpu_evtchn_s));
  219. }
  220. static inline void clear_evtchn(int port)
  221. {
  222. struct shared_info *s = HYPERVISOR_shared_info;
  223. sync_clear_bit(port, &s->evtchn_pending[0]);
  224. }
  225. static inline void set_evtchn(int port)
  226. {
  227. struct shared_info *s = HYPERVISOR_shared_info;
  228. sync_set_bit(port, &s->evtchn_pending[0]);
  229. }
  230. static inline int test_evtchn(int port)
  231. {
  232. struct shared_info *s = HYPERVISOR_shared_info;
  233. return sync_test_bit(port, &s->evtchn_pending[0]);
  234. }
  235. /**
  236. * notify_remote_via_irq - send event to remote end of event channel via irq
  237. * @irq: irq of event channel to send event to
  238. *
  239. * Unlike notify_remote_via_evtchn(), this is safe to use across
  240. * save/restore. Notifications on a broken connection are silently
  241. * dropped.
  242. */
  243. void notify_remote_via_irq(int irq)
  244. {
  245. int evtchn = evtchn_from_irq(irq);
  246. if (VALID_EVTCHN(evtchn))
  247. notify_remote_via_evtchn(evtchn);
  248. }
  249. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  250. static void mask_evtchn(int port)
  251. {
  252. struct shared_info *s = HYPERVISOR_shared_info;
  253. sync_set_bit(port, &s->evtchn_mask[0]);
  254. }
  255. static void unmask_evtchn(int port)
  256. {
  257. struct shared_info *s = HYPERVISOR_shared_info;
  258. unsigned int cpu = get_cpu();
  259. BUG_ON(!irqs_disabled());
  260. /* Slow path (hypercall) if this is a non-local port. */
  261. if (unlikely(cpu != cpu_from_evtchn(port))) {
  262. struct evtchn_unmask unmask = { .port = port };
  263. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  264. } else {
  265. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  266. sync_clear_bit(port, &s->evtchn_mask[0]);
  267. /*
  268. * The following is basically the equivalent of
  269. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  270. * the interrupt edge' if the channel is masked.
  271. */
  272. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  273. !sync_test_and_set_bit(port / BITS_PER_LONG,
  274. &vcpu_info->evtchn_pending_sel))
  275. vcpu_info->evtchn_upcall_pending = 1;
  276. }
  277. put_cpu();
  278. }
  279. static int find_unbound_irq(void)
  280. {
  281. int irq;
  282. struct irq_desc *desc;
  283. for (irq = 0; irq < nr_irqs; irq++) {
  284. desc = irq_to_desc(irq);
  285. /* only 0->15 have init'd desc; handle irq > 16 */
  286. if (desc == NULL)
  287. break;
  288. if (desc->chip == &no_irq_chip)
  289. break;
  290. if (desc->chip != &xen_dynamic_chip)
  291. continue;
  292. if (irq_info[irq].type == IRQT_UNBOUND)
  293. break;
  294. }
  295. if (irq == nr_irqs)
  296. panic("No available IRQ to bind to: increase nr_irqs!\n");
  297. desc = irq_to_desc_alloc_node(irq, 0);
  298. if (WARN_ON(desc == NULL))
  299. return -1;
  300. dynamic_irq_init_keep_chip_data(irq);
  301. return irq;
  302. }
  303. int bind_evtchn_to_irq(unsigned int evtchn)
  304. {
  305. int irq;
  306. spin_lock(&irq_mapping_update_lock);
  307. irq = evtchn_to_irq[evtchn];
  308. if (irq == -1) {
  309. irq = find_unbound_irq();
  310. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  311. handle_fasteoi_irq, "event");
  312. evtchn_to_irq[evtchn] = irq;
  313. irq_info[irq] = mk_evtchn_info(evtchn);
  314. }
  315. spin_unlock(&irq_mapping_update_lock);
  316. return irq;
  317. }
  318. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  319. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  320. {
  321. struct evtchn_bind_ipi bind_ipi;
  322. int evtchn, irq;
  323. spin_lock(&irq_mapping_update_lock);
  324. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  325. if (irq == -1) {
  326. irq = find_unbound_irq();
  327. if (irq < 0)
  328. goto out;
  329. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  330. handle_percpu_irq, "ipi");
  331. bind_ipi.vcpu = cpu;
  332. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  333. &bind_ipi) != 0)
  334. BUG();
  335. evtchn = bind_ipi.port;
  336. evtchn_to_irq[evtchn] = irq;
  337. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  338. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  339. bind_evtchn_to_cpu(evtchn, cpu);
  340. }
  341. out:
  342. spin_unlock(&irq_mapping_update_lock);
  343. return irq;
  344. }
  345. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  346. {
  347. struct evtchn_bind_virq bind_virq;
  348. int evtchn, irq;
  349. spin_lock(&irq_mapping_update_lock);
  350. irq = per_cpu(virq_to_irq, cpu)[virq];
  351. if (irq == -1) {
  352. irq = find_unbound_irq();
  353. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  354. handle_percpu_irq, "virq");
  355. bind_virq.virq = virq;
  356. bind_virq.vcpu = cpu;
  357. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  358. &bind_virq) != 0)
  359. BUG();
  360. evtchn = bind_virq.port;
  361. evtchn_to_irq[evtchn] = irq;
  362. irq_info[irq] = mk_virq_info(evtchn, virq);
  363. per_cpu(virq_to_irq, cpu)[virq] = irq;
  364. bind_evtchn_to_cpu(evtchn, cpu);
  365. }
  366. spin_unlock(&irq_mapping_update_lock);
  367. return irq;
  368. }
  369. static void unbind_from_irq(unsigned int irq)
  370. {
  371. struct evtchn_close close;
  372. int evtchn = evtchn_from_irq(irq);
  373. spin_lock(&irq_mapping_update_lock);
  374. if (VALID_EVTCHN(evtchn)) {
  375. close.port = evtchn;
  376. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  377. BUG();
  378. switch (type_from_irq(irq)) {
  379. case IRQT_VIRQ:
  380. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  381. [virq_from_irq(irq)] = -1;
  382. break;
  383. case IRQT_IPI:
  384. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  385. [ipi_from_irq(irq)] = -1;
  386. break;
  387. default:
  388. break;
  389. }
  390. /* Closed ports are implicitly re-bound to VCPU0. */
  391. bind_evtchn_to_cpu(evtchn, 0);
  392. evtchn_to_irq[evtchn] = -1;
  393. }
  394. if (irq_info[irq].type != IRQT_UNBOUND) {
  395. irq_info[irq] = mk_unbound_info();
  396. dynamic_irq_cleanup(irq);
  397. }
  398. spin_unlock(&irq_mapping_update_lock);
  399. }
  400. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  401. irq_handler_t handler,
  402. unsigned long irqflags,
  403. const char *devname, void *dev_id)
  404. {
  405. unsigned int irq;
  406. int retval;
  407. irq = bind_evtchn_to_irq(evtchn);
  408. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  409. if (retval != 0) {
  410. unbind_from_irq(irq);
  411. return retval;
  412. }
  413. return irq;
  414. }
  415. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  416. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  417. irq_handler_t handler,
  418. unsigned long irqflags, const char *devname, void *dev_id)
  419. {
  420. unsigned int irq;
  421. int retval;
  422. irq = bind_virq_to_irq(virq, cpu);
  423. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  424. if (retval != 0) {
  425. unbind_from_irq(irq);
  426. return retval;
  427. }
  428. return irq;
  429. }
  430. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  431. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  432. unsigned int cpu,
  433. irq_handler_t handler,
  434. unsigned long irqflags,
  435. const char *devname,
  436. void *dev_id)
  437. {
  438. int irq, retval;
  439. irq = bind_ipi_to_irq(ipi, cpu);
  440. if (irq < 0)
  441. return irq;
  442. irqflags |= IRQF_NO_SUSPEND;
  443. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  444. if (retval != 0) {
  445. unbind_from_irq(irq);
  446. return retval;
  447. }
  448. return irq;
  449. }
  450. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  451. {
  452. free_irq(irq, dev_id);
  453. unbind_from_irq(irq);
  454. }
  455. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  456. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  457. {
  458. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  459. BUG_ON(irq < 0);
  460. notify_remote_via_irq(irq);
  461. }
  462. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  463. {
  464. struct shared_info *sh = HYPERVISOR_shared_info;
  465. int cpu = smp_processor_id();
  466. unsigned long *cpu_evtchn = cpu_evtchn_mask(cpu);
  467. int i;
  468. unsigned long flags;
  469. static DEFINE_SPINLOCK(debug_lock);
  470. struct vcpu_info *v;
  471. spin_lock_irqsave(&debug_lock, flags);
  472. printk("\nvcpu %d\n ", cpu);
  473. for_each_online_cpu(i) {
  474. int pending;
  475. v = per_cpu(xen_vcpu, i);
  476. pending = (get_irq_regs() && i == cpu)
  477. ? xen_irqs_disabled(get_irq_regs())
  478. : v->evtchn_upcall_mask;
  479. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  480. pending, v->evtchn_upcall_pending,
  481. (int)(sizeof(v->evtchn_pending_sel)*2),
  482. v->evtchn_pending_sel);
  483. }
  484. v = per_cpu(xen_vcpu, cpu);
  485. printk("\npending:\n ");
  486. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  487. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  488. sh->evtchn_pending[i],
  489. i % 8 == 0 ? "\n " : " ");
  490. printk("\nglobal mask:\n ");
  491. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  492. printk("%0*lx%s",
  493. (int)(sizeof(sh->evtchn_mask[0])*2),
  494. sh->evtchn_mask[i],
  495. i % 8 == 0 ? "\n " : " ");
  496. printk("\nglobally unmasked:\n ");
  497. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  498. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  499. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  500. i % 8 == 0 ? "\n " : " ");
  501. printk("\nlocal cpu%d mask:\n ", cpu);
  502. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  503. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  504. cpu_evtchn[i],
  505. i % 8 == 0 ? "\n " : " ");
  506. printk("\nlocally unmasked:\n ");
  507. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  508. unsigned long pending = sh->evtchn_pending[i]
  509. & ~sh->evtchn_mask[i]
  510. & cpu_evtchn[i];
  511. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  512. pending, i % 8 == 0 ? "\n " : " ");
  513. }
  514. printk("\npending list:\n");
  515. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  516. if (sync_test_bit(i, sh->evtchn_pending)) {
  517. int word_idx = i / BITS_PER_LONG;
  518. printk(" %d: event %d -> irq %d%s%s%s\n",
  519. cpu_from_evtchn(i), i,
  520. evtchn_to_irq[i],
  521. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  522. ? "" : " l2-clear",
  523. !sync_test_bit(i, sh->evtchn_mask)
  524. ? "" : " globally-masked",
  525. sync_test_bit(i, cpu_evtchn)
  526. ? "" : " locally-masked");
  527. }
  528. }
  529. spin_unlock_irqrestore(&debug_lock, flags);
  530. return IRQ_HANDLED;
  531. }
  532. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  533. /*
  534. * Search the CPUs pending events bitmasks. For each one found, map
  535. * the event number to an irq, and feed it into do_IRQ() for
  536. * handling.
  537. *
  538. * Xen uses a two-level bitmap to speed searching. The first level is
  539. * a bitset of words which contain pending event bits. The second
  540. * level is a bitset of pending events themselves.
  541. */
  542. static void __xen_evtchn_do_upcall(void)
  543. {
  544. int cpu = get_cpu();
  545. struct shared_info *s = HYPERVISOR_shared_info;
  546. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  547. unsigned count;
  548. do {
  549. unsigned long pending_words;
  550. vcpu_info->evtchn_upcall_pending = 0;
  551. if (__get_cpu_var(xed_nesting_count)++)
  552. goto out;
  553. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  554. /* Clear master flag /before/ clearing selector flag. */
  555. wmb();
  556. #endif
  557. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  558. while (pending_words != 0) {
  559. unsigned long pending_bits;
  560. int word_idx = __ffs(pending_words);
  561. pending_words &= ~(1UL << word_idx);
  562. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  563. int bit_idx = __ffs(pending_bits);
  564. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  565. int irq = evtchn_to_irq[port];
  566. struct irq_desc *desc;
  567. mask_evtchn(port);
  568. clear_evtchn(port);
  569. if (irq != -1) {
  570. desc = irq_to_desc(irq);
  571. if (desc)
  572. generic_handle_irq_desc(irq, desc);
  573. }
  574. }
  575. }
  576. BUG_ON(!irqs_disabled());
  577. count = __get_cpu_var(xed_nesting_count);
  578. __get_cpu_var(xed_nesting_count) = 0;
  579. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  580. out:
  581. put_cpu();
  582. }
  583. void xen_evtchn_do_upcall(struct pt_regs *regs)
  584. {
  585. struct pt_regs *old_regs = set_irq_regs(regs);
  586. exit_idle();
  587. irq_enter();
  588. __xen_evtchn_do_upcall();
  589. irq_exit();
  590. set_irq_regs(old_regs);
  591. }
  592. void xen_hvm_evtchn_do_upcall(void)
  593. {
  594. __xen_evtchn_do_upcall();
  595. }
  596. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  597. /* Rebind a new event channel to an existing irq. */
  598. void rebind_evtchn_irq(int evtchn, int irq)
  599. {
  600. struct irq_info *info = info_for_irq(irq);
  601. /* Make sure the irq is masked, since the new event channel
  602. will also be masked. */
  603. disable_irq(irq);
  604. spin_lock(&irq_mapping_update_lock);
  605. /* After resume the irq<->evtchn mappings are all cleared out */
  606. BUG_ON(evtchn_to_irq[evtchn] != -1);
  607. /* Expect irq to have been bound before,
  608. so there should be a proper type */
  609. BUG_ON(info->type == IRQT_UNBOUND);
  610. evtchn_to_irq[evtchn] = irq;
  611. irq_info[irq] = mk_evtchn_info(evtchn);
  612. spin_unlock(&irq_mapping_update_lock);
  613. /* new event channels are always bound to cpu 0 */
  614. irq_set_affinity(irq, cpumask_of(0));
  615. /* Unmask the event channel. */
  616. enable_irq(irq);
  617. }
  618. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  619. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  620. {
  621. struct evtchn_bind_vcpu bind_vcpu;
  622. int evtchn = evtchn_from_irq(irq);
  623. /* events delivered via platform PCI interrupts are always
  624. * routed to vcpu 0 */
  625. if (!VALID_EVTCHN(evtchn) ||
  626. (xen_hvm_domain() && !xen_have_vector_callback))
  627. return -1;
  628. /* Send future instances of this interrupt to other vcpu. */
  629. bind_vcpu.port = evtchn;
  630. bind_vcpu.vcpu = tcpu;
  631. /*
  632. * If this fails, it usually just indicates that we're dealing with a
  633. * virq or IPI channel, which don't actually need to be rebound. Ignore
  634. * it, but don't do the xenlinux-level rebind in that case.
  635. */
  636. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  637. bind_evtchn_to_cpu(evtchn, tcpu);
  638. return 0;
  639. }
  640. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  641. {
  642. unsigned tcpu = cpumask_first(dest);
  643. return rebind_irq_to_cpu(irq, tcpu);
  644. }
  645. int resend_irq_on_evtchn(unsigned int irq)
  646. {
  647. int masked, evtchn = evtchn_from_irq(irq);
  648. struct shared_info *s = HYPERVISOR_shared_info;
  649. if (!VALID_EVTCHN(evtchn))
  650. return 1;
  651. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  652. sync_set_bit(evtchn, s->evtchn_pending);
  653. if (!masked)
  654. unmask_evtchn(evtchn);
  655. return 1;
  656. }
  657. static void enable_dynirq(unsigned int irq)
  658. {
  659. int evtchn = evtchn_from_irq(irq);
  660. if (VALID_EVTCHN(evtchn))
  661. unmask_evtchn(evtchn);
  662. }
  663. static void disable_dynirq(unsigned int irq)
  664. {
  665. int evtchn = evtchn_from_irq(irq);
  666. if (VALID_EVTCHN(evtchn))
  667. mask_evtchn(evtchn);
  668. }
  669. static void ack_dynirq(unsigned int irq)
  670. {
  671. int evtchn = evtchn_from_irq(irq);
  672. move_masked_irq(irq);
  673. if (VALID_EVTCHN(evtchn))
  674. unmask_evtchn(evtchn);
  675. }
  676. static int retrigger_dynirq(unsigned int irq)
  677. {
  678. int evtchn = evtchn_from_irq(irq);
  679. struct shared_info *sh = HYPERVISOR_shared_info;
  680. int ret = 0;
  681. if (VALID_EVTCHN(evtchn)) {
  682. int masked;
  683. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  684. sync_set_bit(evtchn, sh->evtchn_pending);
  685. if (!masked)
  686. unmask_evtchn(evtchn);
  687. ret = 1;
  688. }
  689. return ret;
  690. }
  691. static void restore_cpu_virqs(unsigned int cpu)
  692. {
  693. struct evtchn_bind_virq bind_virq;
  694. int virq, irq, evtchn;
  695. for (virq = 0; virq < NR_VIRQS; virq++) {
  696. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  697. continue;
  698. BUG_ON(virq_from_irq(irq) != virq);
  699. /* Get a new binding from Xen. */
  700. bind_virq.virq = virq;
  701. bind_virq.vcpu = cpu;
  702. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  703. &bind_virq) != 0)
  704. BUG();
  705. evtchn = bind_virq.port;
  706. /* Record the new mapping. */
  707. evtchn_to_irq[evtchn] = irq;
  708. irq_info[irq] = mk_virq_info(evtchn, virq);
  709. bind_evtchn_to_cpu(evtchn, cpu);
  710. /* Ready for use. */
  711. unmask_evtchn(evtchn);
  712. }
  713. }
  714. static void restore_cpu_ipis(unsigned int cpu)
  715. {
  716. struct evtchn_bind_ipi bind_ipi;
  717. int ipi, irq, evtchn;
  718. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  719. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  720. continue;
  721. BUG_ON(ipi_from_irq(irq) != ipi);
  722. /* Get a new binding from Xen. */
  723. bind_ipi.vcpu = cpu;
  724. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  725. &bind_ipi) != 0)
  726. BUG();
  727. evtchn = bind_ipi.port;
  728. /* Record the new mapping. */
  729. evtchn_to_irq[evtchn] = irq;
  730. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  731. bind_evtchn_to_cpu(evtchn, cpu);
  732. /* Ready for use. */
  733. unmask_evtchn(evtchn);
  734. }
  735. }
  736. /* Clear an irq's pending state, in preparation for polling on it */
  737. void xen_clear_irq_pending(int irq)
  738. {
  739. int evtchn = evtchn_from_irq(irq);
  740. if (VALID_EVTCHN(evtchn))
  741. clear_evtchn(evtchn);
  742. }
  743. void xen_set_irq_pending(int irq)
  744. {
  745. int evtchn = evtchn_from_irq(irq);
  746. if (VALID_EVTCHN(evtchn))
  747. set_evtchn(evtchn);
  748. }
  749. bool xen_test_irq_pending(int irq)
  750. {
  751. int evtchn = evtchn_from_irq(irq);
  752. bool ret = false;
  753. if (VALID_EVTCHN(evtchn))
  754. ret = test_evtchn(evtchn);
  755. return ret;
  756. }
  757. /* Poll waiting for an irq to become pending. In the usual case, the
  758. irq will be disabled so it won't deliver an interrupt. */
  759. void xen_poll_irq(int irq)
  760. {
  761. evtchn_port_t evtchn = evtchn_from_irq(irq);
  762. if (VALID_EVTCHN(evtchn)) {
  763. struct sched_poll poll;
  764. poll.nr_ports = 1;
  765. poll.timeout = 0;
  766. set_xen_guest_handle(poll.ports, &evtchn);
  767. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  768. BUG();
  769. }
  770. }
  771. void xen_irq_resume(void)
  772. {
  773. unsigned int cpu, irq, evtchn;
  774. init_evtchn_cpu_bindings();
  775. /* New event-channel space is not 'live' yet. */
  776. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  777. mask_evtchn(evtchn);
  778. /* No IRQ <-> event-channel mappings. */
  779. for (irq = 0; irq < nr_irqs; irq++)
  780. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  781. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  782. evtchn_to_irq[evtchn] = -1;
  783. for_each_possible_cpu(cpu) {
  784. restore_cpu_virqs(cpu);
  785. restore_cpu_ipis(cpu);
  786. }
  787. }
  788. static struct irq_chip xen_dynamic_chip __read_mostly = {
  789. .name = "xen-dyn",
  790. .disable = disable_dynirq,
  791. .mask = disable_dynirq,
  792. .unmask = enable_dynirq,
  793. .eoi = ack_dynirq,
  794. .set_affinity = set_affinity_irq,
  795. .retrigger = retrigger_dynirq,
  796. };
  797. static struct irq_chip xen_percpu_chip __read_mostly = {
  798. .name = "xen-percpu",
  799. .disable = disable_dynirq,
  800. .mask = disable_dynirq,
  801. .unmask = enable_dynirq,
  802. .ack = ack_dynirq,
  803. };
  804. int xen_set_callback_via(uint64_t via)
  805. {
  806. struct xen_hvm_param a;
  807. a.domid = DOMID_SELF;
  808. a.index = HVM_PARAM_CALLBACK_IRQ;
  809. a.value = via;
  810. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  811. }
  812. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  813. #ifdef CONFIG_XEN_PVHVM
  814. /* Vector callbacks are better than PCI interrupts to receive event
  815. * channel notifications because we can receive vector callbacks on any
  816. * vcpu and we don't need PCI support or APIC interactions. */
  817. void xen_callback_vector(void)
  818. {
  819. int rc;
  820. uint64_t callback_via;
  821. if (xen_have_vector_callback) {
  822. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  823. rc = xen_set_callback_via(callback_via);
  824. if (rc) {
  825. printk(KERN_ERR "Request for Xen HVM callback vector"
  826. " failed.\n");
  827. xen_have_vector_callback = 0;
  828. return;
  829. }
  830. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  831. "enabled\n");
  832. /* in the restore case the vector has already been allocated */
  833. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  834. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  835. }
  836. }
  837. #else
  838. void xen_callback_vector(void) {}
  839. #endif
  840. void __init xen_init_IRQ(void)
  841. {
  842. int i;
  843. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  844. GFP_KERNEL);
  845. BUG_ON(cpu_evtchn_mask_p == NULL);
  846. init_evtchn_cpu_bindings();
  847. /* No event channels are 'live' right now. */
  848. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  849. mask_evtchn(i);
  850. if (xen_hvm_domain()) {
  851. xen_callback_vector();
  852. native_init_IRQ();
  853. } else {
  854. irq_ctx_init(smp_processor_id());
  855. }
  856. }