gpio.c 9.1 KB

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  1. /*
  2. * SuperH Pin Function Controller GPIO driver.
  3. *
  4. * Copyright (C) 2008 Magnus Damm
  5. * Copyright (C) 2009 - 2012 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/device.h>
  12. #include <linux/gpio.h>
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/pinctrl/consumer.h>
  16. #include <linux/slab.h>
  17. #include <linux/spinlock.h>
  18. #include "core.h"
  19. struct sh_pfc_gpio_data_reg {
  20. const struct pinmux_data_reg *info;
  21. unsigned long shadow;
  22. };
  23. struct sh_pfc_gpio_pin {
  24. u8 dbit;
  25. u8 dreg;
  26. };
  27. struct sh_pfc_chip {
  28. struct sh_pfc *pfc;
  29. struct gpio_chip gpio_chip;
  30. struct sh_pfc_window *mem;
  31. struct sh_pfc_gpio_data_reg *regs;
  32. struct sh_pfc_gpio_pin *pins;
  33. };
  34. static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
  35. {
  36. return container_of(gc, struct sh_pfc_chip, gpio_chip);
  37. }
  38. static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
  39. {
  40. return gpio_to_pfc_chip(gc)->pfc;
  41. }
  42. static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
  43. struct sh_pfc_gpio_data_reg **reg,
  44. unsigned int *bit)
  45. {
  46. int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
  47. struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
  48. *reg = &chip->regs[gpio_pin->dreg];
  49. *bit = gpio_pin->dbit;
  50. }
  51. static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
  52. const struct pinmux_data_reg *dreg)
  53. {
  54. void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  55. return sh_pfc_read_raw_reg(mem, dreg->reg_width);
  56. }
  57. static void gpio_write_data_reg(struct sh_pfc_chip *chip,
  58. const struct pinmux_data_reg *dreg,
  59. unsigned long value)
  60. {
  61. void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  62. sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
  63. }
  64. static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
  65. {
  66. struct sh_pfc *pfc = chip->pfc;
  67. struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
  68. const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
  69. const struct pinmux_data_reg *dreg;
  70. unsigned int bit;
  71. unsigned int i;
  72. for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
  73. for (bit = 0; bit < dreg->reg_width; bit++) {
  74. if (dreg->enum_ids[bit] == pin->enum_id) {
  75. gpio_pin->dreg = i;
  76. gpio_pin->dbit = bit;
  77. return;
  78. }
  79. }
  80. }
  81. BUG();
  82. }
  83. static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
  84. {
  85. struct sh_pfc *pfc = chip->pfc;
  86. unsigned long addr = pfc->info->data_regs[0].reg;
  87. const struct pinmux_data_reg *dreg;
  88. unsigned int i;
  89. /* Find the window that contain the GPIO registers. */
  90. for (i = 0; i < pfc->num_windows; ++i) {
  91. struct sh_pfc_window *window = &pfc->window[i];
  92. if (addr >= window->phys && addr < window->phys + window->size)
  93. break;
  94. }
  95. if (i == pfc->num_windows)
  96. return -EINVAL;
  97. /* GPIO data registers must be in the first memory resource. */
  98. chip->mem = &pfc->window[i];
  99. /* Count the number of data registers, allocate memory and initialize
  100. * them.
  101. */
  102. for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
  103. ;
  104. chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
  105. GFP_KERNEL);
  106. if (chip->regs == NULL)
  107. return -ENOMEM;
  108. for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
  109. chip->regs[i].info = dreg;
  110. chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
  111. }
  112. for (i = 0; i < pfc->info->nr_pins; i++) {
  113. if (pfc->info->pins[i].enum_id == 0)
  114. continue;
  115. gpio_setup_data_reg(chip, i);
  116. }
  117. return 0;
  118. }
  119. /* -----------------------------------------------------------------------------
  120. * Pin GPIOs
  121. */
  122. static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
  123. {
  124. struct sh_pfc *pfc = gpio_to_pfc(gc);
  125. int idx = sh_pfc_get_pin_index(pfc, offset);
  126. if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
  127. return -EINVAL;
  128. return pinctrl_request_gpio(offset);
  129. }
  130. static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
  131. {
  132. return pinctrl_free_gpio(offset);
  133. }
  134. static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
  135. int value)
  136. {
  137. struct sh_pfc_gpio_data_reg *reg;
  138. unsigned long pos;
  139. unsigned int bit;
  140. gpio_get_data_reg(chip, offset, &reg, &bit);
  141. pos = reg->info->reg_width - (bit + 1);
  142. if (value)
  143. set_bit(pos, &reg->shadow);
  144. else
  145. clear_bit(pos, &reg->shadow);
  146. gpio_write_data_reg(chip, reg->info, reg->shadow);
  147. }
  148. static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
  149. {
  150. return pinctrl_gpio_direction_input(offset);
  151. }
  152. static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
  153. int value)
  154. {
  155. gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
  156. return pinctrl_gpio_direction_output(offset);
  157. }
  158. static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
  159. {
  160. struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
  161. struct sh_pfc_gpio_data_reg *reg;
  162. unsigned long pos;
  163. unsigned int bit;
  164. gpio_get_data_reg(chip, offset, &reg, &bit);
  165. pos = reg->info->reg_width - (bit + 1);
  166. return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
  167. }
  168. static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
  169. {
  170. gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
  171. }
  172. static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
  173. {
  174. struct sh_pfc *pfc = gpio_to_pfc(gc);
  175. int i, k;
  176. for (i = 0; i < pfc->info->gpio_irq_size; i++) {
  177. unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
  178. for (k = 0; gpios[k]; k++) {
  179. if (gpios[k] == offset)
  180. return pfc->info->gpio_irq[i].irq;
  181. }
  182. }
  183. return -ENOSYS;
  184. }
  185. static int gpio_pin_setup(struct sh_pfc_chip *chip)
  186. {
  187. struct sh_pfc *pfc = chip->pfc;
  188. struct gpio_chip *gc = &chip->gpio_chip;
  189. int ret;
  190. chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
  191. GFP_KERNEL);
  192. if (chip->pins == NULL)
  193. return -ENOMEM;
  194. ret = gpio_setup_data_regs(chip);
  195. if (ret < 0)
  196. return ret;
  197. gc->request = gpio_pin_request;
  198. gc->free = gpio_pin_free;
  199. gc->direction_input = gpio_pin_direction_input;
  200. gc->get = gpio_pin_get;
  201. gc->direction_output = gpio_pin_direction_output;
  202. gc->set = gpio_pin_set;
  203. gc->to_irq = gpio_pin_to_irq;
  204. gc->label = pfc->info->name;
  205. gc->dev = pfc->dev;
  206. gc->owner = THIS_MODULE;
  207. gc->base = 0;
  208. gc->ngpio = pfc->nr_pins;
  209. return 0;
  210. }
  211. /* -----------------------------------------------------------------------------
  212. * Function GPIOs
  213. */
  214. static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
  215. {
  216. static bool __print_once;
  217. struct sh_pfc *pfc = gpio_to_pfc(gc);
  218. unsigned int mark = pfc->info->func_gpios[offset].enum_id;
  219. unsigned long flags;
  220. int ret;
  221. if (!__print_once) {
  222. dev_notice(pfc->dev,
  223. "Use of GPIO API for function requests is deprecated."
  224. " Convert to pinctrl\n");
  225. __print_once = true;
  226. }
  227. if (mark == 0)
  228. return -EINVAL;
  229. spin_lock_irqsave(&pfc->lock, flags);
  230. ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
  231. spin_unlock_irqrestore(&pfc->lock, flags);
  232. return ret;
  233. }
  234. static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
  235. {
  236. }
  237. static int gpio_function_setup(struct sh_pfc_chip *chip)
  238. {
  239. struct sh_pfc *pfc = chip->pfc;
  240. struct gpio_chip *gc = &chip->gpio_chip;
  241. gc->request = gpio_function_request;
  242. gc->free = gpio_function_free;
  243. gc->label = pfc->info->name;
  244. gc->owner = THIS_MODULE;
  245. gc->base = pfc->nr_pins;
  246. gc->ngpio = pfc->info->nr_func_gpios;
  247. return 0;
  248. }
  249. /* -----------------------------------------------------------------------------
  250. * Register/unregister
  251. */
  252. static struct sh_pfc_chip *
  253. sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
  254. {
  255. struct sh_pfc_chip *chip;
  256. int ret;
  257. chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
  258. if (unlikely(!chip))
  259. return ERR_PTR(-ENOMEM);
  260. chip->pfc = pfc;
  261. ret = setup(chip);
  262. if (ret < 0)
  263. return ERR_PTR(ret);
  264. ret = gpiochip_add(&chip->gpio_chip);
  265. if (unlikely(ret < 0))
  266. return ERR_PTR(ret);
  267. dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
  268. chip->gpio_chip.label, chip->gpio_chip.base,
  269. chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
  270. return chip;
  271. }
  272. int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
  273. {
  274. const struct pinmux_range *ranges;
  275. struct pinmux_range def_range;
  276. struct sh_pfc_chip *chip;
  277. unsigned int nr_ranges;
  278. unsigned int i;
  279. int ret;
  280. /* Register the real GPIOs chip. */
  281. chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
  282. if (IS_ERR(chip))
  283. return PTR_ERR(chip);
  284. pfc->gpio = chip;
  285. /* Register the GPIO to pin mappings. */
  286. if (pfc->info->ranges == NULL) {
  287. def_range.begin = 0;
  288. def_range.end = pfc->info->nr_pins - 1;
  289. ranges = &def_range;
  290. nr_ranges = 1;
  291. } else {
  292. ranges = pfc->info->ranges;
  293. nr_ranges = pfc->info->nr_ranges;
  294. }
  295. for (i = 0; i < nr_ranges; ++i) {
  296. const struct pinmux_range *range = &ranges[i];
  297. ret = gpiochip_add_pin_range(&chip->gpio_chip,
  298. dev_name(pfc->dev),
  299. range->begin, range->begin,
  300. range->end - range->begin + 1);
  301. if (ret < 0)
  302. return ret;
  303. }
  304. /* Register the function GPIOs chip. */
  305. chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
  306. if (IS_ERR(chip))
  307. return PTR_ERR(chip);
  308. pfc->func = chip;
  309. return 0;
  310. }
  311. int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
  312. {
  313. int err;
  314. int ret;
  315. ret = gpiochip_remove(&pfc->gpio->gpio_chip);
  316. err = gpiochip_remove(&pfc->func->gpio_chip);
  317. return ret < 0 ? ret : err;
  318. }