intel_sdvo.c 77 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  47. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  48. static const char *tv_format_names[] = {
  49. "NTSC_M" , "NTSC_J" , "NTSC_443",
  50. "PAL_B" , "PAL_D" , "PAL_G" ,
  51. "PAL_H" , "PAL_I" , "PAL_M" ,
  52. "PAL_N" , "PAL_NC" , "PAL_60" ,
  53. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  54. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  55. "SECAM_60"
  56. };
  57. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  58. struct intel_sdvo {
  59. struct intel_encoder base;
  60. struct i2c_adapter *i2c;
  61. u8 slave_addr;
  62. struct i2c_adapter ddc;
  63. /* Register for the SDVO device: SDVOB or SDVOC */
  64. int sdvo_reg;
  65. /* Active outputs controlled by this SDVO output */
  66. uint16_t controlled_output;
  67. /*
  68. * Capabilities of the SDVO device returned by
  69. * i830_sdvo_get_capabilities()
  70. */
  71. struct intel_sdvo_caps caps;
  72. /* Pixel clock limitations reported by the SDVO device, in kHz */
  73. int pixel_clock_min, pixel_clock_max;
  74. /*
  75. * For multiple function SDVO device,
  76. * this is for current attached outputs.
  77. */
  78. uint16_t attached_output;
  79. /**
  80. * This is set if we're going to treat the device as TV-out.
  81. *
  82. * While we have these nice friendly flags for output types that ought
  83. * to decide this for us, the S-Video output on our HDMI+S-Video card
  84. * shows up as RGB1 (VGA).
  85. */
  86. bool is_tv;
  87. /* This is for current tv format name */
  88. int tv_format_index;
  89. /**
  90. * This is set if we treat the device as HDMI, instead of DVI.
  91. */
  92. bool is_hdmi;
  93. bool has_hdmi_monitor;
  94. bool has_hdmi_audio;
  95. /**
  96. * This is set if we detect output of sdvo device as LVDS and
  97. * have a valid fixed mode to use with the panel.
  98. */
  99. bool is_lvds;
  100. /**
  101. * This is sdvo fixed pannel mode pointer
  102. */
  103. struct drm_display_mode *sdvo_lvds_fixed_mode;
  104. /* DDC bus used by this SDVO encoder */
  105. uint8_t ddc_bus;
  106. /* Input timings for adjusted_mode */
  107. struct intel_sdvo_dtd input_dtd;
  108. };
  109. struct intel_sdvo_connector {
  110. struct intel_connector base;
  111. /* Mark the type of connector */
  112. uint16_t output_flag;
  113. int force_audio;
  114. /* This contains all current supported TV format */
  115. u8 tv_format_supported[TV_FORMAT_NUM];
  116. int format_supported_num;
  117. struct drm_property *tv_format;
  118. struct drm_property *force_audio_property;
  119. /* add the property for the SDVO-TV */
  120. struct drm_property *left;
  121. struct drm_property *right;
  122. struct drm_property *top;
  123. struct drm_property *bottom;
  124. struct drm_property *hpos;
  125. struct drm_property *vpos;
  126. struct drm_property *contrast;
  127. struct drm_property *saturation;
  128. struct drm_property *hue;
  129. struct drm_property *sharpness;
  130. struct drm_property *flicker_filter;
  131. struct drm_property *flicker_filter_adaptive;
  132. struct drm_property *flicker_filter_2d;
  133. struct drm_property *tv_chroma_filter;
  134. struct drm_property *tv_luma_filter;
  135. struct drm_property *dot_crawl;
  136. /* add the property for the SDVO-TV/LVDS */
  137. struct drm_property *brightness;
  138. /* Add variable to record current setting for the above property */
  139. u32 left_margin, right_margin, top_margin, bottom_margin;
  140. /* this is to get the range of margin.*/
  141. u32 max_hscan, max_vscan;
  142. u32 max_hpos, cur_hpos;
  143. u32 max_vpos, cur_vpos;
  144. u32 cur_brightness, max_brightness;
  145. u32 cur_contrast, max_contrast;
  146. u32 cur_saturation, max_saturation;
  147. u32 cur_hue, max_hue;
  148. u32 cur_sharpness, max_sharpness;
  149. u32 cur_flicker_filter, max_flicker_filter;
  150. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  151. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  152. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  153. u32 cur_tv_luma_filter, max_tv_luma_filter;
  154. u32 cur_dot_crawl, max_dot_crawl;
  155. };
  156. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  157. {
  158. return container_of(encoder, struct intel_sdvo, base.base);
  159. }
  160. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  161. {
  162. return container_of(intel_attached_encoder(connector),
  163. struct intel_sdvo, base);
  164. }
  165. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  166. {
  167. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  168. }
  169. static bool
  170. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  171. static bool
  172. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  173. struct intel_sdvo_connector *intel_sdvo_connector,
  174. int type);
  175. static bool
  176. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  177. struct intel_sdvo_connector *intel_sdvo_connector);
  178. /**
  179. * Writes the SDVOB or SDVOC with the given value, but always writes both
  180. * SDVOB and SDVOC to work around apparent hardware issues (according to
  181. * comments in the BIOS).
  182. */
  183. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  184. {
  185. struct drm_device *dev = intel_sdvo->base.base.dev;
  186. struct drm_i915_private *dev_priv = dev->dev_private;
  187. u32 bval = val, cval = val;
  188. int i;
  189. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  190. I915_WRITE(intel_sdvo->sdvo_reg, val);
  191. I915_READ(intel_sdvo->sdvo_reg);
  192. return;
  193. }
  194. if (intel_sdvo->sdvo_reg == SDVOB) {
  195. cval = I915_READ(SDVOC);
  196. } else {
  197. bval = I915_READ(SDVOB);
  198. }
  199. /*
  200. * Write the registers twice for luck. Sometimes,
  201. * writing them only once doesn't appear to 'stick'.
  202. * The BIOS does this too. Yay, magic
  203. */
  204. for (i = 0; i < 2; i++)
  205. {
  206. I915_WRITE(SDVOB, bval);
  207. I915_READ(SDVOB);
  208. I915_WRITE(SDVOC, cval);
  209. I915_READ(SDVOC);
  210. }
  211. }
  212. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  213. {
  214. struct i2c_msg msgs[] = {
  215. {
  216. .addr = intel_sdvo->slave_addr,
  217. .flags = 0,
  218. .len = 1,
  219. .buf = &addr,
  220. },
  221. {
  222. .addr = intel_sdvo->slave_addr,
  223. .flags = I2C_M_RD,
  224. .len = 1,
  225. .buf = ch,
  226. }
  227. };
  228. int ret;
  229. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  230. return true;
  231. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  232. return false;
  233. }
  234. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  235. /** Mapping of command numbers to names, for debug output */
  236. static const struct _sdvo_cmd_name {
  237. u8 cmd;
  238. const char *name;
  239. } sdvo_cmd_names[] = {
  240. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  241. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  242. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  243. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  244. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  245. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  246. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  247. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  248. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  249. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  250. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  251. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  252. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  283. /* Add the op code for SDVO enhancements */
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  328. /* HDMI op code */
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  349. };
  350. #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
  351. #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
  352. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  353. const void *args, int args_len)
  354. {
  355. int i;
  356. DRM_DEBUG_KMS("%s: W: %02X ",
  357. SDVO_NAME(intel_sdvo), cmd);
  358. for (i = 0; i < args_len; i++)
  359. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  360. for (; i < 8; i++)
  361. DRM_LOG_KMS(" ");
  362. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  363. if (cmd == sdvo_cmd_names[i].cmd) {
  364. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  365. break;
  366. }
  367. }
  368. if (i == ARRAY_SIZE(sdvo_cmd_names))
  369. DRM_LOG_KMS("(%02X)", cmd);
  370. DRM_LOG_KMS("\n");
  371. }
  372. static const char *cmd_status_names[] = {
  373. "Power on",
  374. "Success",
  375. "Not supported",
  376. "Invalid arg",
  377. "Pending",
  378. "Target not specified",
  379. "Scaling not supported"
  380. };
  381. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  382. const void *args, int args_len)
  383. {
  384. u8 buf[args_len*2 + 2], status;
  385. struct i2c_msg msgs[args_len + 3];
  386. int i, ret;
  387. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  388. for (i = 0; i < args_len; i++) {
  389. msgs[i].addr = intel_sdvo->slave_addr;
  390. msgs[i].flags = 0;
  391. msgs[i].len = 2;
  392. msgs[i].buf = buf + 2 *i;
  393. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  394. buf[2*i + 1] = ((u8*)args)[i];
  395. }
  396. msgs[i].addr = intel_sdvo->slave_addr;
  397. msgs[i].flags = 0;
  398. msgs[i].len = 2;
  399. msgs[i].buf = buf + 2*i;
  400. buf[2*i + 0] = SDVO_I2C_OPCODE;
  401. buf[2*i + 1] = cmd;
  402. /* the following two are to read the response */
  403. status = SDVO_I2C_CMD_STATUS;
  404. msgs[i+1].addr = intel_sdvo->slave_addr;
  405. msgs[i+1].flags = 0;
  406. msgs[i+1].len = 1;
  407. msgs[i+1].buf = &status;
  408. msgs[i+2].addr = intel_sdvo->slave_addr;
  409. msgs[i+2].flags = I2C_M_RD;
  410. msgs[i+2].len = 1;
  411. msgs[i+2].buf = &status;
  412. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  413. if (ret < 0) {
  414. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  415. return false;
  416. }
  417. if (ret != i+3) {
  418. /* failure in I2C transfer */
  419. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  420. return false;
  421. }
  422. return true;
  423. }
  424. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  425. void *response, int response_len)
  426. {
  427. u8 retry = 5;
  428. u8 status;
  429. int i;
  430. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  431. /*
  432. * The documentation states that all commands will be
  433. * processed within 15µs, and that we need only poll
  434. * the status byte a maximum of 3 times in order for the
  435. * command to be complete.
  436. *
  437. * Check 5 times in case the hardware failed to read the docs.
  438. */
  439. if (!intel_sdvo_read_byte(intel_sdvo,
  440. SDVO_I2C_CMD_STATUS,
  441. &status))
  442. goto log_fail;
  443. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  444. udelay(15);
  445. if (!intel_sdvo_read_byte(intel_sdvo,
  446. SDVO_I2C_CMD_STATUS,
  447. &status))
  448. goto log_fail;
  449. }
  450. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  451. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  452. else
  453. DRM_LOG_KMS("(??? %d)", status);
  454. if (status != SDVO_CMD_STATUS_SUCCESS)
  455. goto log_fail;
  456. /* Read the command response */
  457. for (i = 0; i < response_len; i++) {
  458. if (!intel_sdvo_read_byte(intel_sdvo,
  459. SDVO_I2C_RETURN_0 + i,
  460. &((u8 *)response)[i]))
  461. goto log_fail;
  462. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  463. }
  464. DRM_LOG_KMS("\n");
  465. return true;
  466. log_fail:
  467. DRM_LOG_KMS("... failed\n");
  468. return false;
  469. }
  470. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  471. {
  472. if (mode->clock >= 100000)
  473. return 1;
  474. else if (mode->clock >= 50000)
  475. return 2;
  476. else
  477. return 4;
  478. }
  479. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  480. u8 ddc_bus)
  481. {
  482. /* This must be the immediately preceding write before the i2c xfer */
  483. return intel_sdvo_write_cmd(intel_sdvo,
  484. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  485. &ddc_bus, 1);
  486. }
  487. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  488. {
  489. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  490. return false;
  491. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  492. }
  493. static bool
  494. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  495. {
  496. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  497. return false;
  498. return intel_sdvo_read_response(intel_sdvo, value, len);
  499. }
  500. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  501. {
  502. struct intel_sdvo_set_target_input_args targets = {0};
  503. return intel_sdvo_set_value(intel_sdvo,
  504. SDVO_CMD_SET_TARGET_INPUT,
  505. &targets, sizeof(targets));
  506. }
  507. /**
  508. * Return whether each input is trained.
  509. *
  510. * This function is making an assumption about the layout of the response,
  511. * which should be checked against the docs.
  512. */
  513. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  514. {
  515. struct intel_sdvo_get_trained_inputs_response response;
  516. BUILD_BUG_ON(sizeof(response) != 1);
  517. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  518. &response, sizeof(response)))
  519. return false;
  520. *input_1 = response.input0_trained;
  521. *input_2 = response.input1_trained;
  522. return true;
  523. }
  524. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  525. u16 outputs)
  526. {
  527. return intel_sdvo_set_value(intel_sdvo,
  528. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  529. &outputs, sizeof(outputs));
  530. }
  531. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  532. int mode)
  533. {
  534. u8 state = SDVO_ENCODER_STATE_ON;
  535. switch (mode) {
  536. case DRM_MODE_DPMS_ON:
  537. state = SDVO_ENCODER_STATE_ON;
  538. break;
  539. case DRM_MODE_DPMS_STANDBY:
  540. state = SDVO_ENCODER_STATE_STANDBY;
  541. break;
  542. case DRM_MODE_DPMS_SUSPEND:
  543. state = SDVO_ENCODER_STATE_SUSPEND;
  544. break;
  545. case DRM_MODE_DPMS_OFF:
  546. state = SDVO_ENCODER_STATE_OFF;
  547. break;
  548. }
  549. return intel_sdvo_set_value(intel_sdvo,
  550. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  551. }
  552. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  553. int *clock_min,
  554. int *clock_max)
  555. {
  556. struct intel_sdvo_pixel_clock_range clocks;
  557. BUILD_BUG_ON(sizeof(clocks) != 4);
  558. if (!intel_sdvo_get_value(intel_sdvo,
  559. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  560. &clocks, sizeof(clocks)))
  561. return false;
  562. /* Convert the values from units of 10 kHz to kHz. */
  563. *clock_min = clocks.min * 10;
  564. *clock_max = clocks.max * 10;
  565. return true;
  566. }
  567. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  568. u16 outputs)
  569. {
  570. return intel_sdvo_set_value(intel_sdvo,
  571. SDVO_CMD_SET_TARGET_OUTPUT,
  572. &outputs, sizeof(outputs));
  573. }
  574. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  575. struct intel_sdvo_dtd *dtd)
  576. {
  577. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  578. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  579. }
  580. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  581. struct intel_sdvo_dtd *dtd)
  582. {
  583. return intel_sdvo_set_timing(intel_sdvo,
  584. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  585. }
  586. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  587. struct intel_sdvo_dtd *dtd)
  588. {
  589. return intel_sdvo_set_timing(intel_sdvo,
  590. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  591. }
  592. static bool
  593. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  594. uint16_t clock,
  595. uint16_t width,
  596. uint16_t height)
  597. {
  598. struct intel_sdvo_preferred_input_timing_args args;
  599. memset(&args, 0, sizeof(args));
  600. args.clock = clock;
  601. args.width = width;
  602. args.height = height;
  603. args.interlace = 0;
  604. if (intel_sdvo->is_lvds &&
  605. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  606. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  607. args.scaled = 1;
  608. return intel_sdvo_set_value(intel_sdvo,
  609. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  610. &args, sizeof(args));
  611. }
  612. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  613. struct intel_sdvo_dtd *dtd)
  614. {
  615. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  616. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  617. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  618. &dtd->part1, sizeof(dtd->part1)) &&
  619. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  620. &dtd->part2, sizeof(dtd->part2));
  621. }
  622. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  623. {
  624. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  625. }
  626. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  627. const struct drm_display_mode *mode)
  628. {
  629. uint16_t width, height;
  630. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  631. uint16_t h_sync_offset, v_sync_offset;
  632. width = mode->crtc_hdisplay;
  633. height = mode->crtc_vdisplay;
  634. /* do some mode translations */
  635. h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
  636. h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
  637. v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
  638. v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
  639. h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
  640. v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
  641. dtd->part1.clock = mode->clock / 10;
  642. dtd->part1.h_active = width & 0xff;
  643. dtd->part1.h_blank = h_blank_len & 0xff;
  644. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  645. ((h_blank_len >> 8) & 0xf);
  646. dtd->part1.v_active = height & 0xff;
  647. dtd->part1.v_blank = v_blank_len & 0xff;
  648. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  649. ((v_blank_len >> 8) & 0xf);
  650. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  651. dtd->part2.h_sync_width = h_sync_len & 0xff;
  652. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  653. (v_sync_len & 0xf);
  654. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  655. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  656. ((v_sync_len & 0x30) >> 4);
  657. dtd->part2.dtd_flags = 0x18;
  658. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  659. dtd->part2.dtd_flags |= 0x2;
  660. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  661. dtd->part2.dtd_flags |= 0x4;
  662. dtd->part2.sdvo_flags = 0;
  663. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  664. dtd->part2.reserved = 0;
  665. }
  666. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  667. const struct intel_sdvo_dtd *dtd)
  668. {
  669. mode->hdisplay = dtd->part1.h_active;
  670. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  671. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  672. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  673. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  674. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  675. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  676. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  677. mode->vdisplay = dtd->part1.v_active;
  678. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  679. mode->vsync_start = mode->vdisplay;
  680. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  681. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  682. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  683. mode->vsync_end = mode->vsync_start +
  684. (dtd->part2.v_sync_off_width & 0xf);
  685. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  686. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  687. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  688. mode->clock = dtd->part1.clock * 10;
  689. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  690. if (dtd->part2.dtd_flags & 0x2)
  691. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  692. if (dtd->part2.dtd_flags & 0x4)
  693. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  694. }
  695. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  696. {
  697. struct intel_sdvo_encode encode;
  698. BUILD_BUG_ON(sizeof(encode) != 2);
  699. return intel_sdvo_get_value(intel_sdvo,
  700. SDVO_CMD_GET_SUPP_ENCODE,
  701. &encode, sizeof(encode));
  702. }
  703. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  704. uint8_t mode)
  705. {
  706. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  707. }
  708. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  709. uint8_t mode)
  710. {
  711. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  712. }
  713. #if 0
  714. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  715. {
  716. int i, j;
  717. uint8_t set_buf_index[2];
  718. uint8_t av_split;
  719. uint8_t buf_size;
  720. uint8_t buf[48];
  721. uint8_t *pos;
  722. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  723. for (i = 0; i <= av_split; i++) {
  724. set_buf_index[0] = i; set_buf_index[1] = 0;
  725. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  726. set_buf_index, 2);
  727. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  728. intel_sdvo_read_response(encoder, &buf_size, 1);
  729. pos = buf;
  730. for (j = 0; j <= buf_size; j += 8) {
  731. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  732. NULL, 0);
  733. intel_sdvo_read_response(encoder, pos, 8);
  734. pos += 8;
  735. }
  736. }
  737. }
  738. #endif
  739. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  740. {
  741. struct dip_infoframe avi_if = {
  742. .type = DIP_TYPE_AVI,
  743. .ver = DIP_VERSION_AVI,
  744. .len = DIP_LEN_AVI,
  745. };
  746. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  747. uint8_t set_buf_index[2] = { 1, 0 };
  748. uint64_t *data = (uint64_t *)&avi_if;
  749. unsigned i;
  750. intel_dip_infoframe_csum(&avi_if);
  751. if (!intel_sdvo_set_value(intel_sdvo,
  752. SDVO_CMD_SET_HBUF_INDEX,
  753. set_buf_index, 2))
  754. return false;
  755. for (i = 0; i < sizeof(avi_if); i += 8) {
  756. if (!intel_sdvo_set_value(intel_sdvo,
  757. SDVO_CMD_SET_HBUF_DATA,
  758. data, 8))
  759. return false;
  760. data++;
  761. }
  762. return intel_sdvo_set_value(intel_sdvo,
  763. SDVO_CMD_SET_HBUF_TXRATE,
  764. &tx_rate, 1);
  765. }
  766. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  767. {
  768. struct intel_sdvo_tv_format format;
  769. uint32_t format_map;
  770. format_map = 1 << intel_sdvo->tv_format_index;
  771. memset(&format, 0, sizeof(format));
  772. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  773. BUILD_BUG_ON(sizeof(format) != 6);
  774. return intel_sdvo_set_value(intel_sdvo,
  775. SDVO_CMD_SET_TV_FORMAT,
  776. &format, sizeof(format));
  777. }
  778. static bool
  779. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  780. struct drm_display_mode *mode)
  781. {
  782. struct intel_sdvo_dtd output_dtd;
  783. if (!intel_sdvo_set_target_output(intel_sdvo,
  784. intel_sdvo->attached_output))
  785. return false;
  786. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  787. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  788. return false;
  789. return true;
  790. }
  791. static bool
  792. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  793. struct drm_display_mode *mode,
  794. struct drm_display_mode *adjusted_mode)
  795. {
  796. /* Reset the input timing to the screen. Assume always input 0. */
  797. if (!intel_sdvo_set_target_input(intel_sdvo))
  798. return false;
  799. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  800. mode->clock / 10,
  801. mode->hdisplay,
  802. mode->vdisplay))
  803. return false;
  804. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  805. &intel_sdvo->input_dtd))
  806. return false;
  807. intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  808. drm_mode_set_crtcinfo(adjusted_mode, 0);
  809. return true;
  810. }
  811. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  812. struct drm_display_mode *mode,
  813. struct drm_display_mode *adjusted_mode)
  814. {
  815. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  816. int multiplier;
  817. /* We need to construct preferred input timings based on our
  818. * output timings. To do that, we have to set the output
  819. * timings, even though this isn't really the right place in
  820. * the sequence to do it. Oh well.
  821. */
  822. if (intel_sdvo->is_tv) {
  823. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  824. return false;
  825. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  826. mode,
  827. adjusted_mode);
  828. } else if (intel_sdvo->is_lvds) {
  829. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  830. intel_sdvo->sdvo_lvds_fixed_mode))
  831. return false;
  832. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  833. mode,
  834. adjusted_mode);
  835. }
  836. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  837. * SDVO device will factor out the multiplier during mode_set.
  838. */
  839. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  840. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  841. return true;
  842. }
  843. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  844. struct drm_display_mode *mode,
  845. struct drm_display_mode *adjusted_mode)
  846. {
  847. struct drm_device *dev = encoder->dev;
  848. struct drm_i915_private *dev_priv = dev->dev_private;
  849. struct drm_crtc *crtc = encoder->crtc;
  850. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  851. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  852. u32 sdvox;
  853. struct intel_sdvo_in_out_map in_out;
  854. struct intel_sdvo_dtd input_dtd;
  855. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  856. int rate;
  857. if (!mode)
  858. return;
  859. /* First, set the input mapping for the first input to our controlled
  860. * output. This is only correct if we're a single-input device, in
  861. * which case the first input is the output from the appropriate SDVO
  862. * channel on the motherboard. In a two-input device, the first input
  863. * will be SDVOB and the second SDVOC.
  864. */
  865. in_out.in0 = intel_sdvo->attached_output;
  866. in_out.in1 = 0;
  867. intel_sdvo_set_value(intel_sdvo,
  868. SDVO_CMD_SET_IN_OUT_MAP,
  869. &in_out, sizeof(in_out));
  870. /* Set the output timings to the screen */
  871. if (!intel_sdvo_set_target_output(intel_sdvo,
  872. intel_sdvo->attached_output))
  873. return;
  874. /* We have tried to get input timing in mode_fixup, and filled into
  875. * adjusted_mode.
  876. */
  877. if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
  878. input_dtd = intel_sdvo->input_dtd;
  879. } else {
  880. /* Set the output timing to the screen */
  881. if (!intel_sdvo_set_target_output(intel_sdvo,
  882. intel_sdvo->attached_output))
  883. return;
  884. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  885. (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
  886. }
  887. /* Set the input timing to the screen. Assume always input 0. */
  888. if (!intel_sdvo_set_target_input(intel_sdvo))
  889. return;
  890. if (intel_sdvo->has_hdmi_monitor) {
  891. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  892. intel_sdvo_set_colorimetry(intel_sdvo,
  893. SDVO_COLORIMETRY_RGB256);
  894. intel_sdvo_set_avi_infoframe(intel_sdvo);
  895. } else
  896. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  897. if (intel_sdvo->is_tv &&
  898. !intel_sdvo_set_tv_format(intel_sdvo))
  899. return;
  900. (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  901. switch (pixel_multiplier) {
  902. default:
  903. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  904. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  905. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  906. }
  907. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  908. return;
  909. /* Set the SDVO control regs. */
  910. if (INTEL_INFO(dev)->gen >= 4) {
  911. sdvox = 0;
  912. if (INTEL_INFO(dev)->gen < 5)
  913. sdvox |= SDVO_BORDER_ENABLE;
  914. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  915. sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
  916. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  917. sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
  918. } else {
  919. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  920. switch (intel_sdvo->sdvo_reg) {
  921. case SDVOB:
  922. sdvox &= SDVOB_PRESERVE_MASK;
  923. break;
  924. case SDVOC:
  925. sdvox &= SDVOC_PRESERVE_MASK;
  926. break;
  927. }
  928. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  929. }
  930. if (intel_crtc->pipe == 1)
  931. sdvox |= SDVO_PIPE_B_SELECT;
  932. if (intel_sdvo->has_hdmi_audio)
  933. sdvox |= SDVO_AUDIO_ENABLE;
  934. if (INTEL_INFO(dev)->gen >= 4) {
  935. /* done in crtc_mode_set as the dpll_md reg must be written early */
  936. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  937. /* done in crtc_mode_set as it lives inside the dpll register */
  938. } else {
  939. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  940. }
  941. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  942. INTEL_INFO(dev)->gen < 5)
  943. sdvox |= SDVO_STALL_SELECT;
  944. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  945. }
  946. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  947. {
  948. struct drm_device *dev = encoder->dev;
  949. struct drm_i915_private *dev_priv = dev->dev_private;
  950. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  951. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  952. u32 temp;
  953. if (mode != DRM_MODE_DPMS_ON) {
  954. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  955. if (0)
  956. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  957. if (mode == DRM_MODE_DPMS_OFF) {
  958. temp = I915_READ(intel_sdvo->sdvo_reg);
  959. if ((temp & SDVO_ENABLE) != 0) {
  960. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  961. }
  962. }
  963. } else {
  964. bool input1, input2;
  965. int i;
  966. u8 status;
  967. temp = I915_READ(intel_sdvo->sdvo_reg);
  968. if ((temp & SDVO_ENABLE) == 0)
  969. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  970. for (i = 0; i < 2; i++)
  971. intel_wait_for_vblank(dev, intel_crtc->pipe);
  972. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  973. /* Warn if the device reported failure to sync.
  974. * A lot of SDVO devices fail to notify of sync, but it's
  975. * a given it the status is a success, we succeeded.
  976. */
  977. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  978. DRM_DEBUG_KMS("First %s output reported failure to "
  979. "sync\n", SDVO_NAME(intel_sdvo));
  980. }
  981. if (0)
  982. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  983. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  984. }
  985. return;
  986. }
  987. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  988. struct drm_display_mode *mode)
  989. {
  990. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  991. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  992. return MODE_NO_DBLESCAN;
  993. if (intel_sdvo->pixel_clock_min > mode->clock)
  994. return MODE_CLOCK_LOW;
  995. if (intel_sdvo->pixel_clock_max < mode->clock)
  996. return MODE_CLOCK_HIGH;
  997. if (intel_sdvo->is_lvds) {
  998. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  999. return MODE_PANEL;
  1000. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1001. return MODE_PANEL;
  1002. }
  1003. return MODE_OK;
  1004. }
  1005. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1006. {
  1007. BUILD_BUG_ON(sizeof(*caps) != 8);
  1008. if (!intel_sdvo_get_value(intel_sdvo,
  1009. SDVO_CMD_GET_DEVICE_CAPS,
  1010. caps, sizeof(*caps)))
  1011. return false;
  1012. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1013. " vendor_id: %d\n"
  1014. " device_id: %d\n"
  1015. " device_rev_id: %d\n"
  1016. " sdvo_version_major: %d\n"
  1017. " sdvo_version_minor: %d\n"
  1018. " sdvo_inputs_mask: %d\n"
  1019. " smooth_scaling: %d\n"
  1020. " sharp_scaling: %d\n"
  1021. " up_scaling: %d\n"
  1022. " down_scaling: %d\n"
  1023. " stall_support: %d\n"
  1024. " output_flags: %d\n",
  1025. caps->vendor_id,
  1026. caps->device_id,
  1027. caps->device_rev_id,
  1028. caps->sdvo_version_major,
  1029. caps->sdvo_version_minor,
  1030. caps->sdvo_inputs_mask,
  1031. caps->smooth_scaling,
  1032. caps->sharp_scaling,
  1033. caps->up_scaling,
  1034. caps->down_scaling,
  1035. caps->stall_support,
  1036. caps->output_flags);
  1037. return true;
  1038. }
  1039. /* No use! */
  1040. #if 0
  1041. struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
  1042. {
  1043. struct drm_connector *connector = NULL;
  1044. struct intel_sdvo *iout = NULL;
  1045. struct intel_sdvo *sdvo;
  1046. /* find the sdvo connector */
  1047. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  1048. iout = to_intel_sdvo(connector);
  1049. if (iout->type != INTEL_OUTPUT_SDVO)
  1050. continue;
  1051. sdvo = iout->dev_priv;
  1052. if (sdvo->sdvo_reg == SDVOB && sdvoB)
  1053. return connector;
  1054. if (sdvo->sdvo_reg == SDVOC && !sdvoB)
  1055. return connector;
  1056. }
  1057. return NULL;
  1058. }
  1059. int intel_sdvo_supports_hotplug(struct drm_connector *connector)
  1060. {
  1061. u8 response[2];
  1062. u8 status;
  1063. struct intel_sdvo *intel_sdvo;
  1064. DRM_DEBUG_KMS("\n");
  1065. if (!connector)
  1066. return 0;
  1067. intel_sdvo = to_intel_sdvo(connector);
  1068. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1069. &response, 2) && response[0];
  1070. }
  1071. void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
  1072. {
  1073. u8 response[2];
  1074. u8 status;
  1075. struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
  1076. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1077. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1078. if (on) {
  1079. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
  1080. status = intel_sdvo_read_response(intel_sdvo, &response, 2);
  1081. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1082. } else {
  1083. response[0] = 0;
  1084. response[1] = 0;
  1085. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1086. }
  1087. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1088. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1089. }
  1090. #endif
  1091. static bool
  1092. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1093. {
  1094. /* Is there more than one type of output? */
  1095. int caps = intel_sdvo->caps.output_flags & 0xf;
  1096. return caps & -caps;
  1097. }
  1098. static struct edid *
  1099. intel_sdvo_get_edid(struct drm_connector *connector)
  1100. {
  1101. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1102. return drm_get_edid(connector, &sdvo->ddc);
  1103. }
  1104. /* Mac mini hack -- use the same DDC as the analog connector */
  1105. static struct edid *
  1106. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1107. {
  1108. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1109. return drm_get_edid(connector,
  1110. &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  1111. }
  1112. enum drm_connector_status
  1113. intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
  1114. {
  1115. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1116. enum drm_connector_status status;
  1117. struct edid *edid;
  1118. edid = intel_sdvo_get_edid(connector);
  1119. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1120. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1121. /*
  1122. * Don't use the 1 as the argument of DDC bus switch to get
  1123. * the EDID. It is used for SDVO SPD ROM.
  1124. */
  1125. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1126. intel_sdvo->ddc_bus = ddc;
  1127. edid = intel_sdvo_get_edid(connector);
  1128. if (edid)
  1129. break;
  1130. }
  1131. /*
  1132. * If we found the EDID on the other bus,
  1133. * assume that is the correct DDC bus.
  1134. */
  1135. if (edid == NULL)
  1136. intel_sdvo->ddc_bus = saved_ddc;
  1137. }
  1138. /*
  1139. * When there is no edid and no monitor is connected with VGA
  1140. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1141. */
  1142. if (edid == NULL)
  1143. edid = intel_sdvo_get_analog_edid(connector);
  1144. status = connector_status_unknown;
  1145. if (edid != NULL) {
  1146. /* DDC bus is shared, match EDID to connector type */
  1147. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1148. status = connector_status_connected;
  1149. if (intel_sdvo->is_hdmi) {
  1150. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1151. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1152. }
  1153. }
  1154. connector->display_info.raw_edid = NULL;
  1155. kfree(edid);
  1156. }
  1157. if (status == connector_status_connected) {
  1158. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1159. if (intel_sdvo_connector->force_audio)
  1160. intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
  1161. }
  1162. return status;
  1163. }
  1164. static enum drm_connector_status
  1165. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1166. {
  1167. uint16_t response;
  1168. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1169. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1170. enum drm_connector_status ret;
  1171. if (!intel_sdvo_write_cmd(intel_sdvo,
  1172. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1173. return connector_status_unknown;
  1174. /* add 30ms delay when the output type might be TV */
  1175. if (intel_sdvo->caps.output_flags &
  1176. (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
  1177. mdelay(30);
  1178. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1179. return connector_status_unknown;
  1180. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1181. response & 0xff, response >> 8,
  1182. intel_sdvo_connector->output_flag);
  1183. if (response == 0)
  1184. return connector_status_disconnected;
  1185. intel_sdvo->attached_output = response;
  1186. intel_sdvo->has_hdmi_monitor = false;
  1187. intel_sdvo->has_hdmi_audio = false;
  1188. if ((intel_sdvo_connector->output_flag & response) == 0)
  1189. ret = connector_status_disconnected;
  1190. else if (response & SDVO_TMDS_MASK)
  1191. ret = intel_sdvo_hdmi_sink_detect(connector);
  1192. else
  1193. ret = connector_status_connected;
  1194. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1195. if (ret == connector_status_connected) {
  1196. intel_sdvo->is_tv = false;
  1197. intel_sdvo->is_lvds = false;
  1198. intel_sdvo->base.needs_tv_clock = false;
  1199. if (response & SDVO_TV_MASK) {
  1200. intel_sdvo->is_tv = true;
  1201. intel_sdvo->base.needs_tv_clock = true;
  1202. }
  1203. if (response & SDVO_LVDS_MASK)
  1204. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1205. }
  1206. return ret;
  1207. }
  1208. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1209. {
  1210. struct edid *edid;
  1211. /* set the bus switch and get the modes */
  1212. edid = intel_sdvo_get_edid(connector);
  1213. /*
  1214. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1215. * link between analog and digital outputs. So, if the regular SDVO
  1216. * DDC fails, check to see if the analog output is disconnected, in
  1217. * which case we'll look there for the digital DDC data.
  1218. */
  1219. if (edid == NULL)
  1220. edid = intel_sdvo_get_analog_edid(connector);
  1221. if (edid != NULL) {
  1222. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1223. drm_mode_connector_update_edid_property(connector, edid);
  1224. drm_add_edid_modes(connector, edid);
  1225. }
  1226. connector->display_info.raw_edid = NULL;
  1227. kfree(edid);
  1228. }
  1229. }
  1230. /*
  1231. * Set of SDVO TV modes.
  1232. * Note! This is in reply order (see loop in get_tv_modes).
  1233. * XXX: all 60Hz refresh?
  1234. */
  1235. struct drm_display_mode sdvo_tv_modes[] = {
  1236. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1237. 416, 0, 200, 201, 232, 233, 0,
  1238. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1239. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1240. 416, 0, 240, 241, 272, 273, 0,
  1241. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1242. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1243. 496, 0, 300, 301, 332, 333, 0,
  1244. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1245. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1246. 736, 0, 350, 351, 382, 383, 0,
  1247. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1248. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1249. 736, 0, 400, 401, 432, 433, 0,
  1250. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1251. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1252. 736, 0, 480, 481, 512, 513, 0,
  1253. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1254. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1255. 800, 0, 480, 481, 512, 513, 0,
  1256. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1257. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1258. 800, 0, 576, 577, 608, 609, 0,
  1259. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1260. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1261. 816, 0, 350, 351, 382, 383, 0,
  1262. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1263. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1264. 816, 0, 400, 401, 432, 433, 0,
  1265. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1266. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1267. 816, 0, 480, 481, 512, 513, 0,
  1268. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1269. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1270. 816, 0, 540, 541, 572, 573, 0,
  1271. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1272. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1273. 816, 0, 576, 577, 608, 609, 0,
  1274. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1275. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1276. 864, 0, 576, 577, 608, 609, 0,
  1277. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1278. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1279. 896, 0, 600, 601, 632, 633, 0,
  1280. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1281. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1282. 928, 0, 624, 625, 656, 657, 0,
  1283. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1284. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1285. 1016, 0, 766, 767, 798, 799, 0,
  1286. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1287. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1288. 1120, 0, 768, 769, 800, 801, 0,
  1289. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1290. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1291. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1292. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1293. };
  1294. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1295. {
  1296. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1297. struct intel_sdvo_sdtv_resolution_request tv_res;
  1298. uint32_t reply = 0, format_map = 0;
  1299. int i;
  1300. /* Read the list of supported input resolutions for the selected TV
  1301. * format.
  1302. */
  1303. format_map = 1 << intel_sdvo->tv_format_index;
  1304. memcpy(&tv_res, &format_map,
  1305. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1306. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1307. return;
  1308. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1309. if (!intel_sdvo_write_cmd(intel_sdvo,
  1310. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1311. &tv_res, sizeof(tv_res)))
  1312. return;
  1313. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1314. return;
  1315. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1316. if (reply & (1 << i)) {
  1317. struct drm_display_mode *nmode;
  1318. nmode = drm_mode_duplicate(connector->dev,
  1319. &sdvo_tv_modes[i]);
  1320. if (nmode)
  1321. drm_mode_probed_add(connector, nmode);
  1322. }
  1323. }
  1324. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1325. {
  1326. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1327. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1328. struct drm_display_mode *newmode;
  1329. /*
  1330. * Attempt to get the mode list from DDC.
  1331. * Assume that the preferred modes are
  1332. * arranged in priority order.
  1333. */
  1334. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1335. if (list_empty(&connector->probed_modes) == false)
  1336. goto end;
  1337. /* Fetch modes from VBT */
  1338. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1339. newmode = drm_mode_duplicate(connector->dev,
  1340. dev_priv->sdvo_lvds_vbt_mode);
  1341. if (newmode != NULL) {
  1342. /* Guarantee the mode is preferred */
  1343. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1344. DRM_MODE_TYPE_DRIVER);
  1345. drm_mode_probed_add(connector, newmode);
  1346. }
  1347. }
  1348. end:
  1349. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1350. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1351. intel_sdvo->sdvo_lvds_fixed_mode =
  1352. drm_mode_duplicate(connector->dev, newmode);
  1353. drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
  1354. 0);
  1355. intel_sdvo->is_lvds = true;
  1356. break;
  1357. }
  1358. }
  1359. }
  1360. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1361. {
  1362. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1363. if (IS_TV(intel_sdvo_connector))
  1364. intel_sdvo_get_tv_modes(connector);
  1365. else if (IS_LVDS(intel_sdvo_connector))
  1366. intel_sdvo_get_lvds_modes(connector);
  1367. else
  1368. intel_sdvo_get_ddc_modes(connector);
  1369. return !list_empty(&connector->probed_modes);
  1370. }
  1371. static void
  1372. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1373. {
  1374. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1375. struct drm_device *dev = connector->dev;
  1376. if (intel_sdvo_connector->left)
  1377. drm_property_destroy(dev, intel_sdvo_connector->left);
  1378. if (intel_sdvo_connector->right)
  1379. drm_property_destroy(dev, intel_sdvo_connector->right);
  1380. if (intel_sdvo_connector->top)
  1381. drm_property_destroy(dev, intel_sdvo_connector->top);
  1382. if (intel_sdvo_connector->bottom)
  1383. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1384. if (intel_sdvo_connector->hpos)
  1385. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1386. if (intel_sdvo_connector->vpos)
  1387. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1388. if (intel_sdvo_connector->saturation)
  1389. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1390. if (intel_sdvo_connector->contrast)
  1391. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1392. if (intel_sdvo_connector->hue)
  1393. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1394. if (intel_sdvo_connector->sharpness)
  1395. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1396. if (intel_sdvo_connector->flicker_filter)
  1397. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1398. if (intel_sdvo_connector->flicker_filter_2d)
  1399. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1400. if (intel_sdvo_connector->flicker_filter_adaptive)
  1401. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1402. if (intel_sdvo_connector->tv_luma_filter)
  1403. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1404. if (intel_sdvo_connector->tv_chroma_filter)
  1405. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1406. if (intel_sdvo_connector->dot_crawl)
  1407. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1408. if (intel_sdvo_connector->brightness)
  1409. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1410. }
  1411. static void intel_sdvo_destroy(struct drm_connector *connector)
  1412. {
  1413. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1414. if (intel_sdvo_connector->tv_format)
  1415. drm_property_destroy(connector->dev,
  1416. intel_sdvo_connector->tv_format);
  1417. intel_sdvo_destroy_enhance_property(connector);
  1418. drm_sysfs_connector_remove(connector);
  1419. drm_connector_cleanup(connector);
  1420. kfree(connector);
  1421. }
  1422. static int
  1423. intel_sdvo_set_property(struct drm_connector *connector,
  1424. struct drm_property *property,
  1425. uint64_t val)
  1426. {
  1427. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1428. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1429. uint16_t temp_value;
  1430. uint8_t cmd;
  1431. int ret;
  1432. ret = drm_connector_property_set_value(connector, property, val);
  1433. if (ret)
  1434. return ret;
  1435. if (property == intel_sdvo_connector->force_audio_property) {
  1436. if (val == intel_sdvo_connector->force_audio)
  1437. return 0;
  1438. intel_sdvo_connector->force_audio = val;
  1439. if (val > 0 && intel_sdvo->has_hdmi_audio)
  1440. return 0;
  1441. if (val < 0 && !intel_sdvo->has_hdmi_audio)
  1442. return 0;
  1443. intel_sdvo->has_hdmi_audio = val > 0;
  1444. goto done;
  1445. }
  1446. #define CHECK_PROPERTY(name, NAME) \
  1447. if (intel_sdvo_connector->name == property) { \
  1448. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1449. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1450. cmd = SDVO_CMD_SET_##NAME; \
  1451. intel_sdvo_connector->cur_##name = temp_value; \
  1452. goto set_value; \
  1453. }
  1454. if (property == intel_sdvo_connector->tv_format) {
  1455. if (val >= TV_FORMAT_NUM)
  1456. return -EINVAL;
  1457. if (intel_sdvo->tv_format_index ==
  1458. intel_sdvo_connector->tv_format_supported[val])
  1459. return 0;
  1460. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1461. goto done;
  1462. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1463. temp_value = val;
  1464. if (intel_sdvo_connector->left == property) {
  1465. drm_connector_property_set_value(connector,
  1466. intel_sdvo_connector->right, val);
  1467. if (intel_sdvo_connector->left_margin == temp_value)
  1468. return 0;
  1469. intel_sdvo_connector->left_margin = temp_value;
  1470. intel_sdvo_connector->right_margin = temp_value;
  1471. temp_value = intel_sdvo_connector->max_hscan -
  1472. intel_sdvo_connector->left_margin;
  1473. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1474. goto set_value;
  1475. } else if (intel_sdvo_connector->right == property) {
  1476. drm_connector_property_set_value(connector,
  1477. intel_sdvo_connector->left, val);
  1478. if (intel_sdvo_connector->right_margin == temp_value)
  1479. return 0;
  1480. intel_sdvo_connector->left_margin = temp_value;
  1481. intel_sdvo_connector->right_margin = temp_value;
  1482. temp_value = intel_sdvo_connector->max_hscan -
  1483. intel_sdvo_connector->left_margin;
  1484. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1485. goto set_value;
  1486. } else if (intel_sdvo_connector->top == property) {
  1487. drm_connector_property_set_value(connector,
  1488. intel_sdvo_connector->bottom, val);
  1489. if (intel_sdvo_connector->top_margin == temp_value)
  1490. return 0;
  1491. intel_sdvo_connector->top_margin = temp_value;
  1492. intel_sdvo_connector->bottom_margin = temp_value;
  1493. temp_value = intel_sdvo_connector->max_vscan -
  1494. intel_sdvo_connector->top_margin;
  1495. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1496. goto set_value;
  1497. } else if (intel_sdvo_connector->bottom == property) {
  1498. drm_connector_property_set_value(connector,
  1499. intel_sdvo_connector->top, val);
  1500. if (intel_sdvo_connector->bottom_margin == temp_value)
  1501. return 0;
  1502. intel_sdvo_connector->top_margin = temp_value;
  1503. intel_sdvo_connector->bottom_margin = temp_value;
  1504. temp_value = intel_sdvo_connector->max_vscan -
  1505. intel_sdvo_connector->top_margin;
  1506. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1507. goto set_value;
  1508. }
  1509. CHECK_PROPERTY(hpos, HPOS)
  1510. CHECK_PROPERTY(vpos, VPOS)
  1511. CHECK_PROPERTY(saturation, SATURATION)
  1512. CHECK_PROPERTY(contrast, CONTRAST)
  1513. CHECK_PROPERTY(hue, HUE)
  1514. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1515. CHECK_PROPERTY(sharpness, SHARPNESS)
  1516. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1517. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1518. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1519. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1520. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1521. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1522. }
  1523. return -EINVAL; /* unknown property */
  1524. set_value:
  1525. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1526. return -EIO;
  1527. done:
  1528. if (intel_sdvo->base.base.crtc) {
  1529. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1530. drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1531. crtc->y, crtc->fb);
  1532. }
  1533. return 0;
  1534. #undef CHECK_PROPERTY
  1535. }
  1536. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1537. .dpms = intel_sdvo_dpms,
  1538. .mode_fixup = intel_sdvo_mode_fixup,
  1539. .prepare = intel_encoder_prepare,
  1540. .mode_set = intel_sdvo_mode_set,
  1541. .commit = intel_encoder_commit,
  1542. };
  1543. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1544. .dpms = drm_helper_connector_dpms,
  1545. .detect = intel_sdvo_detect,
  1546. .fill_modes = drm_helper_probe_single_connector_modes,
  1547. .set_property = intel_sdvo_set_property,
  1548. .destroy = intel_sdvo_destroy,
  1549. };
  1550. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1551. .get_modes = intel_sdvo_get_modes,
  1552. .mode_valid = intel_sdvo_mode_valid,
  1553. .best_encoder = intel_best_encoder,
  1554. };
  1555. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1556. {
  1557. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1558. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1559. drm_mode_destroy(encoder->dev,
  1560. intel_sdvo->sdvo_lvds_fixed_mode);
  1561. i2c_del_adapter(&intel_sdvo->ddc);
  1562. intel_encoder_destroy(encoder);
  1563. }
  1564. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1565. .destroy = intel_sdvo_enc_destroy,
  1566. };
  1567. static void
  1568. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1569. {
  1570. uint16_t mask = 0;
  1571. unsigned int num_bits;
  1572. /* Make a mask of outputs less than or equal to our own priority in the
  1573. * list.
  1574. */
  1575. switch (sdvo->controlled_output) {
  1576. case SDVO_OUTPUT_LVDS1:
  1577. mask |= SDVO_OUTPUT_LVDS1;
  1578. case SDVO_OUTPUT_LVDS0:
  1579. mask |= SDVO_OUTPUT_LVDS0;
  1580. case SDVO_OUTPUT_TMDS1:
  1581. mask |= SDVO_OUTPUT_TMDS1;
  1582. case SDVO_OUTPUT_TMDS0:
  1583. mask |= SDVO_OUTPUT_TMDS0;
  1584. case SDVO_OUTPUT_RGB1:
  1585. mask |= SDVO_OUTPUT_RGB1;
  1586. case SDVO_OUTPUT_RGB0:
  1587. mask |= SDVO_OUTPUT_RGB0;
  1588. break;
  1589. }
  1590. /* Count bits to find what number we are in the priority list. */
  1591. mask &= sdvo->caps.output_flags;
  1592. num_bits = hweight16(mask);
  1593. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1594. if (num_bits > 3)
  1595. num_bits = 3;
  1596. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1597. sdvo->ddc_bus = 1 << num_bits;
  1598. }
  1599. /**
  1600. * Choose the appropriate DDC bus for control bus switch command for this
  1601. * SDVO output based on the controlled output.
  1602. *
  1603. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1604. * outputs, then LVDS outputs.
  1605. */
  1606. static void
  1607. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1608. struct intel_sdvo *sdvo, u32 reg)
  1609. {
  1610. struct sdvo_device_mapping *mapping;
  1611. if (IS_SDVOB(reg))
  1612. mapping = &(dev_priv->sdvo_mappings[0]);
  1613. else
  1614. mapping = &(dev_priv->sdvo_mappings[1]);
  1615. if (mapping->initialized)
  1616. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1617. else
  1618. intel_sdvo_guess_ddc_bus(sdvo);
  1619. }
  1620. static void
  1621. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1622. struct intel_sdvo *sdvo, u32 reg)
  1623. {
  1624. struct sdvo_device_mapping *mapping;
  1625. u8 pin, speed;
  1626. if (IS_SDVOB(reg))
  1627. mapping = &dev_priv->sdvo_mappings[0];
  1628. else
  1629. mapping = &dev_priv->sdvo_mappings[1];
  1630. pin = GMBUS_PORT_DPB;
  1631. speed = GMBUS_RATE_1MHZ >> 8;
  1632. if (mapping->initialized) {
  1633. pin = mapping->i2c_pin;
  1634. speed = mapping->i2c_speed;
  1635. }
  1636. if (pin < GMBUS_NUM_PORTS) {
  1637. sdvo->i2c = &dev_priv->gmbus[pin].adapter;
  1638. intel_gmbus_set_speed(sdvo->i2c, speed);
  1639. intel_gmbus_force_bit(sdvo->i2c, true);
  1640. } else
  1641. sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
  1642. }
  1643. static bool
  1644. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1645. {
  1646. return intel_sdvo_check_supp_encode(intel_sdvo);
  1647. }
  1648. static u8
  1649. intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
  1650. {
  1651. struct drm_i915_private *dev_priv = dev->dev_private;
  1652. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1653. if (IS_SDVOB(sdvo_reg)) {
  1654. my_mapping = &dev_priv->sdvo_mappings[0];
  1655. other_mapping = &dev_priv->sdvo_mappings[1];
  1656. } else {
  1657. my_mapping = &dev_priv->sdvo_mappings[1];
  1658. other_mapping = &dev_priv->sdvo_mappings[0];
  1659. }
  1660. /* If the BIOS described our SDVO device, take advantage of it. */
  1661. if (my_mapping->slave_addr)
  1662. return my_mapping->slave_addr;
  1663. /* If the BIOS only described a different SDVO device, use the
  1664. * address that it isn't using.
  1665. */
  1666. if (other_mapping->slave_addr) {
  1667. if (other_mapping->slave_addr == 0x70)
  1668. return 0x72;
  1669. else
  1670. return 0x70;
  1671. }
  1672. /* No SDVO device info is found for another DVO port,
  1673. * so use mapping assumption we had before BIOS parsing.
  1674. */
  1675. if (IS_SDVOB(sdvo_reg))
  1676. return 0x70;
  1677. else
  1678. return 0x72;
  1679. }
  1680. static void
  1681. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1682. struct intel_sdvo *encoder)
  1683. {
  1684. drm_connector_init(encoder->base.base.dev,
  1685. &connector->base.base,
  1686. &intel_sdvo_connector_funcs,
  1687. connector->base.base.connector_type);
  1688. drm_connector_helper_add(&connector->base.base,
  1689. &intel_sdvo_connector_helper_funcs);
  1690. connector->base.base.interlace_allowed = 0;
  1691. connector->base.base.doublescan_allowed = 0;
  1692. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1693. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1694. drm_sysfs_connector_add(&connector->base.base);
  1695. }
  1696. static void
  1697. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1698. {
  1699. struct drm_device *dev = connector->base.base.dev;
  1700. connector->force_audio_property =
  1701. drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
  1702. if (connector->force_audio_property) {
  1703. connector->force_audio_property->values[0] = -1;
  1704. connector->force_audio_property->values[1] = 1;
  1705. drm_connector_attach_property(&connector->base.base,
  1706. connector->force_audio_property, 0);
  1707. }
  1708. }
  1709. static bool
  1710. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1711. {
  1712. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1713. struct drm_connector *connector;
  1714. struct intel_connector *intel_connector;
  1715. struct intel_sdvo_connector *intel_sdvo_connector;
  1716. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1717. if (!intel_sdvo_connector)
  1718. return false;
  1719. if (device == 0) {
  1720. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1721. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1722. } else if (device == 1) {
  1723. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1724. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1725. }
  1726. intel_connector = &intel_sdvo_connector->base;
  1727. connector = &intel_connector->base;
  1728. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1729. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1730. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1731. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1732. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1733. intel_sdvo->is_hdmi = true;
  1734. }
  1735. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1736. (1 << INTEL_ANALOG_CLONE_BIT));
  1737. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1738. if (intel_sdvo->is_hdmi)
  1739. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1740. return true;
  1741. }
  1742. static bool
  1743. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1744. {
  1745. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1746. struct drm_connector *connector;
  1747. struct intel_connector *intel_connector;
  1748. struct intel_sdvo_connector *intel_sdvo_connector;
  1749. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1750. if (!intel_sdvo_connector)
  1751. return false;
  1752. intel_connector = &intel_sdvo_connector->base;
  1753. connector = &intel_connector->base;
  1754. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1755. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1756. intel_sdvo->controlled_output |= type;
  1757. intel_sdvo_connector->output_flag = type;
  1758. intel_sdvo->is_tv = true;
  1759. intel_sdvo->base.needs_tv_clock = true;
  1760. intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  1761. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1762. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1763. goto err;
  1764. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1765. goto err;
  1766. return true;
  1767. err:
  1768. intel_sdvo_destroy(connector);
  1769. return false;
  1770. }
  1771. static bool
  1772. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1773. {
  1774. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1775. struct drm_connector *connector;
  1776. struct intel_connector *intel_connector;
  1777. struct intel_sdvo_connector *intel_sdvo_connector;
  1778. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1779. if (!intel_sdvo_connector)
  1780. return false;
  1781. intel_connector = &intel_sdvo_connector->base;
  1782. connector = &intel_connector->base;
  1783. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1784. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1785. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1786. if (device == 0) {
  1787. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1788. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1789. } else if (device == 1) {
  1790. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1791. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1792. }
  1793. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1794. (1 << INTEL_ANALOG_CLONE_BIT));
  1795. intel_sdvo_connector_init(intel_sdvo_connector,
  1796. intel_sdvo);
  1797. return true;
  1798. }
  1799. static bool
  1800. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1801. {
  1802. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1803. struct drm_connector *connector;
  1804. struct intel_connector *intel_connector;
  1805. struct intel_sdvo_connector *intel_sdvo_connector;
  1806. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1807. if (!intel_sdvo_connector)
  1808. return false;
  1809. intel_connector = &intel_sdvo_connector->base;
  1810. connector = &intel_connector->base;
  1811. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1812. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1813. if (device == 0) {
  1814. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1815. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1816. } else if (device == 1) {
  1817. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1818. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1819. }
  1820. intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  1821. (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  1822. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1823. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1824. goto err;
  1825. return true;
  1826. err:
  1827. intel_sdvo_destroy(connector);
  1828. return false;
  1829. }
  1830. static bool
  1831. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1832. {
  1833. intel_sdvo->is_tv = false;
  1834. intel_sdvo->base.needs_tv_clock = false;
  1835. intel_sdvo->is_lvds = false;
  1836. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1837. if (flags & SDVO_OUTPUT_TMDS0)
  1838. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1839. return false;
  1840. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1841. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1842. return false;
  1843. /* TV has no XXX1 function block */
  1844. if (flags & SDVO_OUTPUT_SVID0)
  1845. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1846. return false;
  1847. if (flags & SDVO_OUTPUT_CVBS0)
  1848. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1849. return false;
  1850. if (flags & SDVO_OUTPUT_RGB0)
  1851. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1852. return false;
  1853. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1854. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1855. return false;
  1856. if (flags & SDVO_OUTPUT_LVDS0)
  1857. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1858. return false;
  1859. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1860. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1861. return false;
  1862. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1863. unsigned char bytes[2];
  1864. intel_sdvo->controlled_output = 0;
  1865. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1866. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1867. SDVO_NAME(intel_sdvo),
  1868. bytes[0], bytes[1]);
  1869. return false;
  1870. }
  1871. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
  1872. return true;
  1873. }
  1874. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  1875. struct intel_sdvo_connector *intel_sdvo_connector,
  1876. int type)
  1877. {
  1878. struct drm_device *dev = intel_sdvo->base.base.dev;
  1879. struct intel_sdvo_tv_format format;
  1880. uint32_t format_map, i;
  1881. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  1882. return false;
  1883. BUILD_BUG_ON(sizeof(format) != 6);
  1884. if (!intel_sdvo_get_value(intel_sdvo,
  1885. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  1886. &format, sizeof(format)))
  1887. return false;
  1888. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  1889. if (format_map == 0)
  1890. return false;
  1891. intel_sdvo_connector->format_supported_num = 0;
  1892. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  1893. if (format_map & (1 << i))
  1894. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  1895. intel_sdvo_connector->tv_format =
  1896. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  1897. "mode", intel_sdvo_connector->format_supported_num);
  1898. if (!intel_sdvo_connector->tv_format)
  1899. return false;
  1900. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  1901. drm_property_add_enum(
  1902. intel_sdvo_connector->tv_format, i,
  1903. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  1904. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  1905. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  1906. intel_sdvo_connector->tv_format, 0);
  1907. return true;
  1908. }
  1909. #define ENHANCEMENT(name, NAME) do { \
  1910. if (enhancements.name) { \
  1911. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  1912. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  1913. return false; \
  1914. intel_sdvo_connector->max_##name = data_value[0]; \
  1915. intel_sdvo_connector->cur_##name = response; \
  1916. intel_sdvo_connector->name = \
  1917. drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
  1918. if (!intel_sdvo_connector->name) return false; \
  1919. intel_sdvo_connector->name->values[0] = 0; \
  1920. intel_sdvo_connector->name->values[1] = data_value[0]; \
  1921. drm_connector_attach_property(connector, \
  1922. intel_sdvo_connector->name, \
  1923. intel_sdvo_connector->cur_##name); \
  1924. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  1925. data_value[0], data_value[1], response); \
  1926. } \
  1927. } while(0)
  1928. static bool
  1929. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  1930. struct intel_sdvo_connector *intel_sdvo_connector,
  1931. struct intel_sdvo_enhancements_reply enhancements)
  1932. {
  1933. struct drm_device *dev = intel_sdvo->base.base.dev;
  1934. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  1935. uint16_t response, data_value[2];
  1936. /* when horizontal overscan is supported, Add the left/right property */
  1937. if (enhancements.overscan_h) {
  1938. if (!intel_sdvo_get_value(intel_sdvo,
  1939. SDVO_CMD_GET_MAX_OVERSCAN_H,
  1940. &data_value, 4))
  1941. return false;
  1942. if (!intel_sdvo_get_value(intel_sdvo,
  1943. SDVO_CMD_GET_OVERSCAN_H,
  1944. &response, 2))
  1945. return false;
  1946. intel_sdvo_connector->max_hscan = data_value[0];
  1947. intel_sdvo_connector->left_margin = data_value[0] - response;
  1948. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  1949. intel_sdvo_connector->left =
  1950. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1951. "left_margin", 2);
  1952. if (!intel_sdvo_connector->left)
  1953. return false;
  1954. intel_sdvo_connector->left->values[0] = 0;
  1955. intel_sdvo_connector->left->values[1] = data_value[0];
  1956. drm_connector_attach_property(connector,
  1957. intel_sdvo_connector->left,
  1958. intel_sdvo_connector->left_margin);
  1959. intel_sdvo_connector->right =
  1960. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1961. "right_margin", 2);
  1962. if (!intel_sdvo_connector->right)
  1963. return false;
  1964. intel_sdvo_connector->right->values[0] = 0;
  1965. intel_sdvo_connector->right->values[1] = data_value[0];
  1966. drm_connector_attach_property(connector,
  1967. intel_sdvo_connector->right,
  1968. intel_sdvo_connector->right_margin);
  1969. DRM_DEBUG_KMS("h_overscan: max %d, "
  1970. "default %d, current %d\n",
  1971. data_value[0], data_value[1], response);
  1972. }
  1973. if (enhancements.overscan_v) {
  1974. if (!intel_sdvo_get_value(intel_sdvo,
  1975. SDVO_CMD_GET_MAX_OVERSCAN_V,
  1976. &data_value, 4))
  1977. return false;
  1978. if (!intel_sdvo_get_value(intel_sdvo,
  1979. SDVO_CMD_GET_OVERSCAN_V,
  1980. &response, 2))
  1981. return false;
  1982. intel_sdvo_connector->max_vscan = data_value[0];
  1983. intel_sdvo_connector->top_margin = data_value[0] - response;
  1984. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  1985. intel_sdvo_connector->top =
  1986. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1987. "top_margin", 2);
  1988. if (!intel_sdvo_connector->top)
  1989. return false;
  1990. intel_sdvo_connector->top->values[0] = 0;
  1991. intel_sdvo_connector->top->values[1] = data_value[0];
  1992. drm_connector_attach_property(connector,
  1993. intel_sdvo_connector->top,
  1994. intel_sdvo_connector->top_margin);
  1995. intel_sdvo_connector->bottom =
  1996. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1997. "bottom_margin", 2);
  1998. if (!intel_sdvo_connector->bottom)
  1999. return false;
  2000. intel_sdvo_connector->bottom->values[0] = 0;
  2001. intel_sdvo_connector->bottom->values[1] = data_value[0];
  2002. drm_connector_attach_property(connector,
  2003. intel_sdvo_connector->bottom,
  2004. intel_sdvo_connector->bottom_margin);
  2005. DRM_DEBUG_KMS("v_overscan: max %d, "
  2006. "default %d, current %d\n",
  2007. data_value[0], data_value[1], response);
  2008. }
  2009. ENHANCEMENT(hpos, HPOS);
  2010. ENHANCEMENT(vpos, VPOS);
  2011. ENHANCEMENT(saturation, SATURATION);
  2012. ENHANCEMENT(contrast, CONTRAST);
  2013. ENHANCEMENT(hue, HUE);
  2014. ENHANCEMENT(sharpness, SHARPNESS);
  2015. ENHANCEMENT(brightness, BRIGHTNESS);
  2016. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2017. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2018. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2019. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2020. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2021. if (enhancements.dot_crawl) {
  2022. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2023. return false;
  2024. intel_sdvo_connector->max_dot_crawl = 1;
  2025. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2026. intel_sdvo_connector->dot_crawl =
  2027. drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
  2028. if (!intel_sdvo_connector->dot_crawl)
  2029. return false;
  2030. intel_sdvo_connector->dot_crawl->values[0] = 0;
  2031. intel_sdvo_connector->dot_crawl->values[1] = 1;
  2032. drm_connector_attach_property(connector,
  2033. intel_sdvo_connector->dot_crawl,
  2034. intel_sdvo_connector->cur_dot_crawl);
  2035. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2036. }
  2037. return true;
  2038. }
  2039. static bool
  2040. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2041. struct intel_sdvo_connector *intel_sdvo_connector,
  2042. struct intel_sdvo_enhancements_reply enhancements)
  2043. {
  2044. struct drm_device *dev = intel_sdvo->base.base.dev;
  2045. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2046. uint16_t response, data_value[2];
  2047. ENHANCEMENT(brightness, BRIGHTNESS);
  2048. return true;
  2049. }
  2050. #undef ENHANCEMENT
  2051. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2052. struct intel_sdvo_connector *intel_sdvo_connector)
  2053. {
  2054. union {
  2055. struct intel_sdvo_enhancements_reply reply;
  2056. uint16_t response;
  2057. } enhancements;
  2058. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2059. enhancements.response = 0;
  2060. intel_sdvo_get_value(intel_sdvo,
  2061. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2062. &enhancements, sizeof(enhancements));
  2063. if (enhancements.response == 0) {
  2064. DRM_DEBUG_KMS("No enhancement is supported\n");
  2065. return true;
  2066. }
  2067. if (IS_TV(intel_sdvo_connector))
  2068. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2069. else if(IS_LVDS(intel_sdvo_connector))
  2070. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2071. else
  2072. return true;
  2073. }
  2074. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2075. struct i2c_msg *msgs,
  2076. int num)
  2077. {
  2078. struct intel_sdvo *sdvo = adapter->algo_data;
  2079. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2080. return -EIO;
  2081. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2082. }
  2083. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2084. {
  2085. struct intel_sdvo *sdvo = adapter->algo_data;
  2086. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2087. }
  2088. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2089. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2090. .functionality = intel_sdvo_ddc_proxy_func
  2091. };
  2092. static bool
  2093. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2094. struct drm_device *dev)
  2095. {
  2096. sdvo->ddc.owner = THIS_MODULE;
  2097. sdvo->ddc.class = I2C_CLASS_DDC;
  2098. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2099. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2100. sdvo->ddc.algo_data = sdvo;
  2101. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2102. return i2c_add_adapter(&sdvo->ddc) == 0;
  2103. }
  2104. bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
  2105. {
  2106. struct drm_i915_private *dev_priv = dev->dev_private;
  2107. struct intel_encoder *intel_encoder;
  2108. struct intel_sdvo *intel_sdvo;
  2109. int i;
  2110. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2111. if (!intel_sdvo)
  2112. return false;
  2113. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2114. kfree(intel_sdvo);
  2115. return false;
  2116. }
  2117. intel_sdvo->sdvo_reg = sdvo_reg;
  2118. intel_encoder = &intel_sdvo->base;
  2119. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2120. /* encoder type will be decided later */
  2121. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2122. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
  2123. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2124. /* Read the regs to test if we can talk to the device */
  2125. for (i = 0; i < 0x40; i++) {
  2126. u8 byte;
  2127. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2128. DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
  2129. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2130. goto err;
  2131. }
  2132. }
  2133. if (IS_SDVOB(sdvo_reg))
  2134. dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2135. else
  2136. dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2137. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2138. /* In default case sdvo lvds is false */
  2139. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2140. goto err;
  2141. if (intel_sdvo_output_setup(intel_sdvo,
  2142. intel_sdvo->caps.output_flags) != true) {
  2143. DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
  2144. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2145. goto err;
  2146. }
  2147. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2148. /* Set the input timing to the screen. Assume always input 0. */
  2149. if (!intel_sdvo_set_target_input(intel_sdvo))
  2150. goto err;
  2151. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2152. &intel_sdvo->pixel_clock_min,
  2153. &intel_sdvo->pixel_clock_max))
  2154. goto err;
  2155. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2156. "clock range %dMHz - %dMHz, "
  2157. "input 1: %c, input 2: %c, "
  2158. "output 1: %c, output 2: %c\n",
  2159. SDVO_NAME(intel_sdvo),
  2160. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2161. intel_sdvo->caps.device_rev_id,
  2162. intel_sdvo->pixel_clock_min / 1000,
  2163. intel_sdvo->pixel_clock_max / 1000,
  2164. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2165. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2166. /* check currently supported outputs */
  2167. intel_sdvo->caps.output_flags &
  2168. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2169. intel_sdvo->caps.output_flags &
  2170. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2171. return true;
  2172. err:
  2173. drm_encoder_cleanup(&intel_encoder->base);
  2174. i2c_del_adapter(&intel_sdvo->ddc);
  2175. kfree(intel_sdvo);
  2176. return false;
  2177. }