mac-scc.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527
  1. /*
  2. * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/errno.h>
  22. #include <linux/ioport.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/mii.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/bitops.h>
  35. #include <linux/fs.h>
  36. #include <linux/platform_device.h>
  37. #include <asm/irq.h>
  38. #include <asm/uaccess.h>
  39. #ifdef CONFIG_8xx
  40. #include <asm/8xx_immap.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/mpc8xx.h>
  43. #include <asm/commproc.h>
  44. #endif
  45. #include "fs_enet.h"
  46. /*************************************************/
  47. #if defined(CONFIG_CPM1)
  48. /* for a 8xx __raw_xxx's are sufficient */
  49. #define __fs_out32(addr, x) __raw_writel(x, addr)
  50. #define __fs_out16(addr, x) __raw_writew(x, addr)
  51. #define __fs_out8(addr, x) __raw_writeb(x, addr)
  52. #define __fs_in32(addr) __raw_readl(addr)
  53. #define __fs_in16(addr) __raw_readw(addr)
  54. #define __fs_in8(addr) __raw_readb(addr)
  55. #else
  56. /* for others play it safe */
  57. #define __fs_out32(addr, x) out_be32(addr, x)
  58. #define __fs_out16(addr, x) out_be16(addr, x)
  59. #define __fs_in32(addr) in_be32(addr)
  60. #define __fs_in16(addr) in_be16(addr)
  61. #endif
  62. /* write, read, set bits, clear bits */
  63. #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
  64. #define R32(_p, _m) __fs_in32(&(_p)->_m)
  65. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  66. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  67. #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
  68. #define R16(_p, _m) __fs_in16(&(_p)->_m)
  69. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  70. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  71. #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
  72. #define R8(_p, _m) __fs_in8(&(_p)->_m)
  73. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  74. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  75. #define SCC_MAX_MULTICAST_ADDRS 64
  76. /*
  77. * Delay to wait for SCC reset command to complete (in us)
  78. */
  79. #define SCC_RESET_DELAY 50
  80. #define MAX_CR_CMD_LOOPS 10000
  81. static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
  82. {
  83. cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
  84. u32 v, ch;
  85. int i = 0;
  86. ch = fep->scc.idx << 2;
  87. v = mk_cr_cmd(ch, op);
  88. W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
  89. for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
  90. if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
  91. break;
  92. if (i >= MAX_CR_CMD_LOOPS) {
  93. printk(KERN_ERR "%s(): Not able to issue CPM command\n",
  94. __FUNCTION__);
  95. return 1;
  96. }
  97. return 0;
  98. }
  99. static int do_pd_setup(struct fs_enet_private *fep)
  100. {
  101. struct platform_device *pdev = to_platform_device(fep->dev);
  102. struct resource *r;
  103. /* Fill out IRQ field */
  104. fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
  105. if (fep->interrupt < 0)
  106. return -EINVAL;
  107. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  108. fep->scc.sccp = (void *)r->start;
  109. if (fep->scc.sccp == NULL)
  110. return -EINVAL;
  111. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
  112. fep->scc.ep = (void *)r->start;
  113. if (fep->scc.ep == NULL)
  114. return -EINVAL;
  115. return 0;
  116. }
  117. #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
  118. #define SCC_RX_EVENT (SCCE_ENET_RXF)
  119. #define SCC_TX_EVENT (SCCE_ENET_TXB)
  120. #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
  121. static int setup_data(struct net_device *dev)
  122. {
  123. struct fs_enet_private *fep = netdev_priv(dev);
  124. const struct fs_platform_info *fpi = fep->fpi;
  125. fep->scc.idx = fs_get_scc_index(fpi->fs_no);
  126. if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
  127. return -EINVAL;
  128. do_pd_setup(fep);
  129. fep->scc.hthi = 0;
  130. fep->scc.htlo = 0;
  131. fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
  132. fep->ev_rx = SCC_RX_EVENT;
  133. fep->ev_tx = SCC_TX_EVENT;
  134. fep->ev_err = SCC_ERR_EVENT_MSK;
  135. return 0;
  136. }
  137. static int allocate_bd(struct net_device *dev)
  138. {
  139. struct fs_enet_private *fep = netdev_priv(dev);
  140. const struct fs_platform_info *fpi = fep->fpi;
  141. fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
  142. sizeof(cbd_t), 8);
  143. if (IS_DPERR(fep->ring_mem_addr))
  144. return -ENOMEM;
  145. fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
  146. return 0;
  147. }
  148. static void free_bd(struct net_device *dev)
  149. {
  150. struct fs_enet_private *fep = netdev_priv(dev);
  151. if (fep->ring_base)
  152. cpm_dpfree(fep->ring_mem_addr);
  153. }
  154. static void cleanup_data(struct net_device *dev)
  155. {
  156. /* nothing */
  157. }
  158. static void set_promiscuous_mode(struct net_device *dev)
  159. {
  160. struct fs_enet_private *fep = netdev_priv(dev);
  161. scc_t *sccp = fep->scc.sccp;
  162. S16(sccp, scc_psmr, SCC_PSMR_PRO);
  163. }
  164. static void set_multicast_start(struct net_device *dev)
  165. {
  166. struct fs_enet_private *fep = netdev_priv(dev);
  167. scc_enet_t *ep = fep->scc.ep;
  168. W16(ep, sen_gaddr1, 0);
  169. W16(ep, sen_gaddr2, 0);
  170. W16(ep, sen_gaddr3, 0);
  171. W16(ep, sen_gaddr4, 0);
  172. }
  173. static void set_multicast_one(struct net_device *dev, const u8 * mac)
  174. {
  175. struct fs_enet_private *fep = netdev_priv(dev);
  176. scc_enet_t *ep = fep->scc.ep;
  177. u16 taddrh, taddrm, taddrl;
  178. taddrh = ((u16) mac[5] << 8) | mac[4];
  179. taddrm = ((u16) mac[3] << 8) | mac[2];
  180. taddrl = ((u16) mac[1] << 8) | mac[0];
  181. W16(ep, sen_taddrh, taddrh);
  182. W16(ep, sen_taddrm, taddrm);
  183. W16(ep, sen_taddrl, taddrl);
  184. scc_cr_cmd(fep, CPM_CR_SET_GADDR);
  185. }
  186. static void set_multicast_finish(struct net_device *dev)
  187. {
  188. struct fs_enet_private *fep = netdev_priv(dev);
  189. scc_t *sccp = fep->scc.sccp;
  190. scc_enet_t *ep = fep->scc.ep;
  191. /* clear promiscuous always */
  192. C16(sccp, scc_psmr, SCC_PSMR_PRO);
  193. /* if all multi or too many multicasts; just enable all */
  194. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  195. dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
  196. W16(ep, sen_gaddr1, 0xffff);
  197. W16(ep, sen_gaddr2, 0xffff);
  198. W16(ep, sen_gaddr3, 0xffff);
  199. W16(ep, sen_gaddr4, 0xffff);
  200. }
  201. }
  202. static void set_multicast_list(struct net_device *dev)
  203. {
  204. struct dev_mc_list *pmc;
  205. if ((dev->flags & IFF_PROMISC) == 0) {
  206. set_multicast_start(dev);
  207. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  208. set_multicast_one(dev, pmc->dmi_addr);
  209. set_multicast_finish(dev);
  210. } else
  211. set_promiscuous_mode(dev);
  212. }
  213. /*
  214. * This function is called to start or restart the FEC during a link
  215. * change. This only happens when switching between half and full
  216. * duplex.
  217. */
  218. static void restart(struct net_device *dev)
  219. {
  220. struct fs_enet_private *fep = netdev_priv(dev);
  221. scc_t *sccp = fep->scc.sccp;
  222. scc_enet_t *ep = fep->scc.ep;
  223. const struct fs_platform_info *fpi = fep->fpi;
  224. u16 paddrh, paddrm, paddrl;
  225. const unsigned char *mac;
  226. int i;
  227. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  228. /* clear everything (slow & steady does it) */
  229. for (i = 0; i < sizeof(*ep); i++)
  230. __fs_out8((char *)ep + i, 0);
  231. /* point to bds */
  232. W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
  233. W16(ep, sen_genscc.scc_tbase,
  234. fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
  235. /* Initialize function code registers for big-endian.
  236. */
  237. W8(ep, sen_genscc.scc_rfcr, SCC_EB);
  238. W8(ep, sen_genscc.scc_tfcr, SCC_EB);
  239. /* Set maximum bytes per receive buffer.
  240. * This appears to be an Ethernet frame size, not the buffer
  241. * fragment size. It must be a multiple of four.
  242. */
  243. W16(ep, sen_genscc.scc_mrblr, 0x5f0);
  244. /* Set CRC preset and mask.
  245. */
  246. W32(ep, sen_cpres, 0xffffffff);
  247. W32(ep, sen_cmask, 0xdebb20e3);
  248. W32(ep, sen_crcec, 0); /* CRC Error counter */
  249. W32(ep, sen_alec, 0); /* alignment error counter */
  250. W32(ep, sen_disfc, 0); /* discard frame counter */
  251. W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
  252. W16(ep, sen_retlim, 15); /* Retry limit threshold */
  253. W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
  254. W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  255. W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
  256. W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
  257. /* Clear hash tables.
  258. */
  259. W16(ep, sen_gaddr1, 0);
  260. W16(ep, sen_gaddr2, 0);
  261. W16(ep, sen_gaddr3, 0);
  262. W16(ep, sen_gaddr4, 0);
  263. W16(ep, sen_iaddr1, 0);
  264. W16(ep, sen_iaddr2, 0);
  265. W16(ep, sen_iaddr3, 0);
  266. W16(ep, sen_iaddr4, 0);
  267. /* set address
  268. */
  269. mac = dev->dev_addr;
  270. paddrh = ((u16) mac[5] << 8) | mac[4];
  271. paddrm = ((u16) mac[3] << 8) | mac[2];
  272. paddrl = ((u16) mac[1] << 8) | mac[0];
  273. W16(ep, sen_paddrh, paddrh);
  274. W16(ep, sen_paddrm, paddrm);
  275. W16(ep, sen_paddrl, paddrl);
  276. W16(ep, sen_pper, 0);
  277. W16(ep, sen_taddrl, 0);
  278. W16(ep, sen_taddrm, 0);
  279. W16(ep, sen_taddrh, 0);
  280. fs_init_bds(dev);
  281. scc_cr_cmd(fep, CPM_CR_INIT_TRX);
  282. W16(sccp, scc_scce, 0xffff);
  283. /* Enable interrupts we wish to service.
  284. */
  285. W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
  286. /* Set GSMR_H to enable all normal operating modes.
  287. * Set GSMR_L to enable Ethernet to MC68160.
  288. */
  289. W32(sccp, scc_gsmrh, 0);
  290. W32(sccp, scc_gsmrl,
  291. SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
  292. SCC_GSMRL_MODE_ENET);
  293. /* Set sync/delimiters.
  294. */
  295. W16(sccp, scc_dsr, 0xd555);
  296. /* Set processing mode. Use Ethernet CRC, catch broadcast, and
  297. * start frame search 22 bit times after RENA.
  298. */
  299. W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
  300. /* Set full duplex mode if needed */
  301. if (fep->duplex)
  302. S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
  303. S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  304. }
  305. static void stop(struct net_device *dev)
  306. {
  307. struct fs_enet_private *fep = netdev_priv(dev);
  308. scc_t *sccp = fep->scc.sccp;
  309. int i;
  310. for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
  311. udelay(1);
  312. if (i == SCC_RESET_DELAY)
  313. printk(KERN_WARNING DRV_MODULE_NAME
  314. ": %s SCC timeout on graceful transmit stop\n",
  315. dev->name);
  316. W16(sccp, scc_sccm, 0);
  317. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  318. fs_cleanup_bds(dev);
  319. }
  320. static void pre_request_irq(struct net_device *dev, int irq)
  321. {
  322. immap_t *immap = fs_enet_immap;
  323. u32 siel;
  324. /* SIU interrupt */
  325. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  326. siel = in_be32(&immap->im_siu_conf.sc_siel);
  327. if ((irq & 1) == 0)
  328. siel |= (0x80000000 >> irq);
  329. else
  330. siel &= ~(0x80000000 >> (irq & ~1));
  331. out_be32(&immap->im_siu_conf.sc_siel, siel);
  332. }
  333. }
  334. static void post_free_irq(struct net_device *dev, int irq)
  335. {
  336. /* nothing */
  337. }
  338. static void napi_clear_rx_event(struct net_device *dev)
  339. {
  340. struct fs_enet_private *fep = netdev_priv(dev);
  341. scc_t *sccp = fep->scc.sccp;
  342. W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
  343. }
  344. static void napi_enable_rx(struct net_device *dev)
  345. {
  346. struct fs_enet_private *fep = netdev_priv(dev);
  347. scc_t *sccp = fep->scc.sccp;
  348. S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  349. }
  350. static void napi_disable_rx(struct net_device *dev)
  351. {
  352. struct fs_enet_private *fep = netdev_priv(dev);
  353. scc_t *sccp = fep->scc.sccp;
  354. C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  355. }
  356. static void rx_bd_done(struct net_device *dev)
  357. {
  358. /* nothing */
  359. }
  360. static void tx_kickstart(struct net_device *dev)
  361. {
  362. /* nothing */
  363. }
  364. static u32 get_int_events(struct net_device *dev)
  365. {
  366. struct fs_enet_private *fep = netdev_priv(dev);
  367. scc_t *sccp = fep->scc.sccp;
  368. return (u32) R16(sccp, scc_scce);
  369. }
  370. static void clear_int_events(struct net_device *dev, u32 int_events)
  371. {
  372. struct fs_enet_private *fep = netdev_priv(dev);
  373. scc_t *sccp = fep->scc.sccp;
  374. W16(sccp, scc_scce, int_events & 0xffff);
  375. }
  376. static void ev_error(struct net_device *dev, u32 int_events)
  377. {
  378. printk(KERN_WARNING DRV_MODULE_NAME
  379. ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
  380. }
  381. static int get_regs(struct net_device *dev, void *p, int *sizep)
  382. {
  383. struct fs_enet_private *fep = netdev_priv(dev);
  384. if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
  385. return -EINVAL;
  386. memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
  387. p = (char *)p + sizeof(scc_t);
  388. memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
  389. return 0;
  390. }
  391. static int get_regs_len(struct net_device *dev)
  392. {
  393. return sizeof(scc_t) + sizeof(scc_enet_t);
  394. }
  395. static void tx_restart(struct net_device *dev)
  396. {
  397. struct fs_enet_private *fep = netdev_priv(dev);
  398. scc_cr_cmd(fep, CPM_CR_RESTART_TX);
  399. }
  400. /*************************************************************************/
  401. const struct fs_ops fs_scc_ops = {
  402. .setup_data = setup_data,
  403. .cleanup_data = cleanup_data,
  404. .set_multicast_list = set_multicast_list,
  405. .restart = restart,
  406. .stop = stop,
  407. .pre_request_irq = pre_request_irq,
  408. .post_free_irq = post_free_irq,
  409. .napi_clear_rx_event = napi_clear_rx_event,
  410. .napi_enable_rx = napi_enable_rx,
  411. .napi_disable_rx = napi_disable_rx,
  412. .rx_bd_done = rx_bd_done,
  413. .tx_kickstart = tx_kickstart,
  414. .get_int_events = get_int_events,
  415. .clear_int_events = clear_int_events,
  416. .ev_error = ev_error,
  417. .get_regs = get_regs,
  418. .get_regs_len = get_regs_len,
  419. .tx_restart = tx_restart,
  420. .allocate_bd = allocate_bd,
  421. .free_bd = free_bd,
  422. };