e1000_main.c 130 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 7.0.33 3-Feb-2006
  23. * o Added another fix for the pass false carrier bit
  24. * 7.0.32 24-Jan-2006
  25. * o Need to rebuild with noew version number for the pass false carrier
  26. * fix in e1000_hw.c
  27. * 7.0.30 18-Jan-2006
  28. * o fixup for tso workaround to disable it for pci-x
  29. * o fix mem leak on 82542
  30. * o fixes for 10 Mb/s connections and incorrect stats
  31. * 7.0.28 01/06/2006
  32. * o hardware workaround to only set "speed mode" bit for 1G link.
  33. * 7.0.26 12/23/2005
  34. * o wake on lan support modified for device ID 10B5
  35. * o fix dhcp + vlan issue not making it to the iAMT firmware
  36. * 7.0.24 12/9/2005
  37. * o New hardware support for the Gigabit NIC embedded in the south bridge
  38. * o Fixes to the recycling logic (skb->tail) from IBM LTC
  39. * 6.3.9 12/16/2005
  40. * o incorporate fix for recycled skbs from IBM LTC
  41. * 6.3.7 11/18/2005
  42. * o Honor eeprom setting for enabling/disabling Wake On Lan
  43. * 6.3.5 11/17/2005
  44. * o Fix memory leak in rx ring handling for PCI Express adapters
  45. * 6.3.4 11/8/05
  46. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  47. * 6.3.2 9/20/05
  48. * o Render logic that sets/resets DRV_LOAD as inline functions to
  49. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  50. * network interface is open.
  51. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  52. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  53. * rx_buffer_len
  54. * 6.3.1 9/19/05
  55. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  56. * (e1000_clean_tx_irq)
  57. * o Support for 8086:10B5 device (Quad Port)
  58. */
  59. char e1000_driver_name[] = "e1000";
  60. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  61. #ifndef CONFIG_E1000_NAPI
  62. #define DRIVERNAPI
  63. #else
  64. #define DRIVERNAPI "-NAPI"
  65. #endif
  66. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  67. char e1000_driver_version[] = DRV_VERSION;
  68. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  69. /* e1000_pci_tbl - PCI Device ID Table
  70. *
  71. * Last entry must be all 0s
  72. *
  73. * Macro expands to...
  74. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  75. */
  76. static struct pci_device_id e1000_pci_tbl[] = {
  77. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  79. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  82. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  83. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  84. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  85. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  91. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  92. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  93. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  94. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  95. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  96. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  97. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  98. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  99. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  100. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  101. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  102. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  103. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  104. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  105. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  106. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  110. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  111. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  112. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  113. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  114. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  115. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  116. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  117. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  118. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  122. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  123. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  124. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  125. /* required last entry */
  126. {0,}
  127. };
  128. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  129. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  130. struct e1000_tx_ring *txdr);
  131. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rxdr);
  133. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  134. struct e1000_tx_ring *tx_ring);
  135. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  136. struct e1000_rx_ring *rx_ring);
  137. /* Local Function Prototypes */
  138. static int e1000_init_module(void);
  139. static void e1000_exit_module(void);
  140. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  141. static void __devexit e1000_remove(struct pci_dev *pdev);
  142. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  143. static int e1000_sw_init(struct e1000_adapter *adapter);
  144. static int e1000_open(struct net_device *netdev);
  145. static int e1000_close(struct net_device *netdev);
  146. static void e1000_configure_tx(struct e1000_adapter *adapter);
  147. static void e1000_configure_rx(struct e1000_adapter *adapter);
  148. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  149. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  150. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  151. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  152. struct e1000_tx_ring *tx_ring);
  153. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  154. struct e1000_rx_ring *rx_ring);
  155. static void e1000_set_multi(struct net_device *netdev);
  156. static void e1000_update_phy_info(unsigned long data);
  157. static void e1000_watchdog(unsigned long data);
  158. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  159. static void e1000_82547_tx_fifo_stall(unsigned long data);
  160. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  161. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  162. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  163. static int e1000_set_mac(struct net_device *netdev, void *p);
  164. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  165. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  166. struct e1000_tx_ring *tx_ring);
  167. #ifdef CONFIG_E1000_NAPI
  168. static int e1000_clean(struct net_device *poll_dev, int *budget);
  169. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring,
  171. int *work_done, int work_to_do);
  172. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  173. struct e1000_rx_ring *rx_ring,
  174. int *work_done, int work_to_do);
  175. #else
  176. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  177. struct e1000_rx_ring *rx_ring);
  178. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  179. struct e1000_rx_ring *rx_ring);
  180. #endif
  181. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  182. struct e1000_rx_ring *rx_ring,
  183. int cleaned_count);
  184. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  185. struct e1000_rx_ring *rx_ring,
  186. int cleaned_count);
  187. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  188. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  189. int cmd);
  190. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  191. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  192. static void e1000_tx_timeout(struct net_device *dev);
  193. static void e1000_reset_task(struct net_device *dev);
  194. static void e1000_smartspeed(struct e1000_adapter *adapter);
  195. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  196. struct sk_buff *skb);
  197. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  198. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  199. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  200. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  201. #ifdef CONFIG_PM
  202. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  203. static int e1000_resume(struct pci_dev *pdev);
  204. #endif
  205. static void e1000_shutdown(struct pci_dev *pdev);
  206. #ifdef CONFIG_NET_POLL_CONTROLLER
  207. /* for netdump / net console */
  208. static void e1000_netpoll (struct net_device *netdev);
  209. #endif
  210. static struct pci_driver e1000_driver = {
  211. .name = e1000_driver_name,
  212. .id_table = e1000_pci_tbl,
  213. .probe = e1000_probe,
  214. .remove = __devexit_p(e1000_remove),
  215. /* Power Managment Hooks */
  216. #ifdef CONFIG_PM
  217. .suspend = e1000_suspend,
  218. .resume = e1000_resume,
  219. #endif
  220. .shutdown = e1000_shutdown
  221. };
  222. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  223. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  224. MODULE_LICENSE("GPL");
  225. MODULE_VERSION(DRV_VERSION);
  226. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  227. module_param(debug, int, 0);
  228. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  229. /**
  230. * e1000_init_module - Driver Registration Routine
  231. *
  232. * e1000_init_module is the first routine called when the driver is
  233. * loaded. All it does is register with the PCI subsystem.
  234. **/
  235. static int __init
  236. e1000_init_module(void)
  237. {
  238. int ret;
  239. printk(KERN_INFO "%s - version %s\n",
  240. e1000_driver_string, e1000_driver_version);
  241. printk(KERN_INFO "%s\n", e1000_copyright);
  242. ret = pci_module_init(&e1000_driver);
  243. return ret;
  244. }
  245. module_init(e1000_init_module);
  246. /**
  247. * e1000_exit_module - Driver Exit Cleanup Routine
  248. *
  249. * e1000_exit_module is called just before the driver is removed
  250. * from memory.
  251. **/
  252. static void __exit
  253. e1000_exit_module(void)
  254. {
  255. pci_unregister_driver(&e1000_driver);
  256. }
  257. module_exit(e1000_exit_module);
  258. /**
  259. * e1000_irq_disable - Mask off interrupt generation on the NIC
  260. * @adapter: board private structure
  261. **/
  262. static inline void
  263. e1000_irq_disable(struct e1000_adapter *adapter)
  264. {
  265. atomic_inc(&adapter->irq_sem);
  266. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  267. E1000_WRITE_FLUSH(&adapter->hw);
  268. synchronize_irq(adapter->pdev->irq);
  269. }
  270. /**
  271. * e1000_irq_enable - Enable default interrupt generation settings
  272. * @adapter: board private structure
  273. **/
  274. static inline void
  275. e1000_irq_enable(struct e1000_adapter *adapter)
  276. {
  277. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  278. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  279. E1000_WRITE_FLUSH(&adapter->hw);
  280. }
  281. }
  282. static void
  283. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  284. {
  285. struct net_device *netdev = adapter->netdev;
  286. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  287. uint16_t old_vid = adapter->mng_vlan_id;
  288. if (adapter->vlgrp) {
  289. if (!adapter->vlgrp->vlan_devices[vid]) {
  290. if (adapter->hw.mng_cookie.status &
  291. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  292. e1000_vlan_rx_add_vid(netdev, vid);
  293. adapter->mng_vlan_id = vid;
  294. } else
  295. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  296. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  297. (vid != old_vid) &&
  298. !adapter->vlgrp->vlan_devices[old_vid])
  299. e1000_vlan_rx_kill_vid(netdev, old_vid);
  300. } else
  301. adapter->mng_vlan_id = vid;
  302. }
  303. }
  304. /**
  305. * e1000_release_hw_control - release control of the h/w to f/w
  306. * @adapter: address of board private structure
  307. *
  308. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  309. * For ASF and Pass Through versions of f/w this means that the
  310. * driver is no longer loaded. For AMT version (only with 82573) i
  311. * of the f/w this means that the netowrk i/f is closed.
  312. *
  313. **/
  314. static inline void
  315. e1000_release_hw_control(struct e1000_adapter *adapter)
  316. {
  317. uint32_t ctrl_ext;
  318. uint32_t swsm;
  319. /* Let firmware taken over control of h/w */
  320. switch (adapter->hw.mac_type) {
  321. case e1000_82571:
  322. case e1000_82572:
  323. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  324. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  325. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  326. break;
  327. case e1000_82573:
  328. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  329. E1000_WRITE_REG(&adapter->hw, SWSM,
  330. swsm & ~E1000_SWSM_DRV_LOAD);
  331. default:
  332. break;
  333. }
  334. }
  335. /**
  336. * e1000_get_hw_control - get control of the h/w from f/w
  337. * @adapter: address of board private structure
  338. *
  339. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  340. * For ASF and Pass Through versions of f/w this means that
  341. * the driver is loaded. For AMT version (only with 82573)
  342. * of the f/w this means that the netowrk i/f is open.
  343. *
  344. **/
  345. static inline void
  346. e1000_get_hw_control(struct e1000_adapter *adapter)
  347. {
  348. uint32_t ctrl_ext;
  349. uint32_t swsm;
  350. /* Let firmware know the driver has taken over */
  351. switch (adapter->hw.mac_type) {
  352. case e1000_82571:
  353. case e1000_82572:
  354. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  355. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  356. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  357. break;
  358. case e1000_82573:
  359. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  360. E1000_WRITE_REG(&adapter->hw, SWSM,
  361. swsm | E1000_SWSM_DRV_LOAD);
  362. break;
  363. default:
  364. break;
  365. }
  366. }
  367. int
  368. e1000_up(struct e1000_adapter *adapter)
  369. {
  370. struct net_device *netdev = adapter->netdev;
  371. int i, err;
  372. /* hardware has been reset, we need to reload some things */
  373. /* Reset the PHY if it was previously powered down */
  374. if (adapter->hw.media_type == e1000_media_type_copper) {
  375. uint16_t mii_reg;
  376. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  377. if (mii_reg & MII_CR_POWER_DOWN)
  378. e1000_phy_reset(&adapter->hw);
  379. }
  380. e1000_set_multi(netdev);
  381. e1000_restore_vlan(adapter);
  382. e1000_configure_tx(adapter);
  383. e1000_setup_rctl(adapter);
  384. e1000_configure_rx(adapter);
  385. /* call E1000_DESC_UNUSED which always leaves
  386. * at least 1 descriptor unused to make sure
  387. * next_to_use != next_to_clean */
  388. for (i = 0; i < adapter->num_rx_queues; i++) {
  389. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  390. adapter->alloc_rx_buf(adapter, ring,
  391. E1000_DESC_UNUSED(ring));
  392. }
  393. #ifdef CONFIG_PCI_MSI
  394. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  395. adapter->have_msi = TRUE;
  396. if ((err = pci_enable_msi(adapter->pdev))) {
  397. DPRINTK(PROBE, ERR,
  398. "Unable to allocate MSI interrupt Error: %d\n", err);
  399. adapter->have_msi = FALSE;
  400. }
  401. }
  402. #endif
  403. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  404. SA_SHIRQ | SA_SAMPLE_RANDOM,
  405. netdev->name, netdev))) {
  406. DPRINTK(PROBE, ERR,
  407. "Unable to allocate interrupt Error: %d\n", err);
  408. return err;
  409. }
  410. adapter->tx_queue_len = netdev->tx_queue_len;
  411. mod_timer(&adapter->watchdog_timer, jiffies);
  412. #ifdef CONFIG_E1000_NAPI
  413. netif_poll_enable(netdev);
  414. #endif
  415. e1000_irq_enable(adapter);
  416. return 0;
  417. }
  418. void
  419. e1000_down(struct e1000_adapter *adapter)
  420. {
  421. struct net_device *netdev = adapter->netdev;
  422. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  423. e1000_check_mng_mode(&adapter->hw);
  424. e1000_irq_disable(adapter);
  425. free_irq(adapter->pdev->irq, netdev);
  426. #ifdef CONFIG_PCI_MSI
  427. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  428. adapter->have_msi == TRUE)
  429. pci_disable_msi(adapter->pdev);
  430. #endif
  431. del_timer_sync(&adapter->tx_fifo_stall_timer);
  432. del_timer_sync(&adapter->watchdog_timer);
  433. del_timer_sync(&adapter->phy_info_timer);
  434. #ifdef CONFIG_E1000_NAPI
  435. netif_poll_disable(netdev);
  436. #endif
  437. netdev->tx_queue_len = adapter->tx_queue_len;
  438. adapter->link_speed = 0;
  439. adapter->link_duplex = 0;
  440. netif_carrier_off(netdev);
  441. netif_stop_queue(netdev);
  442. e1000_reset(adapter);
  443. e1000_clean_all_tx_rings(adapter);
  444. e1000_clean_all_rx_rings(adapter);
  445. /* Power down the PHY so no link is implied when interface is down *
  446. * The PHY cannot be powered down if any of the following is TRUE *
  447. * (a) WoL is enabled
  448. * (b) AMT is active
  449. * (c) SoL/IDER session is active */
  450. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  451. adapter->hw.media_type == e1000_media_type_copper &&
  452. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  453. !mng_mode_enabled &&
  454. !e1000_check_phy_reset_block(&adapter->hw)) {
  455. uint16_t mii_reg;
  456. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  457. mii_reg |= MII_CR_POWER_DOWN;
  458. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  459. mdelay(1);
  460. }
  461. }
  462. void
  463. e1000_reset(struct e1000_adapter *adapter)
  464. {
  465. uint32_t pba, manc;
  466. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  467. /* Repartition Pba for greater than 9k mtu
  468. * To take effect CTRL.RST is required.
  469. */
  470. switch (adapter->hw.mac_type) {
  471. case e1000_82547:
  472. case e1000_82547_rev_2:
  473. pba = E1000_PBA_30K;
  474. break;
  475. case e1000_82571:
  476. case e1000_82572:
  477. case e1000_80003es2lan:
  478. pba = E1000_PBA_38K;
  479. break;
  480. case e1000_82573:
  481. pba = E1000_PBA_12K;
  482. break;
  483. default:
  484. pba = E1000_PBA_48K;
  485. break;
  486. }
  487. if ((adapter->hw.mac_type != e1000_82573) &&
  488. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  489. pba -= 8; /* allocate more FIFO for Tx */
  490. if (adapter->hw.mac_type == e1000_82547) {
  491. adapter->tx_fifo_head = 0;
  492. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  493. adapter->tx_fifo_size =
  494. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  495. atomic_set(&adapter->tx_fifo_stall, 0);
  496. }
  497. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  498. /* flow control settings */
  499. /* Set the FC high water mark to 90% of the FIFO size.
  500. * Required to clear last 3 LSB */
  501. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  502. adapter->hw.fc_high_water = fc_high_water_mark;
  503. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  504. if (adapter->hw.mac_type == e1000_80003es2lan)
  505. adapter->hw.fc_pause_time = 0xFFFF;
  506. else
  507. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  508. adapter->hw.fc_send_xon = 1;
  509. adapter->hw.fc = adapter->hw.original_fc;
  510. /* Allow time for pending master requests to run */
  511. e1000_reset_hw(&adapter->hw);
  512. if (adapter->hw.mac_type >= e1000_82544)
  513. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  514. if (e1000_init_hw(&adapter->hw))
  515. DPRINTK(PROBE, ERR, "Hardware Error\n");
  516. e1000_update_mng_vlan(adapter);
  517. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  518. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  519. e1000_reset_adaptive(&adapter->hw);
  520. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  521. if (adapter->en_mng_pt) {
  522. manc = E1000_READ_REG(&adapter->hw, MANC);
  523. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  524. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  525. }
  526. }
  527. /**
  528. * e1000_probe - Device Initialization Routine
  529. * @pdev: PCI device information struct
  530. * @ent: entry in e1000_pci_tbl
  531. *
  532. * Returns 0 on success, negative on failure
  533. *
  534. * e1000_probe initializes an adapter identified by a pci_dev structure.
  535. * The OS initialization, configuring of the adapter private structure,
  536. * and a hardware reset occur.
  537. **/
  538. static int __devinit
  539. e1000_probe(struct pci_dev *pdev,
  540. const struct pci_device_id *ent)
  541. {
  542. struct net_device *netdev;
  543. struct e1000_adapter *adapter;
  544. unsigned long mmio_start, mmio_len;
  545. static int cards_found = 0;
  546. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  547. int i, err, pci_using_dac;
  548. uint16_t eeprom_data;
  549. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  550. if ((err = pci_enable_device(pdev)))
  551. return err;
  552. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  553. pci_using_dac = 1;
  554. } else {
  555. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  556. E1000_ERR("No usable DMA configuration, aborting\n");
  557. return err;
  558. }
  559. pci_using_dac = 0;
  560. }
  561. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  562. return err;
  563. pci_set_master(pdev);
  564. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  565. if (!netdev) {
  566. err = -ENOMEM;
  567. goto err_alloc_etherdev;
  568. }
  569. SET_MODULE_OWNER(netdev);
  570. SET_NETDEV_DEV(netdev, &pdev->dev);
  571. pci_set_drvdata(pdev, netdev);
  572. adapter = netdev_priv(netdev);
  573. adapter->netdev = netdev;
  574. adapter->pdev = pdev;
  575. adapter->hw.back = adapter;
  576. adapter->msg_enable = (1 << debug) - 1;
  577. mmio_start = pci_resource_start(pdev, BAR_0);
  578. mmio_len = pci_resource_len(pdev, BAR_0);
  579. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  580. if (!adapter->hw.hw_addr) {
  581. err = -EIO;
  582. goto err_ioremap;
  583. }
  584. for (i = BAR_1; i <= BAR_5; i++) {
  585. if (pci_resource_len(pdev, i) == 0)
  586. continue;
  587. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  588. adapter->hw.io_base = pci_resource_start(pdev, i);
  589. break;
  590. }
  591. }
  592. netdev->open = &e1000_open;
  593. netdev->stop = &e1000_close;
  594. netdev->hard_start_xmit = &e1000_xmit_frame;
  595. netdev->get_stats = &e1000_get_stats;
  596. netdev->set_multicast_list = &e1000_set_multi;
  597. netdev->set_mac_address = &e1000_set_mac;
  598. netdev->change_mtu = &e1000_change_mtu;
  599. netdev->do_ioctl = &e1000_ioctl;
  600. e1000_set_ethtool_ops(netdev);
  601. netdev->tx_timeout = &e1000_tx_timeout;
  602. netdev->watchdog_timeo = 5 * HZ;
  603. #ifdef CONFIG_E1000_NAPI
  604. netdev->poll = &e1000_clean;
  605. netdev->weight = 64;
  606. #endif
  607. netdev->vlan_rx_register = e1000_vlan_rx_register;
  608. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  609. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  610. #ifdef CONFIG_NET_POLL_CONTROLLER
  611. netdev->poll_controller = e1000_netpoll;
  612. #endif
  613. strcpy(netdev->name, pci_name(pdev));
  614. netdev->mem_start = mmio_start;
  615. netdev->mem_end = mmio_start + mmio_len;
  616. netdev->base_addr = adapter->hw.io_base;
  617. adapter->bd_number = cards_found;
  618. /* setup the private structure */
  619. if ((err = e1000_sw_init(adapter)))
  620. goto err_sw_init;
  621. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  622. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  623. /* if ksp3, indicate if it's port a being setup */
  624. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  625. e1000_ksp3_port_a == 0)
  626. adapter->ksp3_port_a = 1;
  627. e1000_ksp3_port_a++;
  628. /* Reset for multiple KP3 adapters */
  629. if (e1000_ksp3_port_a == 4)
  630. e1000_ksp3_port_a = 0;
  631. if (adapter->hw.mac_type >= e1000_82543) {
  632. netdev->features = NETIF_F_SG |
  633. NETIF_F_HW_CSUM |
  634. NETIF_F_HW_VLAN_TX |
  635. NETIF_F_HW_VLAN_RX |
  636. NETIF_F_HW_VLAN_FILTER;
  637. }
  638. #ifdef NETIF_F_TSO
  639. if ((adapter->hw.mac_type >= e1000_82544) &&
  640. (adapter->hw.mac_type != e1000_82547))
  641. netdev->features |= NETIF_F_TSO;
  642. #ifdef NETIF_F_TSO_IPV6
  643. if (adapter->hw.mac_type > e1000_82547_rev_2)
  644. netdev->features |= NETIF_F_TSO_IPV6;
  645. #endif
  646. #endif
  647. if (pci_using_dac)
  648. netdev->features |= NETIF_F_HIGHDMA;
  649. /* hard_start_xmit is safe against parallel locking */
  650. netdev->features |= NETIF_F_LLTX;
  651. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  652. /* before reading the EEPROM, reset the controller to
  653. * put the device in a known good starting state */
  654. e1000_reset_hw(&adapter->hw);
  655. /* make sure the EEPROM is good */
  656. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  657. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  658. err = -EIO;
  659. goto err_eeprom;
  660. }
  661. /* copy the MAC address out of the EEPROM */
  662. if (e1000_read_mac_addr(&adapter->hw))
  663. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  664. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  665. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  666. if (!is_valid_ether_addr(netdev->perm_addr)) {
  667. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  668. err = -EIO;
  669. goto err_eeprom;
  670. }
  671. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  672. e1000_get_bus_info(&adapter->hw);
  673. init_timer(&adapter->tx_fifo_stall_timer);
  674. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  675. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  676. init_timer(&adapter->watchdog_timer);
  677. adapter->watchdog_timer.function = &e1000_watchdog;
  678. adapter->watchdog_timer.data = (unsigned long) adapter;
  679. INIT_WORK(&adapter->watchdog_task,
  680. (void (*)(void *))e1000_watchdog_task, adapter);
  681. init_timer(&adapter->phy_info_timer);
  682. adapter->phy_info_timer.function = &e1000_update_phy_info;
  683. adapter->phy_info_timer.data = (unsigned long) adapter;
  684. INIT_WORK(&adapter->reset_task,
  685. (void (*)(void *))e1000_reset_task, netdev);
  686. /* we're going to reset, so assume we have no link for now */
  687. netif_carrier_off(netdev);
  688. netif_stop_queue(netdev);
  689. e1000_check_options(adapter);
  690. /* Initial Wake on LAN setting
  691. * If APM wake is enabled in the EEPROM,
  692. * enable the ACPI Magic Packet filter
  693. */
  694. switch (adapter->hw.mac_type) {
  695. case e1000_82542_rev2_0:
  696. case e1000_82542_rev2_1:
  697. case e1000_82543:
  698. break;
  699. case e1000_82544:
  700. e1000_read_eeprom(&adapter->hw,
  701. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  702. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  703. break;
  704. case e1000_82546:
  705. case e1000_82546_rev_3:
  706. case e1000_82571:
  707. case e1000_80003es2lan:
  708. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  709. e1000_read_eeprom(&adapter->hw,
  710. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  711. break;
  712. }
  713. /* Fall Through */
  714. default:
  715. e1000_read_eeprom(&adapter->hw,
  716. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  717. break;
  718. }
  719. if (eeprom_data & eeprom_apme_mask)
  720. adapter->wol |= E1000_WUFC_MAG;
  721. /* print bus type/speed/width info */
  722. {
  723. struct e1000_hw *hw = &adapter->hw;
  724. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  725. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  726. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  727. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  728. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  729. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  730. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  731. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  732. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  733. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  734. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  735. "32-bit"));
  736. }
  737. for (i = 0; i < 6; i++)
  738. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  739. /* reset the hardware with the new settings */
  740. e1000_reset(adapter);
  741. /* If the controller is 82573 and f/w is AMT, do not set
  742. * DRV_LOAD until the interface is up. For all other cases,
  743. * let the f/w know that the h/w is now under the control
  744. * of the driver. */
  745. if (adapter->hw.mac_type != e1000_82573 ||
  746. !e1000_check_mng_mode(&adapter->hw))
  747. e1000_get_hw_control(adapter);
  748. strcpy(netdev->name, "eth%d");
  749. if ((err = register_netdev(netdev)))
  750. goto err_register;
  751. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  752. cards_found++;
  753. return 0;
  754. err_register:
  755. err_sw_init:
  756. err_eeprom:
  757. iounmap(adapter->hw.hw_addr);
  758. err_ioremap:
  759. free_netdev(netdev);
  760. err_alloc_etherdev:
  761. pci_release_regions(pdev);
  762. return err;
  763. }
  764. /**
  765. * e1000_remove - Device Removal Routine
  766. * @pdev: PCI device information struct
  767. *
  768. * e1000_remove is called by the PCI subsystem to alert the driver
  769. * that it should release a PCI device. The could be caused by a
  770. * Hot-Plug event, or because the driver is going to be removed from
  771. * memory.
  772. **/
  773. static void __devexit
  774. e1000_remove(struct pci_dev *pdev)
  775. {
  776. struct net_device *netdev = pci_get_drvdata(pdev);
  777. struct e1000_adapter *adapter = netdev_priv(netdev);
  778. uint32_t manc;
  779. #ifdef CONFIG_E1000_NAPI
  780. int i;
  781. #endif
  782. flush_scheduled_work();
  783. if (adapter->hw.mac_type >= e1000_82540 &&
  784. adapter->hw.media_type == e1000_media_type_copper) {
  785. manc = E1000_READ_REG(&adapter->hw, MANC);
  786. if (manc & E1000_MANC_SMBUS_EN) {
  787. manc |= E1000_MANC_ARP_EN;
  788. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  789. }
  790. }
  791. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  792. * would have already happened in close and is redundant. */
  793. e1000_release_hw_control(adapter);
  794. unregister_netdev(netdev);
  795. #ifdef CONFIG_E1000_NAPI
  796. for (i = 0; i < adapter->num_rx_queues; i++)
  797. dev_put(&adapter->polling_netdev[i]);
  798. #endif
  799. if (!e1000_check_phy_reset_block(&adapter->hw))
  800. e1000_phy_hw_reset(&adapter->hw);
  801. kfree(adapter->tx_ring);
  802. kfree(adapter->rx_ring);
  803. #ifdef CONFIG_E1000_NAPI
  804. kfree(adapter->polling_netdev);
  805. #endif
  806. iounmap(adapter->hw.hw_addr);
  807. pci_release_regions(pdev);
  808. free_netdev(netdev);
  809. pci_disable_device(pdev);
  810. }
  811. /**
  812. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  813. * @adapter: board private structure to initialize
  814. *
  815. * e1000_sw_init initializes the Adapter private data structure.
  816. * Fields are initialized based on PCI device information and
  817. * OS network device settings (MTU size).
  818. **/
  819. static int __devinit
  820. e1000_sw_init(struct e1000_adapter *adapter)
  821. {
  822. struct e1000_hw *hw = &adapter->hw;
  823. struct net_device *netdev = adapter->netdev;
  824. struct pci_dev *pdev = adapter->pdev;
  825. #ifdef CONFIG_E1000_NAPI
  826. int i;
  827. #endif
  828. /* PCI config space info */
  829. hw->vendor_id = pdev->vendor;
  830. hw->device_id = pdev->device;
  831. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  832. hw->subsystem_id = pdev->subsystem_device;
  833. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  834. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  835. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  836. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  837. hw->max_frame_size = netdev->mtu +
  838. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  839. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  840. /* identify the MAC */
  841. if (e1000_set_mac_type(hw)) {
  842. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  843. return -EIO;
  844. }
  845. /* initialize eeprom parameters */
  846. if (e1000_init_eeprom_params(hw)) {
  847. E1000_ERR("EEPROM initialization failed\n");
  848. return -EIO;
  849. }
  850. switch (hw->mac_type) {
  851. default:
  852. break;
  853. case e1000_82541:
  854. case e1000_82547:
  855. case e1000_82541_rev_2:
  856. case e1000_82547_rev_2:
  857. hw->phy_init_script = 1;
  858. break;
  859. }
  860. e1000_set_media_type(hw);
  861. hw->wait_autoneg_complete = FALSE;
  862. hw->tbi_compatibility_en = TRUE;
  863. hw->adaptive_ifs = TRUE;
  864. /* Copper options */
  865. if (hw->media_type == e1000_media_type_copper) {
  866. hw->mdix = AUTO_ALL_MODES;
  867. hw->disable_polarity_correction = FALSE;
  868. hw->master_slave = E1000_MASTER_SLAVE;
  869. }
  870. adapter->num_tx_queues = 1;
  871. adapter->num_rx_queues = 1;
  872. if (e1000_alloc_queues(adapter)) {
  873. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  874. return -ENOMEM;
  875. }
  876. #ifdef CONFIG_E1000_NAPI
  877. for (i = 0; i < adapter->num_rx_queues; i++) {
  878. adapter->polling_netdev[i].priv = adapter;
  879. adapter->polling_netdev[i].poll = &e1000_clean;
  880. adapter->polling_netdev[i].weight = 64;
  881. dev_hold(&adapter->polling_netdev[i]);
  882. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  883. }
  884. spin_lock_init(&adapter->tx_queue_lock);
  885. #endif
  886. atomic_set(&adapter->irq_sem, 1);
  887. spin_lock_init(&adapter->stats_lock);
  888. return 0;
  889. }
  890. /**
  891. * e1000_alloc_queues - Allocate memory for all rings
  892. * @adapter: board private structure to initialize
  893. *
  894. * We allocate one ring per queue at run-time since we don't know the
  895. * number of queues at compile-time. The polling_netdev array is
  896. * intended for Multiqueue, but should work fine with a single queue.
  897. **/
  898. static int __devinit
  899. e1000_alloc_queues(struct e1000_adapter *adapter)
  900. {
  901. int size;
  902. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  903. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  904. if (!adapter->tx_ring)
  905. return -ENOMEM;
  906. memset(adapter->tx_ring, 0, size);
  907. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  908. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  909. if (!adapter->rx_ring) {
  910. kfree(adapter->tx_ring);
  911. return -ENOMEM;
  912. }
  913. memset(adapter->rx_ring, 0, size);
  914. #ifdef CONFIG_E1000_NAPI
  915. size = sizeof(struct net_device) * adapter->num_rx_queues;
  916. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  917. if (!adapter->polling_netdev) {
  918. kfree(adapter->tx_ring);
  919. kfree(adapter->rx_ring);
  920. return -ENOMEM;
  921. }
  922. memset(adapter->polling_netdev, 0, size);
  923. #endif
  924. return E1000_SUCCESS;
  925. }
  926. /**
  927. * e1000_open - Called when a network interface is made active
  928. * @netdev: network interface device structure
  929. *
  930. * Returns 0 on success, negative value on failure
  931. *
  932. * The open entry point is called when a network interface is made
  933. * active by the system (IFF_UP). At this point all resources needed
  934. * for transmit and receive operations are allocated, the interrupt
  935. * handler is registered with the OS, the watchdog timer is started,
  936. * and the stack is notified that the interface is ready.
  937. **/
  938. static int
  939. e1000_open(struct net_device *netdev)
  940. {
  941. struct e1000_adapter *adapter = netdev_priv(netdev);
  942. int err;
  943. /* allocate transmit descriptors */
  944. if ((err = e1000_setup_all_tx_resources(adapter)))
  945. goto err_setup_tx;
  946. /* allocate receive descriptors */
  947. if ((err = e1000_setup_all_rx_resources(adapter)))
  948. goto err_setup_rx;
  949. if ((err = e1000_up(adapter)))
  950. goto err_up;
  951. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  952. if ((adapter->hw.mng_cookie.status &
  953. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  954. e1000_update_mng_vlan(adapter);
  955. }
  956. /* If AMT is enabled, let the firmware know that the network
  957. * interface is now open */
  958. if (adapter->hw.mac_type == e1000_82573 &&
  959. e1000_check_mng_mode(&adapter->hw))
  960. e1000_get_hw_control(adapter);
  961. return E1000_SUCCESS;
  962. err_up:
  963. e1000_free_all_rx_resources(adapter);
  964. err_setup_rx:
  965. e1000_free_all_tx_resources(adapter);
  966. err_setup_tx:
  967. e1000_reset(adapter);
  968. return err;
  969. }
  970. /**
  971. * e1000_close - Disables a network interface
  972. * @netdev: network interface device structure
  973. *
  974. * Returns 0, this is not allowed to fail
  975. *
  976. * The close entry point is called when an interface is de-activated
  977. * by the OS. The hardware is still under the drivers control, but
  978. * needs to be disabled. A global MAC reset is issued to stop the
  979. * hardware, and all transmit and receive resources are freed.
  980. **/
  981. static int
  982. e1000_close(struct net_device *netdev)
  983. {
  984. struct e1000_adapter *adapter = netdev_priv(netdev);
  985. e1000_down(adapter);
  986. e1000_free_all_tx_resources(adapter);
  987. e1000_free_all_rx_resources(adapter);
  988. if ((adapter->hw.mng_cookie.status &
  989. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  990. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  991. }
  992. /* If AMT is enabled, let the firmware know that the network
  993. * interface is now closed */
  994. if (adapter->hw.mac_type == e1000_82573 &&
  995. e1000_check_mng_mode(&adapter->hw))
  996. e1000_release_hw_control(adapter);
  997. return 0;
  998. }
  999. /**
  1000. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1001. * @adapter: address of board private structure
  1002. * @start: address of beginning of memory
  1003. * @len: length of memory
  1004. **/
  1005. static inline boolean_t
  1006. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1007. void *start, unsigned long len)
  1008. {
  1009. unsigned long begin = (unsigned long) start;
  1010. unsigned long end = begin + len;
  1011. /* First rev 82545 and 82546 need to not allow any memory
  1012. * write location to cross 64k boundary due to errata 23 */
  1013. if (adapter->hw.mac_type == e1000_82545 ||
  1014. adapter->hw.mac_type == e1000_82546) {
  1015. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1016. }
  1017. return TRUE;
  1018. }
  1019. /**
  1020. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1021. * @adapter: board private structure
  1022. * @txdr: tx descriptor ring (for a specific queue) to setup
  1023. *
  1024. * Return 0 on success, negative on failure
  1025. **/
  1026. static int
  1027. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1028. struct e1000_tx_ring *txdr)
  1029. {
  1030. struct pci_dev *pdev = adapter->pdev;
  1031. int size;
  1032. size = sizeof(struct e1000_buffer) * txdr->count;
  1033. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1034. if (!txdr->buffer_info) {
  1035. DPRINTK(PROBE, ERR,
  1036. "Unable to allocate memory for the transmit descriptor ring\n");
  1037. return -ENOMEM;
  1038. }
  1039. memset(txdr->buffer_info, 0, size);
  1040. /* round up to nearest 4K */
  1041. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1042. E1000_ROUNDUP(txdr->size, 4096);
  1043. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1044. if (!txdr->desc) {
  1045. setup_tx_desc_die:
  1046. vfree(txdr->buffer_info);
  1047. DPRINTK(PROBE, ERR,
  1048. "Unable to allocate memory for the transmit descriptor ring\n");
  1049. return -ENOMEM;
  1050. }
  1051. /* Fix for errata 23, can't cross 64kB boundary */
  1052. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1053. void *olddesc = txdr->desc;
  1054. dma_addr_t olddma = txdr->dma;
  1055. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1056. "at %p\n", txdr->size, txdr->desc);
  1057. /* Try again, without freeing the previous */
  1058. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1059. /* Failed allocation, critical failure */
  1060. if (!txdr->desc) {
  1061. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1062. goto setup_tx_desc_die;
  1063. }
  1064. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1065. /* give up */
  1066. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1067. txdr->dma);
  1068. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1069. DPRINTK(PROBE, ERR,
  1070. "Unable to allocate aligned memory "
  1071. "for the transmit descriptor ring\n");
  1072. vfree(txdr->buffer_info);
  1073. return -ENOMEM;
  1074. } else {
  1075. /* Free old allocation, new allocation was successful */
  1076. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1077. }
  1078. }
  1079. memset(txdr->desc, 0, txdr->size);
  1080. txdr->next_to_use = 0;
  1081. txdr->next_to_clean = 0;
  1082. spin_lock_init(&txdr->tx_lock);
  1083. return 0;
  1084. }
  1085. /**
  1086. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1087. * (Descriptors) for all queues
  1088. * @adapter: board private structure
  1089. *
  1090. * If this function returns with an error, then it's possible one or
  1091. * more of the rings is populated (while the rest are not). It is the
  1092. * callers duty to clean those orphaned rings.
  1093. *
  1094. * Return 0 on success, negative on failure
  1095. **/
  1096. int
  1097. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1098. {
  1099. int i, err = 0;
  1100. for (i = 0; i < adapter->num_tx_queues; i++) {
  1101. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1102. if (err) {
  1103. DPRINTK(PROBE, ERR,
  1104. "Allocation for Tx Queue %u failed\n", i);
  1105. break;
  1106. }
  1107. }
  1108. return err;
  1109. }
  1110. /**
  1111. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1112. * @adapter: board private structure
  1113. *
  1114. * Configure the Tx unit of the MAC after a reset.
  1115. **/
  1116. static void
  1117. e1000_configure_tx(struct e1000_adapter *adapter)
  1118. {
  1119. uint64_t tdba;
  1120. struct e1000_hw *hw = &adapter->hw;
  1121. uint32_t tdlen, tctl, tipg, tarc;
  1122. uint32_t ipgr1, ipgr2;
  1123. /* Setup the HW Tx Head and Tail descriptor pointers */
  1124. switch (adapter->num_tx_queues) {
  1125. case 1:
  1126. default:
  1127. tdba = adapter->tx_ring[0].dma;
  1128. tdlen = adapter->tx_ring[0].count *
  1129. sizeof(struct e1000_tx_desc);
  1130. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1131. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1132. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1133. E1000_WRITE_REG(hw, TDH, 0);
  1134. E1000_WRITE_REG(hw, TDT, 0);
  1135. adapter->tx_ring[0].tdh = E1000_TDH;
  1136. adapter->tx_ring[0].tdt = E1000_TDT;
  1137. break;
  1138. }
  1139. /* Set the default values for the Tx Inter Packet Gap timer */
  1140. if (hw->media_type == e1000_media_type_fiber ||
  1141. hw->media_type == e1000_media_type_internal_serdes)
  1142. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1143. else
  1144. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1145. switch (hw->mac_type) {
  1146. case e1000_82542_rev2_0:
  1147. case e1000_82542_rev2_1:
  1148. tipg = DEFAULT_82542_TIPG_IPGT;
  1149. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1150. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1151. break;
  1152. case e1000_80003es2lan:
  1153. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1154. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1155. break;
  1156. default:
  1157. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1158. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1159. break;
  1160. }
  1161. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1162. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1163. E1000_WRITE_REG(hw, TIPG, tipg);
  1164. /* Set the Tx Interrupt Delay register */
  1165. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1166. if (hw->mac_type >= e1000_82540)
  1167. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1168. /* Program the Transmit Control Register */
  1169. tctl = E1000_READ_REG(hw, TCTL);
  1170. tctl &= ~E1000_TCTL_CT;
  1171. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1172. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1173. #ifdef DISABLE_MULR
  1174. /* disable Multiple Reads for debugging */
  1175. tctl &= ~E1000_TCTL_MULR;
  1176. #endif
  1177. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1178. tarc = E1000_READ_REG(hw, TARC0);
  1179. tarc |= ((1 << 25) | (1 << 21));
  1180. E1000_WRITE_REG(hw, TARC0, tarc);
  1181. tarc = E1000_READ_REG(hw, TARC1);
  1182. tarc |= (1 << 25);
  1183. if (tctl & E1000_TCTL_MULR)
  1184. tarc &= ~(1 << 28);
  1185. else
  1186. tarc |= (1 << 28);
  1187. E1000_WRITE_REG(hw, TARC1, tarc);
  1188. } else if (hw->mac_type == e1000_80003es2lan) {
  1189. tarc = E1000_READ_REG(hw, TARC0);
  1190. tarc |= 1;
  1191. if (hw->media_type == e1000_media_type_internal_serdes)
  1192. tarc |= (1 << 20);
  1193. E1000_WRITE_REG(hw, TARC0, tarc);
  1194. tarc = E1000_READ_REG(hw, TARC1);
  1195. tarc |= 1;
  1196. E1000_WRITE_REG(hw, TARC1, tarc);
  1197. }
  1198. e1000_config_collision_dist(hw);
  1199. /* Setup Transmit Descriptor Settings for eop descriptor */
  1200. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1201. E1000_TXD_CMD_IFCS;
  1202. if (hw->mac_type < e1000_82543)
  1203. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1204. else
  1205. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1206. /* Cache if we're 82544 running in PCI-X because we'll
  1207. * need this to apply a workaround later in the send path. */
  1208. if (hw->mac_type == e1000_82544 &&
  1209. hw->bus_type == e1000_bus_type_pcix)
  1210. adapter->pcix_82544 = 1;
  1211. E1000_WRITE_REG(hw, TCTL, tctl);
  1212. }
  1213. /**
  1214. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1215. * @adapter: board private structure
  1216. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1217. *
  1218. * Returns 0 on success, negative on failure
  1219. **/
  1220. static int
  1221. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1222. struct e1000_rx_ring *rxdr)
  1223. {
  1224. struct pci_dev *pdev = adapter->pdev;
  1225. int size, desc_len;
  1226. size = sizeof(struct e1000_buffer) * rxdr->count;
  1227. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1228. if (!rxdr->buffer_info) {
  1229. DPRINTK(PROBE, ERR,
  1230. "Unable to allocate memory for the receive descriptor ring\n");
  1231. return -ENOMEM;
  1232. }
  1233. memset(rxdr->buffer_info, 0, size);
  1234. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1235. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1236. if (!rxdr->ps_page) {
  1237. vfree(rxdr->buffer_info);
  1238. DPRINTK(PROBE, ERR,
  1239. "Unable to allocate memory for the receive descriptor ring\n");
  1240. return -ENOMEM;
  1241. }
  1242. memset(rxdr->ps_page, 0, size);
  1243. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1244. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1245. if (!rxdr->ps_page_dma) {
  1246. vfree(rxdr->buffer_info);
  1247. kfree(rxdr->ps_page);
  1248. DPRINTK(PROBE, ERR,
  1249. "Unable to allocate memory for the receive descriptor ring\n");
  1250. return -ENOMEM;
  1251. }
  1252. memset(rxdr->ps_page_dma, 0, size);
  1253. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1254. desc_len = sizeof(struct e1000_rx_desc);
  1255. else
  1256. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1257. /* Round up to nearest 4K */
  1258. rxdr->size = rxdr->count * desc_len;
  1259. E1000_ROUNDUP(rxdr->size, 4096);
  1260. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1261. if (!rxdr->desc) {
  1262. DPRINTK(PROBE, ERR,
  1263. "Unable to allocate memory for the receive descriptor ring\n");
  1264. setup_rx_desc_die:
  1265. vfree(rxdr->buffer_info);
  1266. kfree(rxdr->ps_page);
  1267. kfree(rxdr->ps_page_dma);
  1268. return -ENOMEM;
  1269. }
  1270. /* Fix for errata 23, can't cross 64kB boundary */
  1271. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1272. void *olddesc = rxdr->desc;
  1273. dma_addr_t olddma = rxdr->dma;
  1274. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1275. "at %p\n", rxdr->size, rxdr->desc);
  1276. /* Try again, without freeing the previous */
  1277. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1278. /* Failed allocation, critical failure */
  1279. if (!rxdr->desc) {
  1280. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1281. DPRINTK(PROBE, ERR,
  1282. "Unable to allocate memory "
  1283. "for the receive descriptor ring\n");
  1284. goto setup_rx_desc_die;
  1285. }
  1286. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1287. /* give up */
  1288. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1289. rxdr->dma);
  1290. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1291. DPRINTK(PROBE, ERR,
  1292. "Unable to allocate aligned memory "
  1293. "for the receive descriptor ring\n");
  1294. goto setup_rx_desc_die;
  1295. } else {
  1296. /* Free old allocation, new allocation was successful */
  1297. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1298. }
  1299. }
  1300. memset(rxdr->desc, 0, rxdr->size);
  1301. rxdr->next_to_clean = 0;
  1302. rxdr->next_to_use = 0;
  1303. return 0;
  1304. }
  1305. /**
  1306. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1307. * (Descriptors) for all queues
  1308. * @adapter: board private structure
  1309. *
  1310. * If this function returns with an error, then it's possible one or
  1311. * more of the rings is populated (while the rest are not). It is the
  1312. * callers duty to clean those orphaned rings.
  1313. *
  1314. * Return 0 on success, negative on failure
  1315. **/
  1316. int
  1317. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1318. {
  1319. int i, err = 0;
  1320. for (i = 0; i < adapter->num_rx_queues; i++) {
  1321. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1322. if (err) {
  1323. DPRINTK(PROBE, ERR,
  1324. "Allocation for Rx Queue %u failed\n", i);
  1325. break;
  1326. }
  1327. }
  1328. return err;
  1329. }
  1330. /**
  1331. * e1000_setup_rctl - configure the receive control registers
  1332. * @adapter: Board private structure
  1333. **/
  1334. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1335. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1336. static void
  1337. e1000_setup_rctl(struct e1000_adapter *adapter)
  1338. {
  1339. uint32_t rctl, rfctl;
  1340. uint32_t psrctl = 0;
  1341. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1342. uint32_t pages = 0;
  1343. #endif
  1344. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1345. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1346. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1347. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1348. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1349. if (adapter->hw.mac_type > e1000_82543)
  1350. rctl |= E1000_RCTL_SECRC;
  1351. if (adapter->hw.tbi_compatibility_on == 1)
  1352. rctl |= E1000_RCTL_SBP;
  1353. else
  1354. rctl &= ~E1000_RCTL_SBP;
  1355. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1356. rctl &= ~E1000_RCTL_LPE;
  1357. else
  1358. rctl |= E1000_RCTL_LPE;
  1359. /* Setup buffer sizes */
  1360. if (adapter->hw.mac_type >= e1000_82571) {
  1361. /* We can now specify buffers in 1K increments.
  1362. * BSIZE and BSEX are ignored in this case. */
  1363. rctl |= adapter->rx_buffer_len << 0x11;
  1364. } else {
  1365. rctl &= ~E1000_RCTL_SZ_4096;
  1366. rctl |= E1000_RCTL_BSEX;
  1367. switch (adapter->rx_buffer_len) {
  1368. case E1000_RXBUFFER_2048:
  1369. default:
  1370. rctl |= E1000_RCTL_SZ_2048;
  1371. rctl &= ~E1000_RCTL_BSEX;
  1372. break;
  1373. case E1000_RXBUFFER_4096:
  1374. rctl |= E1000_RCTL_SZ_4096;
  1375. break;
  1376. case E1000_RXBUFFER_8192:
  1377. rctl |= E1000_RCTL_SZ_8192;
  1378. break;
  1379. case E1000_RXBUFFER_16384:
  1380. rctl |= E1000_RCTL_SZ_16384;
  1381. break;
  1382. }
  1383. }
  1384. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1385. /* 82571 and greater support packet-split where the protocol
  1386. * header is placed in skb->data and the packet data is
  1387. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1388. * In the case of a non-split, skb->data is linearly filled,
  1389. * followed by the page buffers. Therefore, skb->data is
  1390. * sized to hold the largest protocol header.
  1391. */
  1392. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1393. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1394. PAGE_SIZE <= 16384)
  1395. adapter->rx_ps_pages = pages;
  1396. else
  1397. adapter->rx_ps_pages = 0;
  1398. #endif
  1399. if (adapter->rx_ps_pages) {
  1400. /* Configure extra packet-split registers */
  1401. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1402. rfctl |= E1000_RFCTL_EXTEN;
  1403. /* disable IPv6 packet split support */
  1404. rfctl |= E1000_RFCTL_IPV6_DIS;
  1405. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1406. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1407. psrctl |= adapter->rx_ps_bsize0 >>
  1408. E1000_PSRCTL_BSIZE0_SHIFT;
  1409. switch (adapter->rx_ps_pages) {
  1410. case 3:
  1411. psrctl |= PAGE_SIZE <<
  1412. E1000_PSRCTL_BSIZE3_SHIFT;
  1413. case 2:
  1414. psrctl |= PAGE_SIZE <<
  1415. E1000_PSRCTL_BSIZE2_SHIFT;
  1416. case 1:
  1417. psrctl |= PAGE_SIZE >>
  1418. E1000_PSRCTL_BSIZE1_SHIFT;
  1419. break;
  1420. }
  1421. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1422. }
  1423. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1424. }
  1425. /**
  1426. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1427. * @adapter: board private structure
  1428. *
  1429. * Configure the Rx unit of the MAC after a reset.
  1430. **/
  1431. static void
  1432. e1000_configure_rx(struct e1000_adapter *adapter)
  1433. {
  1434. uint64_t rdba;
  1435. struct e1000_hw *hw = &adapter->hw;
  1436. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1437. if (adapter->rx_ps_pages) {
  1438. /* this is a 32 byte descriptor */
  1439. rdlen = adapter->rx_ring[0].count *
  1440. sizeof(union e1000_rx_desc_packet_split);
  1441. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1442. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1443. } else {
  1444. rdlen = adapter->rx_ring[0].count *
  1445. sizeof(struct e1000_rx_desc);
  1446. adapter->clean_rx = e1000_clean_rx_irq;
  1447. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1448. }
  1449. /* disable receives while setting up the descriptors */
  1450. rctl = E1000_READ_REG(hw, RCTL);
  1451. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1452. /* set the Receive Delay Timer Register */
  1453. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1454. if (hw->mac_type >= e1000_82540) {
  1455. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1456. if (adapter->itr > 1)
  1457. E1000_WRITE_REG(hw, ITR,
  1458. 1000000000 / (adapter->itr * 256));
  1459. }
  1460. if (hw->mac_type >= e1000_82571) {
  1461. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1462. /* Reset delay timers after every interrupt */
  1463. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1464. #ifdef CONFIG_E1000_NAPI
  1465. /* Auto-Mask interrupts upon ICR read. */
  1466. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1467. #endif
  1468. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1469. E1000_WRITE_REG(hw, IAM, ~0);
  1470. E1000_WRITE_FLUSH(hw);
  1471. }
  1472. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1473. * the Base and Length of the Rx Descriptor Ring */
  1474. switch (adapter->num_rx_queues) {
  1475. case 1:
  1476. default:
  1477. rdba = adapter->rx_ring[0].dma;
  1478. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1479. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1480. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1481. E1000_WRITE_REG(hw, RDH, 0);
  1482. E1000_WRITE_REG(hw, RDT, 0);
  1483. adapter->rx_ring[0].rdh = E1000_RDH;
  1484. adapter->rx_ring[0].rdt = E1000_RDT;
  1485. break;
  1486. }
  1487. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1488. if (hw->mac_type >= e1000_82543) {
  1489. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1490. if (adapter->rx_csum == TRUE) {
  1491. rxcsum |= E1000_RXCSUM_TUOFL;
  1492. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1493. * Must be used in conjunction with packet-split. */
  1494. if ((hw->mac_type >= e1000_82571) &&
  1495. (adapter->rx_ps_pages)) {
  1496. rxcsum |= E1000_RXCSUM_IPPCSE;
  1497. }
  1498. } else {
  1499. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1500. /* don't need to clear IPPCSE as it defaults to 0 */
  1501. }
  1502. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1503. }
  1504. if (hw->mac_type == e1000_82573)
  1505. E1000_WRITE_REG(hw, ERT, 0x0100);
  1506. /* Enable Receives */
  1507. E1000_WRITE_REG(hw, RCTL, rctl);
  1508. }
  1509. /**
  1510. * e1000_free_tx_resources - Free Tx Resources per Queue
  1511. * @adapter: board private structure
  1512. * @tx_ring: Tx descriptor ring for a specific queue
  1513. *
  1514. * Free all transmit software resources
  1515. **/
  1516. static void
  1517. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1518. struct e1000_tx_ring *tx_ring)
  1519. {
  1520. struct pci_dev *pdev = adapter->pdev;
  1521. e1000_clean_tx_ring(adapter, tx_ring);
  1522. vfree(tx_ring->buffer_info);
  1523. tx_ring->buffer_info = NULL;
  1524. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1525. tx_ring->desc = NULL;
  1526. }
  1527. /**
  1528. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1529. * @adapter: board private structure
  1530. *
  1531. * Free all transmit software resources
  1532. **/
  1533. void
  1534. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1535. {
  1536. int i;
  1537. for (i = 0; i < adapter->num_tx_queues; i++)
  1538. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1539. }
  1540. static inline void
  1541. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1542. struct e1000_buffer *buffer_info)
  1543. {
  1544. if (buffer_info->dma) {
  1545. pci_unmap_page(adapter->pdev,
  1546. buffer_info->dma,
  1547. buffer_info->length,
  1548. PCI_DMA_TODEVICE);
  1549. }
  1550. if (buffer_info->skb)
  1551. dev_kfree_skb_any(buffer_info->skb);
  1552. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1553. }
  1554. /**
  1555. * e1000_clean_tx_ring - Free Tx Buffers
  1556. * @adapter: board private structure
  1557. * @tx_ring: ring to be cleaned
  1558. **/
  1559. static void
  1560. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1561. struct e1000_tx_ring *tx_ring)
  1562. {
  1563. struct e1000_buffer *buffer_info;
  1564. unsigned long size;
  1565. unsigned int i;
  1566. /* Free all the Tx ring sk_buffs */
  1567. for (i = 0; i < tx_ring->count; i++) {
  1568. buffer_info = &tx_ring->buffer_info[i];
  1569. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1570. }
  1571. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1572. memset(tx_ring->buffer_info, 0, size);
  1573. /* Zero out the descriptor ring */
  1574. memset(tx_ring->desc, 0, tx_ring->size);
  1575. tx_ring->next_to_use = 0;
  1576. tx_ring->next_to_clean = 0;
  1577. tx_ring->last_tx_tso = 0;
  1578. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1579. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1580. }
  1581. /**
  1582. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1583. * @adapter: board private structure
  1584. **/
  1585. static void
  1586. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1587. {
  1588. int i;
  1589. for (i = 0; i < adapter->num_tx_queues; i++)
  1590. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1591. }
  1592. /**
  1593. * e1000_free_rx_resources - Free Rx Resources
  1594. * @adapter: board private structure
  1595. * @rx_ring: ring to clean the resources from
  1596. *
  1597. * Free all receive software resources
  1598. **/
  1599. static void
  1600. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1601. struct e1000_rx_ring *rx_ring)
  1602. {
  1603. struct pci_dev *pdev = adapter->pdev;
  1604. e1000_clean_rx_ring(adapter, rx_ring);
  1605. vfree(rx_ring->buffer_info);
  1606. rx_ring->buffer_info = NULL;
  1607. kfree(rx_ring->ps_page);
  1608. rx_ring->ps_page = NULL;
  1609. kfree(rx_ring->ps_page_dma);
  1610. rx_ring->ps_page_dma = NULL;
  1611. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1612. rx_ring->desc = NULL;
  1613. }
  1614. /**
  1615. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1616. * @adapter: board private structure
  1617. *
  1618. * Free all receive software resources
  1619. **/
  1620. void
  1621. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1622. {
  1623. int i;
  1624. for (i = 0; i < adapter->num_rx_queues; i++)
  1625. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1626. }
  1627. /**
  1628. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1629. * @adapter: board private structure
  1630. * @rx_ring: ring to free buffers from
  1631. **/
  1632. static void
  1633. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1634. struct e1000_rx_ring *rx_ring)
  1635. {
  1636. struct e1000_buffer *buffer_info;
  1637. struct e1000_ps_page *ps_page;
  1638. struct e1000_ps_page_dma *ps_page_dma;
  1639. struct pci_dev *pdev = adapter->pdev;
  1640. unsigned long size;
  1641. unsigned int i, j;
  1642. /* Free all the Rx ring sk_buffs */
  1643. for (i = 0; i < rx_ring->count; i++) {
  1644. buffer_info = &rx_ring->buffer_info[i];
  1645. if (buffer_info->skb) {
  1646. pci_unmap_single(pdev,
  1647. buffer_info->dma,
  1648. buffer_info->length,
  1649. PCI_DMA_FROMDEVICE);
  1650. dev_kfree_skb(buffer_info->skb);
  1651. buffer_info->skb = NULL;
  1652. }
  1653. ps_page = &rx_ring->ps_page[i];
  1654. ps_page_dma = &rx_ring->ps_page_dma[i];
  1655. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1656. if (!ps_page->ps_page[j]) break;
  1657. pci_unmap_page(pdev,
  1658. ps_page_dma->ps_page_dma[j],
  1659. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1660. ps_page_dma->ps_page_dma[j] = 0;
  1661. put_page(ps_page->ps_page[j]);
  1662. ps_page->ps_page[j] = NULL;
  1663. }
  1664. }
  1665. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1666. memset(rx_ring->buffer_info, 0, size);
  1667. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1668. memset(rx_ring->ps_page, 0, size);
  1669. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1670. memset(rx_ring->ps_page_dma, 0, size);
  1671. /* Zero out the descriptor ring */
  1672. memset(rx_ring->desc, 0, rx_ring->size);
  1673. rx_ring->next_to_clean = 0;
  1674. rx_ring->next_to_use = 0;
  1675. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1676. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1677. }
  1678. /**
  1679. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1680. * @adapter: board private structure
  1681. **/
  1682. static void
  1683. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1684. {
  1685. int i;
  1686. for (i = 0; i < adapter->num_rx_queues; i++)
  1687. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1688. }
  1689. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1690. * and memory write and invalidate disabled for certain operations
  1691. */
  1692. static void
  1693. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1694. {
  1695. struct net_device *netdev = adapter->netdev;
  1696. uint32_t rctl;
  1697. e1000_pci_clear_mwi(&adapter->hw);
  1698. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1699. rctl |= E1000_RCTL_RST;
  1700. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1701. E1000_WRITE_FLUSH(&adapter->hw);
  1702. mdelay(5);
  1703. if (netif_running(netdev))
  1704. e1000_clean_all_rx_rings(adapter);
  1705. }
  1706. static void
  1707. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1708. {
  1709. struct net_device *netdev = adapter->netdev;
  1710. uint32_t rctl;
  1711. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1712. rctl &= ~E1000_RCTL_RST;
  1713. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1714. E1000_WRITE_FLUSH(&adapter->hw);
  1715. mdelay(5);
  1716. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1717. e1000_pci_set_mwi(&adapter->hw);
  1718. if (netif_running(netdev)) {
  1719. /* No need to loop, because 82542 supports only 1 queue */
  1720. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1721. e1000_configure_rx(adapter);
  1722. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1723. }
  1724. }
  1725. /**
  1726. * e1000_set_mac - Change the Ethernet Address of the NIC
  1727. * @netdev: network interface device structure
  1728. * @p: pointer to an address structure
  1729. *
  1730. * Returns 0 on success, negative on failure
  1731. **/
  1732. static int
  1733. e1000_set_mac(struct net_device *netdev, void *p)
  1734. {
  1735. struct e1000_adapter *adapter = netdev_priv(netdev);
  1736. struct sockaddr *addr = p;
  1737. if (!is_valid_ether_addr(addr->sa_data))
  1738. return -EADDRNOTAVAIL;
  1739. /* 82542 2.0 needs to be in reset to write receive address registers */
  1740. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1741. e1000_enter_82542_rst(adapter);
  1742. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1743. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1744. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1745. /* With 82571 controllers, LAA may be overwritten (with the default)
  1746. * due to controller reset from the other port. */
  1747. if (adapter->hw.mac_type == e1000_82571) {
  1748. /* activate the work around */
  1749. adapter->hw.laa_is_present = 1;
  1750. /* Hold a copy of the LAA in RAR[14] This is done so that
  1751. * between the time RAR[0] gets clobbered and the time it
  1752. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1753. * of the RARs and no incoming packets directed to this port
  1754. * are dropped. Eventaully the LAA will be in RAR[0] and
  1755. * RAR[14] */
  1756. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1757. E1000_RAR_ENTRIES - 1);
  1758. }
  1759. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1760. e1000_leave_82542_rst(adapter);
  1761. return 0;
  1762. }
  1763. /**
  1764. * e1000_set_multi - Multicast and Promiscuous mode set
  1765. * @netdev: network interface device structure
  1766. *
  1767. * The set_multi entry point is called whenever the multicast address
  1768. * list or the network interface flags are updated. This routine is
  1769. * responsible for configuring the hardware for proper multicast,
  1770. * promiscuous mode, and all-multi behavior.
  1771. **/
  1772. static void
  1773. e1000_set_multi(struct net_device *netdev)
  1774. {
  1775. struct e1000_adapter *adapter = netdev_priv(netdev);
  1776. struct e1000_hw *hw = &adapter->hw;
  1777. struct dev_mc_list *mc_ptr;
  1778. uint32_t rctl;
  1779. uint32_t hash_value;
  1780. int i, rar_entries = E1000_RAR_ENTRIES;
  1781. /* reserve RAR[14] for LAA over-write work-around */
  1782. if (adapter->hw.mac_type == e1000_82571)
  1783. rar_entries--;
  1784. /* Check for Promiscuous and All Multicast modes */
  1785. rctl = E1000_READ_REG(hw, RCTL);
  1786. if (netdev->flags & IFF_PROMISC) {
  1787. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1788. } else if (netdev->flags & IFF_ALLMULTI) {
  1789. rctl |= E1000_RCTL_MPE;
  1790. rctl &= ~E1000_RCTL_UPE;
  1791. } else {
  1792. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1793. }
  1794. E1000_WRITE_REG(hw, RCTL, rctl);
  1795. /* 82542 2.0 needs to be in reset to write receive address registers */
  1796. if (hw->mac_type == e1000_82542_rev2_0)
  1797. e1000_enter_82542_rst(adapter);
  1798. /* load the first 14 multicast address into the exact filters 1-14
  1799. * RAR 0 is used for the station MAC adddress
  1800. * if there are not 14 addresses, go ahead and clear the filters
  1801. * -- with 82571 controllers only 0-13 entries are filled here
  1802. */
  1803. mc_ptr = netdev->mc_list;
  1804. for (i = 1; i < rar_entries; i++) {
  1805. if (mc_ptr) {
  1806. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1807. mc_ptr = mc_ptr->next;
  1808. } else {
  1809. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1810. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1811. }
  1812. }
  1813. /* clear the old settings from the multicast hash table */
  1814. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1815. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1816. /* load any remaining addresses into the hash table */
  1817. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1818. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1819. e1000_mta_set(hw, hash_value);
  1820. }
  1821. if (hw->mac_type == e1000_82542_rev2_0)
  1822. e1000_leave_82542_rst(adapter);
  1823. }
  1824. /* Need to wait a few seconds after link up to get diagnostic information from
  1825. * the phy */
  1826. static void
  1827. e1000_update_phy_info(unsigned long data)
  1828. {
  1829. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1830. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1831. }
  1832. /**
  1833. * e1000_82547_tx_fifo_stall - Timer Call-back
  1834. * @data: pointer to adapter cast into an unsigned long
  1835. **/
  1836. static void
  1837. e1000_82547_tx_fifo_stall(unsigned long data)
  1838. {
  1839. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1840. struct net_device *netdev = adapter->netdev;
  1841. uint32_t tctl;
  1842. if (atomic_read(&adapter->tx_fifo_stall)) {
  1843. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1844. E1000_READ_REG(&adapter->hw, TDH)) &&
  1845. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1846. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1847. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1848. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1849. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1850. E1000_WRITE_REG(&adapter->hw, TCTL,
  1851. tctl & ~E1000_TCTL_EN);
  1852. E1000_WRITE_REG(&adapter->hw, TDFT,
  1853. adapter->tx_head_addr);
  1854. E1000_WRITE_REG(&adapter->hw, TDFH,
  1855. adapter->tx_head_addr);
  1856. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1857. adapter->tx_head_addr);
  1858. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1859. adapter->tx_head_addr);
  1860. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1861. E1000_WRITE_FLUSH(&adapter->hw);
  1862. adapter->tx_fifo_head = 0;
  1863. atomic_set(&adapter->tx_fifo_stall, 0);
  1864. netif_wake_queue(netdev);
  1865. } else {
  1866. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1867. }
  1868. }
  1869. }
  1870. /**
  1871. * e1000_watchdog - Timer Call-back
  1872. * @data: pointer to adapter cast into an unsigned long
  1873. **/
  1874. static void
  1875. e1000_watchdog(unsigned long data)
  1876. {
  1877. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1878. /* Do the rest outside of interrupt context */
  1879. schedule_work(&adapter->watchdog_task);
  1880. }
  1881. static void
  1882. e1000_watchdog_task(struct e1000_adapter *adapter)
  1883. {
  1884. struct net_device *netdev = adapter->netdev;
  1885. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1886. uint32_t link, tctl;
  1887. e1000_check_for_link(&adapter->hw);
  1888. if (adapter->hw.mac_type == e1000_82573) {
  1889. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1890. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1891. e1000_update_mng_vlan(adapter);
  1892. }
  1893. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1894. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1895. link = !adapter->hw.serdes_link_down;
  1896. else
  1897. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1898. if (link) {
  1899. if (!netif_carrier_ok(netdev)) {
  1900. e1000_get_speed_and_duplex(&adapter->hw,
  1901. &adapter->link_speed,
  1902. &adapter->link_duplex);
  1903. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1904. adapter->link_speed,
  1905. adapter->link_duplex == FULL_DUPLEX ?
  1906. "Full Duplex" : "Half Duplex");
  1907. /* tweak tx_queue_len according to speed/duplex
  1908. * and adjust the timeout factor */
  1909. netdev->tx_queue_len = adapter->tx_queue_len;
  1910. adapter->tx_timeout_factor = 1;
  1911. adapter->txb2b = 1;
  1912. switch (adapter->link_speed) {
  1913. case SPEED_10:
  1914. adapter->txb2b = 0;
  1915. netdev->tx_queue_len = 10;
  1916. adapter->tx_timeout_factor = 8;
  1917. break;
  1918. case SPEED_100:
  1919. adapter->txb2b = 0;
  1920. netdev->tx_queue_len = 100;
  1921. /* maybe add some timeout factor ? */
  1922. break;
  1923. }
  1924. if ((adapter->hw.mac_type == e1000_82571 ||
  1925. adapter->hw.mac_type == e1000_82572) &&
  1926. adapter->txb2b == 0) {
  1927. #define SPEED_MODE_BIT (1 << 21)
  1928. uint32_t tarc0;
  1929. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1930. tarc0 &= ~SPEED_MODE_BIT;
  1931. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1932. }
  1933. #ifdef NETIF_F_TSO
  1934. /* disable TSO for pcie and 10/100 speeds, to avoid
  1935. * some hardware issues */
  1936. if (!adapter->tso_force &&
  1937. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1938. switch (adapter->link_speed) {
  1939. case SPEED_10:
  1940. case SPEED_100:
  1941. DPRINTK(PROBE,INFO,
  1942. "10/100 speed: disabling TSO\n");
  1943. netdev->features &= ~NETIF_F_TSO;
  1944. break;
  1945. case SPEED_1000:
  1946. netdev->features |= NETIF_F_TSO;
  1947. break;
  1948. default:
  1949. /* oops */
  1950. break;
  1951. }
  1952. }
  1953. #endif
  1954. /* enable transmits in the hardware, need to do this
  1955. * after setting TARC0 */
  1956. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1957. tctl |= E1000_TCTL_EN;
  1958. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1959. netif_carrier_on(netdev);
  1960. netif_wake_queue(netdev);
  1961. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1962. adapter->smartspeed = 0;
  1963. }
  1964. } else {
  1965. if (netif_carrier_ok(netdev)) {
  1966. adapter->link_speed = 0;
  1967. adapter->link_duplex = 0;
  1968. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1969. netif_carrier_off(netdev);
  1970. netif_stop_queue(netdev);
  1971. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1972. /* 80003ES2LAN workaround--
  1973. * For packet buffer work-around on link down event;
  1974. * disable receives in the ISR and
  1975. * reset device here in the watchdog
  1976. */
  1977. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1978. /* reset device */
  1979. schedule_work(&adapter->reset_task);
  1980. }
  1981. }
  1982. e1000_smartspeed(adapter);
  1983. }
  1984. e1000_update_stats(adapter);
  1985. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1986. adapter->tpt_old = adapter->stats.tpt;
  1987. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1988. adapter->colc_old = adapter->stats.colc;
  1989. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1990. adapter->gorcl_old = adapter->stats.gorcl;
  1991. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1992. adapter->gotcl_old = adapter->stats.gotcl;
  1993. e1000_update_adaptive(&adapter->hw);
  1994. if (!netif_carrier_ok(netdev)) {
  1995. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1996. /* We've lost link, so the controller stops DMA,
  1997. * but we've got queued Tx work that's never going
  1998. * to get done, so reset controller to flush Tx.
  1999. * (Do the reset outside of interrupt context). */
  2000. adapter->tx_timeout_count++;
  2001. schedule_work(&adapter->reset_task);
  2002. }
  2003. }
  2004. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2005. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2006. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2007. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2008. * else is between 2000-8000. */
  2009. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2010. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2011. adapter->gotcl - adapter->gorcl :
  2012. adapter->gorcl - adapter->gotcl) / 10000;
  2013. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2014. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2015. }
  2016. /* Cause software interrupt to ensure rx ring is cleaned */
  2017. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2018. /* Force detection of hung controller every watchdog period */
  2019. adapter->detect_tx_hung = TRUE;
  2020. /* With 82571 controllers, LAA may be overwritten due to controller
  2021. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2022. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2023. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2024. /* Reset the timer */
  2025. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2026. }
  2027. #define E1000_TX_FLAGS_CSUM 0x00000001
  2028. #define E1000_TX_FLAGS_VLAN 0x00000002
  2029. #define E1000_TX_FLAGS_TSO 0x00000004
  2030. #define E1000_TX_FLAGS_IPV4 0x00000008
  2031. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2032. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2033. static inline int
  2034. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2035. struct sk_buff *skb)
  2036. {
  2037. #ifdef NETIF_F_TSO
  2038. struct e1000_context_desc *context_desc;
  2039. struct e1000_buffer *buffer_info;
  2040. unsigned int i;
  2041. uint32_t cmd_length = 0;
  2042. uint16_t ipcse = 0, tucse, mss;
  2043. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2044. int err;
  2045. if (skb_shinfo(skb)->tso_size) {
  2046. if (skb_header_cloned(skb)) {
  2047. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2048. if (err)
  2049. return err;
  2050. }
  2051. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2052. mss = skb_shinfo(skb)->tso_size;
  2053. if (skb->protocol == ntohs(ETH_P_IP)) {
  2054. skb->nh.iph->tot_len = 0;
  2055. skb->nh.iph->check = 0;
  2056. skb->h.th->check =
  2057. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2058. skb->nh.iph->daddr,
  2059. 0,
  2060. IPPROTO_TCP,
  2061. 0);
  2062. cmd_length = E1000_TXD_CMD_IP;
  2063. ipcse = skb->h.raw - skb->data - 1;
  2064. #ifdef NETIF_F_TSO_IPV6
  2065. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2066. skb->nh.ipv6h->payload_len = 0;
  2067. skb->h.th->check =
  2068. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2069. &skb->nh.ipv6h->daddr,
  2070. 0,
  2071. IPPROTO_TCP,
  2072. 0);
  2073. ipcse = 0;
  2074. #endif
  2075. }
  2076. ipcss = skb->nh.raw - skb->data;
  2077. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2078. tucss = skb->h.raw - skb->data;
  2079. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2080. tucse = 0;
  2081. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2082. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2083. i = tx_ring->next_to_use;
  2084. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2085. buffer_info = &tx_ring->buffer_info[i];
  2086. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2087. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2088. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2089. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2090. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2091. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2092. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2093. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2094. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2095. buffer_info->time_stamp = jiffies;
  2096. if (++i == tx_ring->count) i = 0;
  2097. tx_ring->next_to_use = i;
  2098. return TRUE;
  2099. }
  2100. #endif
  2101. return FALSE;
  2102. }
  2103. static inline boolean_t
  2104. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2105. struct sk_buff *skb)
  2106. {
  2107. struct e1000_context_desc *context_desc;
  2108. struct e1000_buffer *buffer_info;
  2109. unsigned int i;
  2110. uint8_t css;
  2111. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2112. css = skb->h.raw - skb->data;
  2113. i = tx_ring->next_to_use;
  2114. buffer_info = &tx_ring->buffer_info[i];
  2115. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2116. context_desc->upper_setup.tcp_fields.tucss = css;
  2117. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2118. context_desc->upper_setup.tcp_fields.tucse = 0;
  2119. context_desc->tcp_seg_setup.data = 0;
  2120. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2121. buffer_info->time_stamp = jiffies;
  2122. if (unlikely(++i == tx_ring->count)) i = 0;
  2123. tx_ring->next_to_use = i;
  2124. return TRUE;
  2125. }
  2126. return FALSE;
  2127. }
  2128. #define E1000_MAX_TXD_PWR 12
  2129. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2130. static inline int
  2131. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2132. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2133. unsigned int nr_frags, unsigned int mss)
  2134. {
  2135. struct e1000_buffer *buffer_info;
  2136. unsigned int len = skb->len;
  2137. unsigned int offset = 0, size, count = 0, i;
  2138. unsigned int f;
  2139. len -= skb->data_len;
  2140. i = tx_ring->next_to_use;
  2141. while (len) {
  2142. buffer_info = &tx_ring->buffer_info[i];
  2143. size = min(len, max_per_txd);
  2144. #ifdef NETIF_F_TSO
  2145. /* Workaround for Controller erratum --
  2146. * descriptor for non-tso packet in a linear SKB that follows a
  2147. * tso gets written back prematurely before the data is fully
  2148. * DMA'd to the controller */
  2149. if (!skb->data_len && tx_ring->last_tx_tso &&
  2150. !skb_shinfo(skb)->tso_size) {
  2151. tx_ring->last_tx_tso = 0;
  2152. size -= 4;
  2153. }
  2154. /* Workaround for premature desc write-backs
  2155. * in TSO mode. Append 4-byte sentinel desc */
  2156. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2157. size -= 4;
  2158. #endif
  2159. /* work-around for errata 10 and it applies
  2160. * to all controllers in PCI-X mode
  2161. * The fix is to make sure that the first descriptor of a
  2162. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2163. */
  2164. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2165. (size > 2015) && count == 0))
  2166. size = 2015;
  2167. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2168. * terminating buffers within evenly-aligned dwords. */
  2169. if (unlikely(adapter->pcix_82544 &&
  2170. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2171. size > 4))
  2172. size -= 4;
  2173. buffer_info->length = size;
  2174. buffer_info->dma =
  2175. pci_map_single(adapter->pdev,
  2176. skb->data + offset,
  2177. size,
  2178. PCI_DMA_TODEVICE);
  2179. buffer_info->time_stamp = jiffies;
  2180. len -= size;
  2181. offset += size;
  2182. count++;
  2183. if (unlikely(++i == tx_ring->count)) i = 0;
  2184. }
  2185. for (f = 0; f < nr_frags; f++) {
  2186. struct skb_frag_struct *frag;
  2187. frag = &skb_shinfo(skb)->frags[f];
  2188. len = frag->size;
  2189. offset = frag->page_offset;
  2190. while (len) {
  2191. buffer_info = &tx_ring->buffer_info[i];
  2192. size = min(len, max_per_txd);
  2193. #ifdef NETIF_F_TSO
  2194. /* Workaround for premature desc write-backs
  2195. * in TSO mode. Append 4-byte sentinel desc */
  2196. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2197. size -= 4;
  2198. #endif
  2199. /* Workaround for potential 82544 hang in PCI-X.
  2200. * Avoid terminating buffers within evenly-aligned
  2201. * dwords. */
  2202. if (unlikely(adapter->pcix_82544 &&
  2203. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2204. size > 4))
  2205. size -= 4;
  2206. buffer_info->length = size;
  2207. buffer_info->dma =
  2208. pci_map_page(adapter->pdev,
  2209. frag->page,
  2210. offset,
  2211. size,
  2212. PCI_DMA_TODEVICE);
  2213. buffer_info->time_stamp = jiffies;
  2214. len -= size;
  2215. offset += size;
  2216. count++;
  2217. if (unlikely(++i == tx_ring->count)) i = 0;
  2218. }
  2219. }
  2220. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2221. tx_ring->buffer_info[i].skb = skb;
  2222. tx_ring->buffer_info[first].next_to_watch = i;
  2223. return count;
  2224. }
  2225. static inline void
  2226. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2227. int tx_flags, int count)
  2228. {
  2229. struct e1000_tx_desc *tx_desc = NULL;
  2230. struct e1000_buffer *buffer_info;
  2231. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2232. unsigned int i;
  2233. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2234. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2235. E1000_TXD_CMD_TSE;
  2236. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2237. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2238. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2239. }
  2240. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2241. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2242. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2243. }
  2244. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2245. txd_lower |= E1000_TXD_CMD_VLE;
  2246. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2247. }
  2248. i = tx_ring->next_to_use;
  2249. while (count--) {
  2250. buffer_info = &tx_ring->buffer_info[i];
  2251. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2252. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2253. tx_desc->lower.data =
  2254. cpu_to_le32(txd_lower | buffer_info->length);
  2255. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2256. if (unlikely(++i == tx_ring->count)) i = 0;
  2257. }
  2258. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2259. /* Force memory writes to complete before letting h/w
  2260. * know there are new descriptors to fetch. (Only
  2261. * applicable for weak-ordered memory model archs,
  2262. * such as IA-64). */
  2263. wmb();
  2264. tx_ring->next_to_use = i;
  2265. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2266. }
  2267. /**
  2268. * 82547 workaround to avoid controller hang in half-duplex environment.
  2269. * The workaround is to avoid queuing a large packet that would span
  2270. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2271. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2272. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2273. * to the beginning of the Tx FIFO.
  2274. **/
  2275. #define E1000_FIFO_HDR 0x10
  2276. #define E1000_82547_PAD_LEN 0x3E0
  2277. static inline int
  2278. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2279. {
  2280. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2281. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2282. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2283. if (adapter->link_duplex != HALF_DUPLEX)
  2284. goto no_fifo_stall_required;
  2285. if (atomic_read(&adapter->tx_fifo_stall))
  2286. return 1;
  2287. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2288. atomic_set(&adapter->tx_fifo_stall, 1);
  2289. return 1;
  2290. }
  2291. no_fifo_stall_required:
  2292. adapter->tx_fifo_head += skb_fifo_len;
  2293. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2294. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2295. return 0;
  2296. }
  2297. #define MINIMUM_DHCP_PACKET_SIZE 282
  2298. static inline int
  2299. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2300. {
  2301. struct e1000_hw *hw = &adapter->hw;
  2302. uint16_t length, offset;
  2303. if (vlan_tx_tag_present(skb)) {
  2304. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2305. ( adapter->hw.mng_cookie.status &
  2306. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2307. return 0;
  2308. }
  2309. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2310. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2311. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2312. const struct iphdr *ip =
  2313. (struct iphdr *)((uint8_t *)skb->data+14);
  2314. if (IPPROTO_UDP == ip->protocol) {
  2315. struct udphdr *udp =
  2316. (struct udphdr *)((uint8_t *)ip +
  2317. (ip->ihl << 2));
  2318. if (ntohs(udp->dest) == 67) {
  2319. offset = (uint8_t *)udp + 8 - skb->data;
  2320. length = skb->len - offset;
  2321. return e1000_mng_write_dhcp_info(hw,
  2322. (uint8_t *)udp + 8,
  2323. length);
  2324. }
  2325. }
  2326. }
  2327. }
  2328. return 0;
  2329. }
  2330. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2331. static int
  2332. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2333. {
  2334. struct e1000_adapter *adapter = netdev_priv(netdev);
  2335. struct e1000_tx_ring *tx_ring;
  2336. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2337. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2338. unsigned int tx_flags = 0;
  2339. unsigned int len = skb->len;
  2340. unsigned long flags;
  2341. unsigned int nr_frags = 0;
  2342. unsigned int mss = 0;
  2343. int count = 0;
  2344. int tso;
  2345. unsigned int f;
  2346. len -= skb->data_len;
  2347. tx_ring = adapter->tx_ring;
  2348. if (unlikely(skb->len <= 0)) {
  2349. dev_kfree_skb_any(skb);
  2350. return NETDEV_TX_OK;
  2351. }
  2352. #ifdef NETIF_F_TSO
  2353. mss = skb_shinfo(skb)->tso_size;
  2354. /* The controller does a simple calculation to
  2355. * make sure there is enough room in the FIFO before
  2356. * initiating the DMA for each buffer. The calc is:
  2357. * 4 = ceil(buffer len/mss). To make sure we don't
  2358. * overrun the FIFO, adjust the max buffer len if mss
  2359. * drops. */
  2360. if (mss) {
  2361. uint8_t hdr_len;
  2362. max_per_txd = min(mss << 2, max_per_txd);
  2363. max_txd_pwr = fls(max_per_txd) - 1;
  2364. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2365. * points to just header, pull a few bytes of payload from
  2366. * frags into skb->data */
  2367. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2368. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2369. switch (adapter->hw.mac_type) {
  2370. unsigned int pull_size;
  2371. case e1000_82571:
  2372. case e1000_82572:
  2373. case e1000_82573:
  2374. pull_size = min((unsigned int)4, skb->data_len);
  2375. if (!__pskb_pull_tail(skb, pull_size)) {
  2376. printk(KERN_ERR
  2377. "__pskb_pull_tail failed.\n");
  2378. dev_kfree_skb_any(skb);
  2379. return NETDEV_TX_OK;
  2380. }
  2381. len = skb->len - skb->data_len;
  2382. break;
  2383. default:
  2384. /* do nothing */
  2385. break;
  2386. }
  2387. }
  2388. }
  2389. /* reserve a descriptor for the offload context */
  2390. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2391. count++;
  2392. count++;
  2393. #else
  2394. if (skb->ip_summed == CHECKSUM_HW)
  2395. count++;
  2396. #endif
  2397. #ifdef NETIF_F_TSO
  2398. /* Controller Erratum workaround */
  2399. if (!skb->data_len && tx_ring->last_tx_tso &&
  2400. !skb_shinfo(skb)->tso_size)
  2401. count++;
  2402. #endif
  2403. count += TXD_USE_COUNT(len, max_txd_pwr);
  2404. if (adapter->pcix_82544)
  2405. count++;
  2406. /* work-around for errata 10 and it applies to all controllers
  2407. * in PCI-X mode, so add one more descriptor to the count
  2408. */
  2409. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2410. (len > 2015)))
  2411. count++;
  2412. nr_frags = skb_shinfo(skb)->nr_frags;
  2413. for (f = 0; f < nr_frags; f++)
  2414. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2415. max_txd_pwr);
  2416. if (adapter->pcix_82544)
  2417. count += nr_frags;
  2418. if (adapter->hw.tx_pkt_filtering &&
  2419. (adapter->hw.mac_type == e1000_82573))
  2420. e1000_transfer_dhcp_info(adapter, skb);
  2421. local_irq_save(flags);
  2422. if (!spin_trylock(&tx_ring->tx_lock)) {
  2423. /* Collision - tell upper layer to requeue */
  2424. local_irq_restore(flags);
  2425. return NETDEV_TX_LOCKED;
  2426. }
  2427. /* need: count + 2 desc gap to keep tail from touching
  2428. * head, otherwise try next time */
  2429. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2430. netif_stop_queue(netdev);
  2431. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2432. return NETDEV_TX_BUSY;
  2433. }
  2434. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2435. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2436. netif_stop_queue(netdev);
  2437. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2438. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2439. return NETDEV_TX_BUSY;
  2440. }
  2441. }
  2442. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2443. tx_flags |= E1000_TX_FLAGS_VLAN;
  2444. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2445. }
  2446. first = tx_ring->next_to_use;
  2447. tso = e1000_tso(adapter, tx_ring, skb);
  2448. if (tso < 0) {
  2449. dev_kfree_skb_any(skb);
  2450. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2451. return NETDEV_TX_OK;
  2452. }
  2453. if (likely(tso)) {
  2454. tx_ring->last_tx_tso = 1;
  2455. tx_flags |= E1000_TX_FLAGS_TSO;
  2456. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2457. tx_flags |= E1000_TX_FLAGS_CSUM;
  2458. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2459. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2460. * no longer assume, we must. */
  2461. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2462. tx_flags |= E1000_TX_FLAGS_IPV4;
  2463. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2464. e1000_tx_map(adapter, tx_ring, skb, first,
  2465. max_per_txd, nr_frags, mss));
  2466. netdev->trans_start = jiffies;
  2467. /* Make sure there is space in the ring for the next send. */
  2468. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2469. netif_stop_queue(netdev);
  2470. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2471. return NETDEV_TX_OK;
  2472. }
  2473. /**
  2474. * e1000_tx_timeout - Respond to a Tx Hang
  2475. * @netdev: network interface device structure
  2476. **/
  2477. static void
  2478. e1000_tx_timeout(struct net_device *netdev)
  2479. {
  2480. struct e1000_adapter *adapter = netdev_priv(netdev);
  2481. /* Do the reset outside of interrupt context */
  2482. adapter->tx_timeout_count++;
  2483. schedule_work(&adapter->reset_task);
  2484. }
  2485. static void
  2486. e1000_reset_task(struct net_device *netdev)
  2487. {
  2488. struct e1000_adapter *adapter = netdev_priv(netdev);
  2489. e1000_down(adapter);
  2490. e1000_up(adapter);
  2491. }
  2492. /**
  2493. * e1000_get_stats - Get System Network Statistics
  2494. * @netdev: network interface device structure
  2495. *
  2496. * Returns the address of the device statistics structure.
  2497. * The statistics are actually updated from the timer callback.
  2498. **/
  2499. static struct net_device_stats *
  2500. e1000_get_stats(struct net_device *netdev)
  2501. {
  2502. struct e1000_adapter *adapter = netdev_priv(netdev);
  2503. /* only return the current stats */
  2504. return &adapter->net_stats;
  2505. }
  2506. /**
  2507. * e1000_change_mtu - Change the Maximum Transfer Unit
  2508. * @netdev: network interface device structure
  2509. * @new_mtu: new value for maximum frame size
  2510. *
  2511. * Returns 0 on success, negative on failure
  2512. **/
  2513. static int
  2514. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2515. {
  2516. struct e1000_adapter *adapter = netdev_priv(netdev);
  2517. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2518. uint16_t eeprom_data = 0;
  2519. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2520. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2521. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2522. return -EINVAL;
  2523. }
  2524. /* Adapter-specific max frame size limits. */
  2525. switch (adapter->hw.mac_type) {
  2526. case e1000_82542_rev2_0:
  2527. case e1000_82542_rev2_1:
  2528. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2529. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2530. return -EINVAL;
  2531. }
  2532. break;
  2533. case e1000_82573:
  2534. /* only enable jumbo frames if ASPM is disabled completely
  2535. * this means both bits must be zero in 0x1A bits 3:2 */
  2536. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2537. &eeprom_data);
  2538. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2539. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2540. DPRINTK(PROBE, ERR,
  2541. "Jumbo Frames not supported.\n");
  2542. return -EINVAL;
  2543. }
  2544. break;
  2545. }
  2546. /* fall through to get support */
  2547. case e1000_82571:
  2548. case e1000_82572:
  2549. case e1000_80003es2lan:
  2550. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2551. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2552. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2553. return -EINVAL;
  2554. }
  2555. break;
  2556. default:
  2557. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2558. break;
  2559. }
  2560. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2561. adapter->rx_buffer_len = max_frame;
  2562. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2563. } else {
  2564. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2565. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2566. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2567. "on 82542\n");
  2568. return -EINVAL;
  2569. } else {
  2570. if(max_frame <= E1000_RXBUFFER_2048)
  2571. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2572. else if(max_frame <= E1000_RXBUFFER_4096)
  2573. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2574. else if(max_frame <= E1000_RXBUFFER_8192)
  2575. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2576. else if(max_frame <= E1000_RXBUFFER_16384)
  2577. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2578. }
  2579. }
  2580. netdev->mtu = new_mtu;
  2581. if (netif_running(netdev)) {
  2582. e1000_down(adapter);
  2583. e1000_up(adapter);
  2584. }
  2585. adapter->hw.max_frame_size = max_frame;
  2586. return 0;
  2587. }
  2588. /**
  2589. * e1000_update_stats - Update the board statistics counters
  2590. * @adapter: board private structure
  2591. **/
  2592. void
  2593. e1000_update_stats(struct e1000_adapter *adapter)
  2594. {
  2595. struct e1000_hw *hw = &adapter->hw;
  2596. unsigned long flags;
  2597. uint16_t phy_tmp;
  2598. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2599. spin_lock_irqsave(&adapter->stats_lock, flags);
  2600. /* these counters are modified from e1000_adjust_tbi_stats,
  2601. * called from the interrupt context, so they must only
  2602. * be written while holding adapter->stats_lock
  2603. */
  2604. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2605. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2606. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2607. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2608. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2609. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2610. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2611. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2612. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2613. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2614. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2615. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2616. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2617. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2618. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2619. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2620. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2621. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2622. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2623. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2624. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2625. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2626. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2627. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2628. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2629. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2630. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2631. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2632. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2633. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2634. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2635. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2636. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2637. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2638. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2639. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2640. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2641. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2642. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2643. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2644. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2645. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2646. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2647. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2648. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2649. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2650. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2651. /* used for adaptive IFS */
  2652. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2653. adapter->stats.tpt += hw->tx_packet_delta;
  2654. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2655. adapter->stats.colc += hw->collision_delta;
  2656. if (hw->mac_type >= e1000_82543) {
  2657. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2658. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2659. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2660. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2661. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2662. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2663. }
  2664. if (hw->mac_type > e1000_82547_rev_2) {
  2665. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2666. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2667. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2668. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2669. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2670. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2671. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2672. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2673. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2674. }
  2675. /* Fill out the OS statistics structure */
  2676. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2677. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2678. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2679. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2680. adapter->net_stats.multicast = adapter->stats.mprc;
  2681. adapter->net_stats.collisions = adapter->stats.colc;
  2682. /* Rx Errors */
  2683. /* RLEC on some newer hardware can be incorrect so build
  2684. * our own version based on RUC and ROC */
  2685. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2686. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2687. adapter->stats.ruc + adapter->stats.roc +
  2688. adapter->stats.cexterr;
  2689. adapter->net_stats.rx_dropped = 0;
  2690. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2691. adapter->stats.roc;
  2692. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2693. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2694. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2695. /* Tx Errors */
  2696. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2697. adapter->stats.latecol;
  2698. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2699. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2700. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2701. /* Tx Dropped needs to be maintained elsewhere */
  2702. /* Phy Stats */
  2703. if (hw->media_type == e1000_media_type_copper) {
  2704. if ((adapter->link_speed == SPEED_1000) &&
  2705. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2706. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2707. adapter->phy_stats.idle_errors += phy_tmp;
  2708. }
  2709. if ((hw->mac_type <= e1000_82546) &&
  2710. (hw->phy_type == e1000_phy_m88) &&
  2711. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2712. adapter->phy_stats.receive_errors += phy_tmp;
  2713. }
  2714. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2715. }
  2716. /**
  2717. * e1000_intr - Interrupt Handler
  2718. * @irq: interrupt number
  2719. * @data: pointer to a network interface device structure
  2720. * @pt_regs: CPU registers structure
  2721. **/
  2722. static irqreturn_t
  2723. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2724. {
  2725. struct net_device *netdev = data;
  2726. struct e1000_adapter *adapter = netdev_priv(netdev);
  2727. struct e1000_hw *hw = &adapter->hw;
  2728. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2729. #ifndef CONFIG_E1000_NAPI
  2730. int i;
  2731. #else
  2732. /* Interrupt Auto-Mask...upon reading ICR,
  2733. * interrupts are masked. No need for the
  2734. * IMC write, but it does mean we should
  2735. * account for it ASAP. */
  2736. if (likely(hw->mac_type >= e1000_82571))
  2737. atomic_inc(&adapter->irq_sem);
  2738. #endif
  2739. if (unlikely(!icr)) {
  2740. #ifdef CONFIG_E1000_NAPI
  2741. if (hw->mac_type >= e1000_82571)
  2742. e1000_irq_enable(adapter);
  2743. #endif
  2744. return IRQ_NONE; /* Not our interrupt */
  2745. }
  2746. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2747. hw->get_link_status = 1;
  2748. /* 80003ES2LAN workaround--
  2749. * For packet buffer work-around on link down event;
  2750. * disable receives here in the ISR and
  2751. * reset adapter in watchdog
  2752. */
  2753. if (netif_carrier_ok(netdev) &&
  2754. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2755. /* disable receives */
  2756. rctl = E1000_READ_REG(hw, RCTL);
  2757. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2758. }
  2759. mod_timer(&adapter->watchdog_timer, jiffies);
  2760. }
  2761. #ifdef CONFIG_E1000_NAPI
  2762. if (unlikely(hw->mac_type < e1000_82571)) {
  2763. atomic_inc(&adapter->irq_sem);
  2764. E1000_WRITE_REG(hw, IMC, ~0);
  2765. E1000_WRITE_FLUSH(hw);
  2766. }
  2767. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2768. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2769. else
  2770. e1000_irq_enable(adapter);
  2771. #else
  2772. /* Writing IMC and IMS is needed for 82547.
  2773. * Due to Hub Link bus being occupied, an interrupt
  2774. * de-assertion message is not able to be sent.
  2775. * When an interrupt assertion message is generated later,
  2776. * two messages are re-ordered and sent out.
  2777. * That causes APIC to think 82547 is in de-assertion
  2778. * state, while 82547 is in assertion state, resulting
  2779. * in dead lock. Writing IMC forces 82547 into
  2780. * de-assertion state.
  2781. */
  2782. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2783. atomic_inc(&adapter->irq_sem);
  2784. E1000_WRITE_REG(hw, IMC, ~0);
  2785. }
  2786. for (i = 0; i < E1000_MAX_INTR; i++)
  2787. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2788. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2789. break;
  2790. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2791. e1000_irq_enable(adapter);
  2792. #endif
  2793. return IRQ_HANDLED;
  2794. }
  2795. #ifdef CONFIG_E1000_NAPI
  2796. /**
  2797. * e1000_clean - NAPI Rx polling callback
  2798. * @adapter: board private structure
  2799. **/
  2800. static int
  2801. e1000_clean(struct net_device *poll_dev, int *budget)
  2802. {
  2803. struct e1000_adapter *adapter;
  2804. int work_to_do = min(*budget, poll_dev->quota);
  2805. int tx_cleaned = 0, i = 0, work_done = 0;
  2806. /* Must NOT use netdev_priv macro here. */
  2807. adapter = poll_dev->priv;
  2808. /* Keep link state information with original netdev */
  2809. if (!netif_carrier_ok(adapter->netdev))
  2810. goto quit_polling;
  2811. while (poll_dev != &adapter->polling_netdev[i]) {
  2812. i++;
  2813. BUG_ON(i == adapter->num_rx_queues);
  2814. }
  2815. if (likely(adapter->num_tx_queues == 1)) {
  2816. /* e1000_clean is called per-cpu. This lock protects
  2817. * tx_ring[0] from being cleaned by multiple cpus
  2818. * simultaneously. A failure obtaining the lock means
  2819. * tx_ring[0] is currently being cleaned anyway. */
  2820. if (spin_trylock(&adapter->tx_queue_lock)) {
  2821. tx_cleaned = e1000_clean_tx_irq(adapter,
  2822. &adapter->tx_ring[0]);
  2823. spin_unlock(&adapter->tx_queue_lock);
  2824. }
  2825. } else
  2826. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2827. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2828. &work_done, work_to_do);
  2829. *budget -= work_done;
  2830. poll_dev->quota -= work_done;
  2831. /* If no Tx and not enough Rx work done, exit the polling mode */
  2832. if ((!tx_cleaned && (work_done == 0)) ||
  2833. !netif_running(adapter->netdev)) {
  2834. quit_polling:
  2835. netif_rx_complete(poll_dev);
  2836. e1000_irq_enable(adapter);
  2837. return 0;
  2838. }
  2839. return 1;
  2840. }
  2841. #endif
  2842. /**
  2843. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2844. * @adapter: board private structure
  2845. **/
  2846. static boolean_t
  2847. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2848. struct e1000_tx_ring *tx_ring)
  2849. {
  2850. struct net_device *netdev = adapter->netdev;
  2851. struct e1000_tx_desc *tx_desc, *eop_desc;
  2852. struct e1000_buffer *buffer_info;
  2853. unsigned int i, eop;
  2854. #ifdef CONFIG_E1000_NAPI
  2855. unsigned int count = 0;
  2856. #endif
  2857. boolean_t cleaned = FALSE;
  2858. i = tx_ring->next_to_clean;
  2859. eop = tx_ring->buffer_info[i].next_to_watch;
  2860. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2861. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2862. for (cleaned = FALSE; !cleaned; ) {
  2863. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2864. buffer_info = &tx_ring->buffer_info[i];
  2865. cleaned = (i == eop);
  2866. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2867. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2868. if (unlikely(++i == tx_ring->count)) i = 0;
  2869. }
  2870. eop = tx_ring->buffer_info[i].next_to_watch;
  2871. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2872. #ifdef CONFIG_E1000_NAPI
  2873. #define E1000_TX_WEIGHT 64
  2874. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2875. if (count++ == E1000_TX_WEIGHT) break;
  2876. #endif
  2877. }
  2878. tx_ring->next_to_clean = i;
  2879. spin_lock(&tx_ring->tx_lock);
  2880. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2881. netif_carrier_ok(netdev)))
  2882. netif_wake_queue(netdev);
  2883. spin_unlock(&tx_ring->tx_lock);
  2884. if (adapter->detect_tx_hung) {
  2885. /* Detect a transmit hang in hardware, this serializes the
  2886. * check with the clearing of time_stamp and movement of i */
  2887. adapter->detect_tx_hung = FALSE;
  2888. if (tx_ring->buffer_info[eop].dma &&
  2889. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2890. (adapter->tx_timeout_factor * HZ))
  2891. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2892. E1000_STATUS_TXOFF)) {
  2893. /* detected Tx unit hang */
  2894. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2895. " Tx Queue <%lu>\n"
  2896. " TDH <%x>\n"
  2897. " TDT <%x>\n"
  2898. " next_to_use <%x>\n"
  2899. " next_to_clean <%x>\n"
  2900. "buffer_info[next_to_clean]\n"
  2901. " time_stamp <%lx>\n"
  2902. " next_to_watch <%x>\n"
  2903. " jiffies <%lx>\n"
  2904. " next_to_watch.status <%x>\n",
  2905. (unsigned long)((tx_ring - adapter->tx_ring) /
  2906. sizeof(struct e1000_tx_ring)),
  2907. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2908. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2909. tx_ring->next_to_use,
  2910. tx_ring->next_to_clean,
  2911. tx_ring->buffer_info[eop].time_stamp,
  2912. eop,
  2913. jiffies,
  2914. eop_desc->upper.fields.status);
  2915. netif_stop_queue(netdev);
  2916. }
  2917. }
  2918. return cleaned;
  2919. }
  2920. /**
  2921. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2922. * @adapter: board private structure
  2923. * @status_err: receive descriptor status and error fields
  2924. * @csum: receive descriptor csum field
  2925. * @sk_buff: socket buffer with received data
  2926. **/
  2927. static inline void
  2928. e1000_rx_checksum(struct e1000_adapter *adapter,
  2929. uint32_t status_err, uint32_t csum,
  2930. struct sk_buff *skb)
  2931. {
  2932. uint16_t status = (uint16_t)status_err;
  2933. uint8_t errors = (uint8_t)(status_err >> 24);
  2934. skb->ip_summed = CHECKSUM_NONE;
  2935. /* 82543 or newer only */
  2936. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2937. /* Ignore Checksum bit is set */
  2938. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2939. /* TCP/UDP checksum error bit is set */
  2940. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2941. /* let the stack verify checksum errors */
  2942. adapter->hw_csum_err++;
  2943. return;
  2944. }
  2945. /* TCP/UDP Checksum has not been calculated */
  2946. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2947. if (!(status & E1000_RXD_STAT_TCPCS))
  2948. return;
  2949. } else {
  2950. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2951. return;
  2952. }
  2953. /* It must be a TCP or UDP packet with a valid checksum */
  2954. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2955. /* TCP checksum is good */
  2956. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2957. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2958. /* IP fragment with UDP payload */
  2959. /* Hardware complements the payload checksum, so we undo it
  2960. * and then put the value in host order for further stack use.
  2961. */
  2962. csum = ntohl(csum ^ 0xFFFF);
  2963. skb->csum = csum;
  2964. skb->ip_summed = CHECKSUM_HW;
  2965. }
  2966. adapter->hw_csum_good++;
  2967. }
  2968. /**
  2969. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2970. * @adapter: board private structure
  2971. **/
  2972. static boolean_t
  2973. #ifdef CONFIG_E1000_NAPI
  2974. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2975. struct e1000_rx_ring *rx_ring,
  2976. int *work_done, int work_to_do)
  2977. #else
  2978. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2979. struct e1000_rx_ring *rx_ring)
  2980. #endif
  2981. {
  2982. struct net_device *netdev = adapter->netdev;
  2983. struct pci_dev *pdev = adapter->pdev;
  2984. struct e1000_rx_desc *rx_desc, *next_rxd;
  2985. struct e1000_buffer *buffer_info, *next_buffer;
  2986. unsigned long flags;
  2987. uint32_t length;
  2988. uint8_t last_byte;
  2989. unsigned int i;
  2990. int cleaned_count = 0;
  2991. boolean_t cleaned = FALSE;
  2992. i = rx_ring->next_to_clean;
  2993. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2994. buffer_info = &rx_ring->buffer_info[i];
  2995. while (rx_desc->status & E1000_RXD_STAT_DD) {
  2996. struct sk_buff *skb;
  2997. u8 status;
  2998. #ifdef CONFIG_E1000_NAPI
  2999. if (*work_done >= work_to_do)
  3000. break;
  3001. (*work_done)++;
  3002. #endif
  3003. status = rx_desc->status;
  3004. skb = buffer_info->skb;
  3005. buffer_info->skb = NULL;
  3006. prefetch(skb->data - NET_IP_ALIGN);
  3007. if (++i == rx_ring->count) i = 0;
  3008. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3009. prefetch(next_rxd);
  3010. next_buffer = &rx_ring->buffer_info[i];
  3011. cleaned = TRUE;
  3012. cleaned_count++;
  3013. pci_unmap_single(pdev,
  3014. buffer_info->dma,
  3015. buffer_info->length,
  3016. PCI_DMA_FROMDEVICE);
  3017. length = le16_to_cpu(rx_desc->length);
  3018. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3019. /* All receives must fit into a single buffer */
  3020. E1000_DBG("%s: Receive packet consumed multiple"
  3021. " buffers\n", netdev->name);
  3022. dev_kfree_skb_irq(skb);
  3023. goto next_desc;
  3024. }
  3025. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3026. last_byte = *(skb->data + length - 1);
  3027. if (TBI_ACCEPT(&adapter->hw, status,
  3028. rx_desc->errors, length, last_byte)) {
  3029. spin_lock_irqsave(&adapter->stats_lock, flags);
  3030. e1000_tbi_adjust_stats(&adapter->hw,
  3031. &adapter->stats,
  3032. length, skb->data);
  3033. spin_unlock_irqrestore(&adapter->stats_lock,
  3034. flags);
  3035. length--;
  3036. } else {
  3037. dev_kfree_skb_irq(skb);
  3038. goto next_desc;
  3039. }
  3040. }
  3041. /* code added for copybreak, this should improve
  3042. * performance for small packets with large amounts
  3043. * of reassembly being done in the stack */
  3044. #define E1000_CB_LENGTH 256
  3045. if (length < E1000_CB_LENGTH) {
  3046. struct sk_buff *new_skb =
  3047. dev_alloc_skb(length + NET_IP_ALIGN);
  3048. if (new_skb) {
  3049. skb_reserve(new_skb, NET_IP_ALIGN);
  3050. new_skb->dev = netdev;
  3051. memcpy(new_skb->data - NET_IP_ALIGN,
  3052. skb->data - NET_IP_ALIGN,
  3053. length + NET_IP_ALIGN);
  3054. /* save the skb in buffer_info as good */
  3055. buffer_info->skb = skb;
  3056. skb = new_skb;
  3057. skb_put(skb, length);
  3058. }
  3059. } else
  3060. skb_put(skb, length);
  3061. /* end copybreak code */
  3062. /* Receive Checksum Offload */
  3063. e1000_rx_checksum(adapter,
  3064. (uint32_t)(status) |
  3065. ((uint32_t)(rx_desc->errors) << 24),
  3066. le16_to_cpu(rx_desc->csum), skb);
  3067. skb->protocol = eth_type_trans(skb, netdev);
  3068. #ifdef CONFIG_E1000_NAPI
  3069. if (unlikely(adapter->vlgrp &&
  3070. (status & E1000_RXD_STAT_VP))) {
  3071. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3072. le16_to_cpu(rx_desc->special) &
  3073. E1000_RXD_SPC_VLAN_MASK);
  3074. } else {
  3075. netif_receive_skb(skb);
  3076. }
  3077. #else /* CONFIG_E1000_NAPI */
  3078. if (unlikely(adapter->vlgrp &&
  3079. (status & E1000_RXD_STAT_VP))) {
  3080. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3081. le16_to_cpu(rx_desc->special) &
  3082. E1000_RXD_SPC_VLAN_MASK);
  3083. } else {
  3084. netif_rx(skb);
  3085. }
  3086. #endif /* CONFIG_E1000_NAPI */
  3087. netdev->last_rx = jiffies;
  3088. next_desc:
  3089. rx_desc->status = 0;
  3090. /* return some buffers to hardware, one at a time is too slow */
  3091. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3092. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3093. cleaned_count = 0;
  3094. }
  3095. /* use prefetched values */
  3096. rx_desc = next_rxd;
  3097. buffer_info = next_buffer;
  3098. }
  3099. rx_ring->next_to_clean = i;
  3100. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3101. if (cleaned_count)
  3102. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3103. return cleaned;
  3104. }
  3105. /**
  3106. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3107. * @adapter: board private structure
  3108. **/
  3109. static boolean_t
  3110. #ifdef CONFIG_E1000_NAPI
  3111. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3112. struct e1000_rx_ring *rx_ring,
  3113. int *work_done, int work_to_do)
  3114. #else
  3115. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3116. struct e1000_rx_ring *rx_ring)
  3117. #endif
  3118. {
  3119. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3120. struct net_device *netdev = adapter->netdev;
  3121. struct pci_dev *pdev = adapter->pdev;
  3122. struct e1000_buffer *buffer_info, *next_buffer;
  3123. struct e1000_ps_page *ps_page;
  3124. struct e1000_ps_page_dma *ps_page_dma;
  3125. struct sk_buff *skb;
  3126. unsigned int i, j;
  3127. uint32_t length, staterr;
  3128. int cleaned_count = 0;
  3129. boolean_t cleaned = FALSE;
  3130. i = rx_ring->next_to_clean;
  3131. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3132. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3133. while (staterr & E1000_RXD_STAT_DD) {
  3134. buffer_info = &rx_ring->buffer_info[i];
  3135. ps_page = &rx_ring->ps_page[i];
  3136. ps_page_dma = &rx_ring->ps_page_dma[i];
  3137. #ifdef CONFIG_E1000_NAPI
  3138. if (unlikely(*work_done >= work_to_do))
  3139. break;
  3140. (*work_done)++;
  3141. #endif
  3142. skb = buffer_info->skb;
  3143. /* in the packet split case this is header only */
  3144. prefetch(skb->data - NET_IP_ALIGN);
  3145. if (++i == rx_ring->count) i = 0;
  3146. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3147. prefetch(next_rxd);
  3148. next_buffer = &rx_ring->buffer_info[i];
  3149. cleaned = TRUE;
  3150. cleaned_count++;
  3151. pci_unmap_single(pdev, buffer_info->dma,
  3152. buffer_info->length,
  3153. PCI_DMA_FROMDEVICE);
  3154. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3155. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3156. " the full packet\n", netdev->name);
  3157. dev_kfree_skb_irq(skb);
  3158. goto next_desc;
  3159. }
  3160. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3161. dev_kfree_skb_irq(skb);
  3162. goto next_desc;
  3163. }
  3164. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3165. if (unlikely(!length)) {
  3166. E1000_DBG("%s: Last part of the packet spanning"
  3167. " multiple descriptors\n", netdev->name);
  3168. dev_kfree_skb_irq(skb);
  3169. goto next_desc;
  3170. }
  3171. /* Good Receive */
  3172. skb_put(skb, length);
  3173. {
  3174. /* this looks ugly, but it seems compiler issues make it
  3175. more efficient than reusing j */
  3176. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3177. /* page alloc/put takes too long and effects small packet
  3178. * throughput, so unsplit small packets and save the alloc/put*/
  3179. if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
  3180. u8 *vaddr;
  3181. /* there is no documentation about how to call
  3182. * kmap_atomic, so we can't hold the mapping
  3183. * very long */
  3184. pci_dma_sync_single_for_cpu(pdev,
  3185. ps_page_dma->ps_page_dma[0],
  3186. PAGE_SIZE,
  3187. PCI_DMA_FROMDEVICE);
  3188. vaddr = kmap_atomic(ps_page->ps_page[0],
  3189. KM_SKB_DATA_SOFTIRQ);
  3190. memcpy(skb->tail, vaddr, l1);
  3191. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3192. pci_dma_sync_single_for_device(pdev,
  3193. ps_page_dma->ps_page_dma[0],
  3194. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3195. skb_put(skb, l1);
  3196. length += l1;
  3197. goto copydone;
  3198. } /* if */
  3199. }
  3200. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3201. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3202. break;
  3203. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3204. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3205. ps_page_dma->ps_page_dma[j] = 0;
  3206. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3207. length);
  3208. ps_page->ps_page[j] = NULL;
  3209. skb->len += length;
  3210. skb->data_len += length;
  3211. skb->truesize += length;
  3212. }
  3213. copydone:
  3214. e1000_rx_checksum(adapter, staterr,
  3215. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3216. skb->protocol = eth_type_trans(skb, netdev);
  3217. if (likely(rx_desc->wb.upper.header_status &
  3218. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3219. adapter->rx_hdr_split++;
  3220. #ifdef CONFIG_E1000_NAPI
  3221. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3222. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3223. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3224. E1000_RXD_SPC_VLAN_MASK);
  3225. } else {
  3226. netif_receive_skb(skb);
  3227. }
  3228. #else /* CONFIG_E1000_NAPI */
  3229. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3230. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3231. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3232. E1000_RXD_SPC_VLAN_MASK);
  3233. } else {
  3234. netif_rx(skb);
  3235. }
  3236. #endif /* CONFIG_E1000_NAPI */
  3237. netdev->last_rx = jiffies;
  3238. next_desc:
  3239. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3240. buffer_info->skb = NULL;
  3241. /* return some buffers to hardware, one at a time is too slow */
  3242. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3243. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3244. cleaned_count = 0;
  3245. }
  3246. /* use prefetched values */
  3247. rx_desc = next_rxd;
  3248. buffer_info = next_buffer;
  3249. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3250. }
  3251. rx_ring->next_to_clean = i;
  3252. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3253. if (cleaned_count)
  3254. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3255. return cleaned;
  3256. }
  3257. /**
  3258. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3259. * @adapter: address of board private structure
  3260. **/
  3261. static void
  3262. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3263. struct e1000_rx_ring *rx_ring,
  3264. int cleaned_count)
  3265. {
  3266. struct net_device *netdev = adapter->netdev;
  3267. struct pci_dev *pdev = adapter->pdev;
  3268. struct e1000_rx_desc *rx_desc;
  3269. struct e1000_buffer *buffer_info;
  3270. struct sk_buff *skb;
  3271. unsigned int i;
  3272. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3273. i = rx_ring->next_to_use;
  3274. buffer_info = &rx_ring->buffer_info[i];
  3275. while (cleaned_count--) {
  3276. if (!(skb = buffer_info->skb))
  3277. skb = dev_alloc_skb(bufsz);
  3278. else {
  3279. skb_trim(skb, 0);
  3280. goto map_skb;
  3281. }
  3282. if (unlikely(!skb)) {
  3283. /* Better luck next round */
  3284. adapter->alloc_rx_buff_failed++;
  3285. break;
  3286. }
  3287. /* Fix for errata 23, can't cross 64kB boundary */
  3288. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3289. struct sk_buff *oldskb = skb;
  3290. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3291. "at %p\n", bufsz, skb->data);
  3292. /* Try again, without freeing the previous */
  3293. skb = dev_alloc_skb(bufsz);
  3294. /* Failed allocation, critical failure */
  3295. if (!skb) {
  3296. dev_kfree_skb(oldskb);
  3297. break;
  3298. }
  3299. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3300. /* give up */
  3301. dev_kfree_skb(skb);
  3302. dev_kfree_skb(oldskb);
  3303. break; /* while !buffer_info->skb */
  3304. } else {
  3305. /* Use new allocation */
  3306. dev_kfree_skb(oldskb);
  3307. }
  3308. }
  3309. /* Make buffer alignment 2 beyond a 16 byte boundary
  3310. * this will result in a 16 byte aligned IP header after
  3311. * the 14 byte MAC header is removed
  3312. */
  3313. skb_reserve(skb, NET_IP_ALIGN);
  3314. skb->dev = netdev;
  3315. buffer_info->skb = skb;
  3316. buffer_info->length = adapter->rx_buffer_len;
  3317. map_skb:
  3318. buffer_info->dma = pci_map_single(pdev,
  3319. skb->data,
  3320. adapter->rx_buffer_len,
  3321. PCI_DMA_FROMDEVICE);
  3322. /* Fix for errata 23, can't cross 64kB boundary */
  3323. if (!e1000_check_64k_bound(adapter,
  3324. (void *)(unsigned long)buffer_info->dma,
  3325. adapter->rx_buffer_len)) {
  3326. DPRINTK(RX_ERR, ERR,
  3327. "dma align check failed: %u bytes at %p\n",
  3328. adapter->rx_buffer_len,
  3329. (void *)(unsigned long)buffer_info->dma);
  3330. dev_kfree_skb(skb);
  3331. buffer_info->skb = NULL;
  3332. pci_unmap_single(pdev, buffer_info->dma,
  3333. adapter->rx_buffer_len,
  3334. PCI_DMA_FROMDEVICE);
  3335. break; /* while !buffer_info->skb */
  3336. }
  3337. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3338. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3339. if (unlikely(++i == rx_ring->count))
  3340. i = 0;
  3341. buffer_info = &rx_ring->buffer_info[i];
  3342. }
  3343. if (likely(rx_ring->next_to_use != i)) {
  3344. rx_ring->next_to_use = i;
  3345. if (unlikely(i-- == 0))
  3346. i = (rx_ring->count - 1);
  3347. /* Force memory writes to complete before letting h/w
  3348. * know there are new descriptors to fetch. (Only
  3349. * applicable for weak-ordered memory model archs,
  3350. * such as IA-64). */
  3351. wmb();
  3352. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3353. }
  3354. }
  3355. /**
  3356. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3357. * @adapter: address of board private structure
  3358. **/
  3359. static void
  3360. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3361. struct e1000_rx_ring *rx_ring,
  3362. int cleaned_count)
  3363. {
  3364. struct net_device *netdev = adapter->netdev;
  3365. struct pci_dev *pdev = adapter->pdev;
  3366. union e1000_rx_desc_packet_split *rx_desc;
  3367. struct e1000_buffer *buffer_info;
  3368. struct e1000_ps_page *ps_page;
  3369. struct e1000_ps_page_dma *ps_page_dma;
  3370. struct sk_buff *skb;
  3371. unsigned int i, j;
  3372. i = rx_ring->next_to_use;
  3373. buffer_info = &rx_ring->buffer_info[i];
  3374. ps_page = &rx_ring->ps_page[i];
  3375. ps_page_dma = &rx_ring->ps_page_dma[i];
  3376. while (cleaned_count--) {
  3377. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3378. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3379. if (j < adapter->rx_ps_pages) {
  3380. if (likely(!ps_page->ps_page[j])) {
  3381. ps_page->ps_page[j] =
  3382. alloc_page(GFP_ATOMIC);
  3383. if (unlikely(!ps_page->ps_page[j])) {
  3384. adapter->alloc_rx_buff_failed++;
  3385. goto no_buffers;
  3386. }
  3387. ps_page_dma->ps_page_dma[j] =
  3388. pci_map_page(pdev,
  3389. ps_page->ps_page[j],
  3390. 0, PAGE_SIZE,
  3391. PCI_DMA_FROMDEVICE);
  3392. }
  3393. /* Refresh the desc even if buffer_addrs didn't
  3394. * change because each write-back erases
  3395. * this info.
  3396. */
  3397. rx_desc->read.buffer_addr[j+1] =
  3398. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3399. } else
  3400. rx_desc->read.buffer_addr[j+1] = ~0;
  3401. }
  3402. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3403. if (unlikely(!skb)) {
  3404. adapter->alloc_rx_buff_failed++;
  3405. break;
  3406. }
  3407. /* Make buffer alignment 2 beyond a 16 byte boundary
  3408. * this will result in a 16 byte aligned IP header after
  3409. * the 14 byte MAC header is removed
  3410. */
  3411. skb_reserve(skb, NET_IP_ALIGN);
  3412. skb->dev = netdev;
  3413. buffer_info->skb = skb;
  3414. buffer_info->length = adapter->rx_ps_bsize0;
  3415. buffer_info->dma = pci_map_single(pdev, skb->data,
  3416. adapter->rx_ps_bsize0,
  3417. PCI_DMA_FROMDEVICE);
  3418. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3419. if (unlikely(++i == rx_ring->count)) i = 0;
  3420. buffer_info = &rx_ring->buffer_info[i];
  3421. ps_page = &rx_ring->ps_page[i];
  3422. ps_page_dma = &rx_ring->ps_page_dma[i];
  3423. }
  3424. no_buffers:
  3425. if (likely(rx_ring->next_to_use != i)) {
  3426. rx_ring->next_to_use = i;
  3427. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3428. /* Force memory writes to complete before letting h/w
  3429. * know there are new descriptors to fetch. (Only
  3430. * applicable for weak-ordered memory model archs,
  3431. * such as IA-64). */
  3432. wmb();
  3433. /* Hardware increments by 16 bytes, but packet split
  3434. * descriptors are 32 bytes...so we increment tail
  3435. * twice as much.
  3436. */
  3437. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3438. }
  3439. }
  3440. /**
  3441. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3442. * @adapter:
  3443. **/
  3444. static void
  3445. e1000_smartspeed(struct e1000_adapter *adapter)
  3446. {
  3447. uint16_t phy_status;
  3448. uint16_t phy_ctrl;
  3449. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3450. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3451. return;
  3452. if (adapter->smartspeed == 0) {
  3453. /* If Master/Slave config fault is asserted twice,
  3454. * we assume back-to-back */
  3455. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3456. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3457. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3458. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3459. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3460. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3461. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3462. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3463. phy_ctrl);
  3464. adapter->smartspeed++;
  3465. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3466. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3467. &phy_ctrl)) {
  3468. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3469. MII_CR_RESTART_AUTO_NEG);
  3470. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3471. phy_ctrl);
  3472. }
  3473. }
  3474. return;
  3475. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3476. /* If still no link, perhaps using 2/3 pair cable */
  3477. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3478. phy_ctrl |= CR_1000T_MS_ENABLE;
  3479. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3480. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3481. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3482. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3483. MII_CR_RESTART_AUTO_NEG);
  3484. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3485. }
  3486. }
  3487. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3488. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3489. adapter->smartspeed = 0;
  3490. }
  3491. /**
  3492. * e1000_ioctl -
  3493. * @netdev:
  3494. * @ifreq:
  3495. * @cmd:
  3496. **/
  3497. static int
  3498. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3499. {
  3500. switch (cmd) {
  3501. case SIOCGMIIPHY:
  3502. case SIOCGMIIREG:
  3503. case SIOCSMIIREG:
  3504. return e1000_mii_ioctl(netdev, ifr, cmd);
  3505. default:
  3506. return -EOPNOTSUPP;
  3507. }
  3508. }
  3509. /**
  3510. * e1000_mii_ioctl -
  3511. * @netdev:
  3512. * @ifreq:
  3513. * @cmd:
  3514. **/
  3515. static int
  3516. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3517. {
  3518. struct e1000_adapter *adapter = netdev_priv(netdev);
  3519. struct mii_ioctl_data *data = if_mii(ifr);
  3520. int retval;
  3521. uint16_t mii_reg;
  3522. uint16_t spddplx;
  3523. unsigned long flags;
  3524. if (adapter->hw.media_type != e1000_media_type_copper)
  3525. return -EOPNOTSUPP;
  3526. switch (cmd) {
  3527. case SIOCGMIIPHY:
  3528. data->phy_id = adapter->hw.phy_addr;
  3529. break;
  3530. case SIOCGMIIREG:
  3531. if (!capable(CAP_NET_ADMIN))
  3532. return -EPERM;
  3533. spin_lock_irqsave(&adapter->stats_lock, flags);
  3534. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3535. &data->val_out)) {
  3536. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3537. return -EIO;
  3538. }
  3539. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3540. break;
  3541. case SIOCSMIIREG:
  3542. if (!capable(CAP_NET_ADMIN))
  3543. return -EPERM;
  3544. if (data->reg_num & ~(0x1F))
  3545. return -EFAULT;
  3546. mii_reg = data->val_in;
  3547. spin_lock_irqsave(&adapter->stats_lock, flags);
  3548. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3549. mii_reg)) {
  3550. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3551. return -EIO;
  3552. }
  3553. if (adapter->hw.phy_type == e1000_media_type_copper) {
  3554. switch (data->reg_num) {
  3555. case PHY_CTRL:
  3556. if (mii_reg & MII_CR_POWER_DOWN)
  3557. break;
  3558. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3559. adapter->hw.autoneg = 1;
  3560. adapter->hw.autoneg_advertised = 0x2F;
  3561. } else {
  3562. if (mii_reg & 0x40)
  3563. spddplx = SPEED_1000;
  3564. else if (mii_reg & 0x2000)
  3565. spddplx = SPEED_100;
  3566. else
  3567. spddplx = SPEED_10;
  3568. spddplx += (mii_reg & 0x100)
  3569. ? DUPLEX_FULL :
  3570. DUPLEX_HALF;
  3571. retval = e1000_set_spd_dplx(adapter,
  3572. spddplx);
  3573. if (retval) {
  3574. spin_unlock_irqrestore(
  3575. &adapter->stats_lock,
  3576. flags);
  3577. return retval;
  3578. }
  3579. }
  3580. if (netif_running(adapter->netdev)) {
  3581. e1000_down(adapter);
  3582. e1000_up(adapter);
  3583. } else
  3584. e1000_reset(adapter);
  3585. break;
  3586. case M88E1000_PHY_SPEC_CTRL:
  3587. case M88E1000_EXT_PHY_SPEC_CTRL:
  3588. if (e1000_phy_reset(&adapter->hw)) {
  3589. spin_unlock_irqrestore(
  3590. &adapter->stats_lock, flags);
  3591. return -EIO;
  3592. }
  3593. break;
  3594. }
  3595. } else {
  3596. switch (data->reg_num) {
  3597. case PHY_CTRL:
  3598. if (mii_reg & MII_CR_POWER_DOWN)
  3599. break;
  3600. if (netif_running(adapter->netdev)) {
  3601. e1000_down(adapter);
  3602. e1000_up(adapter);
  3603. } else
  3604. e1000_reset(adapter);
  3605. break;
  3606. }
  3607. }
  3608. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3609. break;
  3610. default:
  3611. return -EOPNOTSUPP;
  3612. }
  3613. return E1000_SUCCESS;
  3614. }
  3615. void
  3616. e1000_pci_set_mwi(struct e1000_hw *hw)
  3617. {
  3618. struct e1000_adapter *adapter = hw->back;
  3619. int ret_val = pci_set_mwi(adapter->pdev);
  3620. if (ret_val)
  3621. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3622. }
  3623. void
  3624. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3625. {
  3626. struct e1000_adapter *adapter = hw->back;
  3627. pci_clear_mwi(adapter->pdev);
  3628. }
  3629. void
  3630. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3631. {
  3632. struct e1000_adapter *adapter = hw->back;
  3633. pci_read_config_word(adapter->pdev, reg, value);
  3634. }
  3635. void
  3636. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3637. {
  3638. struct e1000_adapter *adapter = hw->back;
  3639. pci_write_config_word(adapter->pdev, reg, *value);
  3640. }
  3641. uint32_t
  3642. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3643. {
  3644. return inl(port);
  3645. }
  3646. void
  3647. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3648. {
  3649. outl(value, port);
  3650. }
  3651. static void
  3652. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3653. {
  3654. struct e1000_adapter *adapter = netdev_priv(netdev);
  3655. uint32_t ctrl, rctl;
  3656. e1000_irq_disable(adapter);
  3657. adapter->vlgrp = grp;
  3658. if (grp) {
  3659. /* enable VLAN tag insert/strip */
  3660. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3661. ctrl |= E1000_CTRL_VME;
  3662. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3663. /* enable VLAN receive filtering */
  3664. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3665. rctl |= E1000_RCTL_VFE;
  3666. rctl &= ~E1000_RCTL_CFIEN;
  3667. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3668. e1000_update_mng_vlan(adapter);
  3669. } else {
  3670. /* disable VLAN tag insert/strip */
  3671. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3672. ctrl &= ~E1000_CTRL_VME;
  3673. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3674. /* disable VLAN filtering */
  3675. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3676. rctl &= ~E1000_RCTL_VFE;
  3677. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3678. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3679. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3680. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3681. }
  3682. }
  3683. e1000_irq_enable(adapter);
  3684. }
  3685. static void
  3686. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3687. {
  3688. struct e1000_adapter *adapter = netdev_priv(netdev);
  3689. uint32_t vfta, index;
  3690. if ((adapter->hw.mng_cookie.status &
  3691. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3692. (vid == adapter->mng_vlan_id))
  3693. return;
  3694. /* add VID to filter table */
  3695. index = (vid >> 5) & 0x7F;
  3696. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3697. vfta |= (1 << (vid & 0x1F));
  3698. e1000_write_vfta(&adapter->hw, index, vfta);
  3699. }
  3700. static void
  3701. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3702. {
  3703. struct e1000_adapter *adapter = netdev_priv(netdev);
  3704. uint32_t vfta, index;
  3705. e1000_irq_disable(adapter);
  3706. if (adapter->vlgrp)
  3707. adapter->vlgrp->vlan_devices[vid] = NULL;
  3708. e1000_irq_enable(adapter);
  3709. if ((adapter->hw.mng_cookie.status &
  3710. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3711. (vid == adapter->mng_vlan_id)) {
  3712. /* release control to f/w */
  3713. e1000_release_hw_control(adapter);
  3714. return;
  3715. }
  3716. /* remove VID from filter table */
  3717. index = (vid >> 5) & 0x7F;
  3718. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3719. vfta &= ~(1 << (vid & 0x1F));
  3720. e1000_write_vfta(&adapter->hw, index, vfta);
  3721. }
  3722. static void
  3723. e1000_restore_vlan(struct e1000_adapter *adapter)
  3724. {
  3725. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3726. if (adapter->vlgrp) {
  3727. uint16_t vid;
  3728. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3729. if (!adapter->vlgrp->vlan_devices[vid])
  3730. continue;
  3731. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3732. }
  3733. }
  3734. }
  3735. int
  3736. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3737. {
  3738. adapter->hw.autoneg = 0;
  3739. /* Fiber NICs only allow 1000 gbps Full duplex */
  3740. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3741. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3742. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3743. return -EINVAL;
  3744. }
  3745. switch (spddplx) {
  3746. case SPEED_10 + DUPLEX_HALF:
  3747. adapter->hw.forced_speed_duplex = e1000_10_half;
  3748. break;
  3749. case SPEED_10 + DUPLEX_FULL:
  3750. adapter->hw.forced_speed_duplex = e1000_10_full;
  3751. break;
  3752. case SPEED_100 + DUPLEX_HALF:
  3753. adapter->hw.forced_speed_duplex = e1000_100_half;
  3754. break;
  3755. case SPEED_100 + DUPLEX_FULL:
  3756. adapter->hw.forced_speed_duplex = e1000_100_full;
  3757. break;
  3758. case SPEED_1000 + DUPLEX_FULL:
  3759. adapter->hw.autoneg = 1;
  3760. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3761. break;
  3762. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3763. default:
  3764. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3765. return -EINVAL;
  3766. }
  3767. return 0;
  3768. }
  3769. #ifdef CONFIG_PM
  3770. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3771. * bus we're on (PCI(X) vs. PCI-E)
  3772. */
  3773. #define PCIE_CONFIG_SPACE_LEN 256
  3774. #define PCI_CONFIG_SPACE_LEN 64
  3775. static int
  3776. e1000_pci_save_state(struct e1000_adapter *adapter)
  3777. {
  3778. struct pci_dev *dev = adapter->pdev;
  3779. int size;
  3780. int i;
  3781. if (adapter->hw.mac_type >= e1000_82571)
  3782. size = PCIE_CONFIG_SPACE_LEN;
  3783. else
  3784. size = PCI_CONFIG_SPACE_LEN;
  3785. WARN_ON(adapter->config_space != NULL);
  3786. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3787. if (!adapter->config_space) {
  3788. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3789. return -ENOMEM;
  3790. }
  3791. for (i = 0; i < (size / 4); i++)
  3792. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3793. return 0;
  3794. }
  3795. static void
  3796. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3797. {
  3798. struct pci_dev *dev = adapter->pdev;
  3799. int size;
  3800. int i;
  3801. if (adapter->config_space == NULL)
  3802. return;
  3803. if (adapter->hw.mac_type >= e1000_82571)
  3804. size = PCIE_CONFIG_SPACE_LEN;
  3805. else
  3806. size = PCI_CONFIG_SPACE_LEN;
  3807. for (i = 0; i < (size / 4); i++)
  3808. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3809. kfree(adapter->config_space);
  3810. adapter->config_space = NULL;
  3811. return;
  3812. }
  3813. #endif /* CONFIG_PM */
  3814. static int
  3815. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3816. {
  3817. struct net_device *netdev = pci_get_drvdata(pdev);
  3818. struct e1000_adapter *adapter = netdev_priv(netdev);
  3819. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3820. uint32_t wufc = adapter->wol;
  3821. int retval = 0;
  3822. netif_device_detach(netdev);
  3823. if (netif_running(netdev))
  3824. e1000_down(adapter);
  3825. #ifdef CONFIG_PM
  3826. /* Implement our own version of pci_save_state(pdev) because pci-
  3827. * express adapters have 256-byte config spaces. */
  3828. retval = e1000_pci_save_state(adapter);
  3829. if (retval)
  3830. return retval;
  3831. #endif
  3832. status = E1000_READ_REG(&adapter->hw, STATUS);
  3833. if (status & E1000_STATUS_LU)
  3834. wufc &= ~E1000_WUFC_LNKC;
  3835. if (wufc) {
  3836. e1000_setup_rctl(adapter);
  3837. e1000_set_multi(netdev);
  3838. /* turn on all-multi mode if wake on multicast is enabled */
  3839. if (adapter->wol & E1000_WUFC_MC) {
  3840. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3841. rctl |= E1000_RCTL_MPE;
  3842. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3843. }
  3844. if (adapter->hw.mac_type >= e1000_82540) {
  3845. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3846. /* advertise wake from D3Cold */
  3847. #define E1000_CTRL_ADVD3WUC 0x00100000
  3848. /* phy power management enable */
  3849. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3850. ctrl |= E1000_CTRL_ADVD3WUC |
  3851. E1000_CTRL_EN_PHY_PWR_MGMT;
  3852. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3853. }
  3854. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3855. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3856. /* keep the laser running in D3 */
  3857. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3858. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3859. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3860. }
  3861. /* Allow time for pending master requests to run */
  3862. e1000_disable_pciex_master(&adapter->hw);
  3863. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3864. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3865. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3866. if (retval)
  3867. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3868. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3869. if (retval)
  3870. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3871. } else {
  3872. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3873. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3874. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3875. if (retval)
  3876. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3877. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3878. if (retval)
  3879. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3880. }
  3881. if (adapter->hw.mac_type >= e1000_82540 &&
  3882. adapter->hw.media_type == e1000_media_type_copper) {
  3883. manc = E1000_READ_REG(&adapter->hw, MANC);
  3884. if (manc & E1000_MANC_SMBUS_EN) {
  3885. manc |= E1000_MANC_ARP_EN;
  3886. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3887. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3888. if (retval)
  3889. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3890. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3891. if (retval)
  3892. DPRINTK(PROBE, ERR,
  3893. "Error enabling D3 cold wake\n");
  3894. }
  3895. }
  3896. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3897. * would have already happened in close and is redundant. */
  3898. e1000_release_hw_control(adapter);
  3899. pci_disable_device(pdev);
  3900. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3901. if (retval)
  3902. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3903. return 0;
  3904. }
  3905. #ifdef CONFIG_PM
  3906. static int
  3907. e1000_resume(struct pci_dev *pdev)
  3908. {
  3909. struct net_device *netdev = pci_get_drvdata(pdev);
  3910. struct e1000_adapter *adapter = netdev_priv(netdev);
  3911. int retval;
  3912. uint32_t manc, ret_val;
  3913. retval = pci_set_power_state(pdev, PCI_D0);
  3914. if (retval)
  3915. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3916. e1000_pci_restore_state(adapter);
  3917. ret_val = pci_enable_device(pdev);
  3918. pci_set_master(pdev);
  3919. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3920. if (retval)
  3921. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3922. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3923. if (retval)
  3924. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3925. e1000_reset(adapter);
  3926. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3927. if (netif_running(netdev))
  3928. e1000_up(adapter);
  3929. netif_device_attach(netdev);
  3930. if (adapter->hw.mac_type >= e1000_82540 &&
  3931. adapter->hw.media_type == e1000_media_type_copper) {
  3932. manc = E1000_READ_REG(&adapter->hw, MANC);
  3933. manc &= ~(E1000_MANC_ARP_EN);
  3934. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3935. }
  3936. /* If the controller is 82573 and f/w is AMT, do not set
  3937. * DRV_LOAD until the interface is up. For all other cases,
  3938. * let the f/w know that the h/w is now under the control
  3939. * of the driver. */
  3940. if (adapter->hw.mac_type != e1000_82573 ||
  3941. !e1000_check_mng_mode(&adapter->hw))
  3942. e1000_get_hw_control(adapter);
  3943. return 0;
  3944. }
  3945. #endif
  3946. static void e1000_shutdown(struct pci_dev *pdev)
  3947. {
  3948. e1000_suspend(pdev, PMSG_SUSPEND);
  3949. }
  3950. #ifdef CONFIG_NET_POLL_CONTROLLER
  3951. /*
  3952. * Polling 'interrupt' - used by things like netconsole to send skbs
  3953. * without having to re-enable interrupts. It's not called while
  3954. * the interrupt routine is executing.
  3955. */
  3956. static void
  3957. e1000_netpoll(struct net_device *netdev)
  3958. {
  3959. struct e1000_adapter *adapter = netdev_priv(netdev);
  3960. disable_irq(adapter->pdev->irq);
  3961. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3962. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3963. #ifndef CONFIG_E1000_NAPI
  3964. adapter->clean_rx(adapter, adapter->rx_ring);
  3965. #endif
  3966. enable_irq(adapter->pdev->irq);
  3967. }
  3968. #endif
  3969. /* e1000_main.c */