nmi.c 13 KB

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  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/sysdev.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/percpu.h>
  22. #include <linux/kprobes.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/smp.h>
  27. #include <linux/nmi.h>
  28. #include <asm/i8259.h>
  29. #include <asm/io_apic.h>
  30. #include <asm/proto.h>
  31. #include <asm/timer.h>
  32. #include <asm/mce.h>
  33. #include <mach_traps.h>
  34. int unknown_nmi_panic;
  35. int nmi_watchdog_enabled;
  36. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  37. /* nmi_active:
  38. * >0: the lapic NMI watchdog is active, but can be disabled
  39. * <0: the lapic NMI watchdog has not been set up, and cannot
  40. * be enabled
  41. * 0: the lapic NMI watchdog is disabled, but can be enabled
  42. */
  43. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  44. EXPORT_SYMBOL(nmi_active);
  45. unsigned int nmi_watchdog = NMI_NONE;
  46. EXPORT_SYMBOL(nmi_watchdog);
  47. static int panic_on_timeout;
  48. static unsigned int nmi_hz = HZ;
  49. static DEFINE_PER_CPU(short, wd_enabled);
  50. static int endflag __initdata;
  51. static inline unsigned int get_nmi_count(int cpu)
  52. {
  53. #ifdef CONFIG_X86_64
  54. return cpu_pda(cpu)->__nmi_count;
  55. #else
  56. return nmi_count(cpu);
  57. #endif
  58. }
  59. static inline int mce_in_progress(void)
  60. {
  61. #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
  62. return atomic_read(&mce_entry) > 0;
  63. #endif
  64. return 0;
  65. }
  66. /*
  67. * Take the local apic timer and PIT/HPET into account. We don't
  68. * know which one is active, when we have highres/dyntick on
  69. */
  70. static inline unsigned int get_timer_irqs(int cpu)
  71. {
  72. #ifdef CONFIG_X86_64
  73. return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  74. #else
  75. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  76. per_cpu(irq_stat, cpu).irq0_irqs;
  77. #endif
  78. }
  79. #ifdef CONFIG_SMP
  80. /*
  81. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  82. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  83. * CPUs during the test make them busy.
  84. */
  85. static __init void nmi_cpu_busy(void *data)
  86. {
  87. local_irq_enable_in_hardirq();
  88. /*
  89. * Intentionally don't use cpu_relax here. This is
  90. * to make sure that the performance counter really ticks,
  91. * even if there is a simulator or similar that catches the
  92. * pause instruction. On a real HT machine this is fine because
  93. * all other CPUs are busy with "useless" delay loops and don't
  94. * care if they get somewhat less cycles.
  95. */
  96. while (endflag == 0)
  97. mb();
  98. }
  99. #endif
  100. static void report_broken_nmi(int cpu, int *prev_nmi_count)
  101. {
  102. printk(KERN_CONT "\n");
  103. printk(KERN_WARNING
  104. "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
  105. cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
  106. printk(KERN_WARNING
  107. "Please report this to bugzilla.kernel.org,\n");
  108. printk(KERN_WARNING
  109. "and attach the output of the 'dmesg' command.\n");
  110. per_cpu(wd_enabled, cpu) = 0;
  111. atomic_dec(&nmi_active);
  112. }
  113. static void __acpi_nmi_disable(void *__unused)
  114. {
  115. apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  116. }
  117. int __init check_nmi_watchdog(void)
  118. {
  119. unsigned int *prev_nmi_count;
  120. int cpu;
  121. if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
  122. return 0;
  123. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
  124. if (!prev_nmi_count)
  125. goto error;
  126. printk(KERN_INFO "Testing NMI watchdog ... ");
  127. #ifdef CONFIG_SMP
  128. if (nmi_watchdog == NMI_LOCAL_APIC)
  129. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
  130. #endif
  131. for_each_possible_cpu(cpu)
  132. prev_nmi_count[cpu] = get_nmi_count(cpu);
  133. local_irq_enable();
  134. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  135. for_each_online_cpu(cpu) {
  136. if (!per_cpu(wd_enabled, cpu))
  137. continue;
  138. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
  139. report_broken_nmi(cpu, prev_nmi_count);
  140. }
  141. endflag = 1;
  142. if (!atomic_read(&nmi_active)) {
  143. kfree(prev_nmi_count);
  144. atomic_set(&nmi_active, -1);
  145. goto error;
  146. }
  147. printk("OK.\n");
  148. /*
  149. * now that we know it works we can reduce NMI frequency to
  150. * something more reasonable; makes a difference in some configs
  151. */
  152. if (nmi_watchdog == NMI_LOCAL_APIC)
  153. nmi_hz = lapic_adjust_nmi_hz(1);
  154. kfree(prev_nmi_count);
  155. return 0;
  156. error:
  157. if (nmi_watchdog == NMI_IO_APIC) {
  158. if (!timer_through_8259)
  159. disable_8259A_irq(0);
  160. on_each_cpu(__acpi_nmi_disable, NULL, 1);
  161. }
  162. #ifdef CONFIG_X86_32
  163. timer_ack = 0;
  164. #endif
  165. return -1;
  166. }
  167. static int __init setup_nmi_watchdog(char *str)
  168. {
  169. unsigned int nmi;
  170. if (!strncmp(str, "panic", 5)) {
  171. panic_on_timeout = 1;
  172. str = strchr(str, ',');
  173. if (!str)
  174. return 1;
  175. ++str;
  176. }
  177. if (!strncmp(str, "lapic", 5))
  178. nmi_watchdog = NMI_LOCAL_APIC;
  179. else if (!strncmp(str, "ioapic", 6))
  180. nmi_watchdog = NMI_IO_APIC;
  181. else {
  182. get_option(&str, &nmi);
  183. if (nmi >= NMI_INVALID)
  184. return 0;
  185. nmi_watchdog = nmi;
  186. }
  187. return 1;
  188. }
  189. __setup("nmi_watchdog=", setup_nmi_watchdog);
  190. /*
  191. * Suspend/resume support
  192. */
  193. #ifdef CONFIG_PM
  194. static int nmi_pm_active; /* nmi_active before suspend */
  195. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  196. {
  197. /* only CPU0 goes here, other CPUs should be offline */
  198. nmi_pm_active = atomic_read(&nmi_active);
  199. stop_apic_nmi_watchdog(NULL);
  200. BUG_ON(atomic_read(&nmi_active) != 0);
  201. return 0;
  202. }
  203. static int lapic_nmi_resume(struct sys_device *dev)
  204. {
  205. /* only CPU0 goes here, other CPUs should be offline */
  206. if (nmi_pm_active > 0) {
  207. setup_apic_nmi_watchdog(NULL);
  208. touch_nmi_watchdog();
  209. }
  210. return 0;
  211. }
  212. static struct sysdev_class nmi_sysclass = {
  213. .name = "lapic_nmi",
  214. .resume = lapic_nmi_resume,
  215. .suspend = lapic_nmi_suspend,
  216. };
  217. static struct sys_device device_lapic_nmi = {
  218. .id = 0,
  219. .cls = &nmi_sysclass,
  220. };
  221. static int __init init_lapic_nmi_sysfs(void)
  222. {
  223. int error;
  224. /*
  225. * should really be a BUG_ON but b/c this is an
  226. * init call, it just doesn't work. -dcz
  227. */
  228. if (nmi_watchdog != NMI_LOCAL_APIC)
  229. return 0;
  230. if (atomic_read(&nmi_active) < 0)
  231. return 0;
  232. error = sysdev_class_register(&nmi_sysclass);
  233. if (!error)
  234. error = sysdev_register(&device_lapic_nmi);
  235. return error;
  236. }
  237. /* must come after the local APIC's device_initcall() */
  238. late_initcall(init_lapic_nmi_sysfs);
  239. #endif /* CONFIG_PM */
  240. static void __acpi_nmi_enable(void *__unused)
  241. {
  242. apic_write(APIC_LVT0, APIC_DM_NMI);
  243. }
  244. /*
  245. * Enable timer based NMIs on all CPUs:
  246. */
  247. void acpi_nmi_enable(void)
  248. {
  249. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  250. on_each_cpu(__acpi_nmi_enable, NULL, 1);
  251. }
  252. /*
  253. * Disable timer based NMIs on all CPUs:
  254. */
  255. void acpi_nmi_disable(void)
  256. {
  257. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  258. on_each_cpu(__acpi_nmi_disable, NULL, 1);
  259. }
  260. /*
  261. * This function is called as soon the LAPIC NMI watchdog driver has everything
  262. * in place and it's ready to check if the NMIs belong to the NMI watchdog
  263. */
  264. void cpu_nmi_set_wd_enabled(void)
  265. {
  266. __get_cpu_var(wd_enabled) = 1;
  267. }
  268. void setup_apic_nmi_watchdog(void *unused)
  269. {
  270. if (__get_cpu_var(wd_enabled))
  271. return;
  272. /* cheap hack to support suspend/resume */
  273. /* if cpu0 is not active neither should the other cpus */
  274. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  275. return;
  276. switch (nmi_watchdog) {
  277. case NMI_LOCAL_APIC:
  278. if (lapic_watchdog_init(nmi_hz) < 0) {
  279. __get_cpu_var(wd_enabled) = 0;
  280. return;
  281. }
  282. /* FALL THROUGH */
  283. case NMI_IO_APIC:
  284. __get_cpu_var(wd_enabled) = 1;
  285. atomic_inc(&nmi_active);
  286. }
  287. }
  288. void stop_apic_nmi_watchdog(void *unused)
  289. {
  290. /* only support LOCAL and IO APICs for now */
  291. if (!nmi_watchdog_active())
  292. return;
  293. if (__get_cpu_var(wd_enabled) == 0)
  294. return;
  295. if (nmi_watchdog == NMI_LOCAL_APIC)
  296. lapic_watchdog_stop();
  297. else
  298. __acpi_nmi_disable(NULL);
  299. __get_cpu_var(wd_enabled) = 0;
  300. atomic_dec(&nmi_active);
  301. }
  302. /*
  303. * the best way to detect whether a CPU has a 'hard lockup' problem
  304. * is to check it's local APIC timer IRQ counts. If they are not
  305. * changing then that CPU has some problem.
  306. *
  307. * as these watchdog NMI IRQs are generated on every CPU, we only
  308. * have to check the current processor.
  309. *
  310. * since NMIs don't listen to _any_ locks, we have to be extremely
  311. * careful not to rely on unsafe variables. The printk might lock
  312. * up though, so we have to break up any console locks first ...
  313. * [when there will be more tty-related locks, break them up here too!]
  314. */
  315. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  316. static DEFINE_PER_CPU(local_t, alert_counter);
  317. static DEFINE_PER_CPU(int, nmi_touch);
  318. void touch_nmi_watchdog(void)
  319. {
  320. if (nmi_watchdog_active()) {
  321. unsigned cpu;
  322. /*
  323. * Tell other CPUs to reset their alert counters. We cannot
  324. * do it ourselves because the alert count increase is not
  325. * atomic.
  326. */
  327. for_each_present_cpu(cpu) {
  328. if (per_cpu(nmi_touch, cpu) != 1)
  329. per_cpu(nmi_touch, cpu) = 1;
  330. }
  331. }
  332. /*
  333. * Tickle the softlockup detector too:
  334. */
  335. touch_softlockup_watchdog();
  336. }
  337. EXPORT_SYMBOL(touch_nmi_watchdog);
  338. notrace __kprobes int
  339. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  340. {
  341. /*
  342. * Since current_thread_info()-> is always on the stack, and we
  343. * always switch the stack NMI-atomically, it's safe to use
  344. * smp_processor_id().
  345. */
  346. unsigned int sum;
  347. int touched = 0;
  348. int cpu = smp_processor_id();
  349. int rc = 0;
  350. /* check for other users first */
  351. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  352. == NOTIFY_STOP) {
  353. rc = 1;
  354. touched = 1;
  355. }
  356. sum = get_timer_irqs(cpu);
  357. if (__get_cpu_var(nmi_touch)) {
  358. __get_cpu_var(nmi_touch) = 0;
  359. touched = 1;
  360. }
  361. if (cpu_isset(cpu, backtrace_mask)) {
  362. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  363. spin_lock(&lock);
  364. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  365. dump_stack();
  366. spin_unlock(&lock);
  367. cpu_clear(cpu, backtrace_mask);
  368. }
  369. /* Could check oops_in_progress here too, but it's safer not to */
  370. if (mce_in_progress())
  371. touched = 1;
  372. /* if the none of the timers isn't firing, this cpu isn't doing much */
  373. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  374. /*
  375. * Ayiee, looks like this CPU is stuck ...
  376. * wait a few IRQs (5 seconds) before doing the oops ...
  377. */
  378. local_inc(&__get_cpu_var(alert_counter));
  379. if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
  380. /*
  381. * die_nmi will return ONLY if NOTIFY_STOP happens..
  382. */
  383. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  384. regs, panic_on_timeout);
  385. } else {
  386. __get_cpu_var(last_irq_sum) = sum;
  387. local_set(&__get_cpu_var(alert_counter), 0);
  388. }
  389. /* see if the nmi watchdog went off */
  390. if (!__get_cpu_var(wd_enabled))
  391. return rc;
  392. switch (nmi_watchdog) {
  393. case NMI_LOCAL_APIC:
  394. rc |= lapic_wd_event(nmi_hz);
  395. break;
  396. case NMI_IO_APIC:
  397. /*
  398. * don't know how to accurately check for this.
  399. * just assume it was a watchdog timer interrupt
  400. * This matches the old behaviour.
  401. */
  402. rc = 1;
  403. break;
  404. }
  405. return rc;
  406. }
  407. #ifdef CONFIG_SYSCTL
  408. static void enable_ioapic_nmi_watchdog_single(void *unused)
  409. {
  410. __get_cpu_var(wd_enabled) = 1;
  411. atomic_inc(&nmi_active);
  412. __acpi_nmi_enable(NULL);
  413. }
  414. static void enable_ioapic_nmi_watchdog(void)
  415. {
  416. on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
  417. touch_nmi_watchdog();
  418. }
  419. static void disable_ioapic_nmi_watchdog(void)
  420. {
  421. on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
  422. }
  423. static int __init setup_unknown_nmi_panic(char *str)
  424. {
  425. unknown_nmi_panic = 1;
  426. return 1;
  427. }
  428. __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
  429. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  430. {
  431. unsigned char reason = get_nmi_reason();
  432. char buf[64];
  433. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  434. die_nmi(buf, regs, 1); /* Always panic here */
  435. return 0;
  436. }
  437. /*
  438. * proc handler for /proc/sys/kernel/nmi
  439. */
  440. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  441. void __user *buffer, size_t *length, loff_t *ppos)
  442. {
  443. int old_state;
  444. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  445. old_state = nmi_watchdog_enabled;
  446. proc_dointvec(table, write, file, buffer, length, ppos);
  447. if (!!old_state == !!nmi_watchdog_enabled)
  448. return 0;
  449. if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
  450. printk(KERN_WARNING
  451. "NMI watchdog is permanently disabled\n");
  452. return -EIO;
  453. }
  454. if (nmi_watchdog == NMI_LOCAL_APIC) {
  455. if (nmi_watchdog_enabled)
  456. enable_lapic_nmi_watchdog();
  457. else
  458. disable_lapic_nmi_watchdog();
  459. } else if (nmi_watchdog == NMI_IO_APIC) {
  460. if (nmi_watchdog_enabled)
  461. enable_ioapic_nmi_watchdog();
  462. else
  463. disable_ioapic_nmi_watchdog();
  464. } else {
  465. printk(KERN_WARNING
  466. "NMI watchdog doesn't know what hardware to touch\n");
  467. return -EIO;
  468. }
  469. return 0;
  470. }
  471. #endif /* CONFIG_SYSCTL */
  472. int do_nmi_callback(struct pt_regs *regs, int cpu)
  473. {
  474. #ifdef CONFIG_SYSCTL
  475. if (unknown_nmi_panic)
  476. return unknown_nmi_panic_callback(regs, cpu);
  477. #endif
  478. return 0;
  479. }
  480. void __trigger_all_cpu_backtrace(void)
  481. {
  482. int i;
  483. backtrace_mask = cpu_online_map;
  484. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  485. for (i = 0; i < 10 * 1000; i++) {
  486. if (cpus_empty(backtrace_mask))
  487. break;
  488. mdelay(1);
  489. }
  490. }