genx2apic_phys.c 4.2 KB

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  1. #include <linux/threads.h>
  2. #include <linux/cpumask.h>
  3. #include <linux/string.h>
  4. #include <linux/kernel.h>
  5. #include <linux/ctype.h>
  6. #include <linux/init.h>
  7. #include <linux/dmar.h>
  8. #include <asm/smp.h>
  9. #include <asm/ipi.h>
  10. #include <asm/genapic.h>
  11. static int x2apic_phys;
  12. static int set_x2apic_phys_mode(char *arg)
  13. {
  14. x2apic_phys = 1;
  15. return 0;
  16. }
  17. early_param("x2apic_phys", set_x2apic_phys_mode);
  18. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  19. {
  20. if (cpu_has_x2apic && x2apic_phys)
  21. return 1;
  22. return 0;
  23. }
  24. /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
  25. static const struct cpumask *x2apic_target_cpus(void)
  26. {
  27. return cpumask_of(0);
  28. }
  29. static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
  30. {
  31. cpumask_clear(retmask);
  32. cpumask_set_cpu(cpu, retmask);
  33. }
  34. static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  35. unsigned int dest)
  36. {
  37. unsigned long cfg;
  38. cfg = __prepare_ICR(0, vector, dest);
  39. /*
  40. * send the IPI.
  41. */
  42. x2apic_icr_write(cfg, apicid);
  43. }
  44. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  45. {
  46. unsigned long flags;
  47. unsigned long query_cpu;
  48. local_irq_save(flags);
  49. for_each_cpu(query_cpu, mask) {
  50. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  51. vector, APIC_DEST_PHYSICAL);
  52. }
  53. local_irq_restore(flags);
  54. }
  55. static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
  56. int vector)
  57. {
  58. unsigned long flags;
  59. unsigned long query_cpu;
  60. unsigned long this_cpu = smp_processor_id();
  61. local_irq_save(flags);
  62. for_each_cpu(query_cpu, mask) {
  63. if (query_cpu != this_cpu)
  64. __x2apic_send_IPI_dest(
  65. per_cpu(x86_cpu_to_apicid, query_cpu),
  66. vector, APIC_DEST_PHYSICAL);
  67. }
  68. local_irq_restore(flags);
  69. }
  70. static void x2apic_send_IPI_allbutself(int vector)
  71. {
  72. unsigned long flags;
  73. unsigned long query_cpu;
  74. unsigned long this_cpu = smp_processor_id();
  75. local_irq_save(flags);
  76. for_each_online_cpu(query_cpu)
  77. if (query_cpu != this_cpu)
  78. __x2apic_send_IPI_dest(
  79. per_cpu(x86_cpu_to_apicid, query_cpu),
  80. vector, APIC_DEST_PHYSICAL);
  81. local_irq_restore(flags);
  82. }
  83. static void x2apic_send_IPI_all(int vector)
  84. {
  85. x2apic_send_IPI_mask(cpu_online_mask, vector);
  86. }
  87. static int x2apic_apic_id_registered(void)
  88. {
  89. return 1;
  90. }
  91. static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
  92. {
  93. int cpu;
  94. /*
  95. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  96. * May as well be the first.
  97. */
  98. cpu = cpumask_first(cpumask);
  99. if ((unsigned)cpu < nr_cpu_ids)
  100. return per_cpu(x86_cpu_to_apicid, cpu);
  101. else
  102. return BAD_APICID;
  103. }
  104. static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  105. const struct cpumask *andmask)
  106. {
  107. int cpu;
  108. /*
  109. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  110. * May as well be the first.
  111. */
  112. for_each_cpu_and(cpu, cpumask, andmask)
  113. if (cpumask_test_cpu(cpu, cpu_online_mask))
  114. break;
  115. if (cpu < nr_cpu_ids)
  116. return per_cpu(x86_cpu_to_apicid, cpu);
  117. return BAD_APICID;
  118. }
  119. static unsigned int get_apic_id(unsigned long x)
  120. {
  121. unsigned int id;
  122. id = x;
  123. return id;
  124. }
  125. static unsigned long set_apic_id(unsigned int id)
  126. {
  127. unsigned long x;
  128. x = id;
  129. return x;
  130. }
  131. static unsigned int phys_pkg_id(int index_msb)
  132. {
  133. return current_cpu_data.initial_apicid >> index_msb;
  134. }
  135. static void x2apic_send_IPI_self(int vector)
  136. {
  137. apic_write(APIC_SELF_IPI, vector);
  138. }
  139. static void init_x2apic_ldr(void)
  140. {
  141. return;
  142. }
  143. struct genapic apic_x2apic_phys = {
  144. .name = "physical x2apic",
  145. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  146. .int_delivery_mode = dest_Fixed,
  147. .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
  148. .target_cpus = x2apic_target_cpus,
  149. .vector_allocation_domain = x2apic_vector_allocation_domain,
  150. .apic_id_registered = x2apic_apic_id_registered,
  151. .init_apic_ldr = init_x2apic_ldr,
  152. .send_IPI_all = x2apic_send_IPI_all,
  153. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  154. .send_IPI_mask = x2apic_send_IPI_mask,
  155. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  156. .send_IPI_self = x2apic_send_IPI_self,
  157. .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
  158. .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
  159. .phys_pkg_id = phys_pkg_id,
  160. .get_apic_id = get_apic_id,
  161. .set_apic_id = set_apic_id,
  162. .apic_id_mask = (0xFFFFFFFFu),
  163. };