genx2apic_cluster.c 4.5 KB

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  1. #include <linux/threads.h>
  2. #include <linux/cpumask.h>
  3. #include <linux/string.h>
  4. #include <linux/kernel.h>
  5. #include <linux/ctype.h>
  6. #include <linux/init.h>
  7. #include <linux/dmar.h>
  8. #include <asm/smp.h>
  9. #include <asm/ipi.h>
  10. #include <asm/genapic.h>
  11. DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
  12. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  13. {
  14. if (cpu_has_x2apic)
  15. return 1;
  16. return 0;
  17. }
  18. /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
  19. static const struct cpumask *x2apic_target_cpus(void)
  20. {
  21. return cpumask_of(0);
  22. }
  23. /*
  24. * for now each logical cpu is in its own vector allocation domain.
  25. */
  26. static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
  27. {
  28. cpumask_clear(retmask);
  29. cpumask_set_cpu(cpu, retmask);
  30. }
  31. static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  32. unsigned int dest)
  33. {
  34. unsigned long cfg;
  35. cfg = __prepare_ICR(0, vector, dest);
  36. /*
  37. * send the IPI.
  38. */
  39. x2apic_icr_write(cfg, apicid);
  40. }
  41. /*
  42. * for now, we send the IPI's one by one in the cpumask.
  43. * TBD: Based on the cpu mask, we can send the IPI's to the cluster group
  44. * at once. We have 16 cpu's in a cluster. This will minimize IPI register
  45. * writes.
  46. */
  47. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  48. {
  49. unsigned long flags;
  50. unsigned long query_cpu;
  51. local_irq_save(flags);
  52. for_each_cpu(query_cpu, mask)
  53. __x2apic_send_IPI_dest(
  54. per_cpu(x86_cpu_to_logical_apicid, query_cpu),
  55. vector, APIC_DEST_LOGICAL);
  56. local_irq_restore(flags);
  57. }
  58. static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
  59. int vector)
  60. {
  61. unsigned long flags;
  62. unsigned long query_cpu;
  63. unsigned long this_cpu = smp_processor_id();
  64. local_irq_save(flags);
  65. for_each_cpu(query_cpu, mask)
  66. if (query_cpu != this_cpu)
  67. __x2apic_send_IPI_dest(
  68. per_cpu(x86_cpu_to_logical_apicid, query_cpu),
  69. vector, APIC_DEST_LOGICAL);
  70. local_irq_restore(flags);
  71. }
  72. static void x2apic_send_IPI_allbutself(int vector)
  73. {
  74. unsigned long flags;
  75. unsigned long query_cpu;
  76. unsigned long this_cpu = smp_processor_id();
  77. local_irq_save(flags);
  78. for_each_online_cpu(query_cpu)
  79. if (query_cpu != this_cpu)
  80. __x2apic_send_IPI_dest(
  81. per_cpu(x86_cpu_to_logical_apicid, query_cpu),
  82. vector, APIC_DEST_LOGICAL);
  83. local_irq_restore(flags);
  84. }
  85. static void x2apic_send_IPI_all(int vector)
  86. {
  87. x2apic_send_IPI_mask(cpu_online_mask, vector);
  88. }
  89. static int x2apic_apic_id_registered(void)
  90. {
  91. return 1;
  92. }
  93. static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
  94. {
  95. int cpu;
  96. /*
  97. * We're using fixed IRQ delivery, can only return one logical APIC ID.
  98. * May as well be the first.
  99. */
  100. cpu = cpumask_first(cpumask);
  101. if ((unsigned)cpu < nr_cpu_ids)
  102. return per_cpu(x86_cpu_to_logical_apicid, cpu);
  103. else
  104. return BAD_APICID;
  105. }
  106. static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  107. const struct cpumask *andmask)
  108. {
  109. int cpu;
  110. /*
  111. * We're using fixed IRQ delivery, can only return one logical APIC ID.
  112. * May as well be the first.
  113. */
  114. for_each_cpu_and(cpu, cpumask, andmask)
  115. if (cpumask_test_cpu(cpu, cpu_online_mask))
  116. break;
  117. if (cpu < nr_cpu_ids)
  118. return per_cpu(x86_cpu_to_logical_apicid, cpu);
  119. return BAD_APICID;
  120. }
  121. static unsigned int get_apic_id(unsigned long x)
  122. {
  123. unsigned int id;
  124. id = x;
  125. return id;
  126. }
  127. static unsigned long set_apic_id(unsigned int id)
  128. {
  129. unsigned long x;
  130. x = id;
  131. return x;
  132. }
  133. static unsigned int phys_pkg_id(int index_msb)
  134. {
  135. return current_cpu_data.initial_apicid >> index_msb;
  136. }
  137. static void x2apic_send_IPI_self(int vector)
  138. {
  139. apic_write(APIC_SELF_IPI, vector);
  140. }
  141. static void init_x2apic_ldr(void)
  142. {
  143. int cpu = smp_processor_id();
  144. per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
  145. return;
  146. }
  147. struct genapic apic_x2apic_cluster = {
  148. .name = "cluster x2apic",
  149. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  150. .int_delivery_mode = dest_LowestPrio,
  151. .int_dest_mode = (APIC_DEST_LOGICAL != 0),
  152. .target_cpus = x2apic_target_cpus,
  153. .vector_allocation_domain = x2apic_vector_allocation_domain,
  154. .apic_id_registered = x2apic_apic_id_registered,
  155. .init_apic_ldr = init_x2apic_ldr,
  156. .send_IPI_all = x2apic_send_IPI_all,
  157. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  158. .send_IPI_mask = x2apic_send_IPI_mask,
  159. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  160. .send_IPI_self = x2apic_send_IPI_self,
  161. .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
  162. .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
  163. .phys_pkg_id = phys_pkg_id,
  164. .get_apic_id = get_apic_id,
  165. .set_apic_id = set_apic_id,
  166. .apic_id_mask = (0xFFFFFFFFu),
  167. };