fsl_soc.c 13 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. static u32 sysfreq = -1;
  67. u32 fsl_get_sys_freq(void)
  68. {
  69. struct device_node *soc;
  70. const u32 *prop;
  71. int size;
  72. if (sysfreq != -1)
  73. return sysfreq;
  74. soc = of_find_node_by_type(NULL, "soc");
  75. if (!soc)
  76. return -1;
  77. prop = of_get_property(soc, "clock-frequency", &size);
  78. if (!prop || size != sizeof(*prop) || *prop == 0)
  79. prop = of_get_property(soc, "bus-frequency", &size);
  80. if (prop && size == sizeof(*prop))
  81. sysfreq = *prop;
  82. of_node_put(soc);
  83. return sysfreq;
  84. }
  85. EXPORT_SYMBOL(fsl_get_sys_freq);
  86. #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
  87. static u32 brgfreq = -1;
  88. u32 get_brgfreq(void)
  89. {
  90. struct device_node *node;
  91. const unsigned int *prop;
  92. int size;
  93. if (brgfreq != -1)
  94. return brgfreq;
  95. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  96. if (node) {
  97. prop = of_get_property(node, "clock-frequency", &size);
  98. if (prop && size == 4)
  99. brgfreq = *prop;
  100. of_node_put(node);
  101. return brgfreq;
  102. }
  103. /* Legacy device binding -- will go away when no users are left. */
  104. node = of_find_node_by_type(NULL, "cpm");
  105. if (!node)
  106. node = of_find_compatible_node(NULL, NULL, "fsl,qe");
  107. if (!node)
  108. node = of_find_node_by_type(NULL, "qe");
  109. if (node) {
  110. prop = of_get_property(node, "brg-frequency", &size);
  111. if (prop && size == 4)
  112. brgfreq = *prop;
  113. if (brgfreq == -1 || brgfreq == 0) {
  114. prop = of_get_property(node, "bus-frequency", &size);
  115. if (prop && size == 4)
  116. brgfreq = *prop / 2;
  117. }
  118. of_node_put(node);
  119. }
  120. return brgfreq;
  121. }
  122. EXPORT_SYMBOL(get_brgfreq);
  123. static u32 fs_baudrate = -1;
  124. u32 get_baudrate(void)
  125. {
  126. struct device_node *node;
  127. if (fs_baudrate != -1)
  128. return fs_baudrate;
  129. node = of_find_node_by_type(NULL, "serial");
  130. if (node) {
  131. int size;
  132. const unsigned int *prop = of_get_property(node,
  133. "current-speed", &size);
  134. if (prop)
  135. fs_baudrate = *prop;
  136. of_node_put(node);
  137. }
  138. return fs_baudrate;
  139. }
  140. EXPORT_SYMBOL(get_baudrate);
  141. #endif /* CONFIG_CPM2 */
  142. #ifdef CONFIG_FIXED_PHY
  143. static int __init of_add_fixed_phys(void)
  144. {
  145. int ret;
  146. struct device_node *np;
  147. u32 *fixed_link;
  148. struct fixed_phy_status status = {};
  149. for_each_node_by_name(np, "ethernet") {
  150. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  151. if (!fixed_link)
  152. continue;
  153. status.link = 1;
  154. status.duplex = fixed_link[1];
  155. status.speed = fixed_link[2];
  156. status.pause = fixed_link[3];
  157. status.asym_pause = fixed_link[4];
  158. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  159. if (ret) {
  160. of_node_put(np);
  161. return ret;
  162. }
  163. }
  164. return 0;
  165. }
  166. arch_initcall(of_add_fixed_phys);
  167. #endif /* CONFIG_FIXED_PHY */
  168. #ifdef CONFIG_PPC_83xx
  169. static int __init mpc83xx_wdt_init(void)
  170. {
  171. struct resource r;
  172. struct device_node *np;
  173. struct platform_device *dev;
  174. u32 freq = fsl_get_sys_freq();
  175. int ret;
  176. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  177. if (!np) {
  178. ret = -ENODEV;
  179. goto nodev;
  180. }
  181. memset(&r, 0, sizeof(r));
  182. ret = of_address_to_resource(np, 0, &r);
  183. if (ret)
  184. goto err;
  185. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  186. if (IS_ERR(dev)) {
  187. ret = PTR_ERR(dev);
  188. goto err;
  189. }
  190. ret = platform_device_add_data(dev, &freq, sizeof(freq));
  191. if (ret)
  192. goto unreg;
  193. of_node_put(np);
  194. return 0;
  195. unreg:
  196. platform_device_unregister(dev);
  197. err:
  198. of_node_put(np);
  199. nodev:
  200. return ret;
  201. }
  202. arch_initcall(mpc83xx_wdt_init);
  203. #endif
  204. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  205. {
  206. if (!phy_type)
  207. return FSL_USB2_PHY_NONE;
  208. if (!strcasecmp(phy_type, "ulpi"))
  209. return FSL_USB2_PHY_ULPI;
  210. if (!strcasecmp(phy_type, "utmi"))
  211. return FSL_USB2_PHY_UTMI;
  212. if (!strcasecmp(phy_type, "utmi_wide"))
  213. return FSL_USB2_PHY_UTMI_WIDE;
  214. if (!strcasecmp(phy_type, "serial"))
  215. return FSL_USB2_PHY_SERIAL;
  216. return FSL_USB2_PHY_NONE;
  217. }
  218. static int __init fsl_usb_of_init(void)
  219. {
  220. struct device_node *np;
  221. unsigned int i = 0;
  222. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  223. *usb_dev_dr_client = NULL;
  224. int ret;
  225. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  226. struct resource r[2];
  227. struct fsl_usb2_platform_data usb_data;
  228. const unsigned char *prop = NULL;
  229. memset(&r, 0, sizeof(r));
  230. memset(&usb_data, 0, sizeof(usb_data));
  231. ret = of_address_to_resource(np, 0, &r[0]);
  232. if (ret)
  233. goto err;
  234. of_irq_to_resource(np, 0, &r[1]);
  235. usb_dev_mph =
  236. platform_device_register_simple("fsl-ehci", i, r, 2);
  237. if (IS_ERR(usb_dev_mph)) {
  238. ret = PTR_ERR(usb_dev_mph);
  239. goto err;
  240. }
  241. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  242. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  243. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  244. prop = of_get_property(np, "port0", NULL);
  245. if (prop)
  246. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  247. prop = of_get_property(np, "port1", NULL);
  248. if (prop)
  249. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  250. prop = of_get_property(np, "phy_type", NULL);
  251. usb_data.phy_mode = determine_usb_phy(prop);
  252. ret =
  253. platform_device_add_data(usb_dev_mph, &usb_data,
  254. sizeof(struct
  255. fsl_usb2_platform_data));
  256. if (ret)
  257. goto unreg_mph;
  258. i++;
  259. }
  260. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  261. struct resource r[2];
  262. struct fsl_usb2_platform_data usb_data;
  263. const unsigned char *prop = NULL;
  264. memset(&r, 0, sizeof(r));
  265. memset(&usb_data, 0, sizeof(usb_data));
  266. ret = of_address_to_resource(np, 0, &r[0]);
  267. if (ret)
  268. goto unreg_mph;
  269. of_irq_to_resource(np, 0, &r[1]);
  270. prop = of_get_property(np, "dr_mode", NULL);
  271. if (!prop || !strcmp(prop, "host")) {
  272. usb_data.operating_mode = FSL_USB2_DR_HOST;
  273. usb_dev_dr_host = platform_device_register_simple(
  274. "fsl-ehci", i, r, 2);
  275. if (IS_ERR(usb_dev_dr_host)) {
  276. ret = PTR_ERR(usb_dev_dr_host);
  277. goto err;
  278. }
  279. } else if (prop && !strcmp(prop, "peripheral")) {
  280. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  281. usb_dev_dr_client = platform_device_register_simple(
  282. "fsl-usb2-udc", i, r, 2);
  283. if (IS_ERR(usb_dev_dr_client)) {
  284. ret = PTR_ERR(usb_dev_dr_client);
  285. goto err;
  286. }
  287. } else if (prop && !strcmp(prop, "otg")) {
  288. usb_data.operating_mode = FSL_USB2_DR_OTG;
  289. usb_dev_dr_host = platform_device_register_simple(
  290. "fsl-ehci", i, r, 2);
  291. if (IS_ERR(usb_dev_dr_host)) {
  292. ret = PTR_ERR(usb_dev_dr_host);
  293. goto err;
  294. }
  295. usb_dev_dr_client = platform_device_register_simple(
  296. "fsl-usb2-udc", i, r, 2);
  297. if (IS_ERR(usb_dev_dr_client)) {
  298. ret = PTR_ERR(usb_dev_dr_client);
  299. goto err;
  300. }
  301. } else {
  302. ret = -EINVAL;
  303. goto err;
  304. }
  305. prop = of_get_property(np, "phy_type", NULL);
  306. usb_data.phy_mode = determine_usb_phy(prop);
  307. if (usb_dev_dr_host) {
  308. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  309. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  310. dev.coherent_dma_mask;
  311. if ((ret = platform_device_add_data(usb_dev_dr_host,
  312. &usb_data, sizeof(struct
  313. fsl_usb2_platform_data))))
  314. goto unreg_dr;
  315. }
  316. if (usb_dev_dr_client) {
  317. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  318. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  319. dev.coherent_dma_mask;
  320. if ((ret = platform_device_add_data(usb_dev_dr_client,
  321. &usb_data, sizeof(struct
  322. fsl_usb2_platform_data))))
  323. goto unreg_dr;
  324. }
  325. i++;
  326. }
  327. return 0;
  328. unreg_dr:
  329. if (usb_dev_dr_host)
  330. platform_device_unregister(usb_dev_dr_host);
  331. if (usb_dev_dr_client)
  332. platform_device_unregister(usb_dev_dr_client);
  333. unreg_mph:
  334. if (usb_dev_mph)
  335. platform_device_unregister(usb_dev_mph);
  336. err:
  337. return ret;
  338. }
  339. arch_initcall(fsl_usb_of_init);
  340. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  341. struct spi_board_info *board_infos,
  342. unsigned int num_board_infos,
  343. void (*activate_cs)(u8 cs, u8 polarity),
  344. void (*deactivate_cs)(u8 cs, u8 polarity))
  345. {
  346. struct device_node *np;
  347. unsigned int i = 0;
  348. for_each_compatible_node(np, type, compatible) {
  349. int ret;
  350. unsigned int j;
  351. const void *prop;
  352. struct resource res[2];
  353. struct platform_device *pdev;
  354. struct fsl_spi_platform_data pdata = {
  355. .activate_cs = activate_cs,
  356. .deactivate_cs = deactivate_cs,
  357. };
  358. memset(res, 0, sizeof(res));
  359. pdata.sysclk = sysclk;
  360. prop = of_get_property(np, "reg", NULL);
  361. if (!prop)
  362. goto err;
  363. pdata.bus_num = *(u32 *)prop;
  364. prop = of_get_property(np, "cell-index", NULL);
  365. if (prop)
  366. i = *(u32 *)prop;
  367. prop = of_get_property(np, "mode", NULL);
  368. if (prop && !strcmp(prop, "cpu-qe"))
  369. pdata.qe_mode = 1;
  370. for (j = 0; j < num_board_infos; j++) {
  371. if (board_infos[j].bus_num == pdata.bus_num)
  372. pdata.max_chipselect++;
  373. }
  374. if (!pdata.max_chipselect)
  375. continue;
  376. ret = of_address_to_resource(np, 0, &res[0]);
  377. if (ret)
  378. goto err;
  379. ret = of_irq_to_resource(np, 0, &res[1]);
  380. if (ret == NO_IRQ)
  381. goto err;
  382. pdev = platform_device_alloc("mpc83xx_spi", i);
  383. if (!pdev)
  384. goto err;
  385. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  386. if (ret)
  387. goto unreg;
  388. ret = platform_device_add_resources(pdev, res,
  389. ARRAY_SIZE(res));
  390. if (ret)
  391. goto unreg;
  392. ret = platform_device_add(pdev);
  393. if (ret)
  394. goto unreg;
  395. goto next;
  396. unreg:
  397. platform_device_del(pdev);
  398. err:
  399. pr_err("%s: registration failed\n", np->full_name);
  400. next:
  401. i++;
  402. }
  403. return i;
  404. }
  405. int __init fsl_spi_init(struct spi_board_info *board_infos,
  406. unsigned int num_board_infos,
  407. void (*activate_cs)(u8 cs, u8 polarity),
  408. void (*deactivate_cs)(u8 cs, u8 polarity))
  409. {
  410. u32 sysclk = -1;
  411. int ret;
  412. #ifdef CONFIG_QUICC_ENGINE
  413. /* SPI controller is either clocked from QE or SoC clock */
  414. sysclk = get_brgfreq();
  415. #endif
  416. if (sysclk == -1) {
  417. sysclk = fsl_get_sys_freq();
  418. if (sysclk == -1)
  419. return -ENODEV;
  420. }
  421. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  422. num_board_infos, activate_cs, deactivate_cs);
  423. if (!ret)
  424. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  425. num_board_infos, activate_cs, deactivate_cs);
  426. return spi_register_board_info(board_infos, num_board_infos);
  427. }
  428. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  429. static __be32 __iomem *rstcr;
  430. static int __init setup_rstcr(void)
  431. {
  432. struct device_node *np;
  433. np = of_find_node_by_name(NULL, "global-utilities");
  434. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  435. const u32 *prop = of_get_property(np, "reg", NULL);
  436. if (prop) {
  437. /* map reset control register
  438. * 0xE00B0 is offset of reset control register
  439. */
  440. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  441. if (!rstcr)
  442. printk (KERN_EMERG "Error: reset control "
  443. "register not mapped!\n");
  444. }
  445. } else
  446. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  447. if (np)
  448. of_node_put(np);
  449. return 0;
  450. }
  451. arch_initcall(setup_rstcr);
  452. void fsl_rstcr_restart(char *cmd)
  453. {
  454. local_irq_disable();
  455. if (rstcr)
  456. /* set reset control register */
  457. out_be32(rstcr, 0x2); /* HRESET_REQ */
  458. while (1) ;
  459. }
  460. #endif
  461. #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
  462. struct platform_diu_data_ops diu_ops;
  463. EXPORT_SYMBOL(diu_ops);
  464. #endif