mpc85xx_ds.c 5.7 KB

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  1. /*
  2. * MPC85xx DS Board Setup
  3. *
  4. * Author Xianghua Xiao (x.xiao@freescale.com)
  5. * Roy Zang <tie-fei.zang@freescale.com>
  6. * - Add PCI/PCI Exprees support
  7. * Copyright 2007 Freescale Semiconductor Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/kdev_t.h>
  18. #include <linux/delay.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/of_platform.h>
  22. #include <asm/system.h>
  23. #include <asm/time.h>
  24. #include <asm/machdep.h>
  25. #include <asm/pci-bridge.h>
  26. #include <mm/mmu_decl.h>
  27. #include <asm/prom.h>
  28. #include <asm/udbg.h>
  29. #include <asm/mpic.h>
  30. #include <asm/i8259.h>
  31. #include <sysdev/fsl_soc.h>
  32. #include <sysdev/fsl_pci.h>
  33. #undef DEBUG
  34. #ifdef DEBUG
  35. #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  36. #else
  37. #define DBG(fmt, args...)
  38. #endif
  39. #ifdef CONFIG_PPC_I8259
  40. static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  41. {
  42. unsigned int cascade_irq = i8259_irq();
  43. if (cascade_irq != NO_IRQ) {
  44. generic_handle_irq(cascade_irq);
  45. }
  46. desc->chip->eoi(irq);
  47. }
  48. #endif /* CONFIG_PPC_I8259 */
  49. void __init mpc85xx_ds_pic_init(void)
  50. {
  51. struct mpic *mpic;
  52. struct resource r;
  53. struct device_node *np;
  54. #ifdef CONFIG_PPC_I8259
  55. struct device_node *cascade_node = NULL;
  56. int cascade_irq;
  57. #endif
  58. unsigned long root = of_get_flat_dt_root();
  59. np = of_find_node_by_type(NULL, "open-pic");
  60. if (np == NULL) {
  61. printk(KERN_ERR "Could not find open-pic node\n");
  62. return;
  63. }
  64. if (of_address_to_resource(np, 0, &r)) {
  65. printk(KERN_ERR "Failed to map mpic register space\n");
  66. of_node_put(np);
  67. return;
  68. }
  69. if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
  70. mpic = mpic_alloc(np, r.start,
  71. MPIC_PRIMARY |
  72. MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
  73. 0, 256, " OpenPIC ");
  74. } else {
  75. mpic = mpic_alloc(np, r.start,
  76. MPIC_PRIMARY | MPIC_WANTS_RESET |
  77. MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
  78. MPIC_SINGLE_DEST_CPU,
  79. 0, 256, " OpenPIC ");
  80. }
  81. BUG_ON(mpic == NULL);
  82. of_node_put(np);
  83. mpic_init(mpic);
  84. #ifdef CONFIG_PPC_I8259
  85. /* Initialize the i8259 controller */
  86. for_each_node_by_type(np, "interrupt-controller")
  87. if (of_device_is_compatible(np, "chrp,iic")) {
  88. cascade_node = np;
  89. break;
  90. }
  91. if (cascade_node == NULL) {
  92. printk(KERN_DEBUG "Could not find i8259 PIC\n");
  93. return;
  94. }
  95. cascade_irq = irq_of_parse_and_map(cascade_node, 0);
  96. if (cascade_irq == NO_IRQ) {
  97. printk(KERN_ERR "Failed to map cascade interrupt\n");
  98. return;
  99. }
  100. DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
  101. i8259_init(cascade_node, 0);
  102. of_node_put(cascade_node);
  103. set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
  104. #endif /* CONFIG_PPC_I8259 */
  105. }
  106. #ifdef CONFIG_PCI
  107. static int primary_phb_addr;
  108. extern int uli_exclude_device(struct pci_controller *hose,
  109. u_char bus, u_char devfn);
  110. static int mpc85xx_exclude_device(struct pci_controller *hose,
  111. u_char bus, u_char devfn)
  112. {
  113. struct device_node* node;
  114. struct resource rsrc;
  115. node = hose->dn;
  116. of_address_to_resource(node, 0, &rsrc);
  117. if ((rsrc.start & 0xfffff) == primary_phb_addr) {
  118. return uli_exclude_device(hose, bus, devfn);
  119. }
  120. return PCIBIOS_SUCCESSFUL;
  121. }
  122. #endif /* CONFIG_PCI */
  123. /*
  124. * Setup the architecture
  125. */
  126. static void __init mpc85xx_ds_setup_arch(void)
  127. {
  128. #ifdef CONFIG_PCI
  129. struct device_node *np;
  130. #endif
  131. if (ppc_md.progress)
  132. ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
  133. #ifdef CONFIG_PCI
  134. for_each_node_by_type(np, "pci") {
  135. if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
  136. of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
  137. struct resource rsrc;
  138. of_address_to_resource(np, 0, &rsrc);
  139. if ((rsrc.start & 0xfffff) == primary_phb_addr)
  140. fsl_add_bridge(np, 1);
  141. else
  142. fsl_add_bridge(np, 0);
  143. }
  144. }
  145. ppc_md.pci_exclude_device = mpc85xx_exclude_device;
  146. #endif
  147. printk("MPC85xx DS board from Freescale Semiconductor\n");
  148. }
  149. /*
  150. * Called very early, device-tree isn't unflattened
  151. */
  152. static int __init mpc8544_ds_probe(void)
  153. {
  154. unsigned long root = of_get_flat_dt_root();
  155. if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
  156. #ifdef CONFIG_PCI
  157. primary_phb_addr = 0xb000;
  158. #endif
  159. return 1;
  160. } else {
  161. return 0;
  162. }
  163. }
  164. static struct of_device_id __initdata mpc85xxds_ids[] = {
  165. { .type = "soc", },
  166. { .compatible = "soc", },
  167. { .compatible = "simple-bus", },
  168. {},
  169. };
  170. static int __init mpc85xxds_publish_devices(void)
  171. {
  172. return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
  173. }
  174. machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
  175. machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
  176. /*
  177. * Called very early, device-tree isn't unflattened
  178. */
  179. static int __init mpc8572_ds_probe(void)
  180. {
  181. unsigned long root = of_get_flat_dt_root();
  182. if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
  183. #ifdef CONFIG_PCI
  184. primary_phb_addr = 0x8000;
  185. #endif
  186. return 1;
  187. } else {
  188. return 0;
  189. }
  190. }
  191. define_machine(mpc8544_ds) {
  192. .name = "MPC8544 DS",
  193. .probe = mpc8544_ds_probe,
  194. .setup_arch = mpc85xx_ds_setup_arch,
  195. .init_IRQ = mpc85xx_ds_pic_init,
  196. #ifdef CONFIG_PCI
  197. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  198. #endif
  199. .get_irq = mpic_get_irq,
  200. .restart = fsl_rstcr_restart,
  201. .calibrate_decr = generic_calibrate_decr,
  202. .progress = udbg_progress,
  203. };
  204. define_machine(mpc8572_ds) {
  205. .name = "MPC8572 DS",
  206. .probe = mpc8572_ds_probe,
  207. .setup_arch = mpc85xx_ds_setup_arch,
  208. .init_IRQ = mpc85xx_ds_pic_init,
  209. #ifdef CONFIG_PCI
  210. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  211. #endif
  212. .get_irq = mpic_get_irq,
  213. .restart = fsl_rstcr_restart,
  214. .calibrate_decr = generic_calibrate_decr,
  215. .progress = udbg_progress,
  216. };