cputable.c 55 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. struct cpu_spec* cur_cpu_spec = NULL;
  22. EXPORT_SYMBOL(cur_cpu_spec);
  23. /* The platform string corresponding to the real PVR */
  24. const char *powerpc_base_platform;
  25. /* NOTE:
  26. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  27. * the responsibility of the appropriate CPU save/restore functions to
  28. * eventually copy these settings over. Those save/restore aren't yet
  29. * part of the cputable though. That has to be fixed for both ppc32
  30. * and ppc64
  31. */
  32. #ifdef CONFIG_PPC32
  33. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  46. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  47. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  48. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  49. #endif /* CONFIG_PPC32 */
  50. #ifdef CONFIG_PPC64
  51. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  53. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  54. extern void __restore_cpu_pa6t(void);
  55. extern void __restore_cpu_ppc970(void);
  56. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  57. extern void __restore_cpu_power7(void);
  58. #endif /* CONFIG_PPC64 */
  59. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  60. * ones as well...
  61. */
  62. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  63. PPC_FEATURE_HAS_MMU)
  64. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  65. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  66. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  67. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  68. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  69. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  70. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  71. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  72. PPC_FEATURE_TRUE_LE | \
  73. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  74. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  75. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  76. PPC_FEATURE_TRUE_LE | \
  77. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  78. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  79. PPC_FEATURE_TRUE_LE | \
  80. PPC_FEATURE_HAS_ALTIVEC_COMP)
  81. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  82. PPC_FEATURE_BOOKE)
  83. static struct cpu_spec __initdata cpu_specs[] = {
  84. #ifdef CONFIG_PPC64
  85. { /* Power3 */
  86. .pvr_mask = 0xffff0000,
  87. .pvr_value = 0x00400000,
  88. .cpu_name = "POWER3 (630)",
  89. .cpu_features = CPU_FTRS_POWER3,
  90. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  91. .mmu_features = MMU_FTR_HPTE_TABLE,
  92. .icache_bsize = 128,
  93. .dcache_bsize = 128,
  94. .num_pmcs = 8,
  95. .pmc_type = PPC_PMC_IBM,
  96. .oprofile_cpu_type = "ppc64/power3",
  97. .oprofile_type = PPC_OPROFILE_RS64,
  98. .machine_check = machine_check_generic,
  99. .platform = "power3",
  100. },
  101. { /* Power3+ */
  102. .pvr_mask = 0xffff0000,
  103. .pvr_value = 0x00410000,
  104. .cpu_name = "POWER3 (630+)",
  105. .cpu_features = CPU_FTRS_POWER3,
  106. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  107. .mmu_features = MMU_FTR_HPTE_TABLE,
  108. .icache_bsize = 128,
  109. .dcache_bsize = 128,
  110. .num_pmcs = 8,
  111. .pmc_type = PPC_PMC_IBM,
  112. .oprofile_cpu_type = "ppc64/power3",
  113. .oprofile_type = PPC_OPROFILE_RS64,
  114. .machine_check = machine_check_generic,
  115. .platform = "power3",
  116. },
  117. { /* Northstar */
  118. .pvr_mask = 0xffff0000,
  119. .pvr_value = 0x00330000,
  120. .cpu_name = "RS64-II (northstar)",
  121. .cpu_features = CPU_FTRS_RS64,
  122. .cpu_user_features = COMMON_USER_PPC64,
  123. .mmu_features = MMU_FTR_HPTE_TABLE,
  124. .icache_bsize = 128,
  125. .dcache_bsize = 128,
  126. .num_pmcs = 8,
  127. .pmc_type = PPC_PMC_IBM,
  128. .oprofile_cpu_type = "ppc64/rs64",
  129. .oprofile_type = PPC_OPROFILE_RS64,
  130. .machine_check = machine_check_generic,
  131. .platform = "rs64",
  132. },
  133. { /* Pulsar */
  134. .pvr_mask = 0xffff0000,
  135. .pvr_value = 0x00340000,
  136. .cpu_name = "RS64-III (pulsar)",
  137. .cpu_features = CPU_FTRS_RS64,
  138. .cpu_user_features = COMMON_USER_PPC64,
  139. .mmu_features = MMU_FTR_HPTE_TABLE,
  140. .icache_bsize = 128,
  141. .dcache_bsize = 128,
  142. .num_pmcs = 8,
  143. .pmc_type = PPC_PMC_IBM,
  144. .oprofile_cpu_type = "ppc64/rs64",
  145. .oprofile_type = PPC_OPROFILE_RS64,
  146. .machine_check = machine_check_generic,
  147. .platform = "rs64",
  148. },
  149. { /* I-star */
  150. .pvr_mask = 0xffff0000,
  151. .pvr_value = 0x00360000,
  152. .cpu_name = "RS64-III (icestar)",
  153. .cpu_features = CPU_FTRS_RS64,
  154. .cpu_user_features = COMMON_USER_PPC64,
  155. .mmu_features = MMU_FTR_HPTE_TABLE,
  156. .icache_bsize = 128,
  157. .dcache_bsize = 128,
  158. .num_pmcs = 8,
  159. .pmc_type = PPC_PMC_IBM,
  160. .oprofile_cpu_type = "ppc64/rs64",
  161. .oprofile_type = PPC_OPROFILE_RS64,
  162. .machine_check = machine_check_generic,
  163. .platform = "rs64",
  164. },
  165. { /* S-star */
  166. .pvr_mask = 0xffff0000,
  167. .pvr_value = 0x00370000,
  168. .cpu_name = "RS64-IV (sstar)",
  169. .cpu_features = CPU_FTRS_RS64,
  170. .cpu_user_features = COMMON_USER_PPC64,
  171. .mmu_features = MMU_FTR_HPTE_TABLE,
  172. .icache_bsize = 128,
  173. .dcache_bsize = 128,
  174. .num_pmcs = 8,
  175. .pmc_type = PPC_PMC_IBM,
  176. .oprofile_cpu_type = "ppc64/rs64",
  177. .oprofile_type = PPC_OPROFILE_RS64,
  178. .machine_check = machine_check_generic,
  179. .platform = "rs64",
  180. },
  181. { /* Power4 */
  182. .pvr_mask = 0xffff0000,
  183. .pvr_value = 0x00350000,
  184. .cpu_name = "POWER4 (gp)",
  185. .cpu_features = CPU_FTRS_POWER4,
  186. .cpu_user_features = COMMON_USER_POWER4,
  187. .mmu_features = MMU_FTR_HPTE_TABLE,
  188. .icache_bsize = 128,
  189. .dcache_bsize = 128,
  190. .num_pmcs = 8,
  191. .pmc_type = PPC_PMC_IBM,
  192. .oprofile_cpu_type = "ppc64/power4",
  193. .oprofile_type = PPC_OPROFILE_POWER4,
  194. .machine_check = machine_check_generic,
  195. .platform = "power4",
  196. },
  197. { /* Power4+ */
  198. .pvr_mask = 0xffff0000,
  199. .pvr_value = 0x00380000,
  200. .cpu_name = "POWER4+ (gq)",
  201. .cpu_features = CPU_FTRS_POWER4,
  202. .cpu_user_features = COMMON_USER_POWER4,
  203. .mmu_features = MMU_FTR_HPTE_TABLE,
  204. .icache_bsize = 128,
  205. .dcache_bsize = 128,
  206. .num_pmcs = 8,
  207. .pmc_type = PPC_PMC_IBM,
  208. .oprofile_cpu_type = "ppc64/power4",
  209. .oprofile_type = PPC_OPROFILE_POWER4,
  210. .machine_check = machine_check_generic,
  211. .platform = "power4",
  212. },
  213. { /* PPC970 */
  214. .pvr_mask = 0xffff0000,
  215. .pvr_value = 0x00390000,
  216. .cpu_name = "PPC970",
  217. .cpu_features = CPU_FTRS_PPC970,
  218. .cpu_user_features = COMMON_USER_POWER4 |
  219. PPC_FEATURE_HAS_ALTIVEC_COMP,
  220. .mmu_features = MMU_FTR_HPTE_TABLE,
  221. .icache_bsize = 128,
  222. .dcache_bsize = 128,
  223. .num_pmcs = 8,
  224. .pmc_type = PPC_PMC_IBM,
  225. .cpu_setup = __setup_cpu_ppc970,
  226. .cpu_restore = __restore_cpu_ppc970,
  227. .oprofile_cpu_type = "ppc64/970",
  228. .oprofile_type = PPC_OPROFILE_POWER4,
  229. .machine_check = machine_check_generic,
  230. .platform = "ppc970",
  231. },
  232. { /* PPC970FX */
  233. .pvr_mask = 0xffff0000,
  234. .pvr_value = 0x003c0000,
  235. .cpu_name = "PPC970FX",
  236. .cpu_features = CPU_FTRS_PPC970,
  237. .cpu_user_features = COMMON_USER_POWER4 |
  238. PPC_FEATURE_HAS_ALTIVEC_COMP,
  239. .mmu_features = MMU_FTR_HPTE_TABLE,
  240. .icache_bsize = 128,
  241. .dcache_bsize = 128,
  242. .num_pmcs = 8,
  243. .pmc_type = PPC_PMC_IBM,
  244. .cpu_setup = __setup_cpu_ppc970,
  245. .cpu_restore = __restore_cpu_ppc970,
  246. .oprofile_cpu_type = "ppc64/970",
  247. .oprofile_type = PPC_OPROFILE_POWER4,
  248. .machine_check = machine_check_generic,
  249. .platform = "ppc970",
  250. },
  251. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  252. .pvr_mask = 0xffffffff,
  253. .pvr_value = 0x00440100,
  254. .cpu_name = "PPC970MP",
  255. .cpu_features = CPU_FTRS_PPC970,
  256. .cpu_user_features = COMMON_USER_POWER4 |
  257. PPC_FEATURE_HAS_ALTIVEC_COMP,
  258. .mmu_features = MMU_FTR_HPTE_TABLE,
  259. .icache_bsize = 128,
  260. .dcache_bsize = 128,
  261. .num_pmcs = 8,
  262. .pmc_type = PPC_PMC_IBM,
  263. .cpu_setup = __setup_cpu_ppc970,
  264. .cpu_restore = __restore_cpu_ppc970,
  265. .oprofile_cpu_type = "ppc64/970MP",
  266. .oprofile_type = PPC_OPROFILE_POWER4,
  267. .machine_check = machine_check_generic,
  268. .platform = "ppc970",
  269. },
  270. { /* PPC970MP */
  271. .pvr_mask = 0xffff0000,
  272. .pvr_value = 0x00440000,
  273. .cpu_name = "PPC970MP",
  274. .cpu_features = CPU_FTRS_PPC970,
  275. .cpu_user_features = COMMON_USER_POWER4 |
  276. PPC_FEATURE_HAS_ALTIVEC_COMP,
  277. .mmu_features = MMU_FTR_HPTE_TABLE,
  278. .icache_bsize = 128,
  279. .dcache_bsize = 128,
  280. .num_pmcs = 8,
  281. .pmc_type = PPC_PMC_IBM,
  282. .cpu_setup = __setup_cpu_ppc970MP,
  283. .cpu_restore = __restore_cpu_ppc970,
  284. .oprofile_cpu_type = "ppc64/970MP",
  285. .oprofile_type = PPC_OPROFILE_POWER4,
  286. .machine_check = machine_check_generic,
  287. .platform = "ppc970",
  288. },
  289. { /* PPC970GX */
  290. .pvr_mask = 0xffff0000,
  291. .pvr_value = 0x00450000,
  292. .cpu_name = "PPC970GX",
  293. .cpu_features = CPU_FTRS_PPC970,
  294. .cpu_user_features = COMMON_USER_POWER4 |
  295. PPC_FEATURE_HAS_ALTIVEC_COMP,
  296. .mmu_features = MMU_FTR_HPTE_TABLE,
  297. .icache_bsize = 128,
  298. .dcache_bsize = 128,
  299. .num_pmcs = 8,
  300. .pmc_type = PPC_PMC_IBM,
  301. .cpu_setup = __setup_cpu_ppc970,
  302. .oprofile_cpu_type = "ppc64/970",
  303. .oprofile_type = PPC_OPROFILE_POWER4,
  304. .machine_check = machine_check_generic,
  305. .platform = "ppc970",
  306. },
  307. { /* Power5 GR */
  308. .pvr_mask = 0xffff0000,
  309. .pvr_value = 0x003a0000,
  310. .cpu_name = "POWER5 (gr)",
  311. .cpu_features = CPU_FTRS_POWER5,
  312. .cpu_user_features = COMMON_USER_POWER5,
  313. .mmu_features = MMU_FTR_HPTE_TABLE,
  314. .icache_bsize = 128,
  315. .dcache_bsize = 128,
  316. .num_pmcs = 6,
  317. .pmc_type = PPC_PMC_IBM,
  318. .oprofile_cpu_type = "ppc64/power5",
  319. .oprofile_type = PPC_OPROFILE_POWER4,
  320. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  321. * and above but only works on POWER5 and above
  322. */
  323. .oprofile_mmcra_sihv = MMCRA_SIHV,
  324. .oprofile_mmcra_sipr = MMCRA_SIPR,
  325. .machine_check = machine_check_generic,
  326. .platform = "power5",
  327. },
  328. { /* Power5++ */
  329. .pvr_mask = 0xffffff00,
  330. .pvr_value = 0x003b0300,
  331. .cpu_name = "POWER5+ (gs)",
  332. .cpu_features = CPU_FTRS_POWER5,
  333. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  334. .mmu_features = MMU_FTR_HPTE_TABLE,
  335. .icache_bsize = 128,
  336. .dcache_bsize = 128,
  337. .num_pmcs = 6,
  338. .oprofile_cpu_type = "ppc64/power5++",
  339. .oprofile_type = PPC_OPROFILE_POWER4,
  340. .oprofile_mmcra_sihv = MMCRA_SIHV,
  341. .oprofile_mmcra_sipr = MMCRA_SIPR,
  342. .machine_check = machine_check_generic,
  343. .platform = "power5+",
  344. },
  345. { /* Power5 GS */
  346. .pvr_mask = 0xffff0000,
  347. .pvr_value = 0x003b0000,
  348. .cpu_name = "POWER5+ (gs)",
  349. .cpu_features = CPU_FTRS_POWER5,
  350. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  351. .mmu_features = MMU_FTR_HPTE_TABLE,
  352. .icache_bsize = 128,
  353. .dcache_bsize = 128,
  354. .num_pmcs = 6,
  355. .pmc_type = PPC_PMC_IBM,
  356. .oprofile_cpu_type = "ppc64/power5+",
  357. .oprofile_type = PPC_OPROFILE_POWER4,
  358. .oprofile_mmcra_sihv = MMCRA_SIHV,
  359. .oprofile_mmcra_sipr = MMCRA_SIPR,
  360. .machine_check = machine_check_generic,
  361. .platform = "power5+",
  362. },
  363. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  364. .pvr_mask = 0xffffffff,
  365. .pvr_value = 0x0f000001,
  366. .cpu_name = "POWER5+",
  367. .cpu_features = CPU_FTRS_POWER5,
  368. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  369. .mmu_features = MMU_FTR_HPTE_TABLE,
  370. .icache_bsize = 128,
  371. .dcache_bsize = 128,
  372. .machine_check = machine_check_generic,
  373. .oprofile_cpu_type = "ppc64/compat-power5+",
  374. .platform = "power5+",
  375. },
  376. { /* Power6 */
  377. .pvr_mask = 0xffff0000,
  378. .pvr_value = 0x003e0000,
  379. .cpu_name = "POWER6 (raw)",
  380. .cpu_features = CPU_FTRS_POWER6,
  381. .cpu_user_features = COMMON_USER_POWER6 |
  382. PPC_FEATURE_POWER6_EXT,
  383. .mmu_features = MMU_FTR_HPTE_TABLE,
  384. .icache_bsize = 128,
  385. .dcache_bsize = 128,
  386. .num_pmcs = 6,
  387. .pmc_type = PPC_PMC_IBM,
  388. .oprofile_cpu_type = "ppc64/power6",
  389. .oprofile_type = PPC_OPROFILE_POWER4,
  390. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  391. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  392. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  393. POWER6_MMCRA_OTHER,
  394. .machine_check = machine_check_generic,
  395. .platform = "power6x",
  396. },
  397. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  398. .pvr_mask = 0xffffffff,
  399. .pvr_value = 0x0f000002,
  400. .cpu_name = "POWER6 (architected)",
  401. .cpu_features = CPU_FTRS_POWER6,
  402. .cpu_user_features = COMMON_USER_POWER6,
  403. .mmu_features = MMU_FTR_HPTE_TABLE,
  404. .icache_bsize = 128,
  405. .dcache_bsize = 128,
  406. .machine_check = machine_check_generic,
  407. .oprofile_cpu_type = "ppc64/compat-power6",
  408. .platform = "power6",
  409. },
  410. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  411. .pvr_mask = 0xffffffff,
  412. .pvr_value = 0x0f000003,
  413. .cpu_name = "POWER7 (architected)",
  414. .cpu_features = CPU_FTRS_POWER7,
  415. .cpu_user_features = COMMON_USER_POWER7,
  416. .mmu_features = MMU_FTR_HPTE_TABLE,
  417. .icache_bsize = 128,
  418. .dcache_bsize = 128,
  419. .machine_check = machine_check_generic,
  420. .oprofile_cpu_type = "ppc64/compat-power7",
  421. .platform = "power7",
  422. },
  423. { /* Power7 */
  424. .pvr_mask = 0xffff0000,
  425. .pvr_value = 0x003f0000,
  426. .cpu_name = "POWER7 (raw)",
  427. .cpu_features = CPU_FTRS_POWER7,
  428. .cpu_user_features = COMMON_USER_POWER7,
  429. .mmu_features = MMU_FTR_HPTE_TABLE,
  430. .icache_bsize = 128,
  431. .dcache_bsize = 128,
  432. .num_pmcs = 6,
  433. .pmc_type = PPC_PMC_IBM,
  434. .cpu_setup = __setup_cpu_power7,
  435. .cpu_restore = __restore_cpu_power7,
  436. .oprofile_cpu_type = "ppc64/power7",
  437. .oprofile_type = PPC_OPROFILE_POWER4,
  438. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  439. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  440. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  441. POWER6_MMCRA_OTHER,
  442. .platform = "power7",
  443. },
  444. { /* Cell Broadband Engine */
  445. .pvr_mask = 0xffff0000,
  446. .pvr_value = 0x00700000,
  447. .cpu_name = "Cell Broadband Engine",
  448. .cpu_features = CPU_FTRS_CELL,
  449. .cpu_user_features = COMMON_USER_PPC64 |
  450. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  451. PPC_FEATURE_SMT,
  452. .mmu_features = MMU_FTR_HPTE_TABLE,
  453. .icache_bsize = 128,
  454. .dcache_bsize = 128,
  455. .num_pmcs = 4,
  456. .pmc_type = PPC_PMC_IBM,
  457. .oprofile_cpu_type = "ppc64/cell-be",
  458. .oprofile_type = PPC_OPROFILE_CELL,
  459. .machine_check = machine_check_generic,
  460. .platform = "ppc-cell-be",
  461. },
  462. { /* PA Semi PA6T */
  463. .pvr_mask = 0x7fff0000,
  464. .pvr_value = 0x00900000,
  465. .cpu_name = "PA6T",
  466. .cpu_features = CPU_FTRS_PA6T,
  467. .cpu_user_features = COMMON_USER_PA6T,
  468. .mmu_features = MMU_FTR_HPTE_TABLE,
  469. .icache_bsize = 64,
  470. .dcache_bsize = 64,
  471. .num_pmcs = 6,
  472. .pmc_type = PPC_PMC_PA6T,
  473. .cpu_setup = __setup_cpu_pa6t,
  474. .cpu_restore = __restore_cpu_pa6t,
  475. .oprofile_cpu_type = "ppc64/pa6t",
  476. .oprofile_type = PPC_OPROFILE_PA6T,
  477. .machine_check = machine_check_generic,
  478. .platform = "pa6t",
  479. },
  480. { /* default match */
  481. .pvr_mask = 0x00000000,
  482. .pvr_value = 0x00000000,
  483. .cpu_name = "POWER4 (compatible)",
  484. .cpu_features = CPU_FTRS_COMPATIBLE,
  485. .cpu_user_features = COMMON_USER_PPC64,
  486. .mmu_features = MMU_FTR_HPTE_TABLE,
  487. .icache_bsize = 128,
  488. .dcache_bsize = 128,
  489. .num_pmcs = 6,
  490. .pmc_type = PPC_PMC_IBM,
  491. .machine_check = machine_check_generic,
  492. .platform = "power4",
  493. }
  494. #endif /* CONFIG_PPC64 */
  495. #ifdef CONFIG_PPC32
  496. #if CLASSIC_PPC
  497. { /* 601 */
  498. .pvr_mask = 0xffff0000,
  499. .pvr_value = 0x00010000,
  500. .cpu_name = "601",
  501. .cpu_features = CPU_FTRS_PPC601,
  502. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  503. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  504. .mmu_features = MMU_FTR_HPTE_TABLE,
  505. .icache_bsize = 32,
  506. .dcache_bsize = 32,
  507. .machine_check = machine_check_generic,
  508. .platform = "ppc601",
  509. },
  510. { /* 603 */
  511. .pvr_mask = 0xffff0000,
  512. .pvr_value = 0x00030000,
  513. .cpu_name = "603",
  514. .cpu_features = CPU_FTRS_603,
  515. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  516. .mmu_features = 0,
  517. .icache_bsize = 32,
  518. .dcache_bsize = 32,
  519. .cpu_setup = __setup_cpu_603,
  520. .machine_check = machine_check_generic,
  521. .platform = "ppc603",
  522. },
  523. { /* 603e */
  524. .pvr_mask = 0xffff0000,
  525. .pvr_value = 0x00060000,
  526. .cpu_name = "603e",
  527. .cpu_features = CPU_FTRS_603,
  528. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  529. .mmu_features = 0,
  530. .icache_bsize = 32,
  531. .dcache_bsize = 32,
  532. .cpu_setup = __setup_cpu_603,
  533. .machine_check = machine_check_generic,
  534. .platform = "ppc603",
  535. },
  536. { /* 603ev */
  537. .pvr_mask = 0xffff0000,
  538. .pvr_value = 0x00070000,
  539. .cpu_name = "603ev",
  540. .cpu_features = CPU_FTRS_603,
  541. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  542. .mmu_features = 0,
  543. .icache_bsize = 32,
  544. .dcache_bsize = 32,
  545. .cpu_setup = __setup_cpu_603,
  546. .machine_check = machine_check_generic,
  547. .platform = "ppc603",
  548. },
  549. { /* 604 */
  550. .pvr_mask = 0xffff0000,
  551. .pvr_value = 0x00040000,
  552. .cpu_name = "604",
  553. .cpu_features = CPU_FTRS_604,
  554. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  555. .mmu_features = MMU_FTR_HPTE_TABLE,
  556. .icache_bsize = 32,
  557. .dcache_bsize = 32,
  558. .num_pmcs = 2,
  559. .cpu_setup = __setup_cpu_604,
  560. .machine_check = machine_check_generic,
  561. .platform = "ppc604",
  562. },
  563. { /* 604e */
  564. .pvr_mask = 0xfffff000,
  565. .pvr_value = 0x00090000,
  566. .cpu_name = "604e",
  567. .cpu_features = CPU_FTRS_604,
  568. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  569. .mmu_features = MMU_FTR_HPTE_TABLE,
  570. .icache_bsize = 32,
  571. .dcache_bsize = 32,
  572. .num_pmcs = 4,
  573. .cpu_setup = __setup_cpu_604,
  574. .machine_check = machine_check_generic,
  575. .platform = "ppc604",
  576. },
  577. { /* 604r */
  578. .pvr_mask = 0xffff0000,
  579. .pvr_value = 0x00090000,
  580. .cpu_name = "604r",
  581. .cpu_features = CPU_FTRS_604,
  582. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  583. .mmu_features = MMU_FTR_HPTE_TABLE,
  584. .icache_bsize = 32,
  585. .dcache_bsize = 32,
  586. .num_pmcs = 4,
  587. .cpu_setup = __setup_cpu_604,
  588. .machine_check = machine_check_generic,
  589. .platform = "ppc604",
  590. },
  591. { /* 604ev */
  592. .pvr_mask = 0xffff0000,
  593. .pvr_value = 0x000a0000,
  594. .cpu_name = "604ev",
  595. .cpu_features = CPU_FTRS_604,
  596. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  597. .mmu_features = MMU_FTR_HPTE_TABLE,
  598. .icache_bsize = 32,
  599. .dcache_bsize = 32,
  600. .num_pmcs = 4,
  601. .cpu_setup = __setup_cpu_604,
  602. .machine_check = machine_check_generic,
  603. .platform = "ppc604",
  604. },
  605. { /* 740/750 (0x4202, don't support TAU ?) */
  606. .pvr_mask = 0xffffffff,
  607. .pvr_value = 0x00084202,
  608. .cpu_name = "740/750",
  609. .cpu_features = CPU_FTRS_740_NOTAU,
  610. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  611. .mmu_features = MMU_FTR_HPTE_TABLE,
  612. .icache_bsize = 32,
  613. .dcache_bsize = 32,
  614. .num_pmcs = 4,
  615. .cpu_setup = __setup_cpu_750,
  616. .machine_check = machine_check_generic,
  617. .platform = "ppc750",
  618. },
  619. { /* 750CX (80100 and 8010x?) */
  620. .pvr_mask = 0xfffffff0,
  621. .pvr_value = 0x00080100,
  622. .cpu_name = "750CX",
  623. .cpu_features = CPU_FTRS_750,
  624. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  625. .mmu_features = MMU_FTR_HPTE_TABLE,
  626. .icache_bsize = 32,
  627. .dcache_bsize = 32,
  628. .num_pmcs = 4,
  629. .cpu_setup = __setup_cpu_750cx,
  630. .machine_check = machine_check_generic,
  631. .platform = "ppc750",
  632. },
  633. { /* 750CX (82201 and 82202) */
  634. .pvr_mask = 0xfffffff0,
  635. .pvr_value = 0x00082200,
  636. .cpu_name = "750CX",
  637. .cpu_features = CPU_FTRS_750,
  638. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  639. .mmu_features = MMU_FTR_HPTE_TABLE,
  640. .icache_bsize = 32,
  641. .dcache_bsize = 32,
  642. .num_pmcs = 4,
  643. .pmc_type = PPC_PMC_IBM,
  644. .cpu_setup = __setup_cpu_750cx,
  645. .machine_check = machine_check_generic,
  646. .platform = "ppc750",
  647. },
  648. { /* 750CXe (82214) */
  649. .pvr_mask = 0xfffffff0,
  650. .pvr_value = 0x00082210,
  651. .cpu_name = "750CXe",
  652. .cpu_features = CPU_FTRS_750,
  653. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  654. .mmu_features = MMU_FTR_HPTE_TABLE,
  655. .icache_bsize = 32,
  656. .dcache_bsize = 32,
  657. .num_pmcs = 4,
  658. .pmc_type = PPC_PMC_IBM,
  659. .cpu_setup = __setup_cpu_750cx,
  660. .machine_check = machine_check_generic,
  661. .platform = "ppc750",
  662. },
  663. { /* 750CXe "Gekko" (83214) */
  664. .pvr_mask = 0xffffffff,
  665. .pvr_value = 0x00083214,
  666. .cpu_name = "750CXe",
  667. .cpu_features = CPU_FTRS_750,
  668. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  669. .mmu_features = MMU_FTR_HPTE_TABLE,
  670. .icache_bsize = 32,
  671. .dcache_bsize = 32,
  672. .num_pmcs = 4,
  673. .pmc_type = PPC_PMC_IBM,
  674. .cpu_setup = __setup_cpu_750cx,
  675. .machine_check = machine_check_generic,
  676. .platform = "ppc750",
  677. },
  678. { /* 750CL */
  679. .pvr_mask = 0xfffff0f0,
  680. .pvr_value = 0x00087010,
  681. .cpu_name = "750CL",
  682. .cpu_features = CPU_FTRS_750CL,
  683. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  684. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  685. .icache_bsize = 32,
  686. .dcache_bsize = 32,
  687. .num_pmcs = 4,
  688. .pmc_type = PPC_PMC_IBM,
  689. .cpu_setup = __setup_cpu_750,
  690. .machine_check = machine_check_generic,
  691. .platform = "ppc750",
  692. },
  693. { /* 745/755 */
  694. .pvr_mask = 0xfffff000,
  695. .pvr_value = 0x00083000,
  696. .cpu_name = "745/755",
  697. .cpu_features = CPU_FTRS_750,
  698. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  699. .mmu_features = MMU_FTR_HPTE_TABLE,
  700. .icache_bsize = 32,
  701. .dcache_bsize = 32,
  702. .num_pmcs = 4,
  703. .pmc_type = PPC_PMC_IBM,
  704. .cpu_setup = __setup_cpu_750,
  705. .machine_check = machine_check_generic,
  706. .platform = "ppc750",
  707. },
  708. { /* 750FX rev 1.x */
  709. .pvr_mask = 0xffffff00,
  710. .pvr_value = 0x70000100,
  711. .cpu_name = "750FX",
  712. .cpu_features = CPU_FTRS_750FX1,
  713. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  714. .mmu_features = MMU_FTR_HPTE_TABLE,
  715. .icache_bsize = 32,
  716. .dcache_bsize = 32,
  717. .num_pmcs = 4,
  718. .pmc_type = PPC_PMC_IBM,
  719. .cpu_setup = __setup_cpu_750,
  720. .machine_check = machine_check_generic,
  721. .platform = "ppc750",
  722. },
  723. { /* 750FX rev 2.0 must disable HID0[DPM] */
  724. .pvr_mask = 0xffffffff,
  725. .pvr_value = 0x70000200,
  726. .cpu_name = "750FX",
  727. .cpu_features = CPU_FTRS_750FX2,
  728. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  729. .mmu_features = MMU_FTR_HPTE_TABLE,
  730. .icache_bsize = 32,
  731. .dcache_bsize = 32,
  732. .num_pmcs = 4,
  733. .pmc_type = PPC_PMC_IBM,
  734. .cpu_setup = __setup_cpu_750,
  735. .machine_check = machine_check_generic,
  736. .platform = "ppc750",
  737. },
  738. { /* 750FX (All revs except 2.0) */
  739. .pvr_mask = 0xffff0000,
  740. .pvr_value = 0x70000000,
  741. .cpu_name = "750FX",
  742. .cpu_features = CPU_FTRS_750FX,
  743. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  744. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  745. .icache_bsize = 32,
  746. .dcache_bsize = 32,
  747. .num_pmcs = 4,
  748. .pmc_type = PPC_PMC_IBM,
  749. .cpu_setup = __setup_cpu_750fx,
  750. .machine_check = machine_check_generic,
  751. .platform = "ppc750",
  752. },
  753. { /* 750GX */
  754. .pvr_mask = 0xffff0000,
  755. .pvr_value = 0x70020000,
  756. .cpu_name = "750GX",
  757. .cpu_features = CPU_FTRS_750GX,
  758. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  759. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  760. .icache_bsize = 32,
  761. .dcache_bsize = 32,
  762. .num_pmcs = 4,
  763. .pmc_type = PPC_PMC_IBM,
  764. .cpu_setup = __setup_cpu_750fx,
  765. .machine_check = machine_check_generic,
  766. .platform = "ppc750",
  767. },
  768. { /* 740/750 (L2CR bit need fixup for 740) */
  769. .pvr_mask = 0xffff0000,
  770. .pvr_value = 0x00080000,
  771. .cpu_name = "740/750",
  772. .cpu_features = CPU_FTRS_740,
  773. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  774. .mmu_features = MMU_FTR_HPTE_TABLE,
  775. .icache_bsize = 32,
  776. .dcache_bsize = 32,
  777. .num_pmcs = 4,
  778. .pmc_type = PPC_PMC_IBM,
  779. .cpu_setup = __setup_cpu_750,
  780. .machine_check = machine_check_generic,
  781. .platform = "ppc750",
  782. },
  783. { /* 7400 rev 1.1 ? (no TAU) */
  784. .pvr_mask = 0xffffffff,
  785. .pvr_value = 0x000c1101,
  786. .cpu_name = "7400 (1.1)",
  787. .cpu_features = CPU_FTRS_7400_NOTAU,
  788. .cpu_user_features = COMMON_USER |
  789. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  790. .mmu_features = MMU_FTR_HPTE_TABLE,
  791. .icache_bsize = 32,
  792. .dcache_bsize = 32,
  793. .num_pmcs = 4,
  794. .pmc_type = PPC_PMC_G4,
  795. .cpu_setup = __setup_cpu_7400,
  796. .machine_check = machine_check_generic,
  797. .platform = "ppc7400",
  798. },
  799. { /* 7400 */
  800. .pvr_mask = 0xffff0000,
  801. .pvr_value = 0x000c0000,
  802. .cpu_name = "7400",
  803. .cpu_features = CPU_FTRS_7400,
  804. .cpu_user_features = COMMON_USER |
  805. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  806. .mmu_features = MMU_FTR_HPTE_TABLE,
  807. .icache_bsize = 32,
  808. .dcache_bsize = 32,
  809. .num_pmcs = 4,
  810. .pmc_type = PPC_PMC_G4,
  811. .cpu_setup = __setup_cpu_7400,
  812. .machine_check = machine_check_generic,
  813. .platform = "ppc7400",
  814. },
  815. { /* 7410 */
  816. .pvr_mask = 0xffff0000,
  817. .pvr_value = 0x800c0000,
  818. .cpu_name = "7410",
  819. .cpu_features = CPU_FTRS_7400,
  820. .cpu_user_features = COMMON_USER |
  821. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  822. .mmu_features = MMU_FTR_HPTE_TABLE,
  823. .icache_bsize = 32,
  824. .dcache_bsize = 32,
  825. .num_pmcs = 4,
  826. .pmc_type = PPC_PMC_G4,
  827. .cpu_setup = __setup_cpu_7410,
  828. .machine_check = machine_check_generic,
  829. .platform = "ppc7400",
  830. },
  831. { /* 7450 2.0 - no doze/nap */
  832. .pvr_mask = 0xffffffff,
  833. .pvr_value = 0x80000200,
  834. .cpu_name = "7450",
  835. .cpu_features = CPU_FTRS_7450_20,
  836. .cpu_user_features = COMMON_USER |
  837. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  838. .mmu_features = MMU_FTR_HPTE_TABLE,
  839. .icache_bsize = 32,
  840. .dcache_bsize = 32,
  841. .num_pmcs = 6,
  842. .pmc_type = PPC_PMC_G4,
  843. .cpu_setup = __setup_cpu_745x,
  844. .oprofile_cpu_type = "ppc/7450",
  845. .oprofile_type = PPC_OPROFILE_G4,
  846. .machine_check = machine_check_generic,
  847. .platform = "ppc7450",
  848. },
  849. { /* 7450 2.1 */
  850. .pvr_mask = 0xffffffff,
  851. .pvr_value = 0x80000201,
  852. .cpu_name = "7450",
  853. .cpu_features = CPU_FTRS_7450_21,
  854. .cpu_user_features = COMMON_USER |
  855. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  856. .mmu_features = MMU_FTR_HPTE_TABLE,
  857. .icache_bsize = 32,
  858. .dcache_bsize = 32,
  859. .num_pmcs = 6,
  860. .pmc_type = PPC_PMC_G4,
  861. .cpu_setup = __setup_cpu_745x,
  862. .oprofile_cpu_type = "ppc/7450",
  863. .oprofile_type = PPC_OPROFILE_G4,
  864. .machine_check = machine_check_generic,
  865. .platform = "ppc7450",
  866. },
  867. { /* 7450 2.3 and newer */
  868. .pvr_mask = 0xffff0000,
  869. .pvr_value = 0x80000000,
  870. .cpu_name = "7450",
  871. .cpu_features = CPU_FTRS_7450_23,
  872. .cpu_user_features = COMMON_USER |
  873. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  874. .mmu_features = MMU_FTR_HPTE_TABLE,
  875. .icache_bsize = 32,
  876. .dcache_bsize = 32,
  877. .num_pmcs = 6,
  878. .pmc_type = PPC_PMC_G4,
  879. .cpu_setup = __setup_cpu_745x,
  880. .oprofile_cpu_type = "ppc/7450",
  881. .oprofile_type = PPC_OPROFILE_G4,
  882. .machine_check = machine_check_generic,
  883. .platform = "ppc7450",
  884. },
  885. { /* 7455 rev 1.x */
  886. .pvr_mask = 0xffffff00,
  887. .pvr_value = 0x80010100,
  888. .cpu_name = "7455",
  889. .cpu_features = CPU_FTRS_7455_1,
  890. .cpu_user_features = COMMON_USER |
  891. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  892. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  893. .icache_bsize = 32,
  894. .dcache_bsize = 32,
  895. .num_pmcs = 6,
  896. .pmc_type = PPC_PMC_G4,
  897. .cpu_setup = __setup_cpu_745x,
  898. .oprofile_cpu_type = "ppc/7450",
  899. .oprofile_type = PPC_OPROFILE_G4,
  900. .machine_check = machine_check_generic,
  901. .platform = "ppc7450",
  902. },
  903. { /* 7455 rev 2.0 */
  904. .pvr_mask = 0xffffffff,
  905. .pvr_value = 0x80010200,
  906. .cpu_name = "7455",
  907. .cpu_features = CPU_FTRS_7455_20,
  908. .cpu_user_features = COMMON_USER |
  909. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  910. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  911. .icache_bsize = 32,
  912. .dcache_bsize = 32,
  913. .num_pmcs = 6,
  914. .pmc_type = PPC_PMC_G4,
  915. .cpu_setup = __setup_cpu_745x,
  916. .oprofile_cpu_type = "ppc/7450",
  917. .oprofile_type = PPC_OPROFILE_G4,
  918. .machine_check = machine_check_generic,
  919. .platform = "ppc7450",
  920. },
  921. { /* 7455 others */
  922. .pvr_mask = 0xffff0000,
  923. .pvr_value = 0x80010000,
  924. .cpu_name = "7455",
  925. .cpu_features = CPU_FTRS_7455,
  926. .cpu_user_features = COMMON_USER |
  927. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  928. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  929. .icache_bsize = 32,
  930. .dcache_bsize = 32,
  931. .num_pmcs = 6,
  932. .pmc_type = PPC_PMC_G4,
  933. .cpu_setup = __setup_cpu_745x,
  934. .oprofile_cpu_type = "ppc/7450",
  935. .oprofile_type = PPC_OPROFILE_G4,
  936. .machine_check = machine_check_generic,
  937. .platform = "ppc7450",
  938. },
  939. { /* 7447/7457 Rev 1.0 */
  940. .pvr_mask = 0xffffffff,
  941. .pvr_value = 0x80020100,
  942. .cpu_name = "7447/7457",
  943. .cpu_features = CPU_FTRS_7447_10,
  944. .cpu_user_features = COMMON_USER |
  945. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  946. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  947. .icache_bsize = 32,
  948. .dcache_bsize = 32,
  949. .num_pmcs = 6,
  950. .pmc_type = PPC_PMC_G4,
  951. .cpu_setup = __setup_cpu_745x,
  952. .oprofile_cpu_type = "ppc/7450",
  953. .oprofile_type = PPC_OPROFILE_G4,
  954. .machine_check = machine_check_generic,
  955. .platform = "ppc7450",
  956. },
  957. { /* 7447/7457 Rev 1.1 */
  958. .pvr_mask = 0xffffffff,
  959. .pvr_value = 0x80020101,
  960. .cpu_name = "7447/7457",
  961. .cpu_features = CPU_FTRS_7447_10,
  962. .cpu_user_features = COMMON_USER |
  963. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  964. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  965. .icache_bsize = 32,
  966. .dcache_bsize = 32,
  967. .num_pmcs = 6,
  968. .pmc_type = PPC_PMC_G4,
  969. .cpu_setup = __setup_cpu_745x,
  970. .oprofile_cpu_type = "ppc/7450",
  971. .oprofile_type = PPC_OPROFILE_G4,
  972. .machine_check = machine_check_generic,
  973. .platform = "ppc7450",
  974. },
  975. { /* 7447/7457 Rev 1.2 and later */
  976. .pvr_mask = 0xffff0000,
  977. .pvr_value = 0x80020000,
  978. .cpu_name = "7447/7457",
  979. .cpu_features = CPU_FTRS_7447,
  980. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  981. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  982. .icache_bsize = 32,
  983. .dcache_bsize = 32,
  984. .num_pmcs = 6,
  985. .pmc_type = PPC_PMC_G4,
  986. .cpu_setup = __setup_cpu_745x,
  987. .oprofile_cpu_type = "ppc/7450",
  988. .oprofile_type = PPC_OPROFILE_G4,
  989. .machine_check = machine_check_generic,
  990. .platform = "ppc7450",
  991. },
  992. { /* 7447A */
  993. .pvr_mask = 0xffff0000,
  994. .pvr_value = 0x80030000,
  995. .cpu_name = "7447A",
  996. .cpu_features = CPU_FTRS_7447A,
  997. .cpu_user_features = COMMON_USER |
  998. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  999. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1000. .icache_bsize = 32,
  1001. .dcache_bsize = 32,
  1002. .num_pmcs = 6,
  1003. .pmc_type = PPC_PMC_G4,
  1004. .cpu_setup = __setup_cpu_745x,
  1005. .oprofile_cpu_type = "ppc/7450",
  1006. .oprofile_type = PPC_OPROFILE_G4,
  1007. .machine_check = machine_check_generic,
  1008. .platform = "ppc7450",
  1009. },
  1010. { /* 7448 */
  1011. .pvr_mask = 0xffff0000,
  1012. .pvr_value = 0x80040000,
  1013. .cpu_name = "7448",
  1014. .cpu_features = CPU_FTRS_7448,
  1015. .cpu_user_features = COMMON_USER |
  1016. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1017. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1018. .icache_bsize = 32,
  1019. .dcache_bsize = 32,
  1020. .num_pmcs = 6,
  1021. .pmc_type = PPC_PMC_G4,
  1022. .cpu_setup = __setup_cpu_745x,
  1023. .oprofile_cpu_type = "ppc/7450",
  1024. .oprofile_type = PPC_OPROFILE_G4,
  1025. .machine_check = machine_check_generic,
  1026. .platform = "ppc7450",
  1027. },
  1028. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1029. .pvr_mask = 0x7fff0000,
  1030. .pvr_value = 0x00810000,
  1031. .cpu_name = "82xx",
  1032. .cpu_features = CPU_FTRS_82XX,
  1033. .cpu_user_features = COMMON_USER,
  1034. .mmu_features = 0,
  1035. .icache_bsize = 32,
  1036. .dcache_bsize = 32,
  1037. .cpu_setup = __setup_cpu_603,
  1038. .machine_check = machine_check_generic,
  1039. .platform = "ppc603",
  1040. },
  1041. { /* All G2_LE (603e core, plus some) have the same pvr */
  1042. .pvr_mask = 0x7fff0000,
  1043. .pvr_value = 0x00820000,
  1044. .cpu_name = "G2_LE",
  1045. .cpu_features = CPU_FTRS_G2_LE,
  1046. .cpu_user_features = COMMON_USER,
  1047. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1048. .icache_bsize = 32,
  1049. .dcache_bsize = 32,
  1050. .cpu_setup = __setup_cpu_603,
  1051. .machine_check = machine_check_generic,
  1052. .platform = "ppc603",
  1053. },
  1054. { /* e300c1 (a 603e core, plus some) on 83xx */
  1055. .pvr_mask = 0x7fff0000,
  1056. .pvr_value = 0x00830000,
  1057. .cpu_name = "e300c1",
  1058. .cpu_features = CPU_FTRS_E300,
  1059. .cpu_user_features = COMMON_USER,
  1060. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1061. .icache_bsize = 32,
  1062. .dcache_bsize = 32,
  1063. .cpu_setup = __setup_cpu_603,
  1064. .machine_check = machine_check_generic,
  1065. .platform = "ppc603",
  1066. },
  1067. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1068. .pvr_mask = 0x7fff0000,
  1069. .pvr_value = 0x00840000,
  1070. .cpu_name = "e300c2",
  1071. .cpu_features = CPU_FTRS_E300C2,
  1072. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1073. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1074. .icache_bsize = 32,
  1075. .dcache_bsize = 32,
  1076. .cpu_setup = __setup_cpu_603,
  1077. .machine_check = machine_check_generic,
  1078. .platform = "ppc603",
  1079. },
  1080. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1081. .pvr_mask = 0x7fff0000,
  1082. .pvr_value = 0x00850000,
  1083. .cpu_name = "e300c3",
  1084. .cpu_features = CPU_FTRS_E300,
  1085. .cpu_user_features = COMMON_USER,
  1086. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1087. .icache_bsize = 32,
  1088. .dcache_bsize = 32,
  1089. .cpu_setup = __setup_cpu_603,
  1090. .num_pmcs = 4,
  1091. .oprofile_cpu_type = "ppc/e300",
  1092. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1093. .platform = "ppc603",
  1094. },
  1095. { /* e300c4 (e300c1, plus one IU) */
  1096. .pvr_mask = 0x7fff0000,
  1097. .pvr_value = 0x00860000,
  1098. .cpu_name = "e300c4",
  1099. .cpu_features = CPU_FTRS_E300,
  1100. .cpu_user_features = COMMON_USER,
  1101. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1102. .icache_bsize = 32,
  1103. .dcache_bsize = 32,
  1104. .cpu_setup = __setup_cpu_603,
  1105. .machine_check = machine_check_generic,
  1106. .num_pmcs = 4,
  1107. .oprofile_cpu_type = "ppc/e300",
  1108. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1109. .platform = "ppc603",
  1110. },
  1111. { /* default match, we assume split I/D cache & TB (non-601)... */
  1112. .pvr_mask = 0x00000000,
  1113. .pvr_value = 0x00000000,
  1114. .cpu_name = "(generic PPC)",
  1115. .cpu_features = CPU_FTRS_CLASSIC32,
  1116. .cpu_user_features = COMMON_USER,
  1117. .mmu_features = MMU_FTR_HPTE_TABLE,
  1118. .icache_bsize = 32,
  1119. .dcache_bsize = 32,
  1120. .machine_check = machine_check_generic,
  1121. .platform = "ppc603",
  1122. },
  1123. #endif /* CLASSIC_PPC */
  1124. #ifdef CONFIG_8xx
  1125. { /* 8xx */
  1126. .pvr_mask = 0xffff0000,
  1127. .pvr_value = 0x00500000,
  1128. .cpu_name = "8xx",
  1129. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1130. * if the 8xx code is there.... */
  1131. .cpu_features = CPU_FTRS_8XX,
  1132. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1133. .mmu_features = MMU_FTR_TYPE_8xx,
  1134. .icache_bsize = 16,
  1135. .dcache_bsize = 16,
  1136. .platform = "ppc823",
  1137. },
  1138. #endif /* CONFIG_8xx */
  1139. #ifdef CONFIG_40x
  1140. { /* 403GC */
  1141. .pvr_mask = 0xffffff00,
  1142. .pvr_value = 0x00200200,
  1143. .cpu_name = "403GC",
  1144. .cpu_features = CPU_FTRS_40X,
  1145. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1146. .mmu_features = MMU_FTR_TYPE_40x,
  1147. .icache_bsize = 16,
  1148. .dcache_bsize = 16,
  1149. .machine_check = machine_check_4xx,
  1150. .platform = "ppc403",
  1151. },
  1152. { /* 403GCX */
  1153. .pvr_mask = 0xffffff00,
  1154. .pvr_value = 0x00201400,
  1155. .cpu_name = "403GCX",
  1156. .cpu_features = CPU_FTRS_40X,
  1157. .cpu_user_features = PPC_FEATURE_32 |
  1158. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1159. .mmu_features = MMU_FTR_TYPE_40x,
  1160. .icache_bsize = 16,
  1161. .dcache_bsize = 16,
  1162. .machine_check = machine_check_4xx,
  1163. .platform = "ppc403",
  1164. },
  1165. { /* 403G ?? */
  1166. .pvr_mask = 0xffff0000,
  1167. .pvr_value = 0x00200000,
  1168. .cpu_name = "403G ??",
  1169. .cpu_features = CPU_FTRS_40X,
  1170. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1171. .mmu_features = MMU_FTR_TYPE_40x,
  1172. .icache_bsize = 16,
  1173. .dcache_bsize = 16,
  1174. .machine_check = machine_check_4xx,
  1175. .platform = "ppc403",
  1176. },
  1177. { /* 405GP */
  1178. .pvr_mask = 0xffff0000,
  1179. .pvr_value = 0x40110000,
  1180. .cpu_name = "405GP",
  1181. .cpu_features = CPU_FTRS_40X,
  1182. .cpu_user_features = PPC_FEATURE_32 |
  1183. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1184. .mmu_features = MMU_FTR_TYPE_40x,
  1185. .icache_bsize = 32,
  1186. .dcache_bsize = 32,
  1187. .machine_check = machine_check_4xx,
  1188. .platform = "ppc405",
  1189. },
  1190. { /* STB 03xxx */
  1191. .pvr_mask = 0xffff0000,
  1192. .pvr_value = 0x40130000,
  1193. .cpu_name = "STB03xxx",
  1194. .cpu_features = CPU_FTRS_40X,
  1195. .cpu_user_features = PPC_FEATURE_32 |
  1196. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1197. .mmu_features = MMU_FTR_TYPE_40x,
  1198. .icache_bsize = 32,
  1199. .dcache_bsize = 32,
  1200. .machine_check = machine_check_4xx,
  1201. .platform = "ppc405",
  1202. },
  1203. { /* STB 04xxx */
  1204. .pvr_mask = 0xffff0000,
  1205. .pvr_value = 0x41810000,
  1206. .cpu_name = "STB04xxx",
  1207. .cpu_features = CPU_FTRS_40X,
  1208. .cpu_user_features = PPC_FEATURE_32 |
  1209. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1210. .mmu_features = MMU_FTR_TYPE_40x,
  1211. .icache_bsize = 32,
  1212. .dcache_bsize = 32,
  1213. .machine_check = machine_check_4xx,
  1214. .platform = "ppc405",
  1215. },
  1216. { /* NP405L */
  1217. .pvr_mask = 0xffff0000,
  1218. .pvr_value = 0x41610000,
  1219. .cpu_name = "NP405L",
  1220. .cpu_features = CPU_FTRS_40X,
  1221. .cpu_user_features = PPC_FEATURE_32 |
  1222. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1223. .mmu_features = MMU_FTR_TYPE_40x,
  1224. .icache_bsize = 32,
  1225. .dcache_bsize = 32,
  1226. .machine_check = machine_check_4xx,
  1227. .platform = "ppc405",
  1228. },
  1229. { /* NP4GS3 */
  1230. .pvr_mask = 0xffff0000,
  1231. .pvr_value = 0x40B10000,
  1232. .cpu_name = "NP4GS3",
  1233. .cpu_features = CPU_FTRS_40X,
  1234. .cpu_user_features = PPC_FEATURE_32 |
  1235. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1236. .mmu_features = MMU_FTR_TYPE_40x,
  1237. .icache_bsize = 32,
  1238. .dcache_bsize = 32,
  1239. .machine_check = machine_check_4xx,
  1240. .platform = "ppc405",
  1241. },
  1242. { /* NP405H */
  1243. .pvr_mask = 0xffff0000,
  1244. .pvr_value = 0x41410000,
  1245. .cpu_name = "NP405H",
  1246. .cpu_features = CPU_FTRS_40X,
  1247. .cpu_user_features = PPC_FEATURE_32 |
  1248. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1249. .mmu_features = MMU_FTR_TYPE_40x,
  1250. .icache_bsize = 32,
  1251. .dcache_bsize = 32,
  1252. .machine_check = machine_check_4xx,
  1253. .platform = "ppc405",
  1254. },
  1255. { /* 405GPr */
  1256. .pvr_mask = 0xffff0000,
  1257. .pvr_value = 0x50910000,
  1258. .cpu_name = "405GPr",
  1259. .cpu_features = CPU_FTRS_40X,
  1260. .cpu_user_features = PPC_FEATURE_32 |
  1261. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1262. .mmu_features = MMU_FTR_TYPE_40x,
  1263. .icache_bsize = 32,
  1264. .dcache_bsize = 32,
  1265. .machine_check = machine_check_4xx,
  1266. .platform = "ppc405",
  1267. },
  1268. { /* STBx25xx */
  1269. .pvr_mask = 0xffff0000,
  1270. .pvr_value = 0x51510000,
  1271. .cpu_name = "STBx25xx",
  1272. .cpu_features = CPU_FTRS_40X,
  1273. .cpu_user_features = PPC_FEATURE_32 |
  1274. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1275. .mmu_features = MMU_FTR_TYPE_40x,
  1276. .icache_bsize = 32,
  1277. .dcache_bsize = 32,
  1278. .machine_check = machine_check_4xx,
  1279. .platform = "ppc405",
  1280. },
  1281. { /* 405LP */
  1282. .pvr_mask = 0xffff0000,
  1283. .pvr_value = 0x41F10000,
  1284. .cpu_name = "405LP",
  1285. .cpu_features = CPU_FTRS_40X,
  1286. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1287. .mmu_features = MMU_FTR_TYPE_40x,
  1288. .icache_bsize = 32,
  1289. .dcache_bsize = 32,
  1290. .machine_check = machine_check_4xx,
  1291. .platform = "ppc405",
  1292. },
  1293. { /* Xilinx Virtex-II Pro */
  1294. .pvr_mask = 0xfffff000,
  1295. .pvr_value = 0x20010000,
  1296. .cpu_name = "Virtex-II Pro",
  1297. .cpu_features = CPU_FTRS_40X,
  1298. .cpu_user_features = PPC_FEATURE_32 |
  1299. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1300. .mmu_features = MMU_FTR_TYPE_40x,
  1301. .icache_bsize = 32,
  1302. .dcache_bsize = 32,
  1303. .machine_check = machine_check_4xx,
  1304. .platform = "ppc405",
  1305. },
  1306. { /* Xilinx Virtex-4 FX */
  1307. .pvr_mask = 0xfffff000,
  1308. .pvr_value = 0x20011000,
  1309. .cpu_name = "Virtex-4 FX",
  1310. .cpu_features = CPU_FTRS_40X,
  1311. .cpu_user_features = PPC_FEATURE_32 |
  1312. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1313. .mmu_features = MMU_FTR_TYPE_40x,
  1314. .icache_bsize = 32,
  1315. .dcache_bsize = 32,
  1316. .machine_check = machine_check_4xx,
  1317. .platform = "ppc405",
  1318. },
  1319. { /* 405EP */
  1320. .pvr_mask = 0xffff0000,
  1321. .pvr_value = 0x51210000,
  1322. .cpu_name = "405EP",
  1323. .cpu_features = CPU_FTRS_40X,
  1324. .cpu_user_features = PPC_FEATURE_32 |
  1325. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1326. .mmu_features = MMU_FTR_TYPE_40x,
  1327. .icache_bsize = 32,
  1328. .dcache_bsize = 32,
  1329. .machine_check = machine_check_4xx,
  1330. .platform = "ppc405",
  1331. },
  1332. { /* 405EX */
  1333. .pvr_mask = 0xffff0004,
  1334. .pvr_value = 0x12910004,
  1335. .cpu_name = "405EX",
  1336. .cpu_features = CPU_FTRS_40X,
  1337. .cpu_user_features = PPC_FEATURE_32 |
  1338. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1339. .mmu_features = MMU_FTR_TYPE_40x,
  1340. .icache_bsize = 32,
  1341. .dcache_bsize = 32,
  1342. .machine_check = machine_check_4xx,
  1343. .platform = "ppc405",
  1344. },
  1345. { /* 405EXr */
  1346. .pvr_mask = 0xffff0004,
  1347. .pvr_value = 0x12910000,
  1348. .cpu_name = "405EXr",
  1349. .cpu_features = CPU_FTRS_40X,
  1350. .cpu_user_features = PPC_FEATURE_32 |
  1351. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1352. .mmu_features = MMU_FTR_TYPE_40x,
  1353. .icache_bsize = 32,
  1354. .dcache_bsize = 32,
  1355. .machine_check = machine_check_4xx,
  1356. .platform = "ppc405",
  1357. },
  1358. {
  1359. /* 405EZ */
  1360. .pvr_mask = 0xffff0000,
  1361. .pvr_value = 0x41510000,
  1362. .cpu_name = "405EZ",
  1363. .cpu_features = CPU_FTRS_40X,
  1364. .cpu_user_features = PPC_FEATURE_32 |
  1365. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1366. .mmu_features = MMU_FTR_TYPE_40x,
  1367. .icache_bsize = 32,
  1368. .dcache_bsize = 32,
  1369. .machine_check = machine_check_4xx,
  1370. .platform = "ppc405",
  1371. },
  1372. { /* default match */
  1373. .pvr_mask = 0x00000000,
  1374. .pvr_value = 0x00000000,
  1375. .cpu_name = "(generic 40x PPC)",
  1376. .cpu_features = CPU_FTRS_40X,
  1377. .cpu_user_features = PPC_FEATURE_32 |
  1378. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1379. .mmu_features = MMU_FTR_TYPE_40x,
  1380. .icache_bsize = 32,
  1381. .dcache_bsize = 32,
  1382. .machine_check = machine_check_4xx,
  1383. .platform = "ppc405",
  1384. }
  1385. #endif /* CONFIG_40x */
  1386. #ifdef CONFIG_44x
  1387. {
  1388. .pvr_mask = 0xf0000fff,
  1389. .pvr_value = 0x40000850,
  1390. .cpu_name = "440GR Rev. A",
  1391. .cpu_features = CPU_FTRS_44X,
  1392. .cpu_user_features = COMMON_USER_BOOKE,
  1393. .mmu_features = MMU_FTR_TYPE_44x,
  1394. .icache_bsize = 32,
  1395. .dcache_bsize = 32,
  1396. .machine_check = machine_check_4xx,
  1397. .platform = "ppc440",
  1398. },
  1399. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1400. .pvr_mask = 0xf0000fff,
  1401. .pvr_value = 0x40000858,
  1402. .cpu_name = "440EP Rev. A",
  1403. .cpu_features = CPU_FTRS_44X,
  1404. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1405. .mmu_features = MMU_FTR_TYPE_44x,
  1406. .icache_bsize = 32,
  1407. .dcache_bsize = 32,
  1408. .cpu_setup = __setup_cpu_440ep,
  1409. .machine_check = machine_check_4xx,
  1410. .platform = "ppc440",
  1411. },
  1412. {
  1413. .pvr_mask = 0xf0000fff,
  1414. .pvr_value = 0x400008d3,
  1415. .cpu_name = "440GR Rev. B",
  1416. .cpu_features = CPU_FTRS_44X,
  1417. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1418. .mmu_features = MMU_FTR_TYPE_44x,
  1419. .icache_bsize = 32,
  1420. .dcache_bsize = 32,
  1421. .machine_check = machine_check_4xx,
  1422. .platform = "ppc440",
  1423. },
  1424. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1425. .pvr_mask = 0xf0000ff7,
  1426. .pvr_value = 0x400008d4,
  1427. .cpu_name = "440EP Rev. C",
  1428. .cpu_features = CPU_FTRS_44X,
  1429. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1430. .mmu_features = MMU_FTR_TYPE_44x,
  1431. .icache_bsize = 32,
  1432. .dcache_bsize = 32,
  1433. .cpu_setup = __setup_cpu_440ep,
  1434. .machine_check = machine_check_4xx,
  1435. .platform = "ppc440",
  1436. },
  1437. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1438. .pvr_mask = 0xf0000fff,
  1439. .pvr_value = 0x400008db,
  1440. .cpu_name = "440EP Rev. B",
  1441. .cpu_features = CPU_FTRS_44X,
  1442. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1443. .mmu_features = MMU_FTR_TYPE_44x,
  1444. .icache_bsize = 32,
  1445. .dcache_bsize = 32,
  1446. .cpu_setup = __setup_cpu_440ep,
  1447. .machine_check = machine_check_4xx,
  1448. .platform = "ppc440",
  1449. },
  1450. { /* 440GRX */
  1451. .pvr_mask = 0xf0000ffb,
  1452. .pvr_value = 0x200008D0,
  1453. .cpu_name = "440GRX",
  1454. .cpu_features = CPU_FTRS_44X,
  1455. .cpu_user_features = COMMON_USER_BOOKE,
  1456. .mmu_features = MMU_FTR_TYPE_44x,
  1457. .icache_bsize = 32,
  1458. .dcache_bsize = 32,
  1459. .cpu_setup = __setup_cpu_440grx,
  1460. .machine_check = machine_check_440A,
  1461. .platform = "ppc440",
  1462. },
  1463. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1464. .pvr_mask = 0xf0000ffb,
  1465. .pvr_value = 0x200008D8,
  1466. .cpu_name = "440EPX",
  1467. .cpu_features = CPU_FTRS_44X,
  1468. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1469. .mmu_features = MMU_FTR_TYPE_44x,
  1470. .icache_bsize = 32,
  1471. .dcache_bsize = 32,
  1472. .cpu_setup = __setup_cpu_440epx,
  1473. .machine_check = machine_check_440A,
  1474. .platform = "ppc440",
  1475. },
  1476. { /* 440GP Rev. B */
  1477. .pvr_mask = 0xf0000fff,
  1478. .pvr_value = 0x40000440,
  1479. .cpu_name = "440GP Rev. B",
  1480. .cpu_features = CPU_FTRS_44X,
  1481. .cpu_user_features = COMMON_USER_BOOKE,
  1482. .mmu_features = MMU_FTR_TYPE_44x,
  1483. .icache_bsize = 32,
  1484. .dcache_bsize = 32,
  1485. .machine_check = machine_check_4xx,
  1486. .platform = "ppc440gp",
  1487. },
  1488. { /* 440GP Rev. C */
  1489. .pvr_mask = 0xf0000fff,
  1490. .pvr_value = 0x40000481,
  1491. .cpu_name = "440GP Rev. C",
  1492. .cpu_features = CPU_FTRS_44X,
  1493. .cpu_user_features = COMMON_USER_BOOKE,
  1494. .mmu_features = MMU_FTR_TYPE_44x,
  1495. .icache_bsize = 32,
  1496. .dcache_bsize = 32,
  1497. .machine_check = machine_check_4xx,
  1498. .platform = "ppc440gp",
  1499. },
  1500. { /* 440GX Rev. A */
  1501. .pvr_mask = 0xf0000fff,
  1502. .pvr_value = 0x50000850,
  1503. .cpu_name = "440GX Rev. A",
  1504. .cpu_features = CPU_FTRS_44X,
  1505. .cpu_user_features = COMMON_USER_BOOKE,
  1506. .mmu_features = MMU_FTR_TYPE_44x,
  1507. .icache_bsize = 32,
  1508. .dcache_bsize = 32,
  1509. .cpu_setup = __setup_cpu_440gx,
  1510. .machine_check = machine_check_440A,
  1511. .platform = "ppc440",
  1512. },
  1513. { /* 440GX Rev. B */
  1514. .pvr_mask = 0xf0000fff,
  1515. .pvr_value = 0x50000851,
  1516. .cpu_name = "440GX Rev. B",
  1517. .cpu_features = CPU_FTRS_44X,
  1518. .cpu_user_features = COMMON_USER_BOOKE,
  1519. .mmu_features = MMU_FTR_TYPE_44x,
  1520. .icache_bsize = 32,
  1521. .dcache_bsize = 32,
  1522. .cpu_setup = __setup_cpu_440gx,
  1523. .machine_check = machine_check_440A,
  1524. .platform = "ppc440",
  1525. },
  1526. { /* 440GX Rev. C */
  1527. .pvr_mask = 0xf0000fff,
  1528. .pvr_value = 0x50000892,
  1529. .cpu_name = "440GX Rev. C",
  1530. .cpu_features = CPU_FTRS_44X,
  1531. .cpu_user_features = COMMON_USER_BOOKE,
  1532. .mmu_features = MMU_FTR_TYPE_44x,
  1533. .icache_bsize = 32,
  1534. .dcache_bsize = 32,
  1535. .cpu_setup = __setup_cpu_440gx,
  1536. .machine_check = machine_check_440A,
  1537. .platform = "ppc440",
  1538. },
  1539. { /* 440GX Rev. F */
  1540. .pvr_mask = 0xf0000fff,
  1541. .pvr_value = 0x50000894,
  1542. .cpu_name = "440GX Rev. F",
  1543. .cpu_features = CPU_FTRS_44X,
  1544. .cpu_user_features = COMMON_USER_BOOKE,
  1545. .mmu_features = MMU_FTR_TYPE_44x,
  1546. .icache_bsize = 32,
  1547. .dcache_bsize = 32,
  1548. .cpu_setup = __setup_cpu_440gx,
  1549. .machine_check = machine_check_440A,
  1550. .platform = "ppc440",
  1551. },
  1552. { /* 440SP Rev. A */
  1553. .pvr_mask = 0xfff00fff,
  1554. .pvr_value = 0x53200891,
  1555. .cpu_name = "440SP Rev. A",
  1556. .cpu_features = CPU_FTRS_44X,
  1557. .cpu_user_features = COMMON_USER_BOOKE,
  1558. .mmu_features = MMU_FTR_TYPE_44x,
  1559. .icache_bsize = 32,
  1560. .dcache_bsize = 32,
  1561. .machine_check = machine_check_4xx,
  1562. .platform = "ppc440",
  1563. },
  1564. { /* 440SPe Rev. A */
  1565. .pvr_mask = 0xfff00fff,
  1566. .pvr_value = 0x53400890,
  1567. .cpu_name = "440SPe Rev. A",
  1568. .cpu_features = CPU_FTRS_44X,
  1569. .cpu_user_features = COMMON_USER_BOOKE,
  1570. .mmu_features = MMU_FTR_TYPE_44x,
  1571. .icache_bsize = 32,
  1572. .dcache_bsize = 32,
  1573. .cpu_setup = __setup_cpu_440spe,
  1574. .machine_check = machine_check_440A,
  1575. .platform = "ppc440",
  1576. },
  1577. { /* 440SPe Rev. B */
  1578. .pvr_mask = 0xfff00fff,
  1579. .pvr_value = 0x53400891,
  1580. .cpu_name = "440SPe Rev. B",
  1581. .cpu_features = CPU_FTRS_44X,
  1582. .cpu_user_features = COMMON_USER_BOOKE,
  1583. .mmu_features = MMU_FTR_TYPE_44x,
  1584. .icache_bsize = 32,
  1585. .dcache_bsize = 32,
  1586. .cpu_setup = __setup_cpu_440spe,
  1587. .machine_check = machine_check_440A,
  1588. .platform = "ppc440",
  1589. },
  1590. { /* 440 in Xilinx Virtex-5 FXT */
  1591. .pvr_mask = 0xfffffff0,
  1592. .pvr_value = 0x7ff21910,
  1593. .cpu_name = "440 in Virtex-5 FXT",
  1594. .cpu_features = CPU_FTRS_44X,
  1595. .cpu_user_features = COMMON_USER_BOOKE,
  1596. .mmu_features = MMU_FTR_TYPE_44x,
  1597. .icache_bsize = 32,
  1598. .dcache_bsize = 32,
  1599. .cpu_setup = __setup_cpu_440x5,
  1600. .machine_check = machine_check_440A,
  1601. .platform = "ppc440",
  1602. },
  1603. { /* 460EX */
  1604. .pvr_mask = 0xffff0002,
  1605. .pvr_value = 0x13020002,
  1606. .cpu_name = "460EX",
  1607. .cpu_features = CPU_FTRS_440x6,
  1608. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1609. .mmu_features = MMU_FTR_TYPE_44x,
  1610. .icache_bsize = 32,
  1611. .dcache_bsize = 32,
  1612. .cpu_setup = __setup_cpu_460ex,
  1613. .machine_check = machine_check_440A,
  1614. .platform = "ppc440",
  1615. },
  1616. { /* 460GT */
  1617. .pvr_mask = 0xffff0002,
  1618. .pvr_value = 0x13020000,
  1619. .cpu_name = "460GT",
  1620. .cpu_features = CPU_FTRS_440x6,
  1621. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1622. .mmu_features = MMU_FTR_TYPE_44x,
  1623. .icache_bsize = 32,
  1624. .dcache_bsize = 32,
  1625. .cpu_setup = __setup_cpu_460gt,
  1626. .machine_check = machine_check_440A,
  1627. .platform = "ppc440",
  1628. },
  1629. { /* default match */
  1630. .pvr_mask = 0x00000000,
  1631. .pvr_value = 0x00000000,
  1632. .cpu_name = "(generic 44x PPC)",
  1633. .cpu_features = CPU_FTRS_44X,
  1634. .cpu_user_features = COMMON_USER_BOOKE,
  1635. .mmu_features = MMU_FTR_TYPE_44x,
  1636. .icache_bsize = 32,
  1637. .dcache_bsize = 32,
  1638. .machine_check = machine_check_4xx,
  1639. .platform = "ppc440",
  1640. }
  1641. #endif /* CONFIG_44x */
  1642. #ifdef CONFIG_E200
  1643. { /* e200z5 */
  1644. .pvr_mask = 0xfff00000,
  1645. .pvr_value = 0x81000000,
  1646. .cpu_name = "e200z5",
  1647. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1648. .cpu_features = CPU_FTRS_E200,
  1649. .cpu_user_features = COMMON_USER_BOOKE |
  1650. PPC_FEATURE_HAS_EFP_SINGLE |
  1651. PPC_FEATURE_UNIFIED_CACHE,
  1652. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1653. .dcache_bsize = 32,
  1654. .machine_check = machine_check_e200,
  1655. .platform = "ppc5554",
  1656. },
  1657. { /* e200z6 */
  1658. .pvr_mask = 0xfff00000,
  1659. .pvr_value = 0x81100000,
  1660. .cpu_name = "e200z6",
  1661. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1662. .cpu_features = CPU_FTRS_E200,
  1663. .cpu_user_features = COMMON_USER_BOOKE |
  1664. PPC_FEATURE_HAS_SPE_COMP |
  1665. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1666. PPC_FEATURE_UNIFIED_CACHE,
  1667. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1668. .dcache_bsize = 32,
  1669. .machine_check = machine_check_e200,
  1670. .platform = "ppc5554",
  1671. },
  1672. { /* default match */
  1673. .pvr_mask = 0x00000000,
  1674. .pvr_value = 0x00000000,
  1675. .cpu_name = "(generic E200 PPC)",
  1676. .cpu_features = CPU_FTRS_E200,
  1677. .cpu_user_features = COMMON_USER_BOOKE |
  1678. PPC_FEATURE_HAS_EFP_SINGLE |
  1679. PPC_FEATURE_UNIFIED_CACHE,
  1680. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1681. .dcache_bsize = 32,
  1682. .machine_check = machine_check_e200,
  1683. .platform = "ppc5554",
  1684. }
  1685. #endif /* CONFIG_E200 */
  1686. #ifdef CONFIG_E500
  1687. { /* e500 */
  1688. .pvr_mask = 0xffff0000,
  1689. .pvr_value = 0x80200000,
  1690. .cpu_name = "e500",
  1691. .cpu_features = CPU_FTRS_E500,
  1692. .cpu_user_features = COMMON_USER_BOOKE |
  1693. PPC_FEATURE_HAS_SPE_COMP |
  1694. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1695. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1696. .icache_bsize = 32,
  1697. .dcache_bsize = 32,
  1698. .num_pmcs = 4,
  1699. .oprofile_cpu_type = "ppc/e500",
  1700. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1701. .machine_check = machine_check_e500,
  1702. .platform = "ppc8540",
  1703. },
  1704. { /* e500v2 */
  1705. .pvr_mask = 0xffff0000,
  1706. .pvr_value = 0x80210000,
  1707. .cpu_name = "e500v2",
  1708. .cpu_features = CPU_FTRS_E500_2,
  1709. .cpu_user_features = COMMON_USER_BOOKE |
  1710. PPC_FEATURE_HAS_SPE_COMP |
  1711. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1712. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  1713. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1714. .icache_bsize = 32,
  1715. .dcache_bsize = 32,
  1716. .num_pmcs = 4,
  1717. .oprofile_cpu_type = "ppc/e500",
  1718. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1719. .machine_check = machine_check_e500,
  1720. .platform = "ppc8548",
  1721. },
  1722. { /* e500mc */
  1723. .pvr_mask = 0xffff0000,
  1724. .pvr_value = 0x80230000,
  1725. .cpu_name = "e500mc",
  1726. .cpu_features = CPU_FTRS_E500MC,
  1727. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1728. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1729. .icache_bsize = 64,
  1730. .dcache_bsize = 64,
  1731. .num_pmcs = 4,
  1732. .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
  1733. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1734. .machine_check = machine_check_e500,
  1735. .platform = "ppce500mc",
  1736. },
  1737. { /* default match */
  1738. .pvr_mask = 0x00000000,
  1739. .pvr_value = 0x00000000,
  1740. .cpu_name = "(generic E500 PPC)",
  1741. .cpu_features = CPU_FTRS_E500,
  1742. .cpu_user_features = COMMON_USER_BOOKE |
  1743. PPC_FEATURE_HAS_SPE_COMP |
  1744. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1745. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1746. .icache_bsize = 32,
  1747. .dcache_bsize = 32,
  1748. .machine_check = machine_check_e500,
  1749. .platform = "powerpc",
  1750. }
  1751. #endif /* CONFIG_E500 */
  1752. #endif /* CONFIG_PPC32 */
  1753. };
  1754. static struct cpu_spec the_cpu_spec;
  1755. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  1756. {
  1757. struct cpu_spec *s = cpu_specs;
  1758. struct cpu_spec *t = &the_cpu_spec;
  1759. int i;
  1760. s = PTRRELOC(s);
  1761. t = PTRRELOC(t);
  1762. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
  1763. if ((pvr & s->pvr_mask) == s->pvr_value) {
  1764. /*
  1765. * If we are overriding a previous value derived
  1766. * from the real PVR with a new value obtained
  1767. * using a logical PVR value, don't modify the
  1768. * performance monitor fields.
  1769. */
  1770. if (t->num_pmcs && !s->num_pmcs) {
  1771. t->cpu_name = s->cpu_name;
  1772. t->cpu_features = s->cpu_features;
  1773. t->cpu_user_features = s->cpu_user_features;
  1774. t->icache_bsize = s->icache_bsize;
  1775. t->dcache_bsize = s->dcache_bsize;
  1776. t->cpu_setup = s->cpu_setup;
  1777. t->cpu_restore = s->cpu_restore;
  1778. t->platform = s->platform;
  1779. /*
  1780. * If we have passed through this logic once
  1781. * before and have pulled the default case
  1782. * because the real PVR was not found inside
  1783. * cpu_specs[], then we are possibly running in
  1784. * compatibility mode. In that case, let the
  1785. * oprofiler know which set of compatibility
  1786. * counters to pull from by making sure the
  1787. * oprofile_cpu_type string is set to that of
  1788. * compatibility mode. If the oprofile_cpu_type
  1789. * already has a value, then we are possibly
  1790. * overriding a real PVR with a logical one, and,
  1791. * in that case, keep the current value for
  1792. * oprofile_cpu_type.
  1793. */
  1794. if (t->oprofile_cpu_type == NULL)
  1795. t->oprofile_cpu_type = s->oprofile_cpu_type;
  1796. } else
  1797. *t = *s;
  1798. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  1799. /*
  1800. * Set the base platform string once; assumes
  1801. * we're called with real pvr first.
  1802. */
  1803. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  1804. *PTRRELOC(&powerpc_base_platform) = t->platform;
  1805. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  1806. /* ppc64 and booke expect identify_cpu to also call
  1807. * setup_cpu for that processor. I will consolidate
  1808. * that at a later time, for now, just use #ifdef.
  1809. * we also don't need to PTRRELOC the function pointer
  1810. * on ppc64 and booke as we are running at 0 in real
  1811. * mode on ppc64 and reloc_offset is always 0 on booke.
  1812. */
  1813. if (s->cpu_setup) {
  1814. s->cpu_setup(offset, s);
  1815. }
  1816. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  1817. return s;
  1818. }
  1819. BUG();
  1820. return NULL;
  1821. }