mmu.h 2.2 KB

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  1. #ifndef _ASM_POWERPC_MMU_H_
  2. #define _ASM_POWERPC_MMU_H_
  3. #ifdef __KERNEL__
  4. #include <asm/asm-compat.h>
  5. #include <asm/feature-fixups.h>
  6. /*
  7. * MMU features bit definitions
  8. */
  9. /*
  10. * First half is MMU families
  11. */
  12. #define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
  13. #define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
  14. #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
  15. #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
  16. #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
  17. /*
  18. * This is individual features
  19. */
  20. /* Enable use of high BAT registers */
  21. #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
  22. /* Enable >32-bit physical addresses on 32-bit processor, only used
  23. * by CONFIG_6xx currently as BookE supports that from day 1
  24. */
  25. #define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
  26. /* Enable use of broadcast TLB invalidations. We don't always set it
  27. * on processors that support it due to other constraints with the
  28. * use of such invalidations
  29. */
  30. #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
  31. /* Enable use of tlbilx invalidate-by-PID variant.
  32. */
  33. #define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000)
  34. /* This indicates that the processor cannot handle multiple outstanding
  35. * broadcast tlbivax or tlbsync. This makes the code use a spinlock
  36. * around such invalidate forms.
  37. */
  38. #define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
  39. #ifndef __ASSEMBLY__
  40. #include <asm/cputable.h>
  41. static inline int mmu_has_feature(unsigned long feature)
  42. {
  43. return (cur_cpu_spec->mmu_features & feature);
  44. }
  45. extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
  46. #endif /* !__ASSEMBLY__ */
  47. #ifdef CONFIG_PPC64
  48. /* 64-bit classic hash table MMU */
  49. # include <asm/mmu-hash64.h>
  50. #elif defined(CONFIG_PPC_STD_MMU)
  51. /* 32-bit classic hash table MMU */
  52. # include <asm/mmu-hash32.h>
  53. #elif defined(CONFIG_40x)
  54. /* 40x-style software loaded TLB */
  55. # include <asm/mmu-40x.h>
  56. #elif defined(CONFIG_44x)
  57. /* 44x-style software loaded TLB */
  58. # include <asm/mmu-44x.h>
  59. #elif defined(CONFIG_FSL_BOOKE)
  60. /* Freescale Book-E software loaded TLB */
  61. # include <asm/mmu-fsl-booke.h>
  62. #elif defined (CONFIG_PPC_8xx)
  63. /* Motorola/Freescale 8xx software loaded TLB */
  64. # include <asm/mmu-8xx.h>
  65. #endif
  66. #endif /* __KERNEL__ */
  67. #endif /* _ASM_POWERPC_MMU_H_ */