ezbrd.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf518/boards/ezbrd.c
  3. * Based on: arch/blackfin/mach-bf527/boards/ezbrd.c
  4. * Author: Bryan Wu <cooloney@kernel.org>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/physmap.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #include <linux/i2c.h>
  38. #include <linux/irq.h>
  39. #include <linux/interrupt.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/reboot.h>
  43. #include <asm/portmux.h>
  44. #include <asm/dpmc.h>
  45. #include <linux/spi/ad7877.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "ADI BF518F-EZBRD";
  50. /*
  51. * Driver needs to know address, irq and flag pin.
  52. */
  53. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  54. static struct mtd_partition ezbrd_partitions[] = {
  55. {
  56. .name = "bootloader(nor)",
  57. .size = 0x40000,
  58. .offset = 0,
  59. }, {
  60. .name = "linux kernel(nor)",
  61. .size = 0x1C0000,
  62. .offset = MTDPART_OFS_APPEND,
  63. }, {
  64. .name = "file system(nor)",
  65. .size = MTDPART_SIZ_FULL,
  66. .offset = MTDPART_OFS_APPEND,
  67. }
  68. };
  69. static struct physmap_flash_data ezbrd_flash_data = {
  70. .width = 2,
  71. .parts = ezbrd_partitions,
  72. .nr_parts = ARRAY_SIZE(ezbrd_partitions),
  73. };
  74. static struct resource ezbrd_flash_resource = {
  75. .start = 0x20000000,
  76. .end = 0x203fffff,
  77. .flags = IORESOURCE_MEM,
  78. };
  79. static struct platform_device ezbrd_flash_device = {
  80. .name = "physmap-flash",
  81. .id = 0,
  82. .dev = {
  83. .platform_data = &ezbrd_flash_data,
  84. },
  85. .num_resources = 1,
  86. .resource = &ezbrd_flash_resource,
  87. };
  88. #endif
  89. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  90. static struct platform_device rtc_device = {
  91. .name = "rtc-bfin",
  92. .id = -1,
  93. };
  94. #endif
  95. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  96. static struct platform_device bfin_mac_device = {
  97. .name = "bfin_mac",
  98. };
  99. #endif
  100. #if defined(CONFIG_MTD_M25P80) \
  101. || defined(CONFIG_MTD_M25P80_MODULE)
  102. static struct mtd_partition bfin_spi_flash_partitions[] = {
  103. {
  104. .name = "bootloader(spi)",
  105. .size = 0x00040000,
  106. .offset = 0,
  107. .mask_flags = MTD_CAP_ROM
  108. }, {
  109. .name = "linux kernel(spi)",
  110. .size = MTDPART_SIZ_FULL,
  111. .offset = MTDPART_OFS_APPEND,
  112. }
  113. };
  114. static struct flash_platform_data bfin_spi_flash_data = {
  115. .name = "m25p80",
  116. .parts = bfin_spi_flash_partitions,
  117. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  118. .type = "m25p16",
  119. };
  120. /* SPI flash chip (m25p64) */
  121. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  122. .enable_dma = 0, /* use dma transfer with this chip*/
  123. .bits_per_word = 8,
  124. };
  125. #endif
  126. #if defined(CONFIG_SPI_ADC_BF533) \
  127. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  128. /* SPI ADC chip */
  129. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  130. .enable_dma = 1, /* use dma transfer with this chip*/
  131. .bits_per_word = 16,
  132. };
  133. #endif
  134. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  135. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  136. .enable_dma = 1,
  137. .bits_per_word = 8,
  138. };
  139. #endif
  140. #if defined(CONFIG_PBX)
  141. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  142. .ctl_reg = 0x4, /* send zero */
  143. .enable_dma = 0,
  144. .bits_per_word = 8,
  145. .cs_change_per_word = 1,
  146. };
  147. #endif
  148. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  149. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  150. .enable_dma = 0,
  151. .bits_per_word = 16,
  152. };
  153. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  154. .model = 7877,
  155. .vref_delay_usecs = 50, /* internal, no capacitor */
  156. .x_plate_ohms = 419,
  157. .y_plate_ohms = 486,
  158. .pressure_max = 1000,
  159. .pressure_min = 0,
  160. .stopacq_polarity = 1,
  161. .first_conversion_delay = 3,
  162. .acquisition_time = 1,
  163. .averaging = 1,
  164. .pen_down_acc_interval = 1,
  165. };
  166. #endif
  167. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  168. && defined(CONFIG_SND_SOC_WM8731_SPI)
  169. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  170. .enable_dma = 0,
  171. .bits_per_word = 16,
  172. };
  173. #endif
  174. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  175. static struct bfin5xx_spi_chip spidev_chip_info = {
  176. .enable_dma = 0,
  177. .bits_per_word = 8,
  178. };
  179. #endif
  180. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  181. #if defined(CONFIG_MTD_M25P80) \
  182. || defined(CONFIG_MTD_M25P80_MODULE)
  183. {
  184. /* the modalias must be the same as spi device driver name */
  185. .modalias = "m25p80", /* Name of spi_driver for this device */
  186. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  187. .bus_num = 0, /* Framework bus number */
  188. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  189. .platform_data = &bfin_spi_flash_data,
  190. .controller_data = &spi_flash_chip_info,
  191. .mode = SPI_MODE_3,
  192. },
  193. #endif
  194. #if defined(CONFIG_SPI_ADC_BF533) \
  195. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  196. {
  197. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  198. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  199. .bus_num = 0, /* Framework bus number */
  200. .chip_select = 1, /* Framework chip select. */
  201. .platform_data = NULL, /* No spi_driver specific config */
  202. .controller_data = &spi_adc_chip_info,
  203. },
  204. #endif
  205. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  206. {
  207. .modalias = "spi_mmc_dummy",
  208. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  209. .bus_num = 0,
  210. .chip_select = 0,
  211. .platform_data = NULL,
  212. .controller_data = &spi_mmc_chip_info,
  213. .mode = SPI_MODE_3,
  214. },
  215. {
  216. .modalias = "spi_mmc",
  217. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  218. .bus_num = 0,
  219. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  220. .platform_data = NULL,
  221. .controller_data = &spi_mmc_chip_info,
  222. .mode = SPI_MODE_3,
  223. },
  224. #endif
  225. #if defined(CONFIG_PBX)
  226. {
  227. .modalias = "fxs-spi",
  228. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  229. .bus_num = 0,
  230. .chip_select = 8 - CONFIG_J11_JUMPER,
  231. .controller_data = &spi_si3xxx_chip_info,
  232. .mode = SPI_MODE_3,
  233. },
  234. {
  235. .modalias = "fxo-spi",
  236. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  237. .bus_num = 0,
  238. .chip_select = 8 - CONFIG_J19_JUMPER,
  239. .controller_data = &spi_si3xxx_chip_info,
  240. .mode = SPI_MODE_3,
  241. },
  242. #endif
  243. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  244. {
  245. .modalias = "ad7877",
  246. .platform_data = &bfin_ad7877_ts_info,
  247. .irq = IRQ_PF8,
  248. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  249. .bus_num = 0,
  250. .chip_select = 2,
  251. .controller_data = &spi_ad7877_chip_info,
  252. },
  253. #endif
  254. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  255. && defined(CONFIG_SND_SOC_WM8731_SPI)
  256. {
  257. .modalias = "wm8731",
  258. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  259. .bus_num = 0,
  260. .chip_select = 5,
  261. .controller_data = &spi_wm8731_chip_info,
  262. .mode = SPI_MODE_0,
  263. },
  264. #endif
  265. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  266. {
  267. .modalias = "spidev",
  268. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  269. .bus_num = 0,
  270. .chip_select = 1,
  271. .controller_data = &spidev_chip_info,
  272. },
  273. #endif
  274. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  275. {
  276. .modalias = "bfin-lq035q1-spi",
  277. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  278. .bus_num = 0,
  279. .chip_select = 1,
  280. .controller_data = &lq035q1_spi_chip_info,
  281. .mode = SPI_CPHA | SPI_CPOL,
  282. },
  283. #endif
  284. };
  285. /* SPI controller data */
  286. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  287. /* SPI (0) */
  288. static struct bfin5xx_spi_master bfin_spi0_info = {
  289. .num_chipselect = 5,
  290. .enable_dma = 1, /* master has the ability to do dma transfer */
  291. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  292. };
  293. static struct resource bfin_spi0_resource[] = {
  294. [0] = {
  295. .start = SPI0_REGBASE,
  296. .end = SPI0_REGBASE + 0xFF,
  297. .flags = IORESOURCE_MEM,
  298. },
  299. [1] = {
  300. .start = CH_SPI0,
  301. .end = CH_SPI0,
  302. .flags = IORESOURCE_IRQ,
  303. },
  304. };
  305. static struct platform_device bfin_spi0_device = {
  306. .name = "bfin-spi",
  307. .id = 0, /* Bus number */
  308. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  309. .resource = bfin_spi0_resource,
  310. .dev = {
  311. .platform_data = &bfin_spi0_info, /* Passed to driver */
  312. },
  313. };
  314. /* SPI (1) */
  315. static struct bfin5xx_spi_master bfin_spi1_info = {
  316. .num_chipselect = 5,
  317. .enable_dma = 1, /* master has the ability to do dma transfer */
  318. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  319. };
  320. static struct resource bfin_spi1_resource[] = {
  321. [0] = {
  322. .start = SPI1_REGBASE,
  323. .end = SPI1_REGBASE + 0xFF,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. [1] = {
  327. .start = CH_SPI1,
  328. .end = CH_SPI1,
  329. .flags = IORESOURCE_IRQ,
  330. },
  331. };
  332. static struct platform_device bfin_spi1_device = {
  333. .name = "bfin-spi",
  334. .id = 1, /* Bus number */
  335. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  336. .resource = bfin_spi1_resource,
  337. .dev = {
  338. .platform_data = &bfin_spi1_info, /* Passed to driver */
  339. },
  340. };
  341. #endif /* spi master and devices */
  342. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  343. static struct resource bfin_uart_resources[] = {
  344. #ifdef CONFIG_SERIAL_BFIN_UART0
  345. {
  346. .start = 0xFFC00400,
  347. .end = 0xFFC004FF,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. #endif
  351. #ifdef CONFIG_SERIAL_BFIN_UART1
  352. {
  353. .start = 0xFFC02000,
  354. .end = 0xFFC020FF,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. #endif
  358. };
  359. static struct platform_device bfin_uart_device = {
  360. .name = "bfin-uart",
  361. .id = 1,
  362. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  363. .resource = bfin_uart_resources,
  364. };
  365. #endif
  366. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  367. static struct resource bfin_sir_resources[] = {
  368. #ifdef CONFIG_BFIN_SIR0
  369. {
  370. .start = 0xFFC00400,
  371. .end = 0xFFC004FF,
  372. .flags = IORESOURCE_MEM,
  373. },
  374. #endif
  375. #ifdef CONFIG_BFIN_SIR1
  376. {
  377. .start = 0xFFC02000,
  378. .end = 0xFFC020FF,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. #endif
  382. };
  383. static struct platform_device bfin_sir_device = {
  384. .name = "bfin_sir",
  385. .id = 0,
  386. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  387. .resource = bfin_sir_resources,
  388. };
  389. #endif
  390. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  391. static struct resource bfin_twi0_resource[] = {
  392. [0] = {
  393. .start = TWI0_REGBASE,
  394. .end = TWI0_REGBASE,
  395. .flags = IORESOURCE_MEM,
  396. },
  397. [1] = {
  398. .start = IRQ_TWI,
  399. .end = IRQ_TWI,
  400. .flags = IORESOURCE_IRQ,
  401. },
  402. };
  403. static struct platform_device i2c_bfin_twi_device = {
  404. .name = "i2c-bfin-twi",
  405. .id = 0,
  406. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  407. .resource = bfin_twi0_resource,
  408. };
  409. #endif
  410. #ifdef CONFIG_I2C_BOARDINFO
  411. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  412. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  413. {
  414. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  415. },
  416. #endif
  417. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  418. {
  419. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  420. .irq = IRQ_PF8,
  421. },
  422. #endif
  423. };
  424. #endif
  425. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  426. static struct platform_device bfin_sport0_uart_device = {
  427. .name = "bfin-sport-uart",
  428. .id = 0,
  429. };
  430. static struct platform_device bfin_sport1_uart_device = {
  431. .name = "bfin-sport-uart",
  432. .id = 1,
  433. };
  434. #endif
  435. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  436. #include <linux/input.h>
  437. #include <linux/gpio_keys.h>
  438. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  439. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  440. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  441. };
  442. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  443. .buttons = bfin_gpio_keys_table,
  444. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  445. };
  446. static struct platform_device bfin_device_gpiokeys = {
  447. .name = "gpio-keys",
  448. .dev = {
  449. .platform_data = &bfin_gpio_keys_data,
  450. },
  451. };
  452. #endif
  453. static struct resource bfin_gpios_resources = {
  454. .start = 0,
  455. .end = MAX_BLACKFIN_GPIOS - 1,
  456. .flags = IORESOURCE_IRQ,
  457. };
  458. static struct platform_device bfin_gpios_device = {
  459. .name = "simple-gpio",
  460. .id = -1,
  461. .num_resources = 1,
  462. .resource = &bfin_gpios_resources,
  463. };
  464. static const unsigned int cclk_vlev_datasheet[] =
  465. {
  466. VRPAIR(VLEV_100, 400000000),
  467. VRPAIR(VLEV_105, 426000000),
  468. VRPAIR(VLEV_110, 500000000),
  469. VRPAIR(VLEV_115, 533000000),
  470. VRPAIR(VLEV_120, 600000000),
  471. };
  472. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  473. .tuple_tab = cclk_vlev_datasheet,
  474. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  475. .vr_settling_time = 25 /* us */,
  476. };
  477. static struct platform_device bfin_dpmc = {
  478. .name = "bfin dpmc",
  479. .dev = {
  480. .platform_data = &bfin_dmpc_vreg_data,
  481. },
  482. };
  483. static struct platform_device *stamp_devices[] __initdata = {
  484. &bfin_dpmc,
  485. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  486. &rtc_device,
  487. #endif
  488. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  489. &bfin_mac_device,
  490. #endif
  491. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  492. &bfin_spi0_device,
  493. &bfin_spi1_device,
  494. #endif
  495. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  496. &bfin_uart_device,
  497. #endif
  498. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  499. &bfin_sir_device,
  500. #endif
  501. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  502. &i2c_bfin_twi_device,
  503. #endif
  504. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  505. &bfin_sport0_uart_device,
  506. &bfin_sport1_uart_device,
  507. #endif
  508. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  509. &bfin_device_gpiokeys,
  510. #endif
  511. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  512. &ezbrd_flash_device,
  513. #endif
  514. &bfin_gpios_device,
  515. };
  516. static int __init ezbrd_init(void)
  517. {
  518. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  519. #ifdef CONFIG_I2C_BOARDINFO
  520. i2c_register_board_info(0, bfin_i2c_board_info,
  521. ARRAY_SIZE(bfin_i2c_board_info));
  522. #endif
  523. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  524. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  525. return 0;
  526. }
  527. arch_initcall(ezbrd_init);
  528. void native_machine_restart(char *cmd)
  529. {
  530. /* workaround reboot hang when booting from SPI */
  531. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  532. bfin_gpio_reset_spi0_ssel1();
  533. }
  534. void bfin_get_ether_addr(char *addr)
  535. {
  536. /* the MAC is stored in OTP memory page 0xDF */
  537. u32 ret;
  538. u64 otp_mac;
  539. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  540. ret = otp_read(0xDF, 0x00, &otp_mac);
  541. if (!(ret & 0x1)) {
  542. char *otp_mac_p = (char *)&otp_mac;
  543. for (ret = 0; ret < 6; ++ret)
  544. addr[ret] = otp_mac_p[5 - ret];
  545. }
  546. }
  547. EXPORT_SYMBOL(bfin_get_ether_addr);