devices.c 6.1 KB

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  1. /*
  2. * Author: MontaVista Software, Inc.
  3. * <source@mvista.com>
  4. *
  5. * Based on the OMAP devices.c
  6. *
  7. * 2005 (c) MontaVista Software, Inc. This file is licensed under the
  8. * terms of the GNU General Public License version 2. This program is
  9. * licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. *
  12. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  13. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version 2
  18. * of the License, or (at your option) any later version.
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  27. * MA 02110-1301, USA.
  28. */
  29. #include <linux/module.h>
  30. #include <linux/kernel.h>
  31. #include <linux/init.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/gpio.h>
  34. #include <mach/hardware.h>
  35. /*
  36. * Resource definition for the MXC IrDA
  37. */
  38. static struct resource mxc_irda_resources[] = {
  39. [0] = {
  40. .start = UART3_BASE_ADDR,
  41. .end = UART3_BASE_ADDR + SZ_4K - 1,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = MXC_INT_UART3,
  46. .end = MXC_INT_UART3,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. /* Platform Data for MXC IrDA */
  51. struct platform_device mxc_irda_device = {
  52. .name = "mxc_irda",
  53. .id = 0,
  54. .num_resources = ARRAY_SIZE(mxc_irda_resources),
  55. .resource = mxc_irda_resources,
  56. };
  57. /*
  58. * General Purpose Timer
  59. * - i.MX1: 2 timer (slighly different register handling)
  60. * - i.MX21: 3 timer
  61. * - i.MX27: 6 timer
  62. */
  63. /* We use gpt0 as system timer, so do not add a device for this one */
  64. static struct resource timer1_resources[] = {
  65. [0] = {
  66. .start = GPT2_BASE_ADDR,
  67. .end = GPT2_BASE_ADDR + 0x17,
  68. .flags = IORESOURCE_MEM
  69. },
  70. [1] = {
  71. .start = MXC_INT_GPT2,
  72. .end = MXC_INT_GPT2,
  73. .flags = IORESOURCE_IRQ,
  74. }
  75. };
  76. struct platform_device mxc_gpt1 = {
  77. .name = "imx_gpt",
  78. .id = 1,
  79. .num_resources = ARRAY_SIZE(timer1_resources),
  80. .resource = timer1_resources
  81. };
  82. static struct resource timer2_resources[] = {
  83. [0] = {
  84. .start = GPT3_BASE_ADDR,
  85. .end = GPT3_BASE_ADDR + 0x17,
  86. .flags = IORESOURCE_MEM
  87. },
  88. [1] = {
  89. .start = MXC_INT_GPT3,
  90. .end = MXC_INT_GPT3,
  91. .flags = IORESOURCE_IRQ,
  92. }
  93. };
  94. struct platform_device mxc_gpt2 = {
  95. .name = "imx_gpt",
  96. .id = 2,
  97. .num_resources = ARRAY_SIZE(timer2_resources),
  98. .resource = timer2_resources
  99. };
  100. #ifdef CONFIG_MACH_MX27
  101. static struct resource timer3_resources[] = {
  102. [0] = {
  103. .start = GPT4_BASE_ADDR,
  104. .end = GPT4_BASE_ADDR + 0x17,
  105. .flags = IORESOURCE_MEM
  106. },
  107. [1] = {
  108. .start = MXC_INT_GPT4,
  109. .end = MXC_INT_GPT4,
  110. .flags = IORESOURCE_IRQ,
  111. }
  112. };
  113. struct platform_device mxc_gpt3 = {
  114. .name = "imx_gpt",
  115. .id = 3,
  116. .num_resources = ARRAY_SIZE(timer3_resources),
  117. .resource = timer3_resources
  118. };
  119. static struct resource timer4_resources[] = {
  120. [0] = {
  121. .start = GPT5_BASE_ADDR,
  122. .end = GPT5_BASE_ADDR + 0x17,
  123. .flags = IORESOURCE_MEM
  124. },
  125. [1] = {
  126. .start = MXC_INT_GPT5,
  127. .end = MXC_INT_GPT5,
  128. .flags = IORESOURCE_IRQ,
  129. }
  130. };
  131. struct platform_device mxc_gpt4 = {
  132. .name = "imx_gpt",
  133. .id = 4,
  134. .num_resources = ARRAY_SIZE(timer4_resources),
  135. .resource = timer4_resources
  136. };
  137. static struct resource timer5_resources[] = {
  138. [0] = {
  139. .start = GPT6_BASE_ADDR,
  140. .end = GPT6_BASE_ADDR + 0x17,
  141. .flags = IORESOURCE_MEM
  142. },
  143. [1] = {
  144. .start = MXC_INT_GPT6,
  145. .end = MXC_INT_GPT6,
  146. .flags = IORESOURCE_IRQ,
  147. }
  148. };
  149. struct platform_device mxc_gpt5 = {
  150. .name = "imx_gpt",
  151. .id = 5,
  152. .num_resources = ARRAY_SIZE(timer5_resources),
  153. .resource = timer5_resources
  154. };
  155. #endif
  156. /*
  157. * Watchdog:
  158. * - i.MX1
  159. * - i.MX21
  160. * - i.MX27
  161. */
  162. static struct resource mxc_wdt_resources[] = {
  163. {
  164. .start = WDOG_BASE_ADDR,
  165. .end = WDOG_BASE_ADDR + 0x30,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. };
  169. struct platform_device mxc_wdt = {
  170. .name = "mxc_wdt",
  171. .id = 0,
  172. .num_resources = ARRAY_SIZE(mxc_wdt_resources),
  173. .resource = mxc_wdt_resources,
  174. };
  175. static struct resource mxc_w1_master_resources[] = {
  176. {
  177. .start = OWIRE_BASE_ADDR,
  178. .end = OWIRE_BASE_ADDR + SZ_4K - 1,
  179. .flags = IORESOURCE_MEM,
  180. },
  181. };
  182. struct platform_device mxc_w1_master_device = {
  183. .name = "mxc_w1",
  184. .id = 0,
  185. .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
  186. .resource = mxc_w1_master_resources,
  187. };
  188. static struct resource mxc_nand_resources[] = {
  189. {
  190. .start = NFC_BASE_ADDR,
  191. .end = NFC_BASE_ADDR + 0xfff,
  192. .flags = IORESOURCE_MEM
  193. }, {
  194. .start = MXC_INT_NANDFC,
  195. .end = MXC_INT_NANDFC,
  196. .flags = IORESOURCE_IRQ
  197. },
  198. };
  199. struct platform_device mxc_nand_device = {
  200. .name = "mxc_nand",
  201. .id = 0,
  202. .num_resources = ARRAY_SIZE(mxc_nand_resources),
  203. .resource = mxc_nand_resources,
  204. };
  205. /* GPIO port description */
  206. static struct mxc_gpio_port imx_gpio_ports[] = {
  207. [0] = {
  208. .chip.label = "gpio-0",
  209. .irq = MXC_INT_GPIO,
  210. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0),
  211. .virtual_irq_start = MXC_GPIO_IRQ_START,
  212. },
  213. [1] = {
  214. .chip.label = "gpio-1",
  215. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1),
  216. .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
  217. },
  218. [2] = {
  219. .chip.label = "gpio-2",
  220. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2),
  221. .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
  222. },
  223. [3] = {
  224. .chip.label = "gpio-3",
  225. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3),
  226. .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
  227. },
  228. [4] = {
  229. .chip.label = "gpio-4",
  230. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4),
  231. .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
  232. },
  233. [5] = {
  234. .chip.label = "gpio-5",
  235. .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5),
  236. .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
  237. }
  238. };
  239. int __init mxc_register_gpios(void)
  240. {
  241. return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
  242. }