s3c6410.c 2.3 KB

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  1. /* linux/arch/arm/mach-s3c64xx/s3c6410.c
  2. *
  3. * Copyright 2008 Simtec Electronics
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/clk.h>
  19. #include <linux/io.h>
  20. #include <linux/sysdev.h>
  21. #include <linux/serial_core.h>
  22. #include <linux/platform_device.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/irq.h>
  26. #include <mach/hardware.h>
  27. #include <asm/irq.h>
  28. #include <plat/cpu-freq.h>
  29. #include <plat/regs-serial.h>
  30. #include <mach/regs-clock.h>
  31. #include <plat/cpu.h>
  32. #include <plat/devs.h>
  33. #include <plat/clock.h>
  34. #include <plat/sdhci.h>
  35. #include <plat/ata-core.h>
  36. #include <plat/adc-core.h>
  37. #include <plat/iic-core.h>
  38. #include <plat/onenand-core.h>
  39. #include "common.h"
  40. void __init s3c6410_map_io(void)
  41. {
  42. /* initialise device information early */
  43. s3c6410_default_sdhci0();
  44. s3c6410_default_sdhci1();
  45. s3c6410_default_sdhci2();
  46. /* the i2c devices are directly compatible with s3c2440 */
  47. s3c_i2c0_setname("s3c2440-i2c");
  48. s3c_i2c1_setname("s3c2440-i2c");
  49. s3c_adc_setname("s3c64xx-adc");
  50. s3c_device_nand.name = "s3c6400-nand";
  51. s3c_onenand_setname("s3c6410-onenand");
  52. s3c64xx_onenand1_setname("s3c6410-onenand");
  53. s3c_cfcon_setname("s3c64xx-pata");
  54. }
  55. void __init s3c6410_init_clocks(int xtal)
  56. {
  57. printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
  58. s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
  59. s3c64xx_setup_clocks();
  60. }
  61. void __init s3c6410_init_irq(void)
  62. {
  63. /* VIC0 is missing IRQ7, VIC1 is fully populated. */
  64. s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
  65. }
  66. struct sysdev_class s3c6410_sysclass = {
  67. .name = "s3c6410-core",
  68. };
  69. static struct sys_device s3c6410_sysdev = {
  70. .cls = &s3c6410_sysclass,
  71. };
  72. static int __init s3c6410_core_init(void)
  73. {
  74. return sysdev_class_register(&s3c6410_sysclass);
  75. }
  76. core_initcall(s3c6410_core_init);
  77. int __init s3c6410_init(void)
  78. {
  79. printk("S3C6410: Initialising architecture\n");
  80. return sysdev_register(&s3c6410_sysdev);
  81. }