iwl-core.c 57 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h" /* FIXME: remove */
  34. #include "iwl-debug.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-rfkill.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. MODULE_DESCRIPTION("iwl core");
  41. MODULE_VERSION(IWLWIFI_VERSION);
  42. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  43. MODULE_LICENSE("GPL");
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO2_##s##M_PLCP,\
  48. IWL_RATE_MIMO3_##s##M_PLCP,\
  49. IWL_RATE_##r##M_IEEE, \
  50. IWL_RATE_##ip##M_INDEX, \
  51. IWL_RATE_##in##M_INDEX, \
  52. IWL_RATE_##rp##M_INDEX, \
  53. IWL_RATE_##rn##M_INDEX, \
  54. IWL_RATE_##pp##M_INDEX, \
  55. IWL_RATE_##np##M_INDEX }
  56. /*
  57. * Parameter order:
  58. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  59. *
  60. * If there isn't a valid next or previous rate then INV is used which
  61. * maps to IWL_RATE_INVALID
  62. *
  63. */
  64. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  65. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  66. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  67. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  68. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  69. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  70. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  71. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  72. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  73. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  74. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  75. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  76. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  77. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  78. /* FIXME:RS: ^^ should be INV (legacy) */
  79. };
  80. EXPORT_SYMBOL(iwl_rates);
  81. /**
  82. * translate ucode response to mac80211 tx status control values
  83. */
  84. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  85. struct ieee80211_tx_info *info)
  86. {
  87. int rate_index;
  88. struct ieee80211_tx_rate *r = &info->control.rates[0];
  89. info->antenna_sel_tx =
  90. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  91. if (rate_n_flags & RATE_MCS_HT_MSK)
  92. r->flags |= IEEE80211_TX_RC_MCS;
  93. if (rate_n_flags & RATE_MCS_GF_MSK)
  94. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  95. if (rate_n_flags & RATE_MCS_FAT_MSK)
  96. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  97. if (rate_n_flags & RATE_MCS_DUP_MSK)
  98. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  99. if (rate_n_flags & RATE_MCS_SGI_MSK)
  100. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  101. rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
  102. if (info->band == IEEE80211_BAND_5GHZ)
  103. rate_index -= IWL_FIRST_OFDM_RATE;
  104. r->idx = rate_index;
  105. }
  106. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  107. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  108. {
  109. int idx = 0;
  110. /* HT rate format */
  111. if (rate_n_flags & RATE_MCS_HT_MSK) {
  112. idx = (rate_n_flags & 0xff);
  113. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  114. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  115. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  116. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  117. idx += IWL_FIRST_OFDM_RATE;
  118. /* skip 9M not supported in ht*/
  119. if (idx >= IWL_RATE_9M_INDEX)
  120. idx += 1;
  121. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  122. return idx;
  123. /* legacy rate format, search for match in table */
  124. } else {
  125. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  126. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  127. return idx;
  128. }
  129. return -1;
  130. }
  131. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  132. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  133. {
  134. int i;
  135. u8 ind = ant;
  136. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  137. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  138. if (priv->hw_params.valid_tx_ant & BIT(ind))
  139. return ind;
  140. }
  141. return ant;
  142. }
  143. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  144. EXPORT_SYMBOL(iwl_bcast_addr);
  145. /* This function both allocates and initializes hw and priv. */
  146. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  147. struct ieee80211_ops *hw_ops)
  148. {
  149. struct iwl_priv *priv;
  150. /* mac80211 allocates memory for this device instance, including
  151. * space for this driver's private structure */
  152. struct ieee80211_hw *hw =
  153. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  154. if (hw == NULL) {
  155. printk(KERN_ERR "%s: Can not allocate network device\n",
  156. cfg->name);
  157. goto out;
  158. }
  159. priv = hw->priv;
  160. priv->hw = hw;
  161. out:
  162. return hw;
  163. }
  164. EXPORT_SYMBOL(iwl_alloc_all);
  165. void iwl_hw_detect(struct iwl_priv *priv)
  166. {
  167. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  168. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  169. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  170. }
  171. EXPORT_SYMBOL(iwl_hw_detect);
  172. int iwl_hw_nic_init(struct iwl_priv *priv)
  173. {
  174. unsigned long flags;
  175. struct iwl_rx_queue *rxq = &priv->rxq;
  176. int ret;
  177. /* nic_init */
  178. spin_lock_irqsave(&priv->lock, flags);
  179. priv->cfg->ops->lib->apm_ops.init(priv);
  180. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  181. spin_unlock_irqrestore(&priv->lock, flags);
  182. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  183. priv->cfg->ops->lib->apm_ops.config(priv);
  184. /* Allocate the RX queue, or reset if it is already allocated */
  185. if (!rxq->bd) {
  186. ret = iwl_rx_queue_alloc(priv);
  187. if (ret) {
  188. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  189. return -ENOMEM;
  190. }
  191. } else
  192. iwl_rx_queue_reset(priv, rxq);
  193. iwl_rx_replenish(priv);
  194. iwl_rx_init(priv, rxq);
  195. spin_lock_irqsave(&priv->lock, flags);
  196. rxq->need_update = 1;
  197. iwl_rx_queue_update_write_ptr(priv, rxq);
  198. spin_unlock_irqrestore(&priv->lock, flags);
  199. /* Allocate and init all Tx and Command queues */
  200. ret = iwl_txq_ctx_reset(priv);
  201. if (ret)
  202. return ret;
  203. set_bit(STATUS_INIT, &priv->status);
  204. return 0;
  205. }
  206. EXPORT_SYMBOL(iwl_hw_nic_init);
  207. void iwl_reset_qos(struct iwl_priv *priv)
  208. {
  209. u16 cw_min = 15;
  210. u16 cw_max = 1023;
  211. u8 aifs = 2;
  212. bool is_legacy = false;
  213. unsigned long flags;
  214. int i;
  215. spin_lock_irqsave(&priv->lock, flags);
  216. /* QoS always active in AP and ADHOC mode
  217. * In STA mode wait for association
  218. */
  219. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  220. priv->iw_mode == NL80211_IFTYPE_AP)
  221. priv->qos_data.qos_active = 1;
  222. else
  223. priv->qos_data.qos_active = 0;
  224. /* check for legacy mode */
  225. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  226. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  227. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  228. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  229. cw_min = 31;
  230. is_legacy = 1;
  231. }
  232. if (priv->qos_data.qos_active)
  233. aifs = 3;
  234. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  235. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  236. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  237. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  238. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  239. if (priv->qos_data.qos_active) {
  240. i = 1;
  241. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  242. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  243. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  244. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  245. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  246. i = 2;
  247. priv->qos_data.def_qos_parm.ac[i].cw_min =
  248. cpu_to_le16((cw_min + 1) / 2 - 1);
  249. priv->qos_data.def_qos_parm.ac[i].cw_max =
  250. cpu_to_le16(cw_max);
  251. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  252. if (is_legacy)
  253. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  254. cpu_to_le16(6016);
  255. else
  256. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  257. cpu_to_le16(3008);
  258. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  259. i = 3;
  260. priv->qos_data.def_qos_parm.ac[i].cw_min =
  261. cpu_to_le16((cw_min + 1) / 4 - 1);
  262. priv->qos_data.def_qos_parm.ac[i].cw_max =
  263. cpu_to_le16((cw_max + 1) / 2 - 1);
  264. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  265. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  266. if (is_legacy)
  267. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  268. cpu_to_le16(3264);
  269. else
  270. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  271. cpu_to_le16(1504);
  272. } else {
  273. for (i = 1; i < 4; i++) {
  274. priv->qos_data.def_qos_parm.ac[i].cw_min =
  275. cpu_to_le16(cw_min);
  276. priv->qos_data.def_qos_parm.ac[i].cw_max =
  277. cpu_to_le16(cw_max);
  278. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  279. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  280. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  281. }
  282. }
  283. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  284. spin_unlock_irqrestore(&priv->lock, flags);
  285. }
  286. EXPORT_SYMBOL(iwl_reset_qos);
  287. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  288. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  289. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  290. struct ieee80211_sta_ht_cap *ht_info,
  291. enum ieee80211_band band)
  292. {
  293. u16 max_bit_rate = 0;
  294. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  295. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  296. ht_info->cap = 0;
  297. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  298. ht_info->ht_supported = true;
  299. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  300. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  301. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  302. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  303. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  304. if (priv->hw_params.fat_channel & BIT(band)) {
  305. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  306. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  307. ht_info->mcs.rx_mask[4] = 0x01;
  308. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  309. }
  310. if (priv->cfg->mod_params->amsdu_size_8K)
  311. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  312. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  313. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  314. ht_info->mcs.rx_mask[0] = 0xFF;
  315. if (rx_chains_num >= 2)
  316. ht_info->mcs.rx_mask[1] = 0xFF;
  317. if (rx_chains_num >= 3)
  318. ht_info->mcs.rx_mask[2] = 0xFF;
  319. /* Highest supported Rx data rate */
  320. max_bit_rate *= rx_chains_num;
  321. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  322. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  323. /* Tx MCS capabilities */
  324. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  325. if (tx_chains_num != rx_chains_num) {
  326. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  327. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  328. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  329. }
  330. }
  331. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  332. struct ieee80211_rate *rates)
  333. {
  334. int i;
  335. for (i = 0; i < IWL_RATE_COUNT; i++) {
  336. rates[i].bitrate = iwl_rates[i].ieee * 5;
  337. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  338. rates[i].hw_value_short = i;
  339. rates[i].flags = 0;
  340. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  341. /*
  342. * If CCK != 1M then set short preamble rate flag.
  343. */
  344. rates[i].flags |=
  345. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  346. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  347. }
  348. }
  349. }
  350. /**
  351. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  352. */
  353. int iwlcore_init_geos(struct iwl_priv *priv)
  354. {
  355. struct iwl_channel_info *ch;
  356. struct ieee80211_supported_band *sband;
  357. struct ieee80211_channel *channels;
  358. struct ieee80211_channel *geo_ch;
  359. struct ieee80211_rate *rates;
  360. int i = 0;
  361. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  362. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  363. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  364. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  365. return 0;
  366. }
  367. channels = kzalloc(sizeof(struct ieee80211_channel) *
  368. priv->channel_count, GFP_KERNEL);
  369. if (!channels)
  370. return -ENOMEM;
  371. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  372. GFP_KERNEL);
  373. if (!rates) {
  374. kfree(channels);
  375. return -ENOMEM;
  376. }
  377. /* 5.2GHz channels start after the 2.4GHz channels */
  378. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  379. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  380. /* just OFDM */
  381. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  382. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  383. if (priv->cfg->sku & IWL_SKU_N)
  384. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  385. IEEE80211_BAND_5GHZ);
  386. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  387. sband->channels = channels;
  388. /* OFDM & CCK */
  389. sband->bitrates = rates;
  390. sband->n_bitrates = IWL_RATE_COUNT;
  391. if (priv->cfg->sku & IWL_SKU_N)
  392. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  393. IEEE80211_BAND_2GHZ);
  394. priv->ieee_channels = channels;
  395. priv->ieee_rates = rates;
  396. for (i = 0; i < priv->channel_count; i++) {
  397. ch = &priv->channel_info[i];
  398. /* FIXME: might be removed if scan is OK */
  399. if (!is_channel_valid(ch))
  400. continue;
  401. if (is_channel_a_band(ch))
  402. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  403. else
  404. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  405. geo_ch = &sband->channels[sband->n_channels++];
  406. geo_ch->center_freq =
  407. ieee80211_channel_to_frequency(ch->channel);
  408. geo_ch->max_power = ch->max_power_avg;
  409. geo_ch->max_antenna_gain = 0xff;
  410. geo_ch->hw_value = ch->channel;
  411. if (is_channel_valid(ch)) {
  412. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  413. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  414. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  415. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  416. if (ch->flags & EEPROM_CHANNEL_RADAR)
  417. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  418. geo_ch->flags |= ch->fat_extension_channel;
  419. if (ch->max_power_avg > priv->tx_power_channel_lmt)
  420. priv->tx_power_channel_lmt = ch->max_power_avg;
  421. } else {
  422. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  423. }
  424. /* Save flags for reg domain usage */
  425. geo_ch->orig_flags = geo_ch->flags;
  426. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  427. ch->channel, geo_ch->center_freq,
  428. is_channel_a_band(ch) ? "5.2" : "2.4",
  429. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  430. "restricted" : "valid",
  431. geo_ch->flags);
  432. }
  433. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  434. priv->cfg->sku & IWL_SKU_A) {
  435. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  436. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  437. priv->pci_dev->device,
  438. priv->pci_dev->subsystem_device);
  439. priv->cfg->sku &= ~IWL_SKU_A;
  440. }
  441. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  442. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  443. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  444. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  445. return 0;
  446. }
  447. EXPORT_SYMBOL(iwlcore_init_geos);
  448. /*
  449. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  450. */
  451. void iwlcore_free_geos(struct iwl_priv *priv)
  452. {
  453. kfree(priv->ieee_channels);
  454. kfree(priv->ieee_rates);
  455. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  456. }
  457. EXPORT_SYMBOL(iwlcore_free_geos);
  458. static bool is_single_rx_stream(struct iwl_priv *priv)
  459. {
  460. return !priv->current_ht_config.is_ht ||
  461. ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
  462. (priv->current_ht_config.mcs.rx_mask[2] == 0));
  463. }
  464. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  465. enum ieee80211_band band,
  466. u16 channel, u8 extension_chan_offset)
  467. {
  468. const struct iwl_channel_info *ch_info;
  469. ch_info = iwl_get_channel_info(priv, band, channel);
  470. if (!is_channel_valid(ch_info))
  471. return 0;
  472. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  473. return !(ch_info->fat_extension_channel &
  474. IEEE80211_CHAN_NO_FAT_ABOVE);
  475. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  476. return !(ch_info->fat_extension_channel &
  477. IEEE80211_CHAN_NO_FAT_BELOW);
  478. return 0;
  479. }
  480. u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
  481. struct ieee80211_sta_ht_cap *sta_ht_inf)
  482. {
  483. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  484. if ((!iwl_ht_conf->is_ht) ||
  485. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
  486. (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
  487. return 0;
  488. if (sta_ht_inf) {
  489. if ((!sta_ht_inf->ht_supported) ||
  490. (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
  491. return 0;
  492. }
  493. return iwl_is_channel_extension(priv, priv->band,
  494. le16_to_cpu(priv->staging_rxon.channel),
  495. iwl_ht_conf->extension_chan_offset);
  496. }
  497. EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
  498. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  499. {
  500. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  501. if (hw_decrypt)
  502. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  503. else
  504. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  505. }
  506. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  507. /**
  508. * iwl_check_rxon_cmd - validate RXON structure is valid
  509. *
  510. * NOTE: This is really only useful during development and can eventually
  511. * be #ifdef'd out once the driver is stable and folks aren't actively
  512. * making changes
  513. */
  514. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  515. {
  516. int error = 0;
  517. int counter = 1;
  518. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  519. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  520. error |= le32_to_cpu(rxon->flags &
  521. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  522. RXON_FLG_RADAR_DETECT_MSK));
  523. if (error)
  524. IWL_WARN(priv, "check 24G fields %d | %d\n",
  525. counter++, error);
  526. } else {
  527. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  528. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  529. if (error)
  530. IWL_WARN(priv, "check 52 fields %d | %d\n",
  531. counter++, error);
  532. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  533. if (error)
  534. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  535. counter++, error);
  536. }
  537. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  538. if (error)
  539. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  540. /* make sure basic rates 6Mbps and 1Mbps are supported */
  541. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  542. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  543. if (error)
  544. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  545. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  546. if (error)
  547. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  548. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  549. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  550. if (error)
  551. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  552. counter++, error);
  553. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  554. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  555. if (error)
  556. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  557. counter++, error);
  558. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  559. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  560. if (error)
  561. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  562. counter++, error);
  563. if (error)
  564. IWL_WARN(priv, "Tuning to channel %d\n",
  565. le16_to_cpu(rxon->channel));
  566. if (error) {
  567. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  568. return -1;
  569. }
  570. return 0;
  571. }
  572. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  573. /**
  574. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  575. * @priv: staging_rxon is compared to active_rxon
  576. *
  577. * If the RXON structure is changing enough to require a new tune,
  578. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  579. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  580. */
  581. int iwl_full_rxon_required(struct iwl_priv *priv)
  582. {
  583. /* These items are only settable from the full RXON command */
  584. if (!(iwl_is_associated(priv)) ||
  585. compare_ether_addr(priv->staging_rxon.bssid_addr,
  586. priv->active_rxon.bssid_addr) ||
  587. compare_ether_addr(priv->staging_rxon.node_addr,
  588. priv->active_rxon.node_addr) ||
  589. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  590. priv->active_rxon.wlap_bssid_addr) ||
  591. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  592. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  593. (priv->staging_rxon.air_propagation !=
  594. priv->active_rxon.air_propagation) ||
  595. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  596. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  597. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  598. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  599. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  600. return 1;
  601. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  602. * be updated with the RXON_ASSOC command -- however only some
  603. * flag transitions are allowed using RXON_ASSOC */
  604. /* Check if we are not switching bands */
  605. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  606. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  607. return 1;
  608. /* Check if we are switching association toggle */
  609. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  610. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  611. return 1;
  612. return 0;
  613. }
  614. EXPORT_SYMBOL(iwl_full_rxon_required);
  615. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  616. {
  617. int i;
  618. int rate_mask;
  619. /* Set rate mask*/
  620. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  621. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  622. else
  623. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  624. /* Find lowest valid rate */
  625. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  626. i = iwl_rates[i].next_ieee) {
  627. if (rate_mask & (1 << i))
  628. return iwl_rates[i].plcp;
  629. }
  630. /* No valid rate was found. Assign the lowest one */
  631. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  632. return IWL_RATE_1M_PLCP;
  633. else
  634. return IWL_RATE_6M_PLCP;
  635. }
  636. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  637. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  638. {
  639. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  640. u32 val;
  641. if (!ht_info->is_ht) {
  642. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  643. RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
  644. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  645. RXON_FLG_FAT_PROT_MSK |
  646. RXON_FLG_HT_PROT_MSK);
  647. return;
  648. }
  649. /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
  650. if (iwl_is_fat_tx_allowed(priv, NULL))
  651. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  652. else
  653. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  654. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  655. /* Note: control channel is opposite of extension channel */
  656. switch (ht_info->extension_chan_offset) {
  657. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  658. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  659. break;
  660. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  661. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  662. break;
  663. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  664. default:
  665. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  666. break;
  667. }
  668. val = ht_info->ht_protection;
  669. rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
  670. iwl_set_rxon_chain(priv);
  671. IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
  672. "rxon flags 0x%X operation mode :0x%X "
  673. "extension channel offset 0x%x\n",
  674. ht_info->mcs.rx_mask[0],
  675. ht_info->mcs.rx_mask[1],
  676. ht_info->mcs.rx_mask[2],
  677. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  678. ht_info->extension_chan_offset);
  679. return;
  680. }
  681. EXPORT_SYMBOL(iwl_set_rxon_ht);
  682. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  683. #define IWL_NUM_RX_CHAINS_SINGLE 2
  684. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  685. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  686. /* Determine how many receiver/antenna chains to use.
  687. * More provides better reception via diversity. Fewer saves power.
  688. * MIMO (dual stream) requires at least 2, but works better with 3.
  689. * This does not determine *which* chains to use, just how many.
  690. */
  691. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  692. {
  693. bool is_single = is_single_rx_stream(priv);
  694. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  695. /* # of Rx chains to use when expecting MIMO. */
  696. if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
  697. WLAN_HT_CAP_SM_PS_STATIC)))
  698. return IWL_NUM_RX_CHAINS_SINGLE;
  699. else
  700. return IWL_NUM_RX_CHAINS_MULTIPLE;
  701. }
  702. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  703. {
  704. int idle_cnt;
  705. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  706. /* # Rx chains when idling and maybe trying to save power */
  707. switch (priv->current_ht_config.sm_ps) {
  708. case WLAN_HT_CAP_SM_PS_STATIC:
  709. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  710. idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
  711. IWL_NUM_IDLE_CHAINS_SINGLE;
  712. break;
  713. case WLAN_HT_CAP_SM_PS_DISABLED:
  714. idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  715. break;
  716. case WLAN_HT_CAP_SM_PS_INVALID:
  717. default:
  718. IWL_ERR(priv, "invalid mimo ps mode %d\n",
  719. priv->current_ht_config.sm_ps);
  720. WARN_ON(1);
  721. idle_cnt = -1;
  722. break;
  723. }
  724. return idle_cnt;
  725. }
  726. /* up to 4 chains */
  727. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  728. {
  729. u8 res;
  730. res = (chain_bitmap & BIT(0)) >> 0;
  731. res += (chain_bitmap & BIT(1)) >> 1;
  732. res += (chain_bitmap & BIT(2)) >> 2;
  733. res += (chain_bitmap & BIT(4)) >> 4;
  734. return res;
  735. }
  736. /**
  737. * iwl_is_monitor_mode - Determine if interface in monitor mode
  738. *
  739. * priv->iw_mode is set in add_interface, but add_interface is
  740. * never called for monitor mode. The only way mac80211 informs us about
  741. * monitor mode is through configuring filters (call to configure_filter).
  742. */
  743. static bool iwl_is_monitor_mode(struct iwl_priv *priv)
  744. {
  745. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  746. }
  747. /**
  748. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  749. *
  750. * Selects how many and which Rx receivers/antennas/chains to use.
  751. * This should not be used for scan command ... it puts data in wrong place.
  752. */
  753. void iwl_set_rxon_chain(struct iwl_priv *priv)
  754. {
  755. bool is_single = is_single_rx_stream(priv);
  756. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  757. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  758. u32 active_chains;
  759. u16 rx_chain;
  760. /* Tell uCode which antennas are actually connected.
  761. * Before first association, we assume all antennas are connected.
  762. * Just after first association, iwl_chain_noise_calibration()
  763. * checks which antennas actually *are* connected. */
  764. if (priv->chain_noise_data.active_chains)
  765. active_chains = priv->chain_noise_data.active_chains;
  766. else
  767. active_chains = priv->hw_params.valid_rx_ant;
  768. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  769. /* How many receivers should we use? */
  770. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  771. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  772. /* correct rx chain count according hw settings
  773. * and chain noise calibration
  774. */
  775. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  776. if (valid_rx_cnt < active_rx_cnt)
  777. active_rx_cnt = valid_rx_cnt;
  778. if (valid_rx_cnt < idle_rx_cnt)
  779. idle_rx_cnt = valid_rx_cnt;
  780. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  781. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  782. /* copied from 'iwl_bg_request_scan()' */
  783. /* Force use of chains B and C (0x6) for Rx for 4965
  784. * Avoid A (0x1) because of its off-channel reception on A-band.
  785. * MIMO is not used here, but value is required */
  786. if (iwl_is_monitor_mode(priv) &&
  787. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  788. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  789. rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS;
  790. rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS;
  791. rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  792. rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  793. }
  794. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  795. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  796. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  797. else
  798. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  799. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  800. priv->staging_rxon.rx_chain,
  801. active_rx_cnt, idle_rx_cnt);
  802. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  803. active_rx_cnt < idle_rx_cnt);
  804. }
  805. EXPORT_SYMBOL(iwl_set_rxon_chain);
  806. /**
  807. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  808. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  809. * @channel: Any channel valid for the requested phymode
  810. * In addition to setting the staging RXON, priv->phymode is also set.
  811. *
  812. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  813. * in the staging RXON flag structure based on the phymode
  814. */
  815. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  816. {
  817. enum ieee80211_band band = ch->band;
  818. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  819. if (!iwl_get_channel_info(priv, band, channel)) {
  820. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  821. channel, band);
  822. return -EINVAL;
  823. }
  824. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  825. (priv->band == band))
  826. return 0;
  827. priv->staging_rxon.channel = cpu_to_le16(channel);
  828. if (band == IEEE80211_BAND_5GHZ)
  829. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  830. else
  831. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  832. priv->band = band;
  833. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  834. return 0;
  835. }
  836. EXPORT_SYMBOL(iwl_set_rxon_channel);
  837. void iwl_set_flags_for_band(struct iwl_priv *priv,
  838. enum ieee80211_band band)
  839. {
  840. if (band == IEEE80211_BAND_5GHZ) {
  841. priv->staging_rxon.flags &=
  842. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  843. | RXON_FLG_CCK_MSK);
  844. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  845. } else {
  846. /* Copied from iwl_post_associate() */
  847. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  848. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  849. else
  850. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  851. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  852. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  853. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  854. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  855. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  856. }
  857. }
  858. EXPORT_SYMBOL(iwl_set_flags_for_band);
  859. /*
  860. * initialize rxon structure with default values from eeprom
  861. */
  862. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  863. {
  864. const struct iwl_channel_info *ch_info;
  865. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  866. switch (mode) {
  867. case NL80211_IFTYPE_AP:
  868. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  869. break;
  870. case NL80211_IFTYPE_STATION:
  871. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  872. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  873. break;
  874. case NL80211_IFTYPE_ADHOC:
  875. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  876. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  877. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  878. RXON_FILTER_ACCEPT_GRP_MSK;
  879. break;
  880. case NL80211_IFTYPE_MONITOR:
  881. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  882. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  883. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  884. break;
  885. default:
  886. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  887. break;
  888. }
  889. #if 0
  890. /* TODO: Figure out when short_preamble would be set and cache from
  891. * that */
  892. if (!hw_to_local(priv->hw)->short_preamble)
  893. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  894. else
  895. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  896. #endif
  897. ch_info = iwl_get_channel_info(priv, priv->band,
  898. le16_to_cpu(priv->active_rxon.channel));
  899. if (!ch_info)
  900. ch_info = &priv->channel_info[0];
  901. /*
  902. * in some case A channels are all non IBSS
  903. * in this case force B/G channel
  904. */
  905. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  906. !(is_channel_ibss(ch_info)))
  907. ch_info = &priv->channel_info[0];
  908. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  909. priv->band = ch_info->band;
  910. iwl_set_flags_for_band(priv, priv->band);
  911. priv->staging_rxon.ofdm_basic_rates =
  912. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  913. priv->staging_rxon.cck_basic_rates =
  914. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  915. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  916. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  917. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  918. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  919. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  920. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  921. }
  922. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  923. void iwl_set_rate(struct iwl_priv *priv)
  924. {
  925. const struct ieee80211_supported_band *hw = NULL;
  926. struct ieee80211_rate *rate;
  927. int i;
  928. hw = iwl_get_hw_mode(priv, priv->band);
  929. if (!hw) {
  930. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  931. return;
  932. }
  933. priv->active_rate = 0;
  934. priv->active_rate_basic = 0;
  935. for (i = 0; i < hw->n_bitrates; i++) {
  936. rate = &(hw->bitrates[i]);
  937. if (rate->hw_value < IWL_RATE_COUNT)
  938. priv->active_rate |= (1 << rate->hw_value);
  939. }
  940. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  941. priv->active_rate, priv->active_rate_basic);
  942. /*
  943. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  944. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  945. * OFDM
  946. */
  947. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  948. priv->staging_rxon.cck_basic_rates =
  949. ((priv->active_rate_basic &
  950. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  951. else
  952. priv->staging_rxon.cck_basic_rates =
  953. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  954. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  955. priv->staging_rxon.ofdm_basic_rates =
  956. ((priv->active_rate_basic &
  957. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  958. IWL_FIRST_OFDM_RATE) & 0xFF;
  959. else
  960. priv->staging_rxon.ofdm_basic_rates =
  961. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  962. }
  963. EXPORT_SYMBOL(iwl_set_rate);
  964. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  965. {
  966. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  967. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  968. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  969. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  970. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  971. rxon->channel = csa->channel;
  972. priv->staging_rxon.channel = csa->channel;
  973. }
  974. EXPORT_SYMBOL(iwl_rx_csa);
  975. #ifdef CONFIG_IWLWIFI_DEBUG
  976. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  977. {
  978. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  979. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  980. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  981. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  982. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  983. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  984. le32_to_cpu(rxon->filter_flags));
  985. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  986. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  987. rxon->ofdm_basic_rates);
  988. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  989. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  990. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  991. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  992. }
  993. #endif
  994. /**
  995. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  996. */
  997. void iwl_irq_handle_error(struct iwl_priv *priv)
  998. {
  999. /* Set the FW error flag -- cleared on iwl_down */
  1000. set_bit(STATUS_FW_ERROR, &priv->status);
  1001. /* Cancel currently queued command. */
  1002. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1003. #ifdef CONFIG_IWLWIFI_DEBUG
  1004. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  1005. iwl_dump_nic_error_log(priv);
  1006. iwl_dump_nic_event_log(priv);
  1007. iwl_print_rx_config_cmd(priv);
  1008. }
  1009. #endif
  1010. wake_up_interruptible(&priv->wait_command_queue);
  1011. /* Keep the restart process from trying to send host
  1012. * commands by clearing the INIT status bit */
  1013. clear_bit(STATUS_READY, &priv->status);
  1014. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1015. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1016. "Restarting adapter due to uCode error.\n");
  1017. if (iwl_is_associated(priv)) {
  1018. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  1019. sizeof(priv->recovery_rxon));
  1020. priv->error_recovering = 1;
  1021. }
  1022. if (priv->cfg->mod_params->restart_fw)
  1023. queue_work(priv->workqueue, &priv->restart);
  1024. }
  1025. }
  1026. EXPORT_SYMBOL(iwl_irq_handle_error);
  1027. void iwl_configure_filter(struct ieee80211_hw *hw,
  1028. unsigned int changed_flags,
  1029. unsigned int *total_flags,
  1030. int mc_count, struct dev_addr_list *mc_list)
  1031. {
  1032. struct iwl_priv *priv = hw->priv;
  1033. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1034. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1035. changed_flags, *total_flags);
  1036. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1037. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1038. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1039. else
  1040. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1041. }
  1042. if (changed_flags & FIF_ALLMULTI) {
  1043. if (*total_flags & FIF_ALLMULTI)
  1044. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1045. else
  1046. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1047. }
  1048. if (changed_flags & FIF_CONTROL) {
  1049. if (*total_flags & FIF_CONTROL)
  1050. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1051. else
  1052. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1053. }
  1054. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1055. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1056. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1057. else
  1058. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1059. }
  1060. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1061. * since mac80211 will call ieee80211_hw_config immediately.
  1062. * (mc_list is not supported at this time). Otherwise, we need to
  1063. * queue a background iwl_commit_rxon work.
  1064. */
  1065. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1066. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1067. }
  1068. EXPORT_SYMBOL(iwl_configure_filter);
  1069. int iwl_setup_mac(struct iwl_priv *priv)
  1070. {
  1071. int ret;
  1072. struct ieee80211_hw *hw = priv->hw;
  1073. hw->rate_control_algorithm = "iwl-agn-rs";
  1074. /* Tell mac80211 our characteristics */
  1075. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1076. IEEE80211_HW_NOISE_DBM |
  1077. IEEE80211_HW_AMPDU_AGGREGATION |
  1078. IEEE80211_HW_SUPPORTS_PS;
  1079. hw->wiphy->interface_modes =
  1080. BIT(NL80211_IFTYPE_STATION) |
  1081. BIT(NL80211_IFTYPE_ADHOC);
  1082. hw->wiphy->custom_regulatory = true;
  1083. /* Default value; 4 EDCA QOS priorities */
  1084. hw->queues = 4;
  1085. /* queues to support 11n aggregation */
  1086. if (priv->cfg->sku & IWL_SKU_N)
  1087. hw->ampdu_queues = priv->cfg->mod_params->num_of_ampdu_queues;
  1088. hw->conf.beacon_int = 100;
  1089. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1090. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1091. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1092. &priv->bands[IEEE80211_BAND_2GHZ];
  1093. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1094. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1095. &priv->bands[IEEE80211_BAND_5GHZ];
  1096. ret = ieee80211_register_hw(priv->hw);
  1097. if (ret) {
  1098. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1099. return ret;
  1100. }
  1101. priv->mac80211_registered = 1;
  1102. return 0;
  1103. }
  1104. EXPORT_SYMBOL(iwl_setup_mac);
  1105. int iwl_set_hw_params(struct iwl_priv *priv)
  1106. {
  1107. priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
  1108. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1109. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1110. if (priv->cfg->mod_params->amsdu_size_8K)
  1111. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1112. else
  1113. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1114. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1115. if (priv->cfg->mod_params->disable_11n)
  1116. priv->cfg->sku &= ~IWL_SKU_N;
  1117. /* Device-specific setup */
  1118. return priv->cfg->ops->lib->set_hw_params(priv);
  1119. }
  1120. EXPORT_SYMBOL(iwl_set_hw_params);
  1121. int iwl_init_drv(struct iwl_priv *priv)
  1122. {
  1123. int ret;
  1124. priv->ibss_beacon = NULL;
  1125. spin_lock_init(&priv->lock);
  1126. spin_lock_init(&priv->power_data.lock);
  1127. spin_lock_init(&priv->sta_lock);
  1128. spin_lock_init(&priv->hcmd_lock);
  1129. INIT_LIST_HEAD(&priv->free_frames);
  1130. mutex_init(&priv->mutex);
  1131. /* Clear the driver's (not device's) station table */
  1132. iwl_clear_stations_table(priv);
  1133. priv->data_retry_limit = -1;
  1134. priv->ieee_channels = NULL;
  1135. priv->ieee_rates = NULL;
  1136. priv->band = IEEE80211_BAND_2GHZ;
  1137. priv->iw_mode = NL80211_IFTYPE_STATION;
  1138. priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
  1139. /* Choose which receivers/antennas to use */
  1140. iwl_set_rxon_chain(priv);
  1141. iwl_init_scan_params(priv);
  1142. iwl_reset_qos(priv);
  1143. priv->qos_data.qos_active = 0;
  1144. priv->qos_data.qos_cap.val = 0;
  1145. priv->rates_mask = IWL_RATES_MASK;
  1146. /* If power management is turned on, default to CAM mode */
  1147. priv->power_mode = IWL_POWER_MODE_CAM;
  1148. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
  1149. ret = iwl_init_channel_map(priv);
  1150. if (ret) {
  1151. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1152. goto err;
  1153. }
  1154. ret = iwlcore_init_geos(priv);
  1155. if (ret) {
  1156. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1157. goto err_free_channel_map;
  1158. }
  1159. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1160. return 0;
  1161. err_free_channel_map:
  1162. iwl_free_channel_map(priv);
  1163. err:
  1164. return ret;
  1165. }
  1166. EXPORT_SYMBOL(iwl_init_drv);
  1167. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1168. {
  1169. int ret = 0;
  1170. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1171. IWL_WARN(priv, "Requested user TXPOWER %d below limit.\n",
  1172. priv->tx_power_user_lmt);
  1173. return -EINVAL;
  1174. }
  1175. if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
  1176. IWL_WARN(priv, "Requested user TXPOWER %d above limit.\n",
  1177. priv->tx_power_user_lmt);
  1178. return -EINVAL;
  1179. }
  1180. if (priv->tx_power_user_lmt != tx_power)
  1181. force = true;
  1182. priv->tx_power_user_lmt = tx_power;
  1183. if (force && priv->cfg->ops->lib->send_tx_power)
  1184. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1185. return ret;
  1186. }
  1187. EXPORT_SYMBOL(iwl_set_tx_power);
  1188. void iwl_uninit_drv(struct iwl_priv *priv)
  1189. {
  1190. iwl_calib_free_results(priv);
  1191. iwlcore_free_geos(priv);
  1192. iwl_free_channel_map(priv);
  1193. kfree(priv->scan);
  1194. }
  1195. EXPORT_SYMBOL(iwl_uninit_drv);
  1196. void iwl_disable_interrupts(struct iwl_priv *priv)
  1197. {
  1198. clear_bit(STATUS_INT_ENABLED, &priv->status);
  1199. /* disable interrupts from uCode/NIC to host */
  1200. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1201. /* acknowledge/clear/reset any interrupts still pending
  1202. * from uCode or flow handler (Rx/Tx DMA) */
  1203. iwl_write32(priv, CSR_INT, 0xffffffff);
  1204. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  1205. IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
  1206. }
  1207. EXPORT_SYMBOL(iwl_disable_interrupts);
  1208. void iwl_enable_interrupts(struct iwl_priv *priv)
  1209. {
  1210. IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
  1211. set_bit(STATUS_INT_ENABLED, &priv->status);
  1212. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  1213. }
  1214. EXPORT_SYMBOL(iwl_enable_interrupts);
  1215. int iwl_send_bt_config(struct iwl_priv *priv)
  1216. {
  1217. struct iwl_bt_cmd bt_cmd = {
  1218. .flags = 3,
  1219. .lead_time = 0xAA,
  1220. .max_kill = 1,
  1221. .kill_ack_mask = 0,
  1222. .kill_cts_mask = 0,
  1223. };
  1224. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1225. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1226. }
  1227. EXPORT_SYMBOL(iwl_send_bt_config);
  1228. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1229. {
  1230. u32 stat_flags = 0;
  1231. struct iwl_host_cmd cmd = {
  1232. .id = REPLY_STATISTICS_CMD,
  1233. .meta.flags = flags,
  1234. .len = sizeof(stat_flags),
  1235. .data = (u8 *) &stat_flags,
  1236. };
  1237. return iwl_send_cmd(priv, &cmd);
  1238. }
  1239. EXPORT_SYMBOL(iwl_send_statistics_request);
  1240. /**
  1241. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1242. * using sample data 100 bytes apart. If these sample points are good,
  1243. * it's a pretty good bet that everything between them is good, too.
  1244. */
  1245. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1246. {
  1247. u32 val;
  1248. int ret = 0;
  1249. u32 errcnt = 0;
  1250. u32 i;
  1251. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1252. ret = iwl_grab_nic_access(priv);
  1253. if (ret)
  1254. return ret;
  1255. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1256. /* read data comes through single port, auto-incr addr */
  1257. /* NOTE: Use the debugless read so we don't flood kernel log
  1258. * if IWL_DL_IO is set */
  1259. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1260. i + IWL49_RTC_INST_LOWER_BOUND);
  1261. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1262. if (val != le32_to_cpu(*image)) {
  1263. ret = -EIO;
  1264. errcnt++;
  1265. if (errcnt >= 3)
  1266. break;
  1267. }
  1268. }
  1269. iwl_release_nic_access(priv);
  1270. return ret;
  1271. }
  1272. /**
  1273. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1274. * looking at all data.
  1275. */
  1276. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1277. u32 len)
  1278. {
  1279. u32 val;
  1280. u32 save_len = len;
  1281. int ret = 0;
  1282. u32 errcnt;
  1283. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1284. ret = iwl_grab_nic_access(priv);
  1285. if (ret)
  1286. return ret;
  1287. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1288. IWL49_RTC_INST_LOWER_BOUND);
  1289. errcnt = 0;
  1290. for (; len > 0; len -= sizeof(u32), image++) {
  1291. /* read data comes through single port, auto-incr addr */
  1292. /* NOTE: Use the debugless read so we don't flood kernel log
  1293. * if IWL_DL_IO is set */
  1294. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1295. if (val != le32_to_cpu(*image)) {
  1296. IWL_ERR(priv, "uCode INST section is invalid at "
  1297. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1298. save_len - len, val, le32_to_cpu(*image));
  1299. ret = -EIO;
  1300. errcnt++;
  1301. if (errcnt >= 20)
  1302. break;
  1303. }
  1304. }
  1305. iwl_release_nic_access(priv);
  1306. if (!errcnt)
  1307. IWL_DEBUG_INFO(priv,
  1308. "ucode image in INSTRUCTION memory is good\n");
  1309. return ret;
  1310. }
  1311. /**
  1312. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1313. * and verify its contents
  1314. */
  1315. int iwl_verify_ucode(struct iwl_priv *priv)
  1316. {
  1317. __le32 *image;
  1318. u32 len;
  1319. int ret;
  1320. /* Try bootstrap */
  1321. image = (__le32 *)priv->ucode_boot.v_addr;
  1322. len = priv->ucode_boot.len;
  1323. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1324. if (!ret) {
  1325. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1326. return 0;
  1327. }
  1328. /* Try initialize */
  1329. image = (__le32 *)priv->ucode_init.v_addr;
  1330. len = priv->ucode_init.len;
  1331. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1332. if (!ret) {
  1333. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1334. return 0;
  1335. }
  1336. /* Try runtime/protocol */
  1337. image = (__le32 *)priv->ucode_code.v_addr;
  1338. len = priv->ucode_code.len;
  1339. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1340. if (!ret) {
  1341. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1342. return 0;
  1343. }
  1344. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1345. /* Since nothing seems to match, show first several data entries in
  1346. * instruction SRAM, so maybe visual inspection will give a clue.
  1347. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1348. image = (__le32 *)priv->ucode_boot.v_addr;
  1349. len = priv->ucode_boot.len;
  1350. ret = iwl_verify_inst_full(priv, image, len);
  1351. return ret;
  1352. }
  1353. EXPORT_SYMBOL(iwl_verify_ucode);
  1354. static const char *desc_lookup_text[] = {
  1355. "OK",
  1356. "FAIL",
  1357. "BAD_PARAM",
  1358. "BAD_CHECKSUM",
  1359. "NMI_INTERRUPT_WDG",
  1360. "SYSASSERT",
  1361. "FATAL_ERROR",
  1362. "BAD_COMMAND",
  1363. "HW_ERROR_TUNE_LOCK",
  1364. "HW_ERROR_TEMPERATURE",
  1365. "ILLEGAL_CHAN_FREQ",
  1366. "VCC_NOT_STABLE",
  1367. "FH_ERROR",
  1368. "NMI_INTERRUPT_HOST",
  1369. "NMI_INTERRUPT_ACTION_PT",
  1370. "NMI_INTERRUPT_UNKNOWN",
  1371. "UCODE_VERSION_MISMATCH",
  1372. "HW_ERROR_ABS_LOCK",
  1373. "HW_ERROR_CAL_LOCK_FAIL",
  1374. "NMI_INTERRUPT_INST_ACTION_PT",
  1375. "NMI_INTERRUPT_DATA_ACTION_PT",
  1376. "NMI_TRM_HW_ER",
  1377. "NMI_INTERRUPT_TRM",
  1378. "NMI_INTERRUPT_BREAK_POINT"
  1379. "DEBUG_0",
  1380. "DEBUG_1",
  1381. "DEBUG_2",
  1382. "DEBUG_3",
  1383. "UNKNOWN"
  1384. };
  1385. static const char *desc_lookup(int i)
  1386. {
  1387. int max = ARRAY_SIZE(desc_lookup_text) - 1;
  1388. if (i < 0 || i > max)
  1389. i = max;
  1390. return desc_lookup_text[i];
  1391. }
  1392. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1393. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1394. void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1395. {
  1396. u32 data2, line;
  1397. u32 desc, time, count, base, data1;
  1398. u32 blink1, blink2, ilink1, ilink2;
  1399. int ret;
  1400. if (priv->ucode_type == UCODE_INIT)
  1401. base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
  1402. else
  1403. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1404. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1405. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1406. return;
  1407. }
  1408. ret = iwl_grab_nic_access(priv);
  1409. if (ret) {
  1410. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1411. return;
  1412. }
  1413. count = iwl_read_targ_mem(priv, base);
  1414. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1415. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1416. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1417. priv->status, count);
  1418. }
  1419. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  1420. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  1421. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  1422. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  1423. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  1424. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  1425. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  1426. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  1427. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  1428. IWL_ERR(priv, "Desc Time "
  1429. "data1 data2 line\n");
  1430. IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
  1431. desc_lookup(desc), desc, time, data1, data2, line);
  1432. IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
  1433. IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  1434. ilink1, ilink2);
  1435. iwl_release_nic_access(priv);
  1436. }
  1437. EXPORT_SYMBOL(iwl_dump_nic_error_log);
  1438. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1439. /**
  1440. * iwl_print_event_log - Dump error event log to syslog
  1441. *
  1442. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1443. */
  1444. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1445. u32 num_events, u32 mode)
  1446. {
  1447. u32 i;
  1448. u32 base; /* SRAM byte address of event log header */
  1449. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1450. u32 ptr; /* SRAM byte address of log data */
  1451. u32 ev, time, data; /* event log data */
  1452. if (num_events == 0)
  1453. return;
  1454. if (priv->ucode_type == UCODE_INIT)
  1455. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1456. else
  1457. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1458. if (mode == 0)
  1459. event_size = 2 * sizeof(u32);
  1460. else
  1461. event_size = 3 * sizeof(u32);
  1462. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1463. /* "time" is actually "data" for mode 0 (no timestamp).
  1464. * place event id # at far right for easier visual parsing. */
  1465. for (i = 0; i < num_events; i++) {
  1466. ev = iwl_read_targ_mem(priv, ptr);
  1467. ptr += sizeof(u32);
  1468. time = iwl_read_targ_mem(priv, ptr);
  1469. ptr += sizeof(u32);
  1470. if (mode == 0) {
  1471. /* data, ev */
  1472. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
  1473. } else {
  1474. data = iwl_read_targ_mem(priv, ptr);
  1475. ptr += sizeof(u32);
  1476. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1477. time, data, ev);
  1478. }
  1479. }
  1480. }
  1481. void iwl_dump_nic_event_log(struct iwl_priv *priv)
  1482. {
  1483. int ret;
  1484. u32 base; /* SRAM byte address of event log header */
  1485. u32 capacity; /* event log capacity in # entries */
  1486. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1487. u32 num_wraps; /* # times uCode wrapped to top of log */
  1488. u32 next_entry; /* index of next entry to be written by uCode */
  1489. u32 size; /* # entries that we'll print */
  1490. if (priv->ucode_type == UCODE_INIT)
  1491. base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
  1492. else
  1493. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1494. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1495. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1496. return;
  1497. }
  1498. ret = iwl_grab_nic_access(priv);
  1499. if (ret) {
  1500. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1501. return;
  1502. }
  1503. /* event log header */
  1504. capacity = iwl_read_targ_mem(priv, base);
  1505. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1506. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1507. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1508. size = num_wraps ? capacity : next_entry;
  1509. /* bail out if nothing in log */
  1510. if (size == 0) {
  1511. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1512. iwl_release_nic_access(priv);
  1513. return;
  1514. }
  1515. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1516. size, num_wraps);
  1517. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1518. * i.e the next one that uCode would fill. */
  1519. if (num_wraps)
  1520. iwl_print_event_log(priv, next_entry,
  1521. capacity - next_entry, mode);
  1522. /* (then/else) start at top of log */
  1523. iwl_print_event_log(priv, 0, next_entry, mode);
  1524. iwl_release_nic_access(priv);
  1525. }
  1526. EXPORT_SYMBOL(iwl_dump_nic_event_log);
  1527. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1528. {
  1529. struct iwl_ct_kill_config cmd;
  1530. unsigned long flags;
  1531. int ret = 0;
  1532. spin_lock_irqsave(&priv->lock, flags);
  1533. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1534. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1535. spin_unlock_irqrestore(&priv->lock, flags);
  1536. cmd.critical_temperature_R =
  1537. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1538. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1539. sizeof(cmd), &cmd);
  1540. if (ret)
  1541. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1542. else
  1543. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD succeeded, "
  1544. "critical temperature is %d\n",
  1545. cmd.critical_temperature_R);
  1546. }
  1547. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1548. /*
  1549. * CARD_STATE_CMD
  1550. *
  1551. * Use: Sets the device's internal card state to enable, disable, or halt
  1552. *
  1553. * When in the 'enable' state the card operates as normal.
  1554. * When in the 'disable' state, the card enters into a low power mode.
  1555. * When in the 'halt' state, the card is shut down and must be fully
  1556. * restarted to come back on.
  1557. */
  1558. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1559. {
  1560. struct iwl_host_cmd cmd = {
  1561. .id = REPLY_CARD_STATE_CMD,
  1562. .len = sizeof(u32),
  1563. .data = &flags,
  1564. .meta.flags = meta_flag,
  1565. };
  1566. return iwl_send_cmd(priv, &cmd);
  1567. }
  1568. EXPORT_SYMBOL(iwl_send_card_state);
  1569. void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
  1570. {
  1571. unsigned long flags;
  1572. if (test_bit(STATUS_RF_KILL_SW, &priv->status))
  1573. return;
  1574. IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO OFF\n");
  1575. iwl_scan_cancel(priv);
  1576. /* FIXME: This is a workaround for AP */
  1577. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1578. spin_lock_irqsave(&priv->lock, flags);
  1579. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1580. CSR_UCODE_SW_BIT_RFKILL);
  1581. spin_unlock_irqrestore(&priv->lock, flags);
  1582. /* call the host command only if no hw rf-kill set */
  1583. if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
  1584. iwl_is_ready(priv))
  1585. iwl_send_card_state(priv,
  1586. CARD_STATE_CMD_DISABLE, 0);
  1587. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1588. /* make sure mac80211 stop sending Tx frame */
  1589. if (priv->mac80211_registered)
  1590. ieee80211_stop_queues(priv->hw);
  1591. }
  1592. }
  1593. EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
  1594. int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
  1595. {
  1596. unsigned long flags;
  1597. if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
  1598. return 0;
  1599. IWL_DEBUG_RF_KILL(priv, "Manual SW RF KILL set to: RADIO ON\n");
  1600. spin_lock_irqsave(&priv->lock, flags);
  1601. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1602. /* If the driver is up it will receive CARD_STATE_NOTIFICATION
  1603. * notification where it will clear SW rfkill status.
  1604. * Setting it here would break the handler. Only if the
  1605. * interface is down we can set here since we don't
  1606. * receive any further notification.
  1607. */
  1608. if (!priv->is_open)
  1609. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1610. spin_unlock_irqrestore(&priv->lock, flags);
  1611. /* wake up ucode */
  1612. msleep(10);
  1613. spin_lock_irqsave(&priv->lock, flags);
  1614. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1615. if (!iwl_grab_nic_access(priv))
  1616. iwl_release_nic_access(priv);
  1617. spin_unlock_irqrestore(&priv->lock, flags);
  1618. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1619. IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
  1620. "disabled by HW switch\n");
  1621. return 0;
  1622. }
  1623. /* when driver is up while rfkill is on, it wont receive
  1624. * any CARD_STATE_NOTIFICATION notifications so we have to
  1625. * restart it in here
  1626. */
  1627. if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
  1628. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1629. if (!iwl_is_rfkill(priv))
  1630. queue_work(priv->workqueue, &priv->up);
  1631. }
  1632. /* If the driver is already loaded, it will receive
  1633. * CARD_STATE_NOTIFICATION notifications and the handler will
  1634. * call restart to reload the driver.
  1635. */
  1636. return 1;
  1637. }
  1638. EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
  1639. void iwl_bg_rf_kill(struct work_struct *work)
  1640. {
  1641. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  1642. wake_up_interruptible(&priv->wait_command_queue);
  1643. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1644. return;
  1645. mutex_lock(&priv->mutex);
  1646. if (!iwl_is_rfkill(priv)) {
  1647. IWL_DEBUG_RF_KILL(priv,
  1648. "HW and/or SW RF Kill no longer active, restarting "
  1649. "device\n");
  1650. if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
  1651. test_bit(STATUS_ALIVE, &priv->status))
  1652. queue_work(priv->workqueue, &priv->restart);
  1653. } else {
  1654. /* make sure mac80211 stop sending Tx frame */
  1655. if (priv->mac80211_registered)
  1656. ieee80211_stop_queues(priv->hw);
  1657. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  1658. IWL_DEBUG_RF_KILL(priv, "Can not turn radio back on - "
  1659. "disabled by SW switch\n");
  1660. else
  1661. IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
  1662. "Kill switch must be turned off for "
  1663. "wireless networking to work.\n");
  1664. }
  1665. mutex_unlock(&priv->mutex);
  1666. iwl_rfkill_set_hw_state(priv);
  1667. }
  1668. EXPORT_SYMBOL(iwl_bg_rf_kill);