ni65.c 30 KB

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  1. /*
  2. * ni6510 (am7990 'lance' chip) driver for Linux-net-3
  3. * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
  4. * copyrights (c) 1994,1995,1996 by M.Hipp
  5. *
  6. * This driver can handle the old ni6510 board and the newer ni6510
  7. * EtherBlaster. (probably it also works with every full NE2100
  8. * compatible card)
  9. *
  10. * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
  11. *
  12. * This is an extension to the Linux operating system, and is covered by the
  13. * same GNU General Public License that covers the Linux-kernel.
  14. *
  15. * comments/bugs/suggestions can be sent to:
  16. * Michael Hipp
  17. * email: hippm@informatik.uni-tuebingen.de
  18. *
  19. * sources:
  20. * some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
  21. * and from the original drivers by D.Becker
  22. *
  23. * known problems:
  24. * - on some PCI boards (including my own) the card/board/ISA-bridge has
  25. * problems with bus master DMA. This results in lotsa overruns.
  26. * It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
  27. * the XMT and RCV_VIA_SKB option .. this reduces driver performance.
  28. * Or just play with your BIOS options to optimize ISA-DMA access.
  29. * Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
  30. * defines -> please report me your experience then
  31. * - Harald reported for ASUS SP3G mainboards, that you should use
  32. * the 'optimal settings' from the user's manual on page 3-12!
  33. *
  34. * credits:
  35. * thanx to Jason Sullivan for sending me a ni6510 card!
  36. * lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
  37. *
  38. * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
  39. * average: FTP -> 8384421 bytes received in 8.5 seconds
  40. * (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
  41. * peak: FTP -> 8384421 bytes received in 7.5 seconds
  42. * (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
  43. */
  44. /*
  45. * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
  46. * 96.Sept.29: virt_to_bus stuff added for new memory modell
  47. * 96.April.29: Added Harald Koenig's Patches (MH)
  48. * 96.April.13: enhanced error handling .. more tests (MH)
  49. * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
  50. * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
  51. * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
  52. * hopefully no more 16MB limit
  53. *
  54. * 95.Nov.18: multicast tweaked (AC).
  55. *
  56. * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
  57. *
  58. * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
  59. */
  60. #include <linux/kernel.h>
  61. #include <linux/string.h>
  62. #include <linux/errno.h>
  63. #include <linux/ioport.h>
  64. #include <linux/slab.h>
  65. #include <linux/interrupt.h>
  66. #include <linux/delay.h>
  67. #include <linux/init.h>
  68. #include <linux/netdevice.h>
  69. #include <linux/etherdevice.h>
  70. #include <linux/skbuff.h>
  71. #include <linux/module.h>
  72. #include <linux/bitops.h>
  73. #include <asm/io.h>
  74. #include <asm/dma.h>
  75. #include "ni65.h"
  76. /*
  77. * the current setting allows an acceptable performance
  78. * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
  79. * the header of this file
  80. * 'invert' the defines for max. performance. This may cause DMA problems
  81. * on some boards (e.g on my ASUS SP3G)
  82. */
  83. #undef XMT_VIA_SKB
  84. #undef RCV_VIA_SKB
  85. #define RCV_PARANOIA_CHECK
  86. #define MID_PERFORMANCE
  87. #if defined( LOW_PERFORMANCE )
  88. static int isa0=7,isa1=7,csr80=0x0c10;
  89. #elif defined( MID_PERFORMANCE )
  90. static int isa0=5,isa1=5,csr80=0x2810;
  91. #else /* high performance */
  92. static int isa0=4,isa1=4,csr80=0x0017;
  93. #endif
  94. /*
  95. * a few card/vendor specific defines
  96. */
  97. #define NI65_ID0 0x00
  98. #define NI65_ID1 0x55
  99. #define NI65_EB_ID0 0x52
  100. #define NI65_EB_ID1 0x44
  101. #define NE2100_ID0 0x57
  102. #define NE2100_ID1 0x57
  103. #define PORT p->cmdr_addr
  104. /*
  105. * buffer configuration
  106. */
  107. #if 1
  108. #define RMDNUM 16
  109. #define RMDNUMMASK 0x80000000
  110. #else
  111. #define RMDNUM 8
  112. #define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
  113. #endif
  114. #if 0
  115. #define TMDNUM 1
  116. #define TMDNUMMASK 0x00000000
  117. #else
  118. #define TMDNUM 4
  119. #define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
  120. #endif
  121. /* slightly oversized */
  122. #define R_BUF_SIZE 1544
  123. #define T_BUF_SIZE 1544
  124. /*
  125. * lance register defines
  126. */
  127. #define L_DATAREG 0x00
  128. #define L_ADDRREG 0x02
  129. #define L_RESET 0x04
  130. #define L_CONFIG 0x05
  131. #define L_BUSIF 0x06
  132. /*
  133. * to access the lance/am7990-regs, you have to write
  134. * reg-number into L_ADDRREG, then you can access it using L_DATAREG
  135. */
  136. #define CSR0 0x00
  137. #define CSR1 0x01
  138. #define CSR2 0x02
  139. #define CSR3 0x03
  140. #define INIT_RING_BEFORE_START 0x1
  141. #define FULL_RESET_ON_ERROR 0x2
  142. #if 0
  143. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
  144. outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  145. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
  146. inw(PORT+L_DATAREG))
  147. #if 0
  148. #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  149. #else
  150. #define writedatareg(val) { writereg(val,CSR0); }
  151. #endif
  152. #else
  153. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
  154. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
  155. #define writedatareg(val) { writereg(val,CSR0); }
  156. #endif
  157. static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
  158. static struct card {
  159. unsigned char id0,id1;
  160. short id_offset;
  161. short total_size;
  162. short cmd_offset;
  163. short addr_offset;
  164. unsigned char *vendor_id;
  165. char *cardname;
  166. unsigned long config;
  167. } cards[] = {
  168. {
  169. .id0 = NI65_ID0,
  170. .id1 = NI65_ID1,
  171. .id_offset = 0x0e,
  172. .total_size = 0x10,
  173. .cmd_offset = 0x0,
  174. .addr_offset = 0x8,
  175. .vendor_id = ni_vendor,
  176. .cardname = "ni6510",
  177. .config = 0x1,
  178. },
  179. {
  180. .id0 = NI65_EB_ID0,
  181. .id1 = NI65_EB_ID1,
  182. .id_offset = 0x0e,
  183. .total_size = 0x18,
  184. .cmd_offset = 0x10,
  185. .addr_offset = 0x0,
  186. .vendor_id = ni_vendor,
  187. .cardname = "ni6510 EtherBlaster",
  188. .config = 0x2,
  189. },
  190. {
  191. .id0 = NE2100_ID0,
  192. .id1 = NE2100_ID1,
  193. .id_offset = 0x0e,
  194. .total_size = 0x18,
  195. .cmd_offset = 0x10,
  196. .addr_offset = 0x0,
  197. .vendor_id = NULL,
  198. .cardname = "generic NE2100",
  199. .config = 0x0,
  200. },
  201. };
  202. #define NUM_CARDS 3
  203. struct priv
  204. {
  205. struct rmd rmdhead[RMDNUM];
  206. struct tmd tmdhead[TMDNUM];
  207. struct init_block ib;
  208. int rmdnum;
  209. int tmdnum,tmdlast;
  210. #ifdef RCV_VIA_SKB
  211. struct sk_buff *recv_skb[RMDNUM];
  212. #else
  213. void *recvbounce[RMDNUM];
  214. #endif
  215. #ifdef XMT_VIA_SKB
  216. struct sk_buff *tmd_skb[TMDNUM];
  217. #endif
  218. void *tmdbounce[TMDNUM];
  219. int tmdbouncenum;
  220. int lock,xmit_queued;
  221. struct net_device_stats stats;
  222. void *self;
  223. int cmdr_addr;
  224. int cardno;
  225. int features;
  226. spinlock_t ring_lock;
  227. };
  228. static int ni65_probe1(struct net_device *dev,int);
  229. static irqreturn_t ni65_interrupt(int irq, void * dev_id);
  230. static void ni65_recv_intr(struct net_device *dev,int);
  231. static void ni65_xmit_intr(struct net_device *dev,int);
  232. static int ni65_open(struct net_device *dev);
  233. static int ni65_lance_reinit(struct net_device *dev);
  234. static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
  235. static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev);
  236. static void ni65_timeout(struct net_device *dev);
  237. static int ni65_close(struct net_device *dev);
  238. static int ni65_alloc_buffer(struct net_device *dev);
  239. static void ni65_free_buffer(struct priv *p);
  240. static struct net_device_stats *ni65_get_stats(struct net_device *);
  241. static void set_multicast_list(struct net_device *dev);
  242. static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
  243. static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
  244. static int debuglevel = 1;
  245. /*
  246. * set 'performance' registers .. we must STOP lance for that
  247. */
  248. static void ni65_set_performance(struct priv *p)
  249. {
  250. writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
  251. if( !(cards[p->cardno].config & 0x02) )
  252. return;
  253. outw(80,PORT+L_ADDRREG);
  254. if(inw(PORT+L_ADDRREG) != 80)
  255. return;
  256. writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
  257. outw(0,PORT+L_ADDRREG);
  258. outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
  259. outw(1,PORT+L_ADDRREG);
  260. outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
  261. outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
  262. }
  263. /*
  264. * open interface (up)
  265. */
  266. static int ni65_open(struct net_device *dev)
  267. {
  268. struct priv *p = dev->ml_priv;
  269. int irqval = request_irq(dev->irq, &ni65_interrupt,0,
  270. cards[p->cardno].cardname,dev);
  271. if (irqval) {
  272. printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
  273. dev->name,dev->irq, irqval);
  274. return -EAGAIN;
  275. }
  276. if(ni65_lance_reinit(dev))
  277. {
  278. netif_start_queue(dev);
  279. return 0;
  280. }
  281. else
  282. {
  283. free_irq(dev->irq,dev);
  284. return -EAGAIN;
  285. }
  286. }
  287. /*
  288. * close interface (down)
  289. */
  290. static int ni65_close(struct net_device *dev)
  291. {
  292. struct priv *p = dev->ml_priv;
  293. netif_stop_queue(dev);
  294. outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
  295. #ifdef XMT_VIA_SKB
  296. {
  297. int i;
  298. for(i=0;i<TMDNUM;i++)
  299. {
  300. if(p->tmd_skb[i]) {
  301. dev_kfree_skb(p->tmd_skb[i]);
  302. p->tmd_skb[i] = NULL;
  303. }
  304. }
  305. }
  306. #endif
  307. free_irq(dev->irq,dev);
  308. return 0;
  309. }
  310. static void cleanup_card(struct net_device *dev)
  311. {
  312. struct priv *p = dev->ml_priv;
  313. disable_dma(dev->dma);
  314. free_dma(dev->dma);
  315. release_region(dev->base_addr, cards[p->cardno].total_size);
  316. ni65_free_buffer(p);
  317. }
  318. /* set: io,irq,dma or set it when calling insmod */
  319. static int irq;
  320. static int io;
  321. static int dma;
  322. /*
  323. * Probe The Card (not the lance-chip)
  324. */
  325. struct net_device * __init ni65_probe(int unit)
  326. {
  327. struct net_device *dev = alloc_etherdev(0);
  328. static int ports[] = {0x360,0x300,0x320,0x340, 0};
  329. int *port;
  330. int err = 0;
  331. if (!dev)
  332. return ERR_PTR(-ENOMEM);
  333. if (unit >= 0) {
  334. sprintf(dev->name, "eth%d", unit);
  335. netdev_boot_setup_check(dev);
  336. irq = dev->irq;
  337. dma = dev->dma;
  338. } else {
  339. dev->base_addr = io;
  340. }
  341. if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
  342. err = ni65_probe1(dev, dev->base_addr);
  343. } else if (dev->base_addr > 0) { /* Don't probe at all. */
  344. err = -ENXIO;
  345. } else {
  346. for (port = ports; *port && ni65_probe1(dev, *port); port++)
  347. ;
  348. if (!*port)
  349. err = -ENODEV;
  350. }
  351. if (err)
  352. goto out;
  353. err = register_netdev(dev);
  354. if (err)
  355. goto out1;
  356. return dev;
  357. out1:
  358. cleanup_card(dev);
  359. out:
  360. free_netdev(dev);
  361. return ERR_PTR(err);
  362. }
  363. /*
  364. * this is the real card probe ..
  365. */
  366. static int __init ni65_probe1(struct net_device *dev,int ioaddr)
  367. {
  368. int i,j;
  369. struct priv *p;
  370. unsigned long flags;
  371. dev->irq = irq;
  372. dev->dma = dma;
  373. for(i=0;i<NUM_CARDS;i++) {
  374. if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
  375. continue;
  376. if(cards[i].id_offset >= 0) {
  377. if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
  378. inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
  379. release_region(ioaddr, cards[i].total_size);
  380. continue;
  381. }
  382. }
  383. if(cards[i].vendor_id) {
  384. for(j=0;j<3;j++)
  385. if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
  386. release_region(ioaddr, cards[i].total_size);
  387. continue;
  388. }
  389. }
  390. break;
  391. }
  392. if(i == NUM_CARDS)
  393. return -ENODEV;
  394. for(j=0;j<6;j++)
  395. dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
  396. if( (j=ni65_alloc_buffer(dev)) < 0) {
  397. release_region(ioaddr, cards[i].total_size);
  398. return j;
  399. }
  400. p = dev->ml_priv;
  401. p->cmdr_addr = ioaddr + cards[i].cmd_offset;
  402. p->cardno = i;
  403. spin_lock_init(&p->ring_lock);
  404. printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
  405. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  406. if( (j=readreg(CSR0)) != 0x4) {
  407. printk("failed.\n");
  408. printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
  409. ni65_free_buffer(p);
  410. release_region(ioaddr, cards[p->cardno].total_size);
  411. return -EAGAIN;
  412. }
  413. outw(88,PORT+L_ADDRREG);
  414. if(inw(PORT+L_ADDRREG) == 88) {
  415. unsigned long v;
  416. v = inw(PORT+L_DATAREG);
  417. v <<= 16;
  418. outw(89,PORT+L_ADDRREG);
  419. v |= inw(PORT+L_DATAREG);
  420. printk("Version %#08lx, ",v);
  421. p->features = INIT_RING_BEFORE_START;
  422. }
  423. else {
  424. printk("ancient LANCE, ");
  425. p->features = 0x0;
  426. }
  427. if(test_bit(0,&cards[i].config)) {
  428. dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
  429. dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
  430. printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
  431. }
  432. else {
  433. if(dev->dma == 0) {
  434. /* 'stuck test' from lance.c */
  435. long dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
  436. (inb(DMA2_STAT_REG) & 0xf0);
  437. for(i=1;i<5;i++) {
  438. int dma = dmatab[i];
  439. if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
  440. continue;
  441. flags=claim_dma_lock();
  442. disable_dma(dma);
  443. set_dma_mode(dma,DMA_MODE_CASCADE);
  444. enable_dma(dma);
  445. release_dma_lock(flags);
  446. ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
  447. flags=claim_dma_lock();
  448. disable_dma(dma);
  449. free_dma(dma);
  450. release_dma_lock(flags);
  451. if(readreg(CSR0) & CSR0_IDON)
  452. break;
  453. }
  454. if(i == 5) {
  455. printk("failed.\n");
  456. printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
  457. ni65_free_buffer(p);
  458. release_region(ioaddr, cards[p->cardno].total_size);
  459. return -EAGAIN;
  460. }
  461. dev->dma = dmatab[i];
  462. printk("DMA %d (autodetected), ",dev->dma);
  463. }
  464. else
  465. printk("DMA %d (assigned), ",dev->dma);
  466. if(dev->irq < 2)
  467. {
  468. unsigned long irq_mask;
  469. ni65_init_lance(p,dev->dev_addr,0,0);
  470. irq_mask = probe_irq_on();
  471. writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
  472. msleep(20);
  473. dev->irq = probe_irq_off(irq_mask);
  474. if(!dev->irq)
  475. {
  476. printk("Failed to detect IRQ line!\n");
  477. ni65_free_buffer(p);
  478. release_region(ioaddr, cards[p->cardno].total_size);
  479. return -EAGAIN;
  480. }
  481. printk("IRQ %d (autodetected).\n",dev->irq);
  482. }
  483. else
  484. printk("IRQ %d (assigned).\n",dev->irq);
  485. }
  486. if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
  487. {
  488. printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
  489. ni65_free_buffer(p);
  490. release_region(ioaddr, cards[p->cardno].total_size);
  491. return -EAGAIN;
  492. }
  493. dev->base_addr = ioaddr;
  494. dev->open = ni65_open;
  495. dev->stop = ni65_close;
  496. dev->hard_start_xmit = ni65_send_packet;
  497. dev->tx_timeout = ni65_timeout;
  498. dev->watchdog_timeo = HZ/2;
  499. dev->get_stats = ni65_get_stats;
  500. dev->set_multicast_list = set_multicast_list;
  501. return 0; /* everything is OK */
  502. }
  503. /*
  504. * set lance register and trigger init
  505. */
  506. static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
  507. {
  508. int i;
  509. u32 pib;
  510. writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
  511. for(i=0;i<6;i++)
  512. p->ib.eaddr[i] = daddr[i];
  513. for(i=0;i<8;i++)
  514. p->ib.filter[i] = filter;
  515. p->ib.mode = mode;
  516. p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
  517. p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
  518. writereg(0,CSR3); /* busmaster/no word-swap */
  519. pib = (u32) isa_virt_to_bus(&p->ib);
  520. writereg(pib & 0xffff,CSR1);
  521. writereg(pib >> 16,CSR2);
  522. writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
  523. for(i=0;i<32;i++)
  524. {
  525. mdelay(4);
  526. if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
  527. break; /* init ok ? */
  528. }
  529. }
  530. /*
  531. * allocate memory area and check the 16MB border
  532. */
  533. static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
  534. {
  535. struct sk_buff *skb=NULL;
  536. unsigned char *ptr;
  537. void *ret;
  538. if(type) {
  539. ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
  540. if(!skb) {
  541. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  542. return NULL;
  543. }
  544. skb_reserve(skb,2+16);
  545. skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
  546. ptr = skb->data;
  547. }
  548. else {
  549. ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
  550. if(!ret) {
  551. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  552. return NULL;
  553. }
  554. }
  555. if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
  556. printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
  557. if(type)
  558. kfree_skb(skb);
  559. else
  560. kfree(ptr);
  561. return NULL;
  562. }
  563. return ret;
  564. }
  565. /*
  566. * allocate all memory structures .. send/recv buffers etc ...
  567. */
  568. static int ni65_alloc_buffer(struct net_device *dev)
  569. {
  570. unsigned char *ptr;
  571. struct priv *p;
  572. int i;
  573. /*
  574. * we need 8-aligned memory ..
  575. */
  576. ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
  577. if(!ptr)
  578. return -ENOMEM;
  579. p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
  580. memset((char *)p, 0, sizeof(struct priv));
  581. p->self = ptr;
  582. for(i=0;i<TMDNUM;i++)
  583. {
  584. #ifdef XMT_VIA_SKB
  585. p->tmd_skb[i] = NULL;
  586. #endif
  587. p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
  588. if(!p->tmdbounce[i]) {
  589. ni65_free_buffer(p);
  590. return -ENOMEM;
  591. }
  592. }
  593. for(i=0;i<RMDNUM;i++)
  594. {
  595. #ifdef RCV_VIA_SKB
  596. p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
  597. if(!p->recv_skb[i]) {
  598. ni65_free_buffer(p);
  599. return -ENOMEM;
  600. }
  601. #else
  602. p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
  603. if(!p->recvbounce[i]) {
  604. ni65_free_buffer(p);
  605. return -ENOMEM;
  606. }
  607. #endif
  608. }
  609. return 0; /* everything is OK */
  610. }
  611. /*
  612. * free buffers and private struct
  613. */
  614. static void ni65_free_buffer(struct priv *p)
  615. {
  616. int i;
  617. if(!p)
  618. return;
  619. for(i=0;i<TMDNUM;i++) {
  620. kfree(p->tmdbounce[i]);
  621. #ifdef XMT_VIA_SKB
  622. if(p->tmd_skb[i])
  623. dev_kfree_skb(p->tmd_skb[i]);
  624. #endif
  625. }
  626. for(i=0;i<RMDNUM;i++)
  627. {
  628. #ifdef RCV_VIA_SKB
  629. if(p->recv_skb[i])
  630. dev_kfree_skb(p->recv_skb[i]);
  631. #else
  632. kfree(p->recvbounce[i]);
  633. #endif
  634. }
  635. kfree(p->self);
  636. }
  637. /*
  638. * stop and (re)start lance .. e.g after an error
  639. */
  640. static void ni65_stop_start(struct net_device *dev,struct priv *p)
  641. {
  642. int csr0 = CSR0_INEA;
  643. writedatareg(CSR0_STOP);
  644. if(debuglevel > 1)
  645. printk(KERN_DEBUG "ni65_stop_start\n");
  646. if(p->features & INIT_RING_BEFORE_START) {
  647. int i;
  648. #ifdef XMT_VIA_SKB
  649. struct sk_buff *skb_save[TMDNUM];
  650. #endif
  651. unsigned long buffer[TMDNUM];
  652. short blen[TMDNUM];
  653. if(p->xmit_queued) {
  654. while(1) {
  655. if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
  656. break;
  657. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  658. if(p->tmdlast == p->tmdnum)
  659. break;
  660. }
  661. }
  662. for(i=0;i<TMDNUM;i++) {
  663. struct tmd *tmdp = p->tmdhead + i;
  664. #ifdef XMT_VIA_SKB
  665. skb_save[i] = p->tmd_skb[i];
  666. #endif
  667. buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
  668. blen[i] = tmdp->blen;
  669. tmdp->u.s.status = 0x0;
  670. }
  671. for(i=0;i<RMDNUM;i++) {
  672. struct rmd *rmdp = p->rmdhead + i;
  673. rmdp->u.s.status = RCV_OWN;
  674. }
  675. p->tmdnum = p->xmit_queued = 0;
  676. writedatareg(CSR0_STRT | csr0);
  677. for(i=0;i<TMDNUM;i++) {
  678. int num = (i + p->tmdlast) & (TMDNUM-1);
  679. p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
  680. p->tmdhead[i].blen = blen[num];
  681. if(p->tmdhead[i].u.s.status & XMIT_OWN) {
  682. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  683. p->xmit_queued = 1;
  684. writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
  685. }
  686. #ifdef XMT_VIA_SKB
  687. p->tmd_skb[i] = skb_save[num];
  688. #endif
  689. }
  690. p->rmdnum = p->tmdlast = 0;
  691. if(!p->lock)
  692. if (p->tmdnum || !p->xmit_queued)
  693. netif_wake_queue(dev);
  694. dev->trans_start = jiffies;
  695. }
  696. else
  697. writedatareg(CSR0_STRT | csr0);
  698. }
  699. /*
  700. * init lance (write init-values .. init-buffers) (open-helper)
  701. */
  702. static int ni65_lance_reinit(struct net_device *dev)
  703. {
  704. int i;
  705. struct priv *p = dev->ml_priv;
  706. unsigned long flags;
  707. p->lock = 0;
  708. p->xmit_queued = 0;
  709. flags=claim_dma_lock();
  710. disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
  711. set_dma_mode(dev->dma,DMA_MODE_CASCADE);
  712. enable_dma(dev->dma);
  713. release_dma_lock(flags);
  714. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  715. if( (i=readreg(CSR0) ) != 0x4)
  716. {
  717. printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
  718. cards[p->cardno].cardname,(int) i);
  719. flags=claim_dma_lock();
  720. disable_dma(dev->dma);
  721. release_dma_lock(flags);
  722. return 0;
  723. }
  724. p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
  725. for(i=0;i<TMDNUM;i++)
  726. {
  727. struct tmd *tmdp = p->tmdhead + i;
  728. #ifdef XMT_VIA_SKB
  729. if(p->tmd_skb[i]) {
  730. dev_kfree_skb(p->tmd_skb[i]);
  731. p->tmd_skb[i] = NULL;
  732. }
  733. #endif
  734. tmdp->u.buffer = 0x0;
  735. tmdp->u.s.status = XMIT_START | XMIT_END;
  736. tmdp->blen = tmdp->status2 = 0;
  737. }
  738. for(i=0;i<RMDNUM;i++)
  739. {
  740. struct rmd *rmdp = p->rmdhead + i;
  741. #ifdef RCV_VIA_SKB
  742. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
  743. #else
  744. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
  745. #endif
  746. rmdp->blen = -(R_BUF_SIZE-8);
  747. rmdp->mlen = 0;
  748. rmdp->u.s.status = RCV_OWN;
  749. }
  750. if(dev->flags & IFF_PROMISC)
  751. ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
  752. else if(dev->mc_count || dev->flags & IFF_ALLMULTI)
  753. ni65_init_lance(p,dev->dev_addr,0xff,0x0);
  754. else
  755. ni65_init_lance(p,dev->dev_addr,0x00,0x00);
  756. /*
  757. * ni65_set_lance_mem() sets L_ADDRREG to CSR0
  758. * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
  759. */
  760. if(inw(PORT+L_DATAREG) & CSR0_IDON) {
  761. ni65_set_performance(p);
  762. /* init OK: start lance , enable interrupts */
  763. writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
  764. return 1; /* ->OK */
  765. }
  766. printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
  767. flags=claim_dma_lock();
  768. disable_dma(dev->dma);
  769. release_dma_lock(flags);
  770. return 0; /* ->Error */
  771. }
  772. /*
  773. * interrupt handler
  774. */
  775. static irqreturn_t ni65_interrupt(int irq, void * dev_id)
  776. {
  777. int csr0 = 0;
  778. struct net_device *dev = dev_id;
  779. struct priv *p;
  780. int bcnt = 32;
  781. p = dev->ml_priv;
  782. spin_lock(&p->ring_lock);
  783. while(--bcnt) {
  784. csr0 = inw(PORT+L_DATAREG);
  785. #if 0
  786. writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
  787. #else
  788. writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
  789. #endif
  790. if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
  791. break;
  792. if(csr0 & CSR0_RINT) /* RECV-int? */
  793. ni65_recv_intr(dev,csr0);
  794. if(csr0 & CSR0_TINT) /* XMIT-int? */
  795. ni65_xmit_intr(dev,csr0);
  796. if(csr0 & CSR0_ERR)
  797. {
  798. struct priv *p = dev->ml_priv;
  799. if(debuglevel > 1)
  800. printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
  801. if(csr0 & CSR0_BABL)
  802. p->stats.tx_errors++;
  803. if(csr0 & CSR0_MISS) {
  804. int i;
  805. for(i=0;i<RMDNUM;i++)
  806. printk("%02x ",p->rmdhead[i].u.s.status);
  807. printk("\n");
  808. p->stats.rx_errors++;
  809. }
  810. if(csr0 & CSR0_MERR) {
  811. if(debuglevel > 1)
  812. printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
  813. ni65_stop_start(dev,p);
  814. }
  815. }
  816. }
  817. #ifdef RCV_PARANOIA_CHECK
  818. {
  819. int j;
  820. for(j=0;j<RMDNUM;j++)
  821. {
  822. struct priv *p = dev->ml_priv;
  823. int i,k,num1,num2;
  824. for(i=RMDNUM-1;i>0;i--) {
  825. num2 = (p->rmdnum + i) & (RMDNUM-1);
  826. if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
  827. break;
  828. }
  829. if(i) {
  830. for(k=0;k<RMDNUM;k++) {
  831. num1 = (p->rmdnum + k) & (RMDNUM-1);
  832. if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
  833. break;
  834. }
  835. if(!k)
  836. break;
  837. if(debuglevel > 0)
  838. {
  839. char buf[256],*buf1;
  840. int k;
  841. buf1 = buf;
  842. for(k=0;k<RMDNUM;k++) {
  843. sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
  844. buf1 += 3;
  845. }
  846. *buf1 = 0;
  847. printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
  848. }
  849. p->rmdnum = num1;
  850. ni65_recv_intr(dev,csr0);
  851. if((p->rmdhead[num2].u.s.status & RCV_OWN))
  852. break; /* ok, we are 'in sync' again */
  853. }
  854. else
  855. break;
  856. }
  857. }
  858. #endif
  859. if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
  860. printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
  861. ni65_stop_start(dev,p);
  862. }
  863. else
  864. writedatareg(CSR0_INEA);
  865. spin_unlock(&p->ring_lock);
  866. return IRQ_HANDLED;
  867. }
  868. /*
  869. * We have received an Xmit-Interrupt ..
  870. * send a new packet if necessary
  871. */
  872. static void ni65_xmit_intr(struct net_device *dev,int csr0)
  873. {
  874. struct priv *p = dev->ml_priv;
  875. while(p->xmit_queued)
  876. {
  877. struct tmd *tmdp = p->tmdhead + p->tmdlast;
  878. int tmdstat = tmdp->u.s.status;
  879. if(tmdstat & XMIT_OWN)
  880. break;
  881. if(tmdstat & XMIT_ERR)
  882. {
  883. #if 0
  884. if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
  885. printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
  886. #endif
  887. /* checking some errors */
  888. if(tmdp->status2 & XMIT_RTRY)
  889. p->stats.tx_aborted_errors++;
  890. if(tmdp->status2 & XMIT_LCAR)
  891. p->stats.tx_carrier_errors++;
  892. if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
  893. /* this stops the xmitter */
  894. p->stats.tx_fifo_errors++;
  895. if(debuglevel > 0)
  896. printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
  897. if(p->features & INIT_RING_BEFORE_START) {
  898. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
  899. ni65_stop_start(dev,p);
  900. break; /* no more Xmit processing .. */
  901. }
  902. else
  903. ni65_stop_start(dev,p);
  904. }
  905. if(debuglevel > 2)
  906. printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
  907. if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
  908. p->stats.tx_errors++;
  909. tmdp->status2 = 0;
  910. }
  911. else {
  912. p->stats.tx_bytes -= (short)(tmdp->blen);
  913. p->stats.tx_packets++;
  914. }
  915. #ifdef XMT_VIA_SKB
  916. if(p->tmd_skb[p->tmdlast]) {
  917. dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
  918. p->tmd_skb[p->tmdlast] = NULL;
  919. }
  920. #endif
  921. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  922. if(p->tmdlast == p->tmdnum)
  923. p->xmit_queued = 0;
  924. }
  925. netif_wake_queue(dev);
  926. }
  927. /*
  928. * We have received a packet
  929. */
  930. static void ni65_recv_intr(struct net_device *dev,int csr0)
  931. {
  932. struct rmd *rmdp;
  933. int rmdstat,len;
  934. int cnt=0;
  935. struct priv *p = dev->ml_priv;
  936. rmdp = p->rmdhead + p->rmdnum;
  937. while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
  938. {
  939. cnt++;
  940. if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
  941. {
  942. if(!(rmdstat & RCV_ERR)) {
  943. if(rmdstat & RCV_START)
  944. {
  945. p->stats.rx_length_errors++;
  946. printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
  947. }
  948. }
  949. else {
  950. if(debuglevel > 2)
  951. printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
  952. dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
  953. if(rmdstat & RCV_FRAM)
  954. p->stats.rx_frame_errors++;
  955. if(rmdstat & RCV_OFLO)
  956. p->stats.rx_over_errors++;
  957. if(rmdstat & RCV_CRC)
  958. p->stats.rx_crc_errors++;
  959. if(rmdstat & RCV_BUF_ERR)
  960. p->stats.rx_fifo_errors++;
  961. }
  962. if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
  963. p->stats.rx_errors++;
  964. }
  965. else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
  966. {
  967. #ifdef RCV_VIA_SKB
  968. struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
  969. if (skb)
  970. skb_reserve(skb,16);
  971. #else
  972. struct sk_buff *skb = dev_alloc_skb(len+2);
  973. #endif
  974. if(skb)
  975. {
  976. skb_reserve(skb,2);
  977. #ifdef RCV_VIA_SKB
  978. if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
  979. skb_put(skb,len);
  980. skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
  981. }
  982. else {
  983. struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
  984. skb_put(skb,R_BUF_SIZE);
  985. p->recv_skb[p->rmdnum] = skb;
  986. rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  987. skb = skb1;
  988. skb_trim(skb,len);
  989. }
  990. #else
  991. skb_put(skb,len);
  992. skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
  993. #endif
  994. p->stats.rx_packets++;
  995. p->stats.rx_bytes += len;
  996. skb->protocol=eth_type_trans(skb,dev);
  997. netif_rx(skb);
  998. }
  999. else
  1000. {
  1001. printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
  1002. p->stats.rx_dropped++;
  1003. }
  1004. }
  1005. else {
  1006. printk(KERN_INFO "%s: received runt packet\n",dev->name);
  1007. p->stats.rx_errors++;
  1008. }
  1009. rmdp->blen = -(R_BUF_SIZE-8);
  1010. rmdp->mlen = 0;
  1011. rmdp->u.s.status = RCV_OWN; /* change owner */
  1012. p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
  1013. rmdp = p->rmdhead + p->rmdnum;
  1014. }
  1015. }
  1016. /*
  1017. * kick xmitter ..
  1018. */
  1019. static void ni65_timeout(struct net_device *dev)
  1020. {
  1021. int i;
  1022. struct priv *p = dev->ml_priv;
  1023. printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
  1024. for(i=0;i<TMDNUM;i++)
  1025. printk("%02x ",p->tmdhead[i].u.s.status);
  1026. printk("\n");
  1027. ni65_lance_reinit(dev);
  1028. dev->trans_start = jiffies;
  1029. netif_wake_queue(dev);
  1030. }
  1031. /*
  1032. * Send a packet
  1033. */
  1034. static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev)
  1035. {
  1036. struct priv *p = dev->ml_priv;
  1037. netif_stop_queue(dev);
  1038. if (test_and_set_bit(0, (void*)&p->lock)) {
  1039. printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
  1040. return 1;
  1041. }
  1042. {
  1043. short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
  1044. struct tmd *tmdp;
  1045. unsigned long flags;
  1046. #ifdef XMT_VIA_SKB
  1047. if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
  1048. #endif
  1049. skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
  1050. skb->len > T_BUF_SIZE ? T_BUF_SIZE :
  1051. skb->len);
  1052. if (len > skb->len)
  1053. memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
  1054. dev_kfree_skb (skb);
  1055. spin_lock_irqsave(&p->ring_lock, flags);
  1056. tmdp = p->tmdhead + p->tmdnum;
  1057. tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
  1058. p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
  1059. #ifdef XMT_VIA_SKB
  1060. }
  1061. else {
  1062. spin_lock_irqsave(&p->ring_lock, flags);
  1063. tmdp = p->tmdhead + p->tmdnum;
  1064. tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  1065. p->tmd_skb[p->tmdnum] = skb;
  1066. }
  1067. #endif
  1068. tmdp->blen = -len;
  1069. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
  1070. writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
  1071. p->xmit_queued = 1;
  1072. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  1073. if(p->tmdnum != p->tmdlast)
  1074. netif_wake_queue(dev);
  1075. p->lock = 0;
  1076. dev->trans_start = jiffies;
  1077. spin_unlock_irqrestore(&p->ring_lock, flags);
  1078. }
  1079. return 0;
  1080. }
  1081. static struct net_device_stats *ni65_get_stats(struct net_device *dev)
  1082. {
  1083. #if 0
  1084. int i;
  1085. struct priv *p = dev->ml_priv;
  1086. for(i=0;i<RMDNUM;i++)
  1087. {
  1088. struct rmd *rmdp = p->rmdhead + ((p->rmdnum + i) & (RMDNUM-1));
  1089. printk("%02x ",rmdp->u.s.status);
  1090. }
  1091. printk("\n");
  1092. #endif
  1093. return &((struct priv *)dev->ml_priv)->stats;
  1094. }
  1095. static void set_multicast_list(struct net_device *dev)
  1096. {
  1097. if(!ni65_lance_reinit(dev))
  1098. printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
  1099. netif_wake_queue(dev);
  1100. }
  1101. #ifdef MODULE
  1102. static struct net_device *dev_ni65;
  1103. module_param(irq, int, 0);
  1104. module_param(io, int, 0);
  1105. module_param(dma, int, 0);
  1106. MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
  1107. MODULE_PARM_DESC(io, "ni6510 I/O base address");
  1108. MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
  1109. int __init init_module(void)
  1110. {
  1111. dev_ni65 = ni65_probe(-1);
  1112. return IS_ERR(dev_ni65) ? PTR_ERR(dev_ni65) : 0;
  1113. }
  1114. void __exit cleanup_module(void)
  1115. {
  1116. unregister_netdev(dev_ni65);
  1117. cleanup_card(dev_ni65);
  1118. free_netdev(dev_ni65);
  1119. }
  1120. #endif /* MODULE */
  1121. MODULE_LICENSE("GPL");