devs.c 39 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640
  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <linux/platform_data/s3c-hsudc.h>
  32. #include <linux/platform_data/s3c-hsotg.h>
  33. #include <media/s5p_hdmi.h>
  34. #include <asm/irq.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/irq.h>
  38. #include <mach/hardware.h>
  39. #include <mach/dma.h>
  40. #include <mach/irqs.h>
  41. #include <mach/map.h>
  42. #include <plat/cpu.h>
  43. #include <plat/devs.h>
  44. #include <plat/adc.h>
  45. #include <linux/platform_data/ata-samsung_cf.h>
  46. #include <linux/platform_data/usb-ehci-s5p.h>
  47. #include <plat/fb.h>
  48. #include <plat/fb-s3c2410.h>
  49. #include <plat/hdmi.h>
  50. #include <linux/platform_data/hwmon-s3c.h>
  51. #include <linux/platform_data/i2c-s3c2410.h>
  52. #include <plat/keypad.h>
  53. #include <linux/platform_data/mmc-s3cmci.h>
  54. #include <linux/platform_data/mtd-nand-s3c2410.h>
  55. #include <plat/sdhci.h>
  56. #include <linux/platform_data/touchscreen-s3c2410.h>
  57. #include <linux/platform_data/usb-s3c2410_udc.h>
  58. #include <linux/platform_data/usb-ohci-s3c2410.h>
  59. #include <plat/usb-phy.h>
  60. #include <plat/regs-iic.h>
  61. #include <plat/regs-serial.h>
  62. #include <plat/regs-spi.h>
  63. #include <linux/platform_data/spi-s3c64xx.h>
  64. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  65. /* AC97 */
  66. #ifdef CONFIG_CPU_S3C2440
  67. static struct resource s3c_ac97_resource[] = {
  68. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  69. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  70. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  71. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  72. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  73. };
  74. struct platform_device s3c_device_ac97 = {
  75. .name = "samsung-ac97",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  78. .resource = s3c_ac97_resource,
  79. .dev = {
  80. .dma_mask = &samsung_device_dma_mask,
  81. .coherent_dma_mask = DMA_BIT_MASK(32),
  82. }
  83. };
  84. #endif /* CONFIG_CPU_S3C2440 */
  85. /* ADC */
  86. #ifdef CONFIG_PLAT_S3C24XX
  87. static struct resource s3c_adc_resource[] = {
  88. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  89. [1] = DEFINE_RES_IRQ(IRQ_TC),
  90. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  91. };
  92. struct platform_device s3c_device_adc = {
  93. .name = "s3c24xx-adc",
  94. .id = -1,
  95. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  96. .resource = s3c_adc_resource,
  97. };
  98. #endif /* CONFIG_PLAT_S3C24XX */
  99. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  100. static struct resource s3c_adc_resource[] = {
  101. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  102. [1] = DEFINE_RES_IRQ(IRQ_TC),
  103. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  104. };
  105. struct platform_device s3c_device_adc = {
  106. .name = "samsung-adc",
  107. .id = -1,
  108. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  109. .resource = s3c_adc_resource,
  110. };
  111. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  112. /* Camif Controller */
  113. #ifdef CONFIG_CPU_S3C2440
  114. static struct resource s3c_camif_resource[] = {
  115. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  116. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  117. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  118. };
  119. struct platform_device s3c_device_camif = {
  120. .name = "s3c2440-camif",
  121. .id = -1,
  122. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  123. .resource = s3c_camif_resource,
  124. .dev = {
  125. .dma_mask = &samsung_device_dma_mask,
  126. .coherent_dma_mask = DMA_BIT_MASK(32),
  127. }
  128. };
  129. #endif /* CONFIG_CPU_S3C2440 */
  130. /* ASOC DMA */
  131. #ifdef CONFIG_PLAT_S5P
  132. static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
  133. struct platform_device samsung_asoc_idma = {
  134. .name = "samsung-idma",
  135. .id = -1,
  136. .num_resources = 1,
  137. .resource = &samsung_asoc_idma_resource,
  138. .dev = {
  139. .dma_mask = &samsung_device_dma_mask,
  140. .coherent_dma_mask = DMA_BIT_MASK(32),
  141. }
  142. };
  143. #endif
  144. /* FB */
  145. #ifdef CONFIG_S3C_DEV_FB
  146. static struct resource s3c_fb_resource[] = {
  147. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  148. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  149. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  150. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  151. };
  152. struct platform_device s3c_device_fb = {
  153. .name = "s3c-fb",
  154. .id = -1,
  155. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  156. .resource = s3c_fb_resource,
  157. .dev = {
  158. .dma_mask = &samsung_device_dma_mask,
  159. .coherent_dma_mask = DMA_BIT_MASK(32),
  160. },
  161. };
  162. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  163. {
  164. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  165. &s3c_device_fb);
  166. }
  167. #endif /* CONFIG_S3C_DEV_FB */
  168. /* FIMC */
  169. #ifdef CONFIG_S5P_DEV_FIMC0
  170. static struct resource s5p_fimc0_resource[] = {
  171. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  172. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  173. };
  174. struct platform_device s5p_device_fimc0 = {
  175. .name = "s5p-fimc",
  176. .id = 0,
  177. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  178. .resource = s5p_fimc0_resource,
  179. .dev = {
  180. .dma_mask = &samsung_device_dma_mask,
  181. .coherent_dma_mask = DMA_BIT_MASK(32),
  182. },
  183. };
  184. struct platform_device s5p_device_fimc_md = {
  185. .name = "s5p-fimc-md",
  186. .id = -1,
  187. };
  188. #endif /* CONFIG_S5P_DEV_FIMC0 */
  189. #ifdef CONFIG_S5P_DEV_FIMC1
  190. static struct resource s5p_fimc1_resource[] = {
  191. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  192. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  193. };
  194. struct platform_device s5p_device_fimc1 = {
  195. .name = "s5p-fimc",
  196. .id = 1,
  197. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  198. .resource = s5p_fimc1_resource,
  199. .dev = {
  200. .dma_mask = &samsung_device_dma_mask,
  201. .coherent_dma_mask = DMA_BIT_MASK(32),
  202. },
  203. };
  204. #endif /* CONFIG_S5P_DEV_FIMC1 */
  205. #ifdef CONFIG_S5P_DEV_FIMC2
  206. static struct resource s5p_fimc2_resource[] = {
  207. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  208. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  209. };
  210. struct platform_device s5p_device_fimc2 = {
  211. .name = "s5p-fimc",
  212. .id = 2,
  213. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  214. .resource = s5p_fimc2_resource,
  215. .dev = {
  216. .dma_mask = &samsung_device_dma_mask,
  217. .coherent_dma_mask = DMA_BIT_MASK(32),
  218. },
  219. };
  220. #endif /* CONFIG_S5P_DEV_FIMC2 */
  221. #ifdef CONFIG_S5P_DEV_FIMC3
  222. static struct resource s5p_fimc3_resource[] = {
  223. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  224. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  225. };
  226. struct platform_device s5p_device_fimc3 = {
  227. .name = "s5p-fimc",
  228. .id = 3,
  229. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  230. .resource = s5p_fimc3_resource,
  231. .dev = {
  232. .dma_mask = &samsung_device_dma_mask,
  233. .coherent_dma_mask = DMA_BIT_MASK(32),
  234. },
  235. };
  236. #endif /* CONFIG_S5P_DEV_FIMC3 */
  237. /* G2D */
  238. #ifdef CONFIG_S5P_DEV_G2D
  239. static struct resource s5p_g2d_resource[] = {
  240. [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
  241. [1] = DEFINE_RES_IRQ(IRQ_2D),
  242. };
  243. struct platform_device s5p_device_g2d = {
  244. .name = "s5p-g2d",
  245. .id = 0,
  246. .num_resources = ARRAY_SIZE(s5p_g2d_resource),
  247. .resource = s5p_g2d_resource,
  248. .dev = {
  249. .dma_mask = &samsung_device_dma_mask,
  250. .coherent_dma_mask = DMA_BIT_MASK(32),
  251. },
  252. };
  253. #endif /* CONFIG_S5P_DEV_G2D */
  254. #ifdef CONFIG_S5P_DEV_JPEG
  255. static struct resource s5p_jpeg_resource[] = {
  256. [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
  257. [1] = DEFINE_RES_IRQ(IRQ_JPEG),
  258. };
  259. struct platform_device s5p_device_jpeg = {
  260. .name = "s5p-jpeg",
  261. .id = 0,
  262. .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
  263. .resource = s5p_jpeg_resource,
  264. .dev = {
  265. .dma_mask = &samsung_device_dma_mask,
  266. .coherent_dma_mask = DMA_BIT_MASK(32),
  267. },
  268. };
  269. #endif /* CONFIG_S5P_DEV_JPEG */
  270. /* FIMD0 */
  271. #ifdef CONFIG_S5P_DEV_FIMD0
  272. static struct resource s5p_fimd0_resource[] = {
  273. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  274. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  275. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  276. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  277. };
  278. struct platform_device s5p_device_fimd0 = {
  279. .name = "s5p-fb",
  280. .id = 0,
  281. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  282. .resource = s5p_fimd0_resource,
  283. .dev = {
  284. .dma_mask = &samsung_device_dma_mask,
  285. .coherent_dma_mask = DMA_BIT_MASK(32),
  286. },
  287. };
  288. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  289. {
  290. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  291. &s5p_device_fimd0);
  292. }
  293. #endif /* CONFIG_S5P_DEV_FIMD0 */
  294. /* HWMON */
  295. #ifdef CONFIG_S3C_DEV_HWMON
  296. struct platform_device s3c_device_hwmon = {
  297. .name = "s3c-hwmon",
  298. .id = -1,
  299. .dev.parent = &s3c_device_adc.dev,
  300. };
  301. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  302. {
  303. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  304. &s3c_device_hwmon);
  305. }
  306. #endif /* CONFIG_S3C_DEV_HWMON */
  307. /* HSMMC */
  308. #ifdef CONFIG_S3C_DEV_HSMMC
  309. static struct resource s3c_hsmmc_resource[] = {
  310. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  311. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  312. };
  313. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  314. .max_width = 4,
  315. .host_caps = (MMC_CAP_4_BIT_DATA |
  316. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  317. };
  318. struct platform_device s3c_device_hsmmc0 = {
  319. .name = "s3c-sdhci",
  320. .id = 0,
  321. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  322. .resource = s3c_hsmmc_resource,
  323. .dev = {
  324. .dma_mask = &samsung_device_dma_mask,
  325. .coherent_dma_mask = DMA_BIT_MASK(32),
  326. .platform_data = &s3c_hsmmc0_def_platdata,
  327. },
  328. };
  329. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  330. {
  331. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  332. }
  333. #endif /* CONFIG_S3C_DEV_HSMMC */
  334. #ifdef CONFIG_S3C_DEV_HSMMC1
  335. static struct resource s3c_hsmmc1_resource[] = {
  336. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  337. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  338. };
  339. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  340. .max_width = 4,
  341. .host_caps = (MMC_CAP_4_BIT_DATA |
  342. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  343. };
  344. struct platform_device s3c_device_hsmmc1 = {
  345. .name = "s3c-sdhci",
  346. .id = 1,
  347. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  348. .resource = s3c_hsmmc1_resource,
  349. .dev = {
  350. .dma_mask = &samsung_device_dma_mask,
  351. .coherent_dma_mask = DMA_BIT_MASK(32),
  352. .platform_data = &s3c_hsmmc1_def_platdata,
  353. },
  354. };
  355. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  356. {
  357. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  358. }
  359. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  360. /* HSMMC2 */
  361. #ifdef CONFIG_S3C_DEV_HSMMC2
  362. static struct resource s3c_hsmmc2_resource[] = {
  363. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  364. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  365. };
  366. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  367. .max_width = 4,
  368. .host_caps = (MMC_CAP_4_BIT_DATA |
  369. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  370. };
  371. struct platform_device s3c_device_hsmmc2 = {
  372. .name = "s3c-sdhci",
  373. .id = 2,
  374. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  375. .resource = s3c_hsmmc2_resource,
  376. .dev = {
  377. .dma_mask = &samsung_device_dma_mask,
  378. .coherent_dma_mask = DMA_BIT_MASK(32),
  379. .platform_data = &s3c_hsmmc2_def_platdata,
  380. },
  381. };
  382. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  383. {
  384. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  385. }
  386. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  387. #ifdef CONFIG_S3C_DEV_HSMMC3
  388. static struct resource s3c_hsmmc3_resource[] = {
  389. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  390. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  391. };
  392. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  393. .max_width = 4,
  394. .host_caps = (MMC_CAP_4_BIT_DATA |
  395. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  396. };
  397. struct platform_device s3c_device_hsmmc3 = {
  398. .name = "s3c-sdhci",
  399. .id = 3,
  400. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  401. .resource = s3c_hsmmc3_resource,
  402. .dev = {
  403. .dma_mask = &samsung_device_dma_mask,
  404. .coherent_dma_mask = DMA_BIT_MASK(32),
  405. .platform_data = &s3c_hsmmc3_def_platdata,
  406. },
  407. };
  408. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  409. {
  410. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  411. }
  412. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  413. /* I2C */
  414. static struct resource s3c_i2c0_resource[] = {
  415. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  416. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  417. };
  418. struct platform_device s3c_device_i2c0 = {
  419. .name = "s3c2410-i2c",
  420. .id = 0,
  421. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  422. .resource = s3c_i2c0_resource,
  423. };
  424. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  425. .flags = 0,
  426. .slave_addr = 0x10,
  427. .frequency = 100*1000,
  428. .sda_delay = 100,
  429. };
  430. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  431. {
  432. struct s3c2410_platform_i2c *npd;
  433. if (!pd) {
  434. pd = &default_i2c_data;
  435. pd->bus_num = 0;
  436. }
  437. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  438. &s3c_device_i2c0);
  439. if (!npd->cfg_gpio)
  440. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  441. }
  442. #ifdef CONFIG_S3C_DEV_I2C1
  443. static struct resource s3c_i2c1_resource[] = {
  444. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  445. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  446. };
  447. struct platform_device s3c_device_i2c1 = {
  448. .name = "s3c2410-i2c",
  449. .id = 1,
  450. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  451. .resource = s3c_i2c1_resource,
  452. };
  453. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  454. {
  455. struct s3c2410_platform_i2c *npd;
  456. if (!pd) {
  457. pd = &default_i2c_data;
  458. pd->bus_num = 1;
  459. }
  460. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  461. &s3c_device_i2c1);
  462. if (!npd->cfg_gpio)
  463. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  464. }
  465. #endif /* CONFIG_S3C_DEV_I2C1 */
  466. #ifdef CONFIG_S3C_DEV_I2C2
  467. static struct resource s3c_i2c2_resource[] = {
  468. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  469. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  470. };
  471. struct platform_device s3c_device_i2c2 = {
  472. .name = "s3c2410-i2c",
  473. .id = 2,
  474. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  475. .resource = s3c_i2c2_resource,
  476. };
  477. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  478. {
  479. struct s3c2410_platform_i2c *npd;
  480. if (!pd) {
  481. pd = &default_i2c_data;
  482. pd->bus_num = 2;
  483. }
  484. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  485. &s3c_device_i2c2);
  486. if (!npd->cfg_gpio)
  487. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  488. }
  489. #endif /* CONFIG_S3C_DEV_I2C2 */
  490. #ifdef CONFIG_S3C_DEV_I2C3
  491. static struct resource s3c_i2c3_resource[] = {
  492. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  493. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  494. };
  495. struct platform_device s3c_device_i2c3 = {
  496. .name = "s3c2440-i2c",
  497. .id = 3,
  498. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  499. .resource = s3c_i2c3_resource,
  500. };
  501. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  502. {
  503. struct s3c2410_platform_i2c *npd;
  504. if (!pd) {
  505. pd = &default_i2c_data;
  506. pd->bus_num = 3;
  507. }
  508. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  509. &s3c_device_i2c3);
  510. if (!npd->cfg_gpio)
  511. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  512. }
  513. #endif /*CONFIG_S3C_DEV_I2C3 */
  514. #ifdef CONFIG_S3C_DEV_I2C4
  515. static struct resource s3c_i2c4_resource[] = {
  516. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  517. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  518. };
  519. struct platform_device s3c_device_i2c4 = {
  520. .name = "s3c2440-i2c",
  521. .id = 4,
  522. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  523. .resource = s3c_i2c4_resource,
  524. };
  525. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  526. {
  527. struct s3c2410_platform_i2c *npd;
  528. if (!pd) {
  529. pd = &default_i2c_data;
  530. pd->bus_num = 4;
  531. }
  532. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  533. &s3c_device_i2c4);
  534. if (!npd->cfg_gpio)
  535. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  536. }
  537. #endif /*CONFIG_S3C_DEV_I2C4 */
  538. #ifdef CONFIG_S3C_DEV_I2C5
  539. static struct resource s3c_i2c5_resource[] = {
  540. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  541. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  542. };
  543. struct platform_device s3c_device_i2c5 = {
  544. .name = "s3c2440-i2c",
  545. .id = 5,
  546. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  547. .resource = s3c_i2c5_resource,
  548. };
  549. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  550. {
  551. struct s3c2410_platform_i2c *npd;
  552. if (!pd) {
  553. pd = &default_i2c_data;
  554. pd->bus_num = 5;
  555. }
  556. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  557. &s3c_device_i2c5);
  558. if (!npd->cfg_gpio)
  559. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  560. }
  561. #endif /*CONFIG_S3C_DEV_I2C5 */
  562. #ifdef CONFIG_S3C_DEV_I2C6
  563. static struct resource s3c_i2c6_resource[] = {
  564. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  565. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  566. };
  567. struct platform_device s3c_device_i2c6 = {
  568. .name = "s3c2440-i2c",
  569. .id = 6,
  570. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  571. .resource = s3c_i2c6_resource,
  572. };
  573. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  574. {
  575. struct s3c2410_platform_i2c *npd;
  576. if (!pd) {
  577. pd = &default_i2c_data;
  578. pd->bus_num = 6;
  579. }
  580. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  581. &s3c_device_i2c6);
  582. if (!npd->cfg_gpio)
  583. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  584. }
  585. #endif /* CONFIG_S3C_DEV_I2C6 */
  586. #ifdef CONFIG_S3C_DEV_I2C7
  587. static struct resource s3c_i2c7_resource[] = {
  588. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  589. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  590. };
  591. struct platform_device s3c_device_i2c7 = {
  592. .name = "s3c2440-i2c",
  593. .id = 7,
  594. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  595. .resource = s3c_i2c7_resource,
  596. };
  597. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  598. {
  599. struct s3c2410_platform_i2c *npd;
  600. if (!pd) {
  601. pd = &default_i2c_data;
  602. pd->bus_num = 7;
  603. }
  604. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  605. &s3c_device_i2c7);
  606. if (!npd->cfg_gpio)
  607. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  608. }
  609. #endif /* CONFIG_S3C_DEV_I2C7 */
  610. /* I2C HDMIPHY */
  611. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  612. static struct resource s5p_i2c_resource[] = {
  613. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  614. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  615. };
  616. struct platform_device s5p_device_i2c_hdmiphy = {
  617. .name = "s3c2440-hdmiphy-i2c",
  618. .id = -1,
  619. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  620. .resource = s5p_i2c_resource,
  621. };
  622. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  623. {
  624. struct s3c2410_platform_i2c *npd;
  625. if (!pd) {
  626. pd = &default_i2c_data;
  627. if (soc_is_exynos4210() ||
  628. soc_is_exynos4212() || soc_is_exynos4412())
  629. pd->bus_num = 8;
  630. else if (soc_is_s5pv210())
  631. pd->bus_num = 3;
  632. else
  633. pd->bus_num = 0;
  634. }
  635. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  636. &s5p_device_i2c_hdmiphy);
  637. }
  638. static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
  639. void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
  640. struct i2c_board_info *mhl_info, int mhl_bus)
  641. {
  642. struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
  643. if (soc_is_exynos4210() ||
  644. soc_is_exynos4212() || soc_is_exynos4412())
  645. pd->hdmiphy_bus = 8;
  646. else if (soc_is_s5pv210())
  647. pd->hdmiphy_bus = 3;
  648. else
  649. pd->hdmiphy_bus = 0;
  650. pd->hdmiphy_info = hdmiphy_info;
  651. pd->mhl_info = mhl_info;
  652. pd->mhl_bus = mhl_bus;
  653. s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
  654. &s5p_device_hdmi);
  655. }
  656. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  657. /* I2S */
  658. #ifdef CONFIG_PLAT_S3C24XX
  659. static struct resource s3c_iis_resource[] = {
  660. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  661. };
  662. struct platform_device s3c_device_iis = {
  663. .name = "s3c24xx-iis",
  664. .id = -1,
  665. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  666. .resource = s3c_iis_resource,
  667. .dev = {
  668. .dma_mask = &samsung_device_dma_mask,
  669. .coherent_dma_mask = DMA_BIT_MASK(32),
  670. }
  671. };
  672. #endif /* CONFIG_PLAT_S3C24XX */
  673. /* IDE CFCON */
  674. #ifdef CONFIG_SAMSUNG_DEV_IDE
  675. static struct resource s3c_cfcon_resource[] = {
  676. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  677. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  678. };
  679. struct platform_device s3c_device_cfcon = {
  680. .id = 0,
  681. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  682. .resource = s3c_cfcon_resource,
  683. };
  684. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  685. {
  686. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  687. &s3c_device_cfcon);
  688. }
  689. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  690. /* KEYPAD */
  691. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  692. static struct resource samsung_keypad_resources[] = {
  693. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  694. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  695. };
  696. struct platform_device samsung_device_keypad = {
  697. .name = "samsung-keypad",
  698. .id = -1,
  699. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  700. .resource = samsung_keypad_resources,
  701. };
  702. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  703. {
  704. struct samsung_keypad_platdata *npd;
  705. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  706. &samsung_device_keypad);
  707. if (!npd->cfg_gpio)
  708. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  709. }
  710. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  711. /* LCD Controller */
  712. #ifdef CONFIG_PLAT_S3C24XX
  713. static struct resource s3c_lcd_resource[] = {
  714. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  715. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  716. };
  717. struct platform_device s3c_device_lcd = {
  718. .name = "s3c2410-lcd",
  719. .id = -1,
  720. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  721. .resource = s3c_lcd_resource,
  722. .dev = {
  723. .dma_mask = &samsung_device_dma_mask,
  724. .coherent_dma_mask = DMA_BIT_MASK(32),
  725. }
  726. };
  727. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  728. {
  729. struct s3c2410fb_mach_info *npd;
  730. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  731. if (npd) {
  732. npd->displays = kmemdup(pd->displays,
  733. sizeof(struct s3c2410fb_display) * npd->num_displays,
  734. GFP_KERNEL);
  735. if (!npd->displays)
  736. printk(KERN_ERR "no memory for LCD display data\n");
  737. } else {
  738. printk(KERN_ERR "no memory for LCD platform data\n");
  739. }
  740. }
  741. #endif /* CONFIG_PLAT_S3C24XX */
  742. /* MFC */
  743. #ifdef CONFIG_S5P_DEV_MFC
  744. static struct resource s5p_mfc_resource[] = {
  745. [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
  746. [1] = DEFINE_RES_IRQ(IRQ_MFC),
  747. };
  748. struct platform_device s5p_device_mfc = {
  749. .name = "s5p-mfc",
  750. .id = -1,
  751. .num_resources = ARRAY_SIZE(s5p_mfc_resource),
  752. .resource = s5p_mfc_resource,
  753. };
  754. /*
  755. * MFC hardware has 2 memory interfaces which are modelled as two separate
  756. * platform devices to let dma-mapping distinguish between them.
  757. *
  758. * MFC parent device (s5p_device_mfc) must be registered before memory
  759. * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
  760. */
  761. struct platform_device s5p_device_mfc_l = {
  762. .name = "s5p-mfc-l",
  763. .id = -1,
  764. .dev = {
  765. .parent = &s5p_device_mfc.dev,
  766. .dma_mask = &samsung_device_dma_mask,
  767. .coherent_dma_mask = DMA_BIT_MASK(32),
  768. },
  769. };
  770. struct platform_device s5p_device_mfc_r = {
  771. .name = "s5p-mfc-r",
  772. .id = -1,
  773. .dev = {
  774. .parent = &s5p_device_mfc.dev,
  775. .dma_mask = &samsung_device_dma_mask,
  776. .coherent_dma_mask = DMA_BIT_MASK(32),
  777. },
  778. };
  779. #endif /* CONFIG_S5P_DEV_MFC */
  780. /* MIPI CSIS */
  781. #ifdef CONFIG_S5P_DEV_CSIS0
  782. static struct resource s5p_mipi_csis0_resource[] = {
  783. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
  784. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  785. };
  786. struct platform_device s5p_device_mipi_csis0 = {
  787. .name = "s5p-mipi-csis",
  788. .id = 0,
  789. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  790. .resource = s5p_mipi_csis0_resource,
  791. };
  792. #endif /* CONFIG_S5P_DEV_CSIS0 */
  793. #ifdef CONFIG_S5P_DEV_CSIS1
  794. static struct resource s5p_mipi_csis1_resource[] = {
  795. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
  796. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  797. };
  798. struct platform_device s5p_device_mipi_csis1 = {
  799. .name = "s5p-mipi-csis",
  800. .id = 1,
  801. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  802. .resource = s5p_mipi_csis1_resource,
  803. };
  804. #endif
  805. /* NAND */
  806. #ifdef CONFIG_S3C_DEV_NAND
  807. static struct resource s3c_nand_resource[] = {
  808. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  809. };
  810. struct platform_device s3c_device_nand = {
  811. .name = "s3c2410-nand",
  812. .id = -1,
  813. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  814. .resource = s3c_nand_resource,
  815. };
  816. /*
  817. * s3c_nand_copy_set() - copy nand set data
  818. * @set: The new structure, directly copied from the old.
  819. *
  820. * Copy all the fields from the NAND set field from what is probably __initdata
  821. * to new kernel memory. The code returns 0 if the copy happened correctly or
  822. * an error code for the calling function to display.
  823. *
  824. * Note, we currently do not try and look to see if we've already copied the
  825. * data in a previous set.
  826. */
  827. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  828. {
  829. void *ptr;
  830. int size;
  831. size = sizeof(struct mtd_partition) * set->nr_partitions;
  832. if (size) {
  833. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  834. set->partitions = ptr;
  835. if (!ptr)
  836. return -ENOMEM;
  837. }
  838. if (set->nr_map && set->nr_chips) {
  839. size = sizeof(int) * set->nr_chips;
  840. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  841. set->nr_map = ptr;
  842. if (!ptr)
  843. return -ENOMEM;
  844. }
  845. if (set->ecc_layout) {
  846. ptr = kmemdup(set->ecc_layout,
  847. sizeof(struct nand_ecclayout), GFP_KERNEL);
  848. set->ecc_layout = ptr;
  849. if (!ptr)
  850. return -ENOMEM;
  851. }
  852. return 0;
  853. }
  854. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  855. {
  856. struct s3c2410_platform_nand *npd;
  857. int size;
  858. int ret;
  859. /* note, if we get a failure in allocation, we simply drop out of the
  860. * function. If there is so little memory available at initialisation
  861. * time then there is little chance the system is going to run.
  862. */
  863. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  864. &s3c_device_nand);
  865. if (!npd)
  866. return;
  867. /* now see if we need to copy any of the nand set data */
  868. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  869. if (size) {
  870. struct s3c2410_nand_set *from = npd->sets;
  871. struct s3c2410_nand_set *to;
  872. int i;
  873. to = kmemdup(from, size, GFP_KERNEL);
  874. npd->sets = to; /* set, even if we failed */
  875. if (!to) {
  876. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  877. return;
  878. }
  879. for (i = 0; i < npd->nr_sets; i++) {
  880. ret = s3c_nand_copy_set(to);
  881. if (ret) {
  882. printk(KERN_ERR "%s: failed to copy set %d\n",
  883. __func__, i);
  884. return;
  885. }
  886. to++;
  887. }
  888. }
  889. }
  890. #endif /* CONFIG_S3C_DEV_NAND */
  891. /* ONENAND */
  892. #ifdef CONFIG_S3C_DEV_ONENAND
  893. static struct resource s3c_onenand_resources[] = {
  894. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  895. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  896. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  897. };
  898. struct platform_device s3c_device_onenand = {
  899. .name = "samsung-onenand",
  900. .id = 0,
  901. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  902. .resource = s3c_onenand_resources,
  903. };
  904. #endif /* CONFIG_S3C_DEV_ONENAND */
  905. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  906. static struct resource s3c64xx_onenand1_resources[] = {
  907. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  908. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  909. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  910. };
  911. struct platform_device s3c64xx_device_onenand1 = {
  912. .name = "samsung-onenand",
  913. .id = 1,
  914. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  915. .resource = s3c64xx_onenand1_resources,
  916. };
  917. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  918. {
  919. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  920. &s3c64xx_device_onenand1);
  921. }
  922. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  923. #ifdef CONFIG_S5P_DEV_ONENAND
  924. static struct resource s5p_onenand_resources[] = {
  925. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  926. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  927. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  928. };
  929. struct platform_device s5p_device_onenand = {
  930. .name = "s5pc110-onenand",
  931. .id = -1,
  932. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  933. .resource = s5p_onenand_resources,
  934. };
  935. #endif /* CONFIG_S5P_DEV_ONENAND */
  936. /* PMU */
  937. #ifdef CONFIG_PLAT_S5P
  938. static struct resource s5p_pmu_resource[] = {
  939. DEFINE_RES_IRQ(IRQ_PMU)
  940. };
  941. static struct platform_device s5p_device_pmu = {
  942. .name = "arm-pmu",
  943. .id = -1,
  944. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  945. .resource = s5p_pmu_resource,
  946. };
  947. static int __init s5p_pmu_init(void)
  948. {
  949. platform_device_register(&s5p_device_pmu);
  950. return 0;
  951. }
  952. arch_initcall(s5p_pmu_init);
  953. #endif /* CONFIG_PLAT_S5P */
  954. /* PWM Timer */
  955. #ifdef CONFIG_SAMSUNG_DEV_PWM
  956. #define TIMER_RESOURCE_SIZE (1)
  957. #define TIMER_RESOURCE(_tmr, _irq) \
  958. (struct resource [TIMER_RESOURCE_SIZE]) { \
  959. [0] = { \
  960. .start = _irq, \
  961. .end = _irq, \
  962. .flags = IORESOURCE_IRQ \
  963. } \
  964. }
  965. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  966. .name = "s3c24xx-pwm", \
  967. .id = _tmr_no, \
  968. .num_resources = TIMER_RESOURCE_SIZE, \
  969. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  970. /*
  971. * since we already have an static mapping for the timer,
  972. * we do not bother setting any IO resource for the base.
  973. */
  974. struct platform_device s3c_device_timer[] = {
  975. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  976. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  977. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  978. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  979. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  980. };
  981. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  982. /* RTC */
  983. #ifdef CONFIG_PLAT_S3C24XX
  984. static struct resource s3c_rtc_resource[] = {
  985. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  986. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  987. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  988. };
  989. struct platform_device s3c_device_rtc = {
  990. .name = "s3c2410-rtc",
  991. .id = -1,
  992. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  993. .resource = s3c_rtc_resource,
  994. };
  995. #endif /* CONFIG_PLAT_S3C24XX */
  996. #ifdef CONFIG_S3C_DEV_RTC
  997. static struct resource s3c_rtc_resource[] = {
  998. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  999. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  1000. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  1001. };
  1002. struct platform_device s3c_device_rtc = {
  1003. .name = "s3c64xx-rtc",
  1004. .id = -1,
  1005. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  1006. .resource = s3c_rtc_resource,
  1007. };
  1008. #endif /* CONFIG_S3C_DEV_RTC */
  1009. /* SDI */
  1010. #ifdef CONFIG_PLAT_S3C24XX
  1011. static struct resource s3c_sdi_resource[] = {
  1012. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  1013. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  1014. };
  1015. struct platform_device s3c_device_sdi = {
  1016. .name = "s3c2410-sdi",
  1017. .id = -1,
  1018. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  1019. .resource = s3c_sdi_resource,
  1020. };
  1021. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  1022. {
  1023. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  1024. &s3c_device_sdi);
  1025. }
  1026. #endif /* CONFIG_PLAT_S3C24XX */
  1027. /* SPI */
  1028. #ifdef CONFIG_PLAT_S3C24XX
  1029. static struct resource s3c_spi0_resource[] = {
  1030. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  1031. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  1032. };
  1033. struct platform_device s3c_device_spi0 = {
  1034. .name = "s3c2410-spi",
  1035. .id = 0,
  1036. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  1037. .resource = s3c_spi0_resource,
  1038. .dev = {
  1039. .dma_mask = &samsung_device_dma_mask,
  1040. .coherent_dma_mask = DMA_BIT_MASK(32),
  1041. }
  1042. };
  1043. static struct resource s3c_spi1_resource[] = {
  1044. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1045. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1046. };
  1047. struct platform_device s3c_device_spi1 = {
  1048. .name = "s3c2410-spi",
  1049. .id = 1,
  1050. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1051. .resource = s3c_spi1_resource,
  1052. .dev = {
  1053. .dma_mask = &samsung_device_dma_mask,
  1054. .coherent_dma_mask = DMA_BIT_MASK(32),
  1055. }
  1056. };
  1057. #endif /* CONFIG_PLAT_S3C24XX */
  1058. /* Touchscreen */
  1059. #ifdef CONFIG_PLAT_S3C24XX
  1060. static struct resource s3c_ts_resource[] = {
  1061. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1062. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1063. };
  1064. struct platform_device s3c_device_ts = {
  1065. .name = "s3c2410-ts",
  1066. .id = -1,
  1067. .dev.parent = &s3c_device_adc.dev,
  1068. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1069. .resource = s3c_ts_resource,
  1070. };
  1071. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1072. {
  1073. s3c_set_platdata(hard_s3c2410ts_info,
  1074. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1075. }
  1076. #endif /* CONFIG_PLAT_S3C24XX */
  1077. #ifdef CONFIG_SAMSUNG_DEV_TS
  1078. static struct resource s3c_ts_resource[] = {
  1079. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1080. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1081. };
  1082. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1083. .delay = 10000,
  1084. .presc = 49,
  1085. .oversampling_shift = 2,
  1086. };
  1087. struct platform_device s3c_device_ts = {
  1088. .name = "s3c64xx-ts",
  1089. .id = -1,
  1090. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1091. .resource = s3c_ts_resource,
  1092. };
  1093. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1094. {
  1095. if (!pd)
  1096. pd = &default_ts_data;
  1097. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1098. &s3c_device_ts);
  1099. }
  1100. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1101. /* TV */
  1102. #ifdef CONFIG_S5P_DEV_TV
  1103. static struct resource s5p_hdmi_resources[] = {
  1104. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1105. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1106. };
  1107. struct platform_device s5p_device_hdmi = {
  1108. .name = "s5p-hdmi",
  1109. .id = -1,
  1110. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1111. .resource = s5p_hdmi_resources,
  1112. };
  1113. static struct resource s5p_sdo_resources[] = {
  1114. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1115. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1116. };
  1117. struct platform_device s5p_device_sdo = {
  1118. .name = "s5p-sdo",
  1119. .id = -1,
  1120. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1121. .resource = s5p_sdo_resources,
  1122. };
  1123. static struct resource s5p_mixer_resources[] = {
  1124. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1125. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1126. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1127. };
  1128. struct platform_device s5p_device_mixer = {
  1129. .name = "s5p-mixer",
  1130. .id = -1,
  1131. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1132. .resource = s5p_mixer_resources,
  1133. .dev = {
  1134. .dma_mask = &samsung_device_dma_mask,
  1135. .coherent_dma_mask = DMA_BIT_MASK(32),
  1136. }
  1137. };
  1138. #endif /* CONFIG_S5P_DEV_TV */
  1139. /* USB */
  1140. #ifdef CONFIG_S3C_DEV_USB_HOST
  1141. static struct resource s3c_usb_resource[] = {
  1142. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1143. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1144. };
  1145. struct platform_device s3c_device_ohci = {
  1146. .name = "s3c2410-ohci",
  1147. .id = -1,
  1148. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1149. .resource = s3c_usb_resource,
  1150. .dev = {
  1151. .dma_mask = &samsung_device_dma_mask,
  1152. .coherent_dma_mask = DMA_BIT_MASK(32),
  1153. }
  1154. };
  1155. /*
  1156. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1157. * @info: The platform data.
  1158. *
  1159. * This call copies the @info passed in and sets the device .platform_data
  1160. * field to that copy. The @info is copied so that the original can be marked
  1161. * __initdata.
  1162. */
  1163. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1164. {
  1165. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1166. &s3c_device_ohci);
  1167. }
  1168. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1169. /* USB Device (Gadget) */
  1170. #ifdef CONFIG_PLAT_S3C24XX
  1171. static struct resource s3c_usbgadget_resource[] = {
  1172. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1173. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1174. };
  1175. struct platform_device s3c_device_usbgadget = {
  1176. .name = "s3c2410-usbgadget",
  1177. .id = -1,
  1178. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1179. .resource = s3c_usbgadget_resource,
  1180. };
  1181. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1182. {
  1183. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1184. }
  1185. #endif /* CONFIG_PLAT_S3C24XX */
  1186. /* USB EHCI Host Controller */
  1187. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1188. static struct resource s5p_ehci_resource[] = {
  1189. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1190. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1191. };
  1192. struct platform_device s5p_device_ehci = {
  1193. .name = "s5p-ehci",
  1194. .id = -1,
  1195. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1196. .resource = s5p_ehci_resource,
  1197. .dev = {
  1198. .dma_mask = &samsung_device_dma_mask,
  1199. .coherent_dma_mask = DMA_BIT_MASK(32),
  1200. }
  1201. };
  1202. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1203. {
  1204. struct s5p_ehci_platdata *npd;
  1205. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1206. &s5p_device_ehci);
  1207. if (!npd->phy_init)
  1208. npd->phy_init = s5p_usb_phy_init;
  1209. if (!npd->phy_exit)
  1210. npd->phy_exit = s5p_usb_phy_exit;
  1211. }
  1212. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1213. /* USB HSOTG */
  1214. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1215. static struct resource s3c_usb_hsotg_resources[] = {
  1216. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  1217. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1218. };
  1219. struct platform_device s3c_device_usb_hsotg = {
  1220. .name = "s3c-hsotg",
  1221. .id = -1,
  1222. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1223. .resource = s3c_usb_hsotg_resources,
  1224. .dev = {
  1225. .dma_mask = &samsung_device_dma_mask,
  1226. .coherent_dma_mask = DMA_BIT_MASK(32),
  1227. },
  1228. };
  1229. void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
  1230. {
  1231. struct s3c_hsotg_plat *npd;
  1232. npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
  1233. &s3c_device_usb_hsotg);
  1234. if (!npd->phy_init)
  1235. npd->phy_init = s5p_usb_phy_init;
  1236. if (!npd->phy_exit)
  1237. npd->phy_exit = s5p_usb_phy_exit;
  1238. }
  1239. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1240. /* USB High Spped 2.0 Device (Gadget) */
  1241. #ifdef CONFIG_PLAT_S3C24XX
  1242. static struct resource s3c_hsudc_resource[] = {
  1243. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1244. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1245. };
  1246. struct platform_device s3c_device_usb_hsudc = {
  1247. .name = "s3c-hsudc",
  1248. .id = -1,
  1249. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1250. .resource = s3c_hsudc_resource,
  1251. .dev = {
  1252. .dma_mask = &samsung_device_dma_mask,
  1253. .coherent_dma_mask = DMA_BIT_MASK(32),
  1254. },
  1255. };
  1256. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1257. {
  1258. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1259. }
  1260. #endif /* CONFIG_PLAT_S3C24XX */
  1261. /* WDT */
  1262. #ifdef CONFIG_S3C_DEV_WDT
  1263. static struct resource s3c_wdt_resource[] = {
  1264. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1265. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1266. };
  1267. struct platform_device s3c_device_wdt = {
  1268. .name = "s3c2410-wdt",
  1269. .id = -1,
  1270. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1271. .resource = s3c_wdt_resource,
  1272. };
  1273. #endif /* CONFIG_S3C_DEV_WDT */
  1274. #ifdef CONFIG_S3C64XX_DEV_SPI0
  1275. static struct resource s3c64xx_spi0_resource[] = {
  1276. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  1277. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  1278. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  1279. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  1280. };
  1281. struct platform_device s3c64xx_device_spi0 = {
  1282. .name = "s3c6410-spi",
  1283. .id = 0,
  1284. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  1285. .resource = s3c64xx_spi0_resource,
  1286. .dev = {
  1287. .dma_mask = &samsung_device_dma_mask,
  1288. .coherent_dma_mask = DMA_BIT_MASK(32),
  1289. },
  1290. };
  1291. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1292. int num_cs)
  1293. {
  1294. struct s3c64xx_spi_info pd;
  1295. /* Reject invalid configuration */
  1296. if (!num_cs || src_clk_nr < 0) {
  1297. pr_err("%s: Invalid SPI configuration\n", __func__);
  1298. return;
  1299. }
  1300. pd.num_cs = num_cs;
  1301. pd.src_clk_nr = src_clk_nr;
  1302. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  1303. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  1304. }
  1305. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  1306. #ifdef CONFIG_S3C64XX_DEV_SPI1
  1307. static struct resource s3c64xx_spi1_resource[] = {
  1308. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  1309. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  1310. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  1311. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  1312. };
  1313. struct platform_device s3c64xx_device_spi1 = {
  1314. .name = "s3c6410-spi",
  1315. .id = 1,
  1316. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  1317. .resource = s3c64xx_spi1_resource,
  1318. .dev = {
  1319. .dma_mask = &samsung_device_dma_mask,
  1320. .coherent_dma_mask = DMA_BIT_MASK(32),
  1321. },
  1322. };
  1323. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1324. int num_cs)
  1325. {
  1326. struct s3c64xx_spi_info pd;
  1327. /* Reject invalid configuration */
  1328. if (!num_cs || src_clk_nr < 0) {
  1329. pr_err("%s: Invalid SPI configuration\n", __func__);
  1330. return;
  1331. }
  1332. pd.num_cs = num_cs;
  1333. pd.src_clk_nr = src_clk_nr;
  1334. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  1335. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  1336. }
  1337. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1338. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1339. static struct resource s3c64xx_spi2_resource[] = {
  1340. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1341. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  1342. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  1343. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  1344. };
  1345. struct platform_device s3c64xx_device_spi2 = {
  1346. .name = "s3c6410-spi",
  1347. .id = 2,
  1348. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1349. .resource = s3c64xx_spi2_resource,
  1350. .dev = {
  1351. .dma_mask = &samsung_device_dma_mask,
  1352. .coherent_dma_mask = DMA_BIT_MASK(32),
  1353. },
  1354. };
  1355. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1356. int num_cs)
  1357. {
  1358. struct s3c64xx_spi_info pd;
  1359. /* Reject invalid configuration */
  1360. if (!num_cs || src_clk_nr < 0) {
  1361. pr_err("%s: Invalid SPI configuration\n", __func__);
  1362. return;
  1363. }
  1364. pd.num_cs = num_cs;
  1365. pd.src_clk_nr = src_clk_nr;
  1366. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  1367. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  1368. }
  1369. #endif /* CONFIG_S3C64XX_DEV_SPI2 */