setup.c 12 KB

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  1. /*
  2. * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
  3. * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
  4. * Copyright (C) 2006 Michael Buesch <m@bues.ch>
  5. * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
  6. * Copyright (C) 2010-2011 Hauke Mehrtens <hauke@hauke-m.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  14. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  15. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  16. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  19. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 675 Mass Ave, Cambridge, MA 02139, USA.
  27. */
  28. #include <linux/export.h>
  29. #include <linux/types.h>
  30. #include <linux/ssb/ssb.h>
  31. #include <linux/ssb/ssb_embedded.h>
  32. #include <linux/bcma/bcma_soc.h>
  33. #include <asm/bootinfo.h>
  34. #include <asm/reboot.h>
  35. #include <asm/time.h>
  36. #include <bcm47xx.h>
  37. #include <asm/mach-bcm47xx/nvram.h>
  38. union bcm47xx_bus bcm47xx_bus;
  39. EXPORT_SYMBOL(bcm47xx_bus);
  40. enum bcm47xx_bus_type bcm47xx_bus_type;
  41. EXPORT_SYMBOL(bcm47xx_bus_type);
  42. static void bcm47xx_machine_restart(char *command)
  43. {
  44. printk(KERN_ALERT "Please stand by while rebooting the system...\n");
  45. local_irq_disable();
  46. /* Set the watchdog timer to reset immediately */
  47. switch (bcm47xx_bus_type) {
  48. #ifdef CONFIG_BCM47XX_SSB
  49. case BCM47XX_BUS_TYPE_SSB:
  50. ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
  51. break;
  52. #endif
  53. #ifdef CONFIG_BCM47XX_BCMA
  54. case BCM47XX_BUS_TYPE_BCMA:
  55. bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
  56. break;
  57. #endif
  58. }
  59. while (1)
  60. cpu_relax();
  61. }
  62. static void bcm47xx_machine_halt(void)
  63. {
  64. /* Disable interrupts and watchdog and spin forever */
  65. local_irq_disable();
  66. switch (bcm47xx_bus_type) {
  67. #ifdef CONFIG_BCM47XX_SSB
  68. case BCM47XX_BUS_TYPE_SSB:
  69. ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
  70. break;
  71. #endif
  72. #ifdef CONFIG_BCM47XX_BCMA
  73. case BCM47XX_BUS_TYPE_BCMA:
  74. bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
  75. break;
  76. #endif
  77. }
  78. while (1)
  79. cpu_relax();
  80. }
  81. #ifdef CONFIG_BCM47XX_SSB
  82. #define READ_FROM_NVRAM(_outvar, name, buf) \
  83. if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
  84. sprom->_outvar = simple_strtoul(buf, NULL, 0);
  85. #define READ_FROM_NVRAM2(_outvar, name1, name2, buf) \
  86. if (nvram_getprefix(prefix, name1, buf, sizeof(buf)) >= 0 || \
  87. nvram_getprefix(prefix, name2, buf, sizeof(buf)) >= 0)\
  88. sprom->_outvar = simple_strtoul(buf, NULL, 0);
  89. static inline int nvram_getprefix(const char *prefix, char *name,
  90. char *buf, int len)
  91. {
  92. if (prefix) {
  93. char key[100];
  94. snprintf(key, sizeof(key), "%s%s", prefix, name);
  95. return nvram_getenv(key, buf, len);
  96. }
  97. return nvram_getenv(name, buf, len);
  98. }
  99. static u32 nvram_getu32(const char *name, char *buf, int len)
  100. {
  101. int rv;
  102. char key[100];
  103. u16 var0, var1;
  104. snprintf(key, sizeof(key), "%s0", name);
  105. rv = nvram_getenv(key, buf, len);
  106. /* return 0 here so this looks like unset */
  107. if (rv < 0)
  108. return 0;
  109. var0 = simple_strtoul(buf, NULL, 0);
  110. snprintf(key, sizeof(key), "%s1", name);
  111. rv = nvram_getenv(key, buf, len);
  112. if (rv < 0)
  113. return 0;
  114. var1 = simple_strtoul(buf, NULL, 0);
  115. return var1 << 16 | var0;
  116. }
  117. static void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix)
  118. {
  119. char buf[100];
  120. u32 boardflags;
  121. memset(sprom, 0, sizeof(struct ssb_sprom));
  122. sprom->revision = 1; /* Fallback: Old hardware does not define this. */
  123. READ_FROM_NVRAM(revision, "sromrev", buf);
  124. if (nvram_getprefix(prefix, "il0macaddr", buf, sizeof(buf)) >= 0 ||
  125. nvram_getprefix(prefix, "macaddr", buf, sizeof(buf)) >= 0)
  126. nvram_parse_macaddr(buf, sprom->il0mac);
  127. if (nvram_getprefix(prefix, "et0macaddr", buf, sizeof(buf)) >= 0)
  128. nvram_parse_macaddr(buf, sprom->et0mac);
  129. if (nvram_getprefix(prefix, "et1macaddr", buf, sizeof(buf)) >= 0)
  130. nvram_parse_macaddr(buf, sprom->et1mac);
  131. READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
  132. READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
  133. READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
  134. READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
  135. READ_FROM_NVRAM(board_rev, "boardrev", buf);
  136. READ_FROM_NVRAM(country_code, "ccode", buf);
  137. READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
  138. READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
  139. READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
  140. READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
  141. READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
  142. READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
  143. READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
  144. READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
  145. READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
  146. READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
  147. READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
  148. READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
  149. READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
  150. READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
  151. READ_FROM_NVRAM2(gpio0, "ledbh0", "wl0gpio0", buf);
  152. READ_FROM_NVRAM2(gpio1, "ledbh1", "wl0gpio1", buf);
  153. READ_FROM_NVRAM2(gpio2, "ledbh2", "wl0gpio2", buf);
  154. READ_FROM_NVRAM2(gpio3, "ledbh3", "wl0gpio3", buf);
  155. READ_FROM_NVRAM2(maxpwr_bg, "maxp2ga0", "pa0maxpwr", buf);
  156. READ_FROM_NVRAM2(maxpwr_al, "maxp5gla0", "pa1lomaxpwr", buf);
  157. READ_FROM_NVRAM2(maxpwr_a, "maxp5ga0", "pa1maxpwr", buf);
  158. READ_FROM_NVRAM2(maxpwr_ah, "maxp5gha0", "pa1himaxpwr", buf);
  159. READ_FROM_NVRAM2(itssi_bg, "itt5ga0", "pa0itssit", buf);
  160. READ_FROM_NVRAM2(itssi_a, "itt2ga0", "pa1itssit", buf);
  161. READ_FROM_NVRAM(tri2g, "tri2g", buf);
  162. READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
  163. READ_FROM_NVRAM(tri5g, "tri5g", buf);
  164. READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
  165. READ_FROM_NVRAM(txpid2g[0], "txpid2ga0", buf);
  166. READ_FROM_NVRAM(txpid2g[1], "txpid2ga1", buf);
  167. READ_FROM_NVRAM(txpid2g[2], "txpid2ga2", buf);
  168. READ_FROM_NVRAM(txpid2g[3], "txpid2ga3", buf);
  169. READ_FROM_NVRAM(txpid5g[0], "txpid5ga0", buf);
  170. READ_FROM_NVRAM(txpid5g[1], "txpid5ga1", buf);
  171. READ_FROM_NVRAM(txpid5g[2], "txpid5ga2", buf);
  172. READ_FROM_NVRAM(txpid5g[3], "txpid5ga3", buf);
  173. READ_FROM_NVRAM(txpid5gl[0], "txpid5gla0", buf);
  174. READ_FROM_NVRAM(txpid5gl[1], "txpid5gla1", buf);
  175. READ_FROM_NVRAM(txpid5gl[2], "txpid5gla2", buf);
  176. READ_FROM_NVRAM(txpid5gl[3], "txpid5gla3", buf);
  177. READ_FROM_NVRAM(txpid5gh[0], "txpid5gha0", buf);
  178. READ_FROM_NVRAM(txpid5gh[1], "txpid5gha1", buf);
  179. READ_FROM_NVRAM(txpid5gh[2], "txpid5gha2", buf);
  180. READ_FROM_NVRAM(txpid5gh[3], "txpid5gha3", buf);
  181. READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
  182. READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
  183. READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
  184. READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
  185. READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
  186. READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
  187. READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
  188. READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
  189. READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
  190. READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
  191. READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
  192. sprom->ofdm2gpo = nvram_getu32("ofdm2gpo", buf, sizeof(buf));
  193. sprom->ofdm5glpo = nvram_getu32("ofdm5glpo", buf, sizeof(buf));
  194. sprom->ofdm5gpo = nvram_getu32("ofdm5gpo", buf, sizeof(buf));
  195. sprom->ofdm5ghpo = nvram_getu32("ofdm5ghpo", buf, sizeof(buf));
  196. READ_FROM_NVRAM(antenna_gain.ghz24.a0, "ag0", buf);
  197. READ_FROM_NVRAM(antenna_gain.ghz24.a1, "ag1", buf);
  198. READ_FROM_NVRAM(antenna_gain.ghz24.a2, "ag2", buf);
  199. READ_FROM_NVRAM(antenna_gain.ghz24.a3, "ag3", buf);
  200. memcpy(&sprom->antenna_gain.ghz5, &sprom->antenna_gain.ghz24,
  201. sizeof(sprom->antenna_gain.ghz5));
  202. if (nvram_getprefix(prefix, "boardflags", buf, sizeof(buf)) >= 0) {
  203. boardflags = simple_strtoul(buf, NULL, 0);
  204. if (boardflags) {
  205. sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
  206. sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
  207. }
  208. }
  209. if (nvram_getprefix(prefix, "boardflags2", buf, sizeof(buf)) >= 0) {
  210. boardflags = simple_strtoul(buf, NULL, 0);
  211. if (boardflags) {
  212. sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
  213. sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
  214. }
  215. }
  216. }
  217. int bcm47xx_get_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
  218. {
  219. char prefix[10];
  220. if (bus->bustype == SSB_BUSTYPE_PCI) {
  221. snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
  222. bus->host_pci->bus->number + 1,
  223. PCI_SLOT(bus->host_pci->devfn));
  224. bcm47xx_fill_sprom(out, prefix);
  225. return 0;
  226. } else {
  227. printk(KERN_WARNING "bcm47xx: unable to fill SPROM for given bustype.\n");
  228. return -EINVAL;
  229. }
  230. }
  231. static int bcm47xx_get_invariants(struct ssb_bus *bus,
  232. struct ssb_init_invariants *iv)
  233. {
  234. char buf[20];
  235. /* Fill boardinfo structure */
  236. memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
  237. if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
  238. iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);
  239. else
  240. iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
  241. if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
  242. iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
  243. if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
  244. iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
  245. bcm47xx_fill_sprom(&iv->sprom, NULL);
  246. if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
  247. iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
  248. return 0;
  249. }
  250. static void __init bcm47xx_register_ssb(void)
  251. {
  252. int err;
  253. char buf[100];
  254. struct ssb_mipscore *mcore;
  255. err = ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom);
  256. if (err)
  257. printk(KERN_WARNING "bcm47xx: someone else already registered"
  258. " a ssb SPROM callback handler (err %d)\n", err);
  259. err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
  260. bcm47xx_get_invariants);
  261. if (err)
  262. panic("Failed to initialize SSB bus (err %d)\n", err);
  263. mcore = &bcm47xx_bus.ssb.mipscore;
  264. if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
  265. if (strstr(buf, "console=ttyS1")) {
  266. struct ssb_serial_port port;
  267. printk(KERN_DEBUG "Swapping serial ports!\n");
  268. /* swap serial ports */
  269. memcpy(&port, &mcore->serial_ports[0], sizeof(port));
  270. memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
  271. sizeof(port));
  272. memcpy(&mcore->serial_ports[1], &port, sizeof(port));
  273. }
  274. }
  275. }
  276. #endif
  277. #ifdef CONFIG_BCM47XX_BCMA
  278. static void __init bcm47xx_register_bcma(void)
  279. {
  280. int err;
  281. err = bcma_host_soc_register(&bcm47xx_bus.bcma);
  282. if (err)
  283. panic("Failed to initialize BCMA bus (err %d)\n", err);
  284. }
  285. #endif
  286. void __init plat_mem_setup(void)
  287. {
  288. struct cpuinfo_mips *c = &current_cpu_data;
  289. if (c->cputype == CPU_74K) {
  290. printk(KERN_INFO "bcm47xx: using bcma bus\n");
  291. #ifdef CONFIG_BCM47XX_BCMA
  292. bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
  293. bcm47xx_register_bcma();
  294. #endif
  295. } else {
  296. printk(KERN_INFO "bcm47xx: using ssb bus\n");
  297. #ifdef CONFIG_BCM47XX_SSB
  298. bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
  299. bcm47xx_register_ssb();
  300. #endif
  301. }
  302. _machine_restart = bcm47xx_machine_restart;
  303. _machine_halt = bcm47xx_machine_halt;
  304. pm_power_off = bcm47xx_machine_halt;
  305. }
  306. static int __init bcm47xx_register_bus_complete(void)
  307. {
  308. switch (bcm47xx_bus_type) {
  309. #ifdef CONFIG_BCM47XX_SSB
  310. case BCM47XX_BUS_TYPE_SSB:
  311. /* Nothing to do */
  312. break;
  313. #endif
  314. #ifdef CONFIG_BCM47XX_BCMA
  315. case BCM47XX_BUS_TYPE_BCMA:
  316. bcma_bus_register(&bcm47xx_bus.bcma.bus);
  317. break;
  318. #endif
  319. }
  320. return 0;
  321. }
  322. device_initcall(bcm47xx_register_bus_complete);