swiotlb.c 25 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/string.h>
  24. #include <linux/types.h>
  25. #include <linux/ctype.h>
  26. #include <asm/io.h>
  27. #include <asm/dma.h>
  28. #include <asm/scatterlist.h>
  29. #include <asm/swiotlb.h>
  30. #include <linux/init.h>
  31. #include <linux/bootmem.h>
  32. #define OFFSET(val,align) ((unsigned long) \
  33. ( (val) & ( (align) - 1)))
  34. #ifndef SG_ENT_VIRT_ADDRESS
  35. #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
  36. #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
  37. #endif
  38. /*
  39. * Maximum allowable number of contiguous slabs to map,
  40. * must be a power of 2. What is the appropriate value ?
  41. * The complexity of {map,unmap}_single is linearly dependent on this value.
  42. */
  43. #define IO_TLB_SEGSIZE 128
  44. /*
  45. * log of the size of each IO TLB slab. The number of slabs is command line
  46. * controllable.
  47. */
  48. #define IO_TLB_SHIFT 11
  49. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  50. /*
  51. * Minimum IO TLB size to bother booting with. Systems with mainly
  52. * 64bit capable cards will only lightly use the swiotlb. If we can't
  53. * allocate a contiguous 1MB, we're probably in trouble anyway.
  54. */
  55. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  56. /*
  57. * Enumeration for sync targets
  58. */
  59. enum dma_sync_target {
  60. SYNC_FOR_CPU = 0,
  61. SYNC_FOR_DEVICE = 1,
  62. };
  63. int swiotlb_force;
  64. /*
  65. * Used to do a quick range check in swiotlb_unmap_single and
  66. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  67. * API.
  68. */
  69. static char *io_tlb_start, *io_tlb_end;
  70. /*
  71. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  72. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  73. */
  74. static unsigned long io_tlb_nslabs;
  75. /*
  76. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  77. */
  78. static unsigned long io_tlb_overflow = 32*1024;
  79. void *io_tlb_overflow_buffer;
  80. /*
  81. * This is a free list describing the number of free entries available from
  82. * each index
  83. */
  84. static unsigned int *io_tlb_list;
  85. static unsigned int io_tlb_index;
  86. /*
  87. * We need to save away the original address corresponding to a mapped entry
  88. * for the sync operations.
  89. */
  90. #ifndef SWIOTLB_ARCH_HAS_IO_TLB_ADDR_T
  91. typedef char *io_tlb_addr_t;
  92. #define swiotlb_orig_addr_null(buffer) (!(buffer))
  93. #define ptr_to_io_tlb_addr(ptr) (ptr)
  94. #define page_to_io_tlb_addr(pg, off) (page_address(pg) + (off))
  95. #define sg_to_io_tlb_addr(sg) SG_ENT_VIRT_ADDRESS(sg)
  96. #endif
  97. static io_tlb_addr_t *io_tlb_orig_addr;
  98. /*
  99. * Protect the above data structures in the map and unmap calls
  100. */
  101. static DEFINE_SPINLOCK(io_tlb_lock);
  102. #ifdef SWIOTLB_EXTRA_VARIABLES
  103. SWIOTLB_EXTRA_VARIABLES;
  104. #endif
  105. #ifndef SWIOTLB_ARCH_HAS_SETUP_IO_TLB_NPAGES
  106. static int __init
  107. setup_io_tlb_npages(char *str)
  108. {
  109. if (isdigit(*str)) {
  110. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  111. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  112. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  113. }
  114. if (*str == ',')
  115. ++str;
  116. if (!strcmp(str, "force"))
  117. swiotlb_force = 1;
  118. return 1;
  119. }
  120. #endif
  121. __setup("swiotlb=", setup_io_tlb_npages);
  122. /* make io_tlb_overflow tunable too? */
  123. #ifndef swiotlb_adjust_size
  124. #define swiotlb_adjust_size(size) ((void)0)
  125. #endif
  126. #ifndef swiotlb_adjust_seg
  127. #define swiotlb_adjust_seg(start, size) ((void)0)
  128. #endif
  129. #ifndef swiotlb_print_info
  130. #define swiotlb_print_info(bytes) \
  131. printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " \
  132. "0x%lx\n", bytes >> 20, \
  133. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end))
  134. #endif
  135. /*
  136. * Statically reserve bounce buffer space and initialize bounce buffer data
  137. * structures for the software IO TLB used to implement the DMA API.
  138. */
  139. void __init
  140. swiotlb_init_with_default_size(size_t default_size)
  141. {
  142. unsigned long i, bytes;
  143. if (!io_tlb_nslabs) {
  144. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  145. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  146. }
  147. swiotlb_adjust_size(io_tlb_nslabs);
  148. swiotlb_adjust_size(io_tlb_overflow);
  149. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  150. /*
  151. * Get IO TLB memory from the low pages
  152. */
  153. io_tlb_start = alloc_bootmem_low_pages(bytes);
  154. if (!io_tlb_start)
  155. panic("Cannot allocate SWIOTLB buffer");
  156. io_tlb_end = io_tlb_start + bytes;
  157. /*
  158. * Allocate and initialize the free list array. This array is used
  159. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  160. * between io_tlb_start and io_tlb_end.
  161. */
  162. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  163. for (i = 0; i < io_tlb_nslabs; i++) {
  164. if ( !(i % IO_TLB_SEGSIZE) )
  165. swiotlb_adjust_seg(io_tlb_start + (i << IO_TLB_SHIFT),
  166. IO_TLB_SEGSIZE << IO_TLB_SHIFT);
  167. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  168. }
  169. io_tlb_index = 0;
  170. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(io_tlb_addr_t));
  171. /*
  172. * Get the overflow emergency buffer
  173. */
  174. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  175. if (!io_tlb_overflow_buffer)
  176. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  177. swiotlb_adjust_seg(io_tlb_overflow_buffer, io_tlb_overflow);
  178. swiotlb_print_info(bytes);
  179. }
  180. #ifndef __swiotlb_init_with_default_size
  181. #define __swiotlb_init_with_default_size swiotlb_init_with_default_size
  182. #endif
  183. void __init
  184. swiotlb_init(void)
  185. {
  186. __swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  187. }
  188. #ifdef SWIOTLB_ARCH_NEED_LATE_INIT
  189. /*
  190. * Systems with larger DMA zones (those that don't support ISA) can
  191. * initialize the swiotlb later using the slab allocator if needed.
  192. * This should be just like above, but with some error catching.
  193. */
  194. int
  195. swiotlb_late_init_with_default_size(size_t default_size)
  196. {
  197. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  198. unsigned int order;
  199. if (!io_tlb_nslabs) {
  200. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  201. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  202. }
  203. /*
  204. * Get IO TLB memory from the low pages
  205. */
  206. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  207. io_tlb_nslabs = SLABS_PER_PAGE << order;
  208. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  209. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  210. io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  211. order);
  212. if (io_tlb_start)
  213. break;
  214. order--;
  215. }
  216. if (!io_tlb_start)
  217. goto cleanup1;
  218. if (order != get_order(bytes)) {
  219. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  220. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  221. io_tlb_nslabs = SLABS_PER_PAGE << order;
  222. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  223. }
  224. io_tlb_end = io_tlb_start + bytes;
  225. memset(io_tlb_start, 0, bytes);
  226. /*
  227. * Allocate and initialize the free list array. This array is used
  228. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  229. * between io_tlb_start and io_tlb_end.
  230. */
  231. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  232. get_order(io_tlb_nslabs * sizeof(int)));
  233. if (!io_tlb_list)
  234. goto cleanup2;
  235. for (i = 0; i < io_tlb_nslabs; i++)
  236. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  237. io_tlb_index = 0;
  238. io_tlb_orig_addr = (io_tlb_addr_t *)__get_free_pages(GFP_KERNEL,
  239. get_order(io_tlb_nslabs * sizeof(io_tlb_addr_t)));
  240. if (!io_tlb_orig_addr)
  241. goto cleanup3;
  242. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(io_tlb_addr_t));
  243. /*
  244. * Get the overflow emergency buffer
  245. */
  246. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  247. get_order(io_tlb_overflow));
  248. if (!io_tlb_overflow_buffer)
  249. goto cleanup4;
  250. swiotlb_print_info(bytes);
  251. return 0;
  252. cleanup4:
  253. free_pages((unsigned long)io_tlb_orig_addr,
  254. get_order(io_tlb_nslabs * sizeof(io_tlb_addr_t)));
  255. io_tlb_orig_addr = NULL;
  256. cleanup3:
  257. free_pages((unsigned long)io_tlb_list,
  258. get_order(io_tlb_nslabs * sizeof(int)));
  259. io_tlb_list = NULL;
  260. cleanup2:
  261. io_tlb_end = NULL;
  262. free_pages((unsigned long)io_tlb_start, order);
  263. io_tlb_start = NULL;
  264. cleanup1:
  265. io_tlb_nslabs = req_nslabs;
  266. return -ENOMEM;
  267. }
  268. #endif
  269. #ifndef SWIOTLB_ARCH_HAS_NEEDS_MAPPING
  270. static int
  271. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  272. {
  273. dma_addr_t mask = 0xffffffff;
  274. /* If the device has a mask, use it, otherwise default to 32 bits */
  275. if (hwdev && hwdev->dma_mask)
  276. mask = *hwdev->dma_mask;
  277. return (addr & ~mask) != 0;
  278. }
  279. static inline int range_needs_mapping(const void *ptr, size_t size)
  280. {
  281. return swiotlb_force;
  282. }
  283. static inline int order_needs_mapping(unsigned int order)
  284. {
  285. return 0;
  286. }
  287. #endif
  288. static void
  289. __sync_single(io_tlb_addr_t buffer, char *dma_addr, size_t size, int dir)
  290. {
  291. #ifndef SWIOTLB_ARCH_HAS_SYNC_SINGLE
  292. if (dir == DMA_TO_DEVICE)
  293. memcpy(dma_addr, buffer, size);
  294. else
  295. memcpy(buffer, dma_addr, size);
  296. #else
  297. __swiotlb_arch_sync_single(buffer, dma_addr, size, dir);
  298. #endif
  299. }
  300. /*
  301. * Allocates bounce buffer and returns its kernel virtual address.
  302. */
  303. static void *
  304. map_single(struct device *hwdev, io_tlb_addr_t buffer, size_t size, int dir)
  305. {
  306. unsigned long flags;
  307. char *dma_addr;
  308. unsigned int nslots, stride, index, wrap;
  309. int i;
  310. /*
  311. * For mappings greater than a page, we limit the stride (and
  312. * hence alignment) to a page size.
  313. */
  314. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  315. if (size > PAGE_SIZE)
  316. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  317. else
  318. stride = 1;
  319. BUG_ON(!nslots);
  320. /*
  321. * Find suitable number of IO TLB entries size that will fit this
  322. * request and allocate a buffer from that IO TLB pool.
  323. */
  324. spin_lock_irqsave(&io_tlb_lock, flags);
  325. {
  326. wrap = index = ALIGN(io_tlb_index, stride);
  327. if (index >= io_tlb_nslabs)
  328. wrap = index = 0;
  329. do {
  330. /*
  331. * If we find a slot that indicates we have 'nslots'
  332. * number of contiguous buffers, we allocate the
  333. * buffers from that slot and mark the entries as '0'
  334. * indicating unavailable.
  335. */
  336. if (io_tlb_list[index] >= nslots) {
  337. int count = 0;
  338. for (i = index; i < (int) (index + nslots); i++)
  339. io_tlb_list[i] = 0;
  340. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  341. io_tlb_list[i] = ++count;
  342. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  343. /*
  344. * Update the indices to avoid searching in
  345. * the next round.
  346. */
  347. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  348. ? (index + nslots) : 0);
  349. goto found;
  350. }
  351. index += stride;
  352. if (index >= io_tlb_nslabs)
  353. index = 0;
  354. } while (index != wrap);
  355. spin_unlock_irqrestore(&io_tlb_lock, flags);
  356. return NULL;
  357. }
  358. found:
  359. spin_unlock_irqrestore(&io_tlb_lock, flags);
  360. /*
  361. * Save away the mapping from the original address to the DMA address.
  362. * This is needed when we sync the memory. Then we sync the buffer if
  363. * needed.
  364. */
  365. io_tlb_orig_addr[index] = buffer;
  366. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  367. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  368. return dma_addr;
  369. }
  370. /*
  371. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  372. */
  373. static void
  374. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  375. {
  376. unsigned long flags;
  377. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  378. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  379. io_tlb_addr_t buffer = io_tlb_orig_addr[index];
  380. /*
  381. * First, sync the memory before unmapping the entry
  382. */
  383. if (!swiotlb_orig_addr_null(buffer)
  384. && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  385. /*
  386. * bounce... copy the data back into the original buffer * and
  387. * delete the bounce buffer.
  388. */
  389. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  390. /*
  391. * Return the buffer to the free list by setting the corresponding
  392. * entries to indicate the number of contigous entries available.
  393. * While returning the entries to the free list, we merge the entries
  394. * with slots below and above the pool being returned.
  395. */
  396. spin_lock_irqsave(&io_tlb_lock, flags);
  397. {
  398. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  399. io_tlb_list[index + nslots] : 0);
  400. /*
  401. * Step 1: return the slots to the free list, merging the
  402. * slots with superceeding slots
  403. */
  404. for (i = index + nslots - 1; i >= index; i--)
  405. io_tlb_list[i] = ++count;
  406. /*
  407. * Step 2: merge the returned slots with the preceding slots,
  408. * if available (non zero)
  409. */
  410. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  411. io_tlb_list[i] = ++count;
  412. }
  413. spin_unlock_irqrestore(&io_tlb_lock, flags);
  414. }
  415. static void
  416. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  417. int dir, int target)
  418. {
  419. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  420. io_tlb_addr_t buffer = io_tlb_orig_addr[index];
  421. switch (target) {
  422. case SYNC_FOR_CPU:
  423. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  424. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  425. else
  426. BUG_ON(dir != DMA_TO_DEVICE);
  427. break;
  428. case SYNC_FOR_DEVICE:
  429. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  430. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  431. else
  432. BUG_ON(dir != DMA_FROM_DEVICE);
  433. break;
  434. default:
  435. BUG();
  436. }
  437. }
  438. #ifdef SWIOTLB_ARCH_NEED_ALLOC
  439. void *
  440. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  441. dma_addr_t *dma_handle, gfp_t flags)
  442. {
  443. dma_addr_t dev_addr;
  444. void *ret;
  445. int order = get_order(size);
  446. /*
  447. * XXX fix me: the DMA API should pass us an explicit DMA mask
  448. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  449. * bit range instead of a 16MB one).
  450. */
  451. flags |= GFP_DMA;
  452. if (!order_needs_mapping(order))
  453. ret = (void *)__get_free_pages(flags, order);
  454. else
  455. ret = NULL;
  456. if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
  457. /*
  458. * The allocated memory isn't reachable by the device.
  459. * Fall back on swiotlb_map_single().
  460. */
  461. free_pages((unsigned long) ret, order);
  462. ret = NULL;
  463. }
  464. if (!ret) {
  465. /*
  466. * We are either out of memory or the device can't DMA
  467. * to GFP_DMA memory; fall back on
  468. * swiotlb_map_single(), which will grab memory from
  469. * the lowest available address range.
  470. */
  471. dma_addr_t handle;
  472. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  473. if (swiotlb_dma_mapping_error(handle))
  474. return NULL;
  475. ret = bus_to_virt(handle);
  476. }
  477. memset(ret, 0, size);
  478. dev_addr = virt_to_bus(ret);
  479. /* Confirm address can be DMA'd by device */
  480. if (address_needs_mapping(hwdev, dev_addr)) {
  481. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  482. (unsigned long long)*hwdev->dma_mask,
  483. (unsigned long long)dev_addr);
  484. panic("swiotlb_alloc_coherent: allocated memory is out of "
  485. "range for device");
  486. }
  487. *dma_handle = dev_addr;
  488. return ret;
  489. }
  490. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  491. void
  492. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  493. dma_addr_t dma_handle)
  494. {
  495. if (!(vaddr >= (void *)io_tlb_start
  496. && vaddr < (void *)io_tlb_end))
  497. free_pages((unsigned long) vaddr, get_order(size));
  498. else
  499. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  500. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  501. }
  502. EXPORT_SYMBOL(swiotlb_free_coherent);
  503. #endif
  504. static void
  505. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  506. {
  507. /*
  508. * Ran out of IOMMU space for this operation. This is very bad.
  509. * Unfortunately the drivers cannot handle this operation properly.
  510. * unless they check for dma_mapping_error (most don't)
  511. * When the mapping is small enough return a static buffer to limit
  512. * the damage, or panic when the transfer is too big.
  513. */
  514. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  515. "device %s\n", size, dev ? dev->bus_id : "?");
  516. if (size > io_tlb_overflow && do_panic) {
  517. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  518. panic("DMA: Memory would be corrupted\n");
  519. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  520. panic("DMA: Random memory would be DMAed\n");
  521. }
  522. }
  523. /*
  524. * Map a single buffer of the indicated size for DMA in streaming mode. The
  525. * physical address to use is returned.
  526. *
  527. * Once the device is given the dma address, the device owns this memory until
  528. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  529. */
  530. dma_addr_t
  531. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  532. {
  533. dma_addr_t dev_addr = virt_to_bus(ptr);
  534. void *map;
  535. BUG_ON(dir == DMA_NONE);
  536. /*
  537. * If the pointer passed in happens to be in the device's DMA window,
  538. * we can safely return the device addr and not worry about bounce
  539. * buffering it.
  540. */
  541. if (!range_needs_mapping(ptr, size)
  542. && !address_needs_mapping(hwdev, dev_addr))
  543. return dev_addr;
  544. /*
  545. * Oh well, have to allocate and map a bounce buffer.
  546. */
  547. map = map_single(hwdev, ptr_to_io_tlb_addr(ptr), size, dir);
  548. if (!map) {
  549. swiotlb_full(hwdev, size, dir, 1);
  550. map = io_tlb_overflow_buffer;
  551. }
  552. dev_addr = virt_to_bus(map);
  553. /*
  554. * Ensure that the address returned is DMA'ble
  555. */
  556. if (address_needs_mapping(hwdev, dev_addr))
  557. panic("map_single: bounce buffer is not DMA'ble");
  558. return dev_addr;
  559. }
  560. /*
  561. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  562. * match what was provided for in a previous swiotlb_map_single call. All
  563. * other usages are undefined.
  564. *
  565. * After this call, reads by the cpu to the buffer are guaranteed to see
  566. * whatever the device wrote there.
  567. */
  568. void
  569. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  570. int dir)
  571. {
  572. char *dma_addr = bus_to_virt(dev_addr);
  573. BUG_ON(dir == DMA_NONE);
  574. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  575. unmap_single(hwdev, dma_addr, size, dir);
  576. else if (dir == DMA_FROM_DEVICE)
  577. dma_mark_clean(dma_addr, size);
  578. }
  579. /*
  580. * Make physical memory consistent for a single streaming mode DMA translation
  581. * after a transfer.
  582. *
  583. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  584. * using the cpu, yet do not wish to teardown the dma mapping, you must
  585. * call this function before doing so. At the next point you give the dma
  586. * address back to the card, you must first perform a
  587. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  588. */
  589. static void
  590. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  591. size_t size, int dir, int target)
  592. {
  593. char *dma_addr = bus_to_virt(dev_addr);
  594. BUG_ON(dir == DMA_NONE);
  595. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  596. sync_single(hwdev, dma_addr, size, dir, target);
  597. else if (dir == DMA_FROM_DEVICE)
  598. dma_mark_clean(dma_addr, size);
  599. }
  600. void
  601. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  602. size_t size, int dir)
  603. {
  604. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  605. }
  606. void
  607. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  608. size_t size, int dir)
  609. {
  610. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  611. }
  612. /*
  613. * Same as above, but for a sub-range of the mapping.
  614. */
  615. static void
  616. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  617. unsigned long offset, size_t size,
  618. int dir, int target)
  619. {
  620. char *dma_addr = bus_to_virt(dev_addr) + offset;
  621. BUG_ON(dir == DMA_NONE);
  622. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  623. sync_single(hwdev, dma_addr, size, dir, target);
  624. else if (dir == DMA_FROM_DEVICE)
  625. dma_mark_clean(dma_addr, size);
  626. }
  627. void
  628. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  629. unsigned long offset, size_t size, int dir)
  630. {
  631. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  632. SYNC_FOR_CPU);
  633. }
  634. void
  635. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  636. unsigned long offset, size_t size, int dir)
  637. {
  638. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  639. SYNC_FOR_DEVICE);
  640. }
  641. /*
  642. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  643. * This is the scatter-gather version of the above swiotlb_map_single
  644. * interface. Here the scatter gather list elements are each tagged with the
  645. * appropriate dma address and length. They are obtained via
  646. * sg_dma_{address,length}(SG).
  647. *
  648. * NOTE: An implementation may be able to use a smaller number of
  649. * DMA address/length pairs than there are SG table elements.
  650. * (for example via virtual mapping capabilities)
  651. * The routine returns the number of addr/length pairs actually
  652. * used, at most nents.
  653. *
  654. * Device ownership issues as mentioned above for swiotlb_map_single are the
  655. * same here.
  656. */
  657. int
  658. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  659. int dir)
  660. {
  661. dma_addr_t dev_addr;
  662. int i;
  663. BUG_ON(dir == DMA_NONE);
  664. for (i = 0; i < nelems; i++, sg++) {
  665. dev_addr = SG_ENT_PHYS_ADDRESS(sg);
  666. if (range_needs_mapping(SG_ENT_VIRT_ADDRESS(sg), sg->length)
  667. || address_needs_mapping(hwdev, dev_addr)) {
  668. void *map = map_single(hwdev, sg_to_io_tlb_addr(sg), sg->length, dir);
  669. if (!map) {
  670. /* Don't panic here, we expect map_sg users
  671. to do proper error handling. */
  672. swiotlb_full(hwdev, sg->length, dir, 0);
  673. swiotlb_unmap_sg(hwdev, sg - i, i, dir);
  674. sg[0].dma_length = 0;
  675. return 0;
  676. }
  677. sg->dma_address = virt_to_bus(map);
  678. } else
  679. sg->dma_address = dev_addr;
  680. sg->dma_length = sg->length;
  681. }
  682. return nelems;
  683. }
  684. /*
  685. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  686. * concerning calls here are the same as for swiotlb_unmap_single() above.
  687. */
  688. void
  689. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  690. int dir)
  691. {
  692. int i;
  693. BUG_ON(dir == DMA_NONE);
  694. for (i = 0; i < nelems; i++, sg++)
  695. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  696. unmap_single(hwdev, bus_to_virt(sg->dma_address),
  697. sg->dma_length, dir);
  698. else if (dir == DMA_FROM_DEVICE)
  699. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  700. }
  701. /*
  702. * Make physical memory consistent for a set of streaming mode DMA translations
  703. * after a transfer.
  704. *
  705. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  706. * and usage.
  707. */
  708. static void
  709. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sg,
  710. int nelems, int dir, int target)
  711. {
  712. int i;
  713. BUG_ON(dir == DMA_NONE);
  714. for (i = 0; i < nelems; i++, sg++)
  715. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  716. sync_single(hwdev, bus_to_virt(sg->dma_address),
  717. sg->dma_length, dir, target);
  718. else if (dir == DMA_FROM_DEVICE)
  719. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  720. }
  721. void
  722. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  723. int nelems, int dir)
  724. {
  725. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  726. }
  727. void
  728. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  729. int nelems, int dir)
  730. {
  731. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  732. }
  733. #ifdef SWIOTLB_ARCH_NEED_MAP_PAGE
  734. dma_addr_t
  735. swiotlb_map_page(struct device *hwdev, struct page *page,
  736. unsigned long offset, size_t size,
  737. enum dma_data_direction direction)
  738. {
  739. dma_addr_t dev_addr;
  740. char *map;
  741. dev_addr = page_to_bus(page) + offset;
  742. if (address_needs_mapping(hwdev, dev_addr)) {
  743. map = map_single(hwdev, page_to_io_tlb_addr(page, offset), size, direction);
  744. if (!map) {
  745. swiotlb_full(hwdev, size, direction, 1);
  746. map = io_tlb_overflow_buffer;
  747. }
  748. dev_addr = virt_to_bus(map);
  749. }
  750. return dev_addr;
  751. }
  752. void
  753. swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  754. size_t size, enum dma_data_direction direction)
  755. {
  756. char *dma_addr = bus_to_virt(dev_addr);
  757. BUG_ON(direction == DMA_NONE);
  758. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  759. unmap_single(hwdev, dma_addr, size, direction);
  760. else if (direction == DMA_FROM_DEVICE)
  761. dma_mark_clean(dma_addr, size);
  762. }
  763. #endif
  764. int
  765. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  766. {
  767. return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
  768. }
  769. /*
  770. * Return whether the given device DMA address mask can be supported
  771. * properly. For example, if your device can only drive the low 24-bits
  772. * during bus mastering, then you would pass 0x00ffffff as the mask to
  773. * this function.
  774. */
  775. #ifndef __swiotlb_dma_supported
  776. #define __swiotlb_dma_supported(hwdev, mask) (virt_to_bus(io_tlb_end - 1) <= (mask))
  777. #endif
  778. int
  779. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  780. {
  781. return __swiotlb_dma_supported(hwdev, mask);
  782. }
  783. EXPORT_SYMBOL(swiotlb_init);
  784. EXPORT_SYMBOL(swiotlb_map_single);
  785. EXPORT_SYMBOL(swiotlb_unmap_single);
  786. EXPORT_SYMBOL(swiotlb_map_sg);
  787. EXPORT_SYMBOL(swiotlb_unmap_sg);
  788. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  789. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  790. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  791. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  792. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  793. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  794. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  795. EXPORT_SYMBOL(swiotlb_dma_supported);