mpc52xx_uart.c 30 KB

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  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  20. * Grant Likely <grant.likely@secretlab.ca>
  21. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  22. * Copyright (C) 2003 MontaVista, Software, Inc.
  23. *
  24. * This file is licensed under the terms of the GNU General Public License
  25. * version 2. This program is licensed "as is" without any warranty of any
  26. * kind, whether express or implied.
  27. */
  28. /* Platform device Usage :
  29. *
  30. * Since PSCs can have multiple function, the correct driver for each one
  31. * is selected by calling mpc52xx_match_psc_function(...). The function
  32. * handled by this driver is "uart".
  33. *
  34. * The driver init all necessary registers to place the PSC in uart mode without
  35. * DCD. However, the pin multiplexing aren't changed and should be set either
  36. * by the bootloader or in the platform init code.
  37. *
  38. * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
  39. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  40. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  41. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  42. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  43. * will be mapped to.
  44. */
  45. /* OF Platform device Usage :
  46. *
  47. * This driver is only used for PSCs configured in uart mode. The device
  48. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  49. * and "mpc52xx-psc-uart" in the compatible string
  50. *
  51. * By default, PSC devices are enumerated in the order they are found. However
  52. * a particular PSC number can be forces by adding 'device_no = <port#>'
  53. * to the device node.
  54. *
  55. * The driver init all necessary registers to place the PSC in uart mode without
  56. * DCD. However, the pin multiplexing aren't changed and should be set either
  57. * by the bootloader or in the platform init code.
  58. */
  59. #undef DEBUG
  60. #include <linux/device.h>
  61. #include <linux/module.h>
  62. #include <linux/tty.h>
  63. #include <linux/serial.h>
  64. #include <linux/sysrq.h>
  65. #include <linux/console.h>
  66. #include <asm/delay.h>
  67. #include <asm/io.h>
  68. #if defined(CONFIG_PPC_MERGE)
  69. #include <asm/of_platform.h>
  70. #else
  71. #include <linux/platform_device.h>
  72. #endif
  73. #include <asm/mpc52xx.h>
  74. #include <asm/mpc52xx_psc.h>
  75. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  76. #define SUPPORT_SYSRQ
  77. #endif
  78. #include <linux/serial_core.h>
  79. /* We've been assigned a range on the "Low-density serial ports" major */
  80. #define SERIAL_PSC_MAJOR 204
  81. #define SERIAL_PSC_MINOR 148
  82. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  83. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  84. /* Rem: - We use the read_status_mask as a shadow of
  85. * psc->mpc52xx_psc_imr
  86. * - It's important that is array is all zero on start as we
  87. * use it to know if it's initialized or not ! If it's not sure
  88. * it's cleared, then a memset(...,0,...) should be added to
  89. * the console_init
  90. */
  91. #if defined(CONFIG_PPC_MERGE)
  92. /* lookup table for matching device nodes to index numbers */
  93. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  94. static void mpc52xx_uart_of_enumerate(void);
  95. #endif
  96. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  97. /* Forward declaration of the interruption handling routine */
  98. static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
  99. /* Simple macro to test if a port is console or not. This one is taken
  100. * for serial_core.c and maybe should be moved to serial_core.h ? */
  101. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  102. #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
  103. #else
  104. #define uart_console(port) (0)
  105. #endif
  106. #if defined(CONFIG_PPC_MERGE)
  107. static struct of_device_id mpc52xx_uart_of_match[] = {
  108. { .type = "serial", .compatible = "mpc5200-psc-uart", },
  109. {},
  110. };
  111. #endif
  112. /* ======================================================================== */
  113. /* UART operations */
  114. /* ======================================================================== */
  115. static unsigned int
  116. mpc52xx_uart_tx_empty(struct uart_port *port)
  117. {
  118. int status = in_be16(&PSC(port)->mpc52xx_psc_status);
  119. return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
  120. }
  121. static void
  122. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  123. {
  124. /* Not implemented */
  125. }
  126. static unsigned int
  127. mpc52xx_uart_get_mctrl(struct uart_port *port)
  128. {
  129. /* Not implemented */
  130. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  131. }
  132. static void
  133. mpc52xx_uart_stop_tx(struct uart_port *port)
  134. {
  135. /* port->lock taken by caller */
  136. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  137. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  138. }
  139. static void
  140. mpc52xx_uart_start_tx(struct uart_port *port)
  141. {
  142. /* port->lock taken by caller */
  143. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  144. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  145. }
  146. static void
  147. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  148. {
  149. unsigned long flags;
  150. spin_lock_irqsave(&port->lock, flags);
  151. port->x_char = ch;
  152. if (ch) {
  153. /* Make sure tx interrupts are on */
  154. /* Truly necessary ??? They should be anyway */
  155. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  156. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  157. }
  158. spin_unlock_irqrestore(&port->lock, flags);
  159. }
  160. static void
  161. mpc52xx_uart_stop_rx(struct uart_port *port)
  162. {
  163. /* port->lock taken by caller */
  164. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  165. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  166. }
  167. static void
  168. mpc52xx_uart_enable_ms(struct uart_port *port)
  169. {
  170. /* Not implemented */
  171. }
  172. static void
  173. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  174. {
  175. unsigned long flags;
  176. spin_lock_irqsave(&port->lock, flags);
  177. if ( ctl == -1 )
  178. out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
  179. else
  180. out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
  181. spin_unlock_irqrestore(&port->lock, flags);
  182. }
  183. static int
  184. mpc52xx_uart_startup(struct uart_port *port)
  185. {
  186. struct mpc52xx_psc __iomem *psc = PSC(port);
  187. int ret;
  188. /* Request IRQ */
  189. ret = request_irq(port->irq, mpc52xx_uart_int,
  190. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
  191. if (ret)
  192. return ret;
  193. /* Reset/activate the port, clear and enable interrupts */
  194. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  195. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  196. out_be32(&psc->sicr,0); /* UART mode DCD ignored */
  197. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
  198. out_8(&psc->rfcntl, 0x00);
  199. out_be16(&psc->rfalarm, 0x1ff);
  200. out_8(&psc->tfcntl, 0x07);
  201. out_be16(&psc->tfalarm, 0x80);
  202. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  203. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  204. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  205. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  206. return 0;
  207. }
  208. static void
  209. mpc52xx_uart_shutdown(struct uart_port *port)
  210. {
  211. struct mpc52xx_psc __iomem *psc = PSC(port);
  212. /* Shut down the port, interrupt and all */
  213. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  214. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  215. port->read_status_mask = 0;
  216. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  217. /* Release interrupt */
  218. free_irq(port->irq, port);
  219. }
  220. static void
  221. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  222. struct ktermios *old)
  223. {
  224. struct mpc52xx_psc __iomem *psc = PSC(port);
  225. unsigned long flags;
  226. unsigned char mr1, mr2;
  227. unsigned short ctr;
  228. unsigned int j, baud, quot;
  229. /* Prepare what we're gonna write */
  230. mr1 = 0;
  231. switch (new->c_cflag & CSIZE) {
  232. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  233. break;
  234. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  235. break;
  236. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  237. break;
  238. case CS8:
  239. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  240. }
  241. if (new->c_cflag & PARENB) {
  242. mr1 |= (new->c_cflag & PARODD) ?
  243. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  244. } else
  245. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  246. mr2 = 0;
  247. if (new->c_cflag & CSTOPB)
  248. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  249. else
  250. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  251. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  252. MPC52xx_PSC_MODE_ONE_STOP;
  253. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  254. quot = uart_get_divisor(port, baud);
  255. ctr = quot & 0xffff;
  256. /* Get the lock */
  257. spin_lock_irqsave(&port->lock, flags);
  258. /* Update the per-port timeout */
  259. uart_update_timeout(port, new->c_cflag, baud);
  260. /* Do our best to flush TX & RX, so we don't loose anything */
  261. /* But we don't wait indefinitly ! */
  262. j = 5000000; /* Maximum wait */
  263. /* FIXME Can't receive chars since set_termios might be called at early
  264. * boot for the console, all stuff is not yet ready to receive at that
  265. * time and that just makes the kernel oops */
  266. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  267. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  268. --j)
  269. udelay(1);
  270. if (!j)
  271. printk( KERN_ERR "mpc52xx_uart.c: "
  272. "Unable to flush RX & TX fifos in-time in set_termios."
  273. "Some chars may have been lost.\n" );
  274. /* Reset the TX & RX */
  275. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  276. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  277. /* Send new mode settings */
  278. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  279. out_8(&psc->mode,mr1);
  280. out_8(&psc->mode,mr2);
  281. out_8(&psc->ctur,ctr >> 8);
  282. out_8(&psc->ctlr,ctr & 0xff);
  283. /* Reenable TX & RX */
  284. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  285. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  286. /* We're all set, release the lock */
  287. spin_unlock_irqrestore(&port->lock, flags);
  288. }
  289. static const char *
  290. mpc52xx_uart_type(struct uart_port *port)
  291. {
  292. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  293. }
  294. static void
  295. mpc52xx_uart_release_port(struct uart_port *port)
  296. {
  297. if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
  298. iounmap(port->membase);
  299. port->membase = NULL;
  300. }
  301. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  302. }
  303. static int
  304. mpc52xx_uart_request_port(struct uart_port *port)
  305. {
  306. int err;
  307. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  308. port->membase = ioremap(port->mapbase,
  309. sizeof(struct mpc52xx_psc));
  310. if (!port->membase)
  311. return -EINVAL;
  312. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  313. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  314. if (err && (port->flags & UPF_IOREMAP)) {
  315. iounmap(port->membase);
  316. port->membase = NULL;
  317. }
  318. return err;
  319. }
  320. static void
  321. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  322. {
  323. if ( (flags & UART_CONFIG_TYPE) &&
  324. (mpc52xx_uart_request_port(port) == 0) )
  325. port->type = PORT_MPC52xx;
  326. }
  327. static int
  328. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  329. {
  330. if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
  331. return -EINVAL;
  332. if ( (ser->irq != port->irq) ||
  333. (ser->io_type != SERIAL_IO_MEM) ||
  334. (ser->baud_base != port->uartclk) ||
  335. (ser->iomem_base != (void*)port->mapbase) ||
  336. (ser->hub6 != 0 ) )
  337. return -EINVAL;
  338. return 0;
  339. }
  340. static struct uart_ops mpc52xx_uart_ops = {
  341. .tx_empty = mpc52xx_uart_tx_empty,
  342. .set_mctrl = mpc52xx_uart_set_mctrl,
  343. .get_mctrl = mpc52xx_uart_get_mctrl,
  344. .stop_tx = mpc52xx_uart_stop_tx,
  345. .start_tx = mpc52xx_uart_start_tx,
  346. .send_xchar = mpc52xx_uart_send_xchar,
  347. .stop_rx = mpc52xx_uart_stop_rx,
  348. .enable_ms = mpc52xx_uart_enable_ms,
  349. .break_ctl = mpc52xx_uart_break_ctl,
  350. .startup = mpc52xx_uart_startup,
  351. .shutdown = mpc52xx_uart_shutdown,
  352. .set_termios = mpc52xx_uart_set_termios,
  353. /* .pm = mpc52xx_uart_pm, Not supported yet */
  354. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  355. .type = mpc52xx_uart_type,
  356. .release_port = mpc52xx_uart_release_port,
  357. .request_port = mpc52xx_uart_request_port,
  358. .config_port = mpc52xx_uart_config_port,
  359. .verify_port = mpc52xx_uart_verify_port
  360. };
  361. /* ======================================================================== */
  362. /* Interrupt handling */
  363. /* ======================================================================== */
  364. static inline int
  365. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  366. {
  367. struct tty_struct *tty = port->info->tty;
  368. unsigned char ch, flag;
  369. unsigned short status;
  370. /* While we can read, do so ! */
  371. while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
  372. MPC52xx_PSC_SR_RXRDY) {
  373. /* Get the char */
  374. ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  375. /* Handle sysreq char */
  376. #ifdef SUPPORT_SYSRQ
  377. if (uart_handle_sysrq_char(port, ch)) {
  378. port->sysrq = 0;
  379. continue;
  380. }
  381. #endif
  382. /* Store it */
  383. flag = TTY_NORMAL;
  384. port->icount.rx++;
  385. if ( status & (MPC52xx_PSC_SR_PE |
  386. MPC52xx_PSC_SR_FE |
  387. MPC52xx_PSC_SR_RB) ) {
  388. if (status & MPC52xx_PSC_SR_RB) {
  389. flag = TTY_BREAK;
  390. uart_handle_break(port);
  391. } else if (status & MPC52xx_PSC_SR_PE)
  392. flag = TTY_PARITY;
  393. else if (status & MPC52xx_PSC_SR_FE)
  394. flag = TTY_FRAME;
  395. /* Clear error condition */
  396. out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
  397. }
  398. tty_insert_flip_char(tty, ch, flag);
  399. if (status & MPC52xx_PSC_SR_OE) {
  400. /*
  401. * Overrun is special, since it's
  402. * reported immediately, and doesn't
  403. * affect the current character
  404. */
  405. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  406. }
  407. }
  408. tty_flip_buffer_push(tty);
  409. return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
  410. }
  411. static inline int
  412. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  413. {
  414. struct circ_buf *xmit = &port->info->xmit;
  415. /* Process out of band chars */
  416. if (port->x_char) {
  417. out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
  418. port->icount.tx++;
  419. port->x_char = 0;
  420. return 1;
  421. }
  422. /* Nothing to do ? */
  423. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  424. mpc52xx_uart_stop_tx(port);
  425. return 0;
  426. }
  427. /* Send chars */
  428. while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
  429. out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
  430. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  431. port->icount.tx++;
  432. if (uart_circ_empty(xmit))
  433. break;
  434. }
  435. /* Wake up */
  436. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  437. uart_write_wakeup(port);
  438. /* Maybe we're done after all */
  439. if (uart_circ_empty(xmit)) {
  440. mpc52xx_uart_stop_tx(port);
  441. return 0;
  442. }
  443. return 1;
  444. }
  445. static irqreturn_t
  446. mpc52xx_uart_int(int irq, void *dev_id)
  447. {
  448. struct uart_port *port = dev_id;
  449. unsigned long pass = ISR_PASS_LIMIT;
  450. unsigned int keepgoing;
  451. unsigned short status;
  452. spin_lock(&port->lock);
  453. /* While we have stuff to do, we continue */
  454. do {
  455. /* If we don't find anything to do, we stop */
  456. keepgoing = 0;
  457. /* Read status */
  458. status = in_be16(&PSC(port)->mpc52xx_psc_isr);
  459. status &= port->read_status_mask;
  460. /* Do we need to receive chars ? */
  461. /* For this RX interrupts must be on and some chars waiting */
  462. if ( status & MPC52xx_PSC_IMR_RXRDY )
  463. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  464. /* Do we need to send chars ? */
  465. /* For this, TX must be ready and TX interrupt enabled */
  466. if ( status & MPC52xx_PSC_IMR_TXRDY )
  467. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  468. /* Limit number of iteration */
  469. if ( !(--pass) )
  470. keepgoing = 0;
  471. } while (keepgoing);
  472. spin_unlock(&port->lock);
  473. return IRQ_HANDLED;
  474. }
  475. /* ======================================================================== */
  476. /* Console ( if applicable ) */
  477. /* ======================================================================== */
  478. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  479. static void __init
  480. mpc52xx_console_get_options(struct uart_port *port,
  481. int *baud, int *parity, int *bits, int *flow)
  482. {
  483. struct mpc52xx_psc __iomem *psc = PSC(port);
  484. unsigned char mr1;
  485. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  486. /* Read the mode registers */
  487. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  488. mr1 = in_8(&psc->mode);
  489. /* CT{U,L}R are write-only ! */
  490. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  491. #if !defined(CONFIG_PPC_MERGE)
  492. if (__res.bi_baudrate)
  493. *baud = __res.bi_baudrate;
  494. #endif
  495. /* Parse them */
  496. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  497. case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
  498. case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
  499. case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
  500. case MPC52xx_PSC_MODE_8_BITS:
  501. default: *bits = 8;
  502. }
  503. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  504. *parity = 'n';
  505. else
  506. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  507. }
  508. static void
  509. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  510. {
  511. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  512. struct mpc52xx_psc __iomem *psc = PSC(port);
  513. unsigned int i, j;
  514. /* Disable interrupts */
  515. out_be16(&psc->mpc52xx_psc_imr, 0);
  516. /* Wait the TX buffer to be empty */
  517. j = 5000000; /* Maximum wait */
  518. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  519. --j)
  520. udelay(1);
  521. /* Write all the chars */
  522. for (i = 0; i < count; i++, s++) {
  523. /* Line return handling */
  524. if (*s == '\n')
  525. out_8(&psc->mpc52xx_psc_buffer_8, '\r');
  526. /* Send the char */
  527. out_8(&psc->mpc52xx_psc_buffer_8, *s);
  528. /* Wait the TX buffer to be empty */
  529. j = 20000; /* Maximum wait */
  530. while (!(in_be16(&psc->mpc52xx_psc_status) &
  531. MPC52xx_PSC_SR_TXEMP) && --j)
  532. udelay(1);
  533. }
  534. /* Restore interrupt state */
  535. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  536. }
  537. #if !defined(CONFIG_PPC_MERGE)
  538. static int __init
  539. mpc52xx_console_setup(struct console *co, char *options)
  540. {
  541. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  542. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  543. int bits = 8;
  544. int parity = 'n';
  545. int flow = 'n';
  546. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  547. return -EINVAL;
  548. /* Basic port init. Needed since we use some uart_??? func before
  549. * real init for early access */
  550. spin_lock_init(&port->lock);
  551. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  552. port->ops = &mpc52xx_uart_ops;
  553. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  554. /* We ioremap ourself */
  555. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  556. if (port->membase == NULL)
  557. return -EINVAL;
  558. /* Setup the port parameters accoding to options */
  559. if (options)
  560. uart_parse_options(options, &baud, &parity, &bits, &flow);
  561. else
  562. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  563. return uart_set_options(port, co, baud, parity, bits, flow);
  564. }
  565. #else
  566. static int __init
  567. mpc52xx_console_setup(struct console *co, char *options)
  568. {
  569. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  570. struct device_node *np = mpc52xx_uart_nodes[co->index];
  571. unsigned int ipb_freq;
  572. struct resource res;
  573. int ret;
  574. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  575. int bits = 8;
  576. int parity = 'n';
  577. int flow = 'n';
  578. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  579. co, co->index, options);
  580. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  581. pr_debug("PSC%x out of range\n", co->index);
  582. return -EINVAL;
  583. }
  584. if (!np) {
  585. pr_debug("PSC%x not found in device tree\n", co->index);
  586. return -EINVAL;
  587. }
  588. pr_debug("Console on ttyPSC%x is %s\n",
  589. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  590. /* Fetch register locations */
  591. if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
  592. pr_debug("Could not get resources for PSC%x\n", co->index);
  593. return ret;
  594. }
  595. /* Search for bus-frequency property in this node or a parent */
  596. if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
  597. pr_debug("Could not find IPB bus frequency!\n");
  598. return -EINVAL;
  599. }
  600. /* Basic port init. Needed since we use some uart_??? func before
  601. * real init for early access */
  602. spin_lock_init(&port->lock);
  603. port->uartclk = ipb_freq / 2;
  604. port->ops = &mpc52xx_uart_ops;
  605. port->mapbase = res.start;
  606. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  607. port->irq = irq_of_parse_and_map(np, 0);
  608. if (port->membase == NULL)
  609. return -EINVAL;
  610. pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
  611. port->mapbase, port->membase, port->irq, port->uartclk);
  612. /* Setup the port parameters accoding to options */
  613. if (options)
  614. uart_parse_options(options, &baud, &parity, &bits, &flow);
  615. else
  616. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  617. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  618. baud, bits, parity, flow);
  619. return uart_set_options(port, co, baud, parity, bits, flow);
  620. }
  621. #endif /* defined(CONFIG_PPC_MERGE) */
  622. static struct uart_driver mpc52xx_uart_driver;
  623. static struct console mpc52xx_console = {
  624. .name = "ttyPSC",
  625. .write = mpc52xx_console_write,
  626. .device = uart_console_device,
  627. .setup = mpc52xx_console_setup,
  628. .flags = CON_PRINTBUFFER,
  629. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
  630. .data = &mpc52xx_uart_driver,
  631. };
  632. static int __init
  633. mpc52xx_console_init(void)
  634. {
  635. #if defined(CONFIG_PPC_MERGE)
  636. mpc52xx_uart_of_enumerate();
  637. #endif
  638. register_console(&mpc52xx_console);
  639. return 0;
  640. }
  641. console_initcall(mpc52xx_console_init);
  642. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  643. #else
  644. #define MPC52xx_PSC_CONSOLE NULL
  645. #endif
  646. /* ======================================================================== */
  647. /* UART Driver */
  648. /* ======================================================================== */
  649. static struct uart_driver mpc52xx_uart_driver = {
  650. .owner = THIS_MODULE,
  651. .driver_name = "mpc52xx_psc_uart",
  652. .dev_name = "ttyPSC",
  653. .major = SERIAL_PSC_MAJOR,
  654. .minor = SERIAL_PSC_MINOR,
  655. .nr = MPC52xx_PSC_MAXNUM,
  656. .cons = MPC52xx_PSC_CONSOLE,
  657. };
  658. #if !defined(CONFIG_PPC_MERGE)
  659. /* ======================================================================== */
  660. /* Platform Driver */
  661. /* ======================================================================== */
  662. static int __devinit
  663. mpc52xx_uart_probe(struct platform_device *dev)
  664. {
  665. struct resource *res = dev->resource;
  666. struct uart_port *port = NULL;
  667. int i, idx, ret;
  668. /* Check validity & presence */
  669. idx = dev->id;
  670. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  671. return -EINVAL;
  672. if (!mpc52xx_match_psc_function(idx,"uart"))
  673. return -ENODEV;
  674. /* Init the port structure */
  675. port = &mpc52xx_uart_ports[idx];
  676. spin_lock_init(&port->lock);
  677. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  678. port->fifosize = 512;
  679. port->iotype = UPIO_MEM;
  680. port->flags = UPF_BOOT_AUTOCONF |
  681. ( uart_console(port) ? 0 : UPF_IOREMAP );
  682. port->line = idx;
  683. port->ops = &mpc52xx_uart_ops;
  684. port->dev = &dev->dev;
  685. /* Search for IRQ and mapbase */
  686. for (i=0 ; i<dev->num_resources ; i++, res++) {
  687. if (res->flags & IORESOURCE_MEM)
  688. port->mapbase = res->start;
  689. else if (res->flags & IORESOURCE_IRQ)
  690. port->irq = res->start;
  691. }
  692. if (!port->irq || !port->mapbase)
  693. return -EINVAL;
  694. /* Add the port to the uart sub-system */
  695. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  696. if (!ret)
  697. platform_set_drvdata(dev, (void*)port);
  698. return ret;
  699. }
  700. static int
  701. mpc52xx_uart_remove(struct platform_device *dev)
  702. {
  703. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  704. platform_set_drvdata(dev, NULL);
  705. if (port)
  706. uart_remove_one_port(&mpc52xx_uart_driver, port);
  707. return 0;
  708. }
  709. #ifdef CONFIG_PM
  710. static int
  711. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  712. {
  713. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  714. if (port)
  715. uart_suspend_port(&mpc52xx_uart_driver, port);
  716. return 0;
  717. }
  718. static int
  719. mpc52xx_uart_resume(struct platform_device *dev)
  720. {
  721. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  722. if (port)
  723. uart_resume_port(&mpc52xx_uart_driver, port);
  724. return 0;
  725. }
  726. #endif
  727. static struct platform_driver mpc52xx_uart_platform_driver = {
  728. .probe = mpc52xx_uart_probe,
  729. .remove = mpc52xx_uart_remove,
  730. #ifdef CONFIG_PM
  731. .suspend = mpc52xx_uart_suspend,
  732. .resume = mpc52xx_uart_resume,
  733. #endif
  734. .driver = {
  735. .name = "mpc52xx-psc",
  736. },
  737. };
  738. #endif /* !defined(CONFIG_PPC_MERGE) */
  739. #if defined(CONFIG_PPC_MERGE)
  740. /* ======================================================================== */
  741. /* OF Platform Driver */
  742. /* ======================================================================== */
  743. static int __devinit
  744. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  745. {
  746. int idx = -1;
  747. unsigned int ipb_freq;
  748. struct uart_port *port = NULL;
  749. struct resource res;
  750. int ret;
  751. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  752. /* Check validity & presence */
  753. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  754. if (mpc52xx_uart_nodes[idx] == op->node)
  755. break;
  756. if (idx >= MPC52xx_PSC_MAXNUM)
  757. return -EINVAL;
  758. pr_debug("Found %s assigned to ttyPSC%x\n",
  759. mpc52xx_uart_nodes[idx]->full_name, idx);
  760. /* Search for bus-frequency property in this node or a parent */
  761. if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
  762. dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
  763. return -EINVAL;
  764. }
  765. /* Init the port structure */
  766. port = &mpc52xx_uart_ports[idx];
  767. spin_lock_init(&port->lock);
  768. port->uartclk = ipb_freq / 2;
  769. port->fifosize = 512;
  770. port->iotype = UPIO_MEM;
  771. port->flags = UPF_BOOT_AUTOCONF |
  772. ( uart_console(port) ? 0 : UPF_IOREMAP );
  773. port->line = idx;
  774. port->ops = &mpc52xx_uart_ops;
  775. port->dev = &op->dev;
  776. /* Search for IRQ and mapbase */
  777. if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
  778. return ret;
  779. port->mapbase = res.start;
  780. port->irq = irq_of_parse_and_map(op->node, 0);
  781. dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
  782. port->mapbase, port->irq, port->uartclk);
  783. if ((port->irq==NO_IRQ) || !port->mapbase) {
  784. printk(KERN_ERR "Could not allocate resources for PSC\n");
  785. return -EINVAL;
  786. }
  787. /* Add the port to the uart sub-system */
  788. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  789. if (!ret)
  790. dev_set_drvdata(&op->dev, (void*)port);
  791. return ret;
  792. }
  793. static int
  794. mpc52xx_uart_of_remove(struct of_device *op)
  795. {
  796. struct uart_port *port = dev_get_drvdata(&op->dev);
  797. dev_set_drvdata(&op->dev, NULL);
  798. if (port)
  799. uart_remove_one_port(&mpc52xx_uart_driver, port);
  800. return 0;
  801. }
  802. #ifdef CONFIG_PM
  803. static int
  804. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  805. {
  806. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  807. if (port)
  808. uart_suspend_port(&mpc52xx_uart_driver, port);
  809. return 0;
  810. }
  811. static int
  812. mpc52xx_uart_of_resume(struct of_device *op)
  813. {
  814. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  815. if (port)
  816. uart_resume_port(&mpc52xx_uart_driver, port);
  817. return 0;
  818. }
  819. #endif
  820. static void
  821. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  822. {
  823. int free_idx = -1;
  824. int i;
  825. /* Find the first free node */
  826. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  827. if (mpc52xx_uart_nodes[i] == NULL) {
  828. free_idx = i;
  829. break;
  830. }
  831. }
  832. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  833. idx = free_idx;
  834. if (idx < 0)
  835. return; /* No free slot; abort */
  836. /* If the slot is already occupied, then swap slots */
  837. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  838. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  839. mpc52xx_uart_nodes[i] = np;
  840. }
  841. static void
  842. mpc52xx_uart_of_enumerate(void)
  843. {
  844. static int enum_done = 0;
  845. struct device_node *np;
  846. const unsigned int *devno;
  847. int i;
  848. if (enum_done)
  849. return;
  850. for_each_node_by_type(np, "serial") {
  851. if (!of_match_node(mpc52xx_uart_of_match, np))
  852. continue;
  853. /* Is a particular device number requested? */
  854. devno = get_property(np, "port-number", NULL);
  855. mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
  856. }
  857. enum_done = 1;
  858. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  859. if (mpc52xx_uart_nodes[i])
  860. pr_debug("%s assigned to ttyPSC%x\n",
  861. mpc52xx_uart_nodes[i]->full_name, i);
  862. }
  863. }
  864. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  865. static struct of_platform_driver mpc52xx_uart_of_driver = {
  866. .owner = THIS_MODULE,
  867. .name = "mpc52xx-psc-uart",
  868. .match_table = mpc52xx_uart_of_match,
  869. .probe = mpc52xx_uart_of_probe,
  870. .remove = mpc52xx_uart_of_remove,
  871. #ifdef CONFIG_PM
  872. .suspend = mpc52xx_uart_of_suspend,
  873. .resume = mpc52xx_uart_of_resume,
  874. #endif
  875. .driver = {
  876. .name = "mpc52xx-psc-uart",
  877. },
  878. };
  879. #endif /* defined(CONFIG_PPC_MERGE) */
  880. /* ======================================================================== */
  881. /* Module */
  882. /* ======================================================================== */
  883. static int __init
  884. mpc52xx_uart_init(void)
  885. {
  886. int ret;
  887. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  888. if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
  889. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  890. __FILE__, ret);
  891. return ret;
  892. }
  893. #if defined(CONFIG_PPC_MERGE)
  894. mpc52xx_uart_of_enumerate();
  895. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  896. if (ret) {
  897. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  898. __FILE__, ret);
  899. uart_unregister_driver(&mpc52xx_uart_driver);
  900. return ret;
  901. }
  902. #else
  903. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  904. if (ret) {
  905. printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
  906. __FILE__, ret);
  907. uart_unregister_driver(&mpc52xx_uart_driver);
  908. return ret;
  909. }
  910. #endif
  911. return 0;
  912. }
  913. static void __exit
  914. mpc52xx_uart_exit(void)
  915. {
  916. #if defined(CONFIG_PPC_MERGE)
  917. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  918. #else
  919. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  920. #endif
  921. uart_unregister_driver(&mpc52xx_uart_driver);
  922. }
  923. module_init(mpc52xx_uart_init);
  924. module_exit(mpc52xx_uart_exit);
  925. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  926. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  927. MODULE_LICENSE("GPL");