mthca_mr.c 24 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. #include "mthca_memfree.h"
  40. struct mthca_mtt {
  41. struct mthca_buddy *buddy;
  42. int order;
  43. u32 first_seg;
  44. };
  45. /*
  46. * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  47. */
  48. struct mthca_mpt_entry {
  49. __be32 flags;
  50. __be32 page_size;
  51. __be32 key;
  52. __be32 pd;
  53. __be64 start;
  54. __be64 length;
  55. __be32 lkey;
  56. __be32 window_count;
  57. __be32 window_count_limit;
  58. __be64 mtt_seg;
  59. __be32 mtt_sz; /* Arbel only */
  60. u32 reserved[2];
  61. } __attribute__((packed));
  62. #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
  63. #define MTHCA_MPT_FLAG_MIO (1 << 17)
  64. #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
  65. #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
  66. #define MTHCA_MPT_FLAG_REGION (1 << 8)
  67. #define MTHCA_MTT_FLAG_PRESENT 1
  68. #define MTHCA_MPT_STATUS_SW 0xF0
  69. #define MTHCA_MPT_STATUS_HW 0x00
  70. #define SINAI_FMR_KEY_INC 0x1000000
  71. /*
  72. * Buddy allocator for MTT segments (currently not very efficient
  73. * since it doesn't keep a free list and just searches linearly
  74. * through the bitmaps)
  75. */
  76. static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
  77. {
  78. int o;
  79. int m;
  80. u32 seg;
  81. spin_lock(&buddy->lock);
  82. for (o = order; o <= buddy->max_order; ++o) {
  83. m = 1 << (buddy->max_order - o);
  84. seg = find_first_bit(buddy->bits[o], m);
  85. if (seg < m)
  86. goto found;
  87. }
  88. spin_unlock(&buddy->lock);
  89. return -1;
  90. found:
  91. clear_bit(seg, buddy->bits[o]);
  92. while (o > order) {
  93. --o;
  94. seg <<= 1;
  95. set_bit(seg ^ 1, buddy->bits[o]);
  96. }
  97. spin_unlock(&buddy->lock);
  98. seg <<= order;
  99. return seg;
  100. }
  101. static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
  102. {
  103. seg >>= order;
  104. spin_lock(&buddy->lock);
  105. while (test_bit(seg ^ 1, buddy->bits[order])) {
  106. clear_bit(seg ^ 1, buddy->bits[order]);
  107. seg >>= 1;
  108. ++order;
  109. }
  110. set_bit(seg, buddy->bits[order]);
  111. spin_unlock(&buddy->lock);
  112. }
  113. static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
  114. {
  115. int i, s;
  116. buddy->max_order = max_order;
  117. spin_lock_init(&buddy->lock);
  118. buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
  119. GFP_KERNEL);
  120. if (!buddy->bits)
  121. goto err_out;
  122. for (i = 0; i <= buddy->max_order; ++i) {
  123. s = BITS_TO_LONGS(1 << (buddy->max_order - i));
  124. buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
  125. if (!buddy->bits[i])
  126. goto err_out_free;
  127. bitmap_zero(buddy->bits[i],
  128. 1 << (buddy->max_order - i));
  129. }
  130. set_bit(0, buddy->bits[buddy->max_order]);
  131. return 0;
  132. err_out_free:
  133. for (i = 0; i <= buddy->max_order; ++i)
  134. kfree(buddy->bits[i]);
  135. kfree(buddy->bits);
  136. err_out:
  137. return -ENOMEM;
  138. }
  139. static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
  140. {
  141. int i;
  142. for (i = 0; i <= buddy->max_order; ++i)
  143. kfree(buddy->bits[i]);
  144. kfree(buddy->bits);
  145. }
  146. static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
  147. struct mthca_buddy *buddy)
  148. {
  149. u32 seg = mthca_buddy_alloc(buddy, order);
  150. if (seg == -1)
  151. return -1;
  152. if (mthca_is_memfree(dev))
  153. if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
  154. seg + (1 << order) - 1)) {
  155. mthca_buddy_free(buddy, seg, order);
  156. seg = -1;
  157. }
  158. return seg;
  159. }
  160. static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
  161. struct mthca_buddy *buddy)
  162. {
  163. struct mthca_mtt *mtt;
  164. int i;
  165. if (size <= 0)
  166. return ERR_PTR(-EINVAL);
  167. mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
  168. if (!mtt)
  169. return ERR_PTR(-ENOMEM);
  170. mtt->buddy = buddy;
  171. mtt->order = 0;
  172. for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
  173. ++mtt->order;
  174. mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
  175. if (mtt->first_seg == -1) {
  176. kfree(mtt);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. return mtt;
  180. }
  181. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
  182. {
  183. return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
  184. }
  185. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
  186. {
  187. if (!mtt)
  188. return;
  189. mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
  190. mthca_table_put_range(dev, dev->mr_table.mtt_table,
  191. mtt->first_seg,
  192. mtt->first_seg + (1 << mtt->order) - 1);
  193. kfree(mtt);
  194. }
  195. static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  196. int start_index, u64 *buffer_list, int list_len)
  197. {
  198. struct mthca_mailbox *mailbox;
  199. __be64 *mtt_entry;
  200. int err = 0;
  201. u8 status;
  202. int i;
  203. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  204. if (IS_ERR(mailbox))
  205. return PTR_ERR(mailbox);
  206. mtt_entry = mailbox->buf;
  207. while (list_len > 0) {
  208. mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
  209. mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  210. start_index * 8);
  211. mtt_entry[1] = 0;
  212. for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
  213. mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
  214. MTHCA_MTT_FLAG_PRESENT);
  215. /*
  216. * If we have an odd number of entries to write, add
  217. * one more dummy entry for firmware efficiency.
  218. */
  219. if (i & 1)
  220. mtt_entry[i + 2] = 0;
  221. err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
  222. if (err) {
  223. mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
  224. goto out;
  225. }
  226. if (status) {
  227. mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
  228. status);
  229. err = -EINVAL;
  230. goto out;
  231. }
  232. list_len -= i;
  233. start_index += i;
  234. buffer_list += i;
  235. }
  236. out:
  237. mthca_free_mailbox(dev, mailbox);
  238. return err;
  239. }
  240. int mthca_write_mtt_size(struct mthca_dev *dev)
  241. {
  242. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy)
  243. /*
  244. * Be friendly to WRITE_MTT command
  245. * and leave two empty slots for the
  246. * index and reserved fields of the
  247. * mailbox.
  248. */
  249. return PAGE_SIZE / sizeof (u64) - 2;
  250. /* For Arbel, all MTTs must fit in the same page. */
  251. return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
  252. }
  253. void mthca_tavor_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt,
  254. int start_index, u64 *buffer_list, int list_len)
  255. {
  256. u64 __iomem *mtts;
  257. int i;
  258. mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  259. start_index * sizeof (u64);
  260. for (i = 0; i < list_len; ++i)
  261. mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
  262. mtts + i);
  263. }
  264. void mthca_arbel_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt,
  265. int start_index, u64 *buffer_list, int list_len)
  266. {
  267. __be64 *mtts;
  268. dma_addr_t dma_handle;
  269. int i;
  270. int s = start_index * sizeof (u64);
  271. /* For Arbel, all MTTs must fit in the same page. */
  272. BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
  273. /* Require full segments */
  274. BUG_ON(s % MTHCA_MTT_SEG_SIZE);
  275. mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
  276. s / MTHCA_MTT_SEG_SIZE, &dma_handle);
  277. BUG_ON(!mtts);
  278. for (i = 0; i < list_len; ++i)
  279. mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
  280. dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE);
  281. }
  282. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  283. int start_index, u64 *buffer_list, int list_len)
  284. {
  285. int size = mthca_write_mtt_size(dev);
  286. int chunk;
  287. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy)
  288. return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
  289. while (list_len > 0) {
  290. chunk = min(size, list_len);
  291. if (mthca_is_memfree(dev))
  292. mthca_arbel_write_mtt_seg(dev, mtt, start_index,
  293. buffer_list, chunk);
  294. else
  295. mthca_tavor_write_mtt_seg(dev, mtt, start_index,
  296. buffer_list, chunk);
  297. list_len -= chunk;
  298. start_index += chunk;
  299. buffer_list += chunk;
  300. }
  301. return 0;
  302. }
  303. static inline u32 tavor_hw_index_to_key(u32 ind)
  304. {
  305. return ind;
  306. }
  307. static inline u32 tavor_key_to_hw_index(u32 key)
  308. {
  309. return key;
  310. }
  311. static inline u32 arbel_hw_index_to_key(u32 ind)
  312. {
  313. return (ind >> 24) | (ind << 8);
  314. }
  315. static inline u32 arbel_key_to_hw_index(u32 key)
  316. {
  317. return (key << 24) | (key >> 8);
  318. }
  319. static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
  320. {
  321. if (mthca_is_memfree(dev))
  322. return arbel_hw_index_to_key(ind);
  323. else
  324. return tavor_hw_index_to_key(ind);
  325. }
  326. static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
  327. {
  328. if (mthca_is_memfree(dev))
  329. return arbel_key_to_hw_index(key);
  330. else
  331. return tavor_key_to_hw_index(key);
  332. }
  333. static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
  334. {
  335. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  336. return ((key << 20) & 0x800000) | (key & 0x7fffff);
  337. else
  338. return key;
  339. }
  340. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  341. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
  342. {
  343. struct mthca_mailbox *mailbox;
  344. struct mthca_mpt_entry *mpt_entry;
  345. u32 key;
  346. int i;
  347. int err;
  348. u8 status;
  349. WARN_ON(buffer_size_shift >= 32);
  350. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  351. if (key == -1)
  352. return -ENOMEM;
  353. key = adjust_key(dev, key);
  354. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  355. if (mthca_is_memfree(dev)) {
  356. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  357. if (err)
  358. goto err_out_mpt_free;
  359. }
  360. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  361. if (IS_ERR(mailbox)) {
  362. err = PTR_ERR(mailbox);
  363. goto err_out_table;
  364. }
  365. mpt_entry = mailbox->buf;
  366. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  367. MTHCA_MPT_FLAG_MIO |
  368. MTHCA_MPT_FLAG_REGION |
  369. access);
  370. if (!mr->mtt)
  371. mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
  372. mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
  373. mpt_entry->key = cpu_to_be32(key);
  374. mpt_entry->pd = cpu_to_be32(pd);
  375. mpt_entry->start = cpu_to_be64(iova);
  376. mpt_entry->length = cpu_to_be64(total_size);
  377. memset(&mpt_entry->lkey, 0,
  378. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
  379. if (mr->mtt)
  380. mpt_entry->mtt_seg =
  381. cpu_to_be64(dev->mr_table.mtt_base +
  382. mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
  383. if (0) {
  384. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  385. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  386. if (i % 4 == 0)
  387. printk("[%02x] ", i * 4);
  388. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  389. if ((i + 1) % 4 == 0)
  390. printk("\n");
  391. }
  392. }
  393. err = mthca_SW2HW_MPT(dev, mailbox,
  394. key & (dev->limits.num_mpts - 1),
  395. &status);
  396. if (err) {
  397. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  398. goto err_out_mailbox;
  399. } else if (status) {
  400. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  401. status);
  402. err = -EINVAL;
  403. goto err_out_mailbox;
  404. }
  405. mthca_free_mailbox(dev, mailbox);
  406. return err;
  407. err_out_mailbox:
  408. mthca_free_mailbox(dev, mailbox);
  409. err_out_table:
  410. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  411. err_out_mpt_free:
  412. mthca_free(&dev->mr_table.mpt_alloc, key);
  413. return err;
  414. }
  415. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  416. u32 access, struct mthca_mr *mr)
  417. {
  418. mr->mtt = NULL;
  419. return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
  420. }
  421. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  422. u64 *buffer_list, int buffer_size_shift,
  423. int list_len, u64 iova, u64 total_size,
  424. u32 access, struct mthca_mr *mr)
  425. {
  426. int err;
  427. mr->mtt = mthca_alloc_mtt(dev, list_len);
  428. if (IS_ERR(mr->mtt))
  429. return PTR_ERR(mr->mtt);
  430. err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
  431. if (err) {
  432. mthca_free_mtt(dev, mr->mtt);
  433. return err;
  434. }
  435. err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
  436. total_size, access, mr);
  437. if (err)
  438. mthca_free_mtt(dev, mr->mtt);
  439. return err;
  440. }
  441. /* Free mr or fmr */
  442. static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
  443. {
  444. mthca_table_put(dev, dev->mr_table.mpt_table,
  445. key_to_hw_index(dev, lkey));
  446. mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
  447. }
  448. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
  449. {
  450. int err;
  451. u8 status;
  452. err = mthca_HW2SW_MPT(dev, NULL,
  453. key_to_hw_index(dev, mr->ibmr.lkey) &
  454. (dev->limits.num_mpts - 1),
  455. &status);
  456. if (err)
  457. mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
  458. else if (status)
  459. mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
  460. status);
  461. mthca_free_region(dev, mr->ibmr.lkey);
  462. mthca_free_mtt(dev, mr->mtt);
  463. }
  464. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  465. u32 access, struct mthca_fmr *mr)
  466. {
  467. struct mthca_mpt_entry *mpt_entry;
  468. struct mthca_mailbox *mailbox;
  469. u64 mtt_seg;
  470. u32 key, idx;
  471. u8 status;
  472. int list_len = mr->attr.max_pages;
  473. int err = -ENOMEM;
  474. int i;
  475. if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
  476. return -EINVAL;
  477. /* For Arbel, all MTTs must fit in the same page. */
  478. if (mthca_is_memfree(dev) &&
  479. mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
  480. return -EINVAL;
  481. mr->maps = 0;
  482. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  483. if (key == -1)
  484. return -ENOMEM;
  485. key = adjust_key(dev, key);
  486. idx = key & (dev->limits.num_mpts - 1);
  487. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  488. if (mthca_is_memfree(dev)) {
  489. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  490. if (err)
  491. goto err_out_mpt_free;
  492. mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
  493. BUG_ON(!mr->mem.arbel.mpt);
  494. } else
  495. mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
  496. sizeof *(mr->mem.tavor.mpt) * idx;
  497. mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
  498. if (IS_ERR(mr->mtt))
  499. goto err_out_table;
  500. mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
  501. if (mthca_is_memfree(dev)) {
  502. mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
  503. mr->mtt->first_seg,
  504. &mr->mem.arbel.dma_handle);
  505. BUG_ON(!mr->mem.arbel.mtts);
  506. } else
  507. mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
  508. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  509. if (IS_ERR(mailbox))
  510. goto err_out_free_mtt;
  511. mpt_entry = mailbox->buf;
  512. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  513. MTHCA_MPT_FLAG_MIO |
  514. MTHCA_MPT_FLAG_REGION |
  515. access);
  516. mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
  517. mpt_entry->key = cpu_to_be32(key);
  518. mpt_entry->pd = cpu_to_be32(pd);
  519. memset(&mpt_entry->start, 0,
  520. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
  521. mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
  522. if (0) {
  523. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  524. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  525. if (i % 4 == 0)
  526. printk("[%02x] ", i * 4);
  527. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  528. if ((i + 1) % 4 == 0)
  529. printk("\n");
  530. }
  531. }
  532. err = mthca_SW2HW_MPT(dev, mailbox,
  533. key & (dev->limits.num_mpts - 1),
  534. &status);
  535. if (err) {
  536. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  537. goto err_out_mailbox_free;
  538. }
  539. if (status) {
  540. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  541. status);
  542. err = -EINVAL;
  543. goto err_out_mailbox_free;
  544. }
  545. mthca_free_mailbox(dev, mailbox);
  546. return 0;
  547. err_out_mailbox_free:
  548. mthca_free_mailbox(dev, mailbox);
  549. err_out_free_mtt:
  550. mthca_free_mtt(dev, mr->mtt);
  551. err_out_table:
  552. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  553. err_out_mpt_free:
  554. mthca_free(&dev->mr_table.mpt_alloc, mr->ibmr.lkey);
  555. return err;
  556. }
  557. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
  558. {
  559. if (fmr->maps)
  560. return -EBUSY;
  561. mthca_free_region(dev, fmr->ibmr.lkey);
  562. mthca_free_mtt(dev, fmr->mtt);
  563. return 0;
  564. }
  565. static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
  566. int list_len, u64 iova)
  567. {
  568. int i, page_mask;
  569. if (list_len > fmr->attr.max_pages)
  570. return -EINVAL;
  571. page_mask = (1 << fmr->attr.page_shift) - 1;
  572. /* We are getting page lists, so va must be page aligned. */
  573. if (iova & page_mask)
  574. return -EINVAL;
  575. /* Trust the user not to pass misaligned data in page_list */
  576. if (0)
  577. for (i = 0; i < list_len; ++i) {
  578. if (page_list[i] & ~page_mask)
  579. return -EINVAL;
  580. }
  581. if (fmr->maps >= fmr->attr.max_maps)
  582. return -EINVAL;
  583. return 0;
  584. }
  585. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  586. int list_len, u64 iova)
  587. {
  588. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  589. struct mthca_dev *dev = to_mdev(ibfmr->device);
  590. struct mthca_mpt_entry mpt_entry;
  591. u32 key;
  592. int i, err;
  593. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  594. if (err)
  595. return err;
  596. ++fmr->maps;
  597. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  598. key += dev->limits.num_mpts;
  599. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  600. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  601. for (i = 0; i < list_len; ++i) {
  602. __be64 mtt_entry = cpu_to_be64(page_list[i] |
  603. MTHCA_MTT_FLAG_PRESENT);
  604. mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
  605. }
  606. mpt_entry.lkey = cpu_to_be32(key);
  607. mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  608. mpt_entry.start = cpu_to_be64(iova);
  609. __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
  610. memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
  611. offsetof(struct mthca_mpt_entry, window_count) -
  612. offsetof(struct mthca_mpt_entry, start));
  613. writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
  614. return 0;
  615. }
  616. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  617. int list_len, u64 iova)
  618. {
  619. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  620. struct mthca_dev *dev = to_mdev(ibfmr->device);
  621. u32 key;
  622. int i, err;
  623. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  624. if (err)
  625. return err;
  626. ++fmr->maps;
  627. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  628. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  629. key += SINAI_FMR_KEY_INC;
  630. else
  631. key += dev->limits.num_mpts;
  632. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  633. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  634. wmb();
  635. for (i = 0; i < list_len; ++i)
  636. fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
  637. MTHCA_MTT_FLAG_PRESENT);
  638. dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  639. list_len * sizeof(u64), DMA_TO_DEVICE);
  640. fmr->mem.arbel.mpt->key = cpu_to_be32(key);
  641. fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
  642. fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  643. fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
  644. wmb();
  645. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
  646. wmb();
  647. return 0;
  648. }
  649. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  650. {
  651. u32 key;
  652. if (!fmr->maps)
  653. return;
  654. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  655. key &= dev->limits.num_mpts - 1;
  656. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  657. fmr->maps = 0;
  658. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  659. }
  660. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  661. {
  662. u32 key;
  663. if (!fmr->maps)
  664. return;
  665. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  666. key &= dev->limits.num_mpts - 1;
  667. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  668. fmr->maps = 0;
  669. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  670. }
  671. int mthca_init_mr_table(struct mthca_dev *dev)
  672. {
  673. unsigned long addr;
  674. int mpts, mtts, err, i;
  675. err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
  676. dev->limits.num_mpts,
  677. ~0, dev->limits.reserved_mrws);
  678. if (err)
  679. return err;
  680. if (!mthca_is_memfree(dev) &&
  681. (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
  682. dev->limits.fmr_reserved_mtts = 0;
  683. else
  684. dev->mthca_flags |= MTHCA_FLAG_FMR;
  685. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  686. mthca_dbg(dev, "Memory key throughput optimization activated.\n");
  687. err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
  688. fls(dev->limits.num_mtt_segs - 1));
  689. if (err)
  690. goto err_mtt_buddy;
  691. dev->mr_table.tavor_fmr.mpt_base = NULL;
  692. dev->mr_table.tavor_fmr.mtt_base = NULL;
  693. if (dev->limits.fmr_reserved_mtts) {
  694. i = fls(dev->limits.fmr_reserved_mtts - 1);
  695. if (i >= 31) {
  696. mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
  697. err = -EINVAL;
  698. goto err_fmr_mpt;
  699. }
  700. mpts = mtts = 1 << i;
  701. } else {
  702. mpts = dev->limits.num_mtt_segs;
  703. mtts = dev->limits.num_mpts;
  704. }
  705. if (!mthca_is_memfree(dev) &&
  706. (dev->mthca_flags & MTHCA_FLAG_FMR)) {
  707. addr = pci_resource_start(dev->pdev, 4) +
  708. ((pci_resource_len(dev->pdev, 4) - 1) &
  709. dev->mr_table.mpt_base);
  710. dev->mr_table.tavor_fmr.mpt_base =
  711. ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
  712. if (!dev->mr_table.tavor_fmr.mpt_base) {
  713. mthca_warn(dev, "MPT ioremap for FMR failed.\n");
  714. err = -ENOMEM;
  715. goto err_fmr_mpt;
  716. }
  717. addr = pci_resource_start(dev->pdev, 4) +
  718. ((pci_resource_len(dev->pdev, 4) - 1) &
  719. dev->mr_table.mtt_base);
  720. dev->mr_table.tavor_fmr.mtt_base =
  721. ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE);
  722. if (!dev->mr_table.tavor_fmr.mtt_base) {
  723. mthca_warn(dev, "MTT ioremap for FMR failed.\n");
  724. err = -ENOMEM;
  725. goto err_fmr_mtt;
  726. }
  727. }
  728. if (dev->limits.fmr_reserved_mtts) {
  729. err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
  730. if (err)
  731. goto err_fmr_mtt_buddy;
  732. /* Prevent regular MRs from using FMR keys */
  733. err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
  734. if (err)
  735. goto err_reserve_fmr;
  736. dev->mr_table.fmr_mtt_buddy =
  737. &dev->mr_table.tavor_fmr.mtt_buddy;
  738. } else
  739. dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
  740. /* FMR table is always the first, take reserved MTTs out of there */
  741. if (dev->limits.reserved_mtts) {
  742. i = fls(dev->limits.reserved_mtts - 1);
  743. if (mthca_alloc_mtt_range(dev, i,
  744. dev->mr_table.fmr_mtt_buddy) == -1) {
  745. mthca_warn(dev, "MTT table of order %d is too small.\n",
  746. dev->mr_table.fmr_mtt_buddy->max_order);
  747. err = -ENOMEM;
  748. goto err_reserve_mtts;
  749. }
  750. }
  751. return 0;
  752. err_reserve_mtts:
  753. err_reserve_fmr:
  754. if (dev->limits.fmr_reserved_mtts)
  755. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  756. err_fmr_mtt_buddy:
  757. if (dev->mr_table.tavor_fmr.mtt_base)
  758. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  759. err_fmr_mtt:
  760. if (dev->mr_table.tavor_fmr.mpt_base)
  761. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  762. err_fmr_mpt:
  763. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  764. err_mtt_buddy:
  765. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  766. return err;
  767. }
  768. void mthca_cleanup_mr_table(struct mthca_dev *dev)
  769. {
  770. /* XXX check if any MRs are still allocated? */
  771. if (dev->limits.fmr_reserved_mtts)
  772. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  773. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  774. if (dev->mr_table.tavor_fmr.mtt_base)
  775. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  776. if (dev->mr_table.tavor_fmr.mpt_base)
  777. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  778. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  779. }