qla_mbx.c 97 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. /*
  10. * qla2x00_mailbox_command
  11. * Issue mailbox command and waits for completion.
  12. *
  13. * Input:
  14. * ha = adapter block pointer.
  15. * mcp = driver internal mbx struct pointer.
  16. *
  17. * Output:
  18. * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  19. *
  20. * Returns:
  21. * 0 : QLA_SUCCESS = cmd performed success
  22. * 1 : QLA_FUNCTION_FAILED (error encountered)
  23. * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  24. *
  25. * Context:
  26. * Kernel context.
  27. */
  28. static int
  29. qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
  30. {
  31. int rval;
  32. unsigned long flags = 0;
  33. device_reg_t __iomem *reg;
  34. uint8_t abort_active;
  35. uint8_t io_lock_on;
  36. uint16_t command;
  37. uint16_t *iptr;
  38. uint16_t __iomem *optr;
  39. uint32_t cnt;
  40. uint32_t mboxes;
  41. unsigned long wait_time;
  42. struct qla_hw_data *ha = vha->hw;
  43. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  44. if (ha->pdev->error_state > pci_channel_io_frozen)
  45. return QLA_FUNCTION_TIMEOUT;
  46. reg = ha->iobase;
  47. io_lock_on = base_vha->flags.init_done;
  48. rval = QLA_SUCCESS;
  49. abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  50. DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
  51. if (ha->flags.pci_channel_io_perm_failure) {
  52. DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
  53. "Exiting.\n", __func__, vha->host_no));
  54. return QLA_FUNCTION_TIMEOUT;
  55. }
  56. /*
  57. * Wait for active mailbox commands to finish by waiting at most tov
  58. * seconds. This is to serialize actual issuing of mailbox cmds during
  59. * non ISP abort time.
  60. */
  61. if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  62. /* Timeout occurred. Return error. */
  63. DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
  64. "Exiting.\n", __func__, base_vha->host_no));
  65. return QLA_FUNCTION_TIMEOUT;
  66. }
  67. ha->flags.mbox_busy = 1;
  68. /* Save mailbox command for debug */
  69. ha->mcp = mcp;
  70. DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
  71. base_vha->host_no, mcp->mb[0]));
  72. spin_lock_irqsave(&ha->hardware_lock, flags);
  73. /* Load mailbox registers. */
  74. if (IS_FWI2_CAPABLE(ha))
  75. optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
  76. else
  77. optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
  78. iptr = mcp->mb;
  79. command = mcp->mb[0];
  80. mboxes = mcp->out_mb;
  81. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  82. if (IS_QLA2200(ha) && cnt == 8)
  83. optr =
  84. (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
  85. if (mboxes & BIT_0)
  86. WRT_REG_WORD(optr, *iptr);
  87. mboxes >>= 1;
  88. optr++;
  89. iptr++;
  90. }
  91. #if defined(QL_DEBUG_LEVEL_1)
  92. printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
  93. __func__, base_vha->host_no);
  94. qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
  95. printk("\n");
  96. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
  97. printk("\n");
  98. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
  99. printk("\n");
  100. printk("%s(%ld): I/O address = %p.\n", __func__, base_vha->host_no,
  101. optr);
  102. qla2x00_dump_regs(base_vha);
  103. #endif
  104. /* Issue set host interrupt command to send cmd out. */
  105. ha->flags.mbox_int = 0;
  106. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  107. /* Unlock mbx registers and wait for interrupt */
  108. DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
  109. "jiffies=%lx.\n", __func__, base_vha->host_no, jiffies));
  110. /* Wait for mbx cmd completion until timeout */
  111. if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
  112. set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  113. if (IS_FWI2_CAPABLE(ha))
  114. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  115. else
  116. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  117. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  118. wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
  119. clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  120. } else {
  121. DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
  122. base_vha->host_no, command));
  123. if (IS_FWI2_CAPABLE(ha))
  124. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  125. else
  126. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  127. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  128. wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
  129. while (!ha->flags.mbox_int) {
  130. if (time_after(jiffies, wait_time))
  131. break;
  132. /* Check for pending interrupts. */
  133. qla2x00_poll(ha->rsp_q_map[0]);
  134. if (!ha->flags.mbox_int &&
  135. !(IS_QLA2200(ha) &&
  136. command == MBC_LOAD_RISC_RAM_EXTENDED))
  137. msleep(10);
  138. } /* while */
  139. DEBUG17(qla_printk(KERN_WARNING, ha,
  140. "Waited %d sec\n",
  141. (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
  142. }
  143. /* Check whether we timed out */
  144. if (ha->flags.mbox_int) {
  145. uint16_t *iptr2;
  146. DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
  147. base_vha->host_no, command));
  148. /* Got interrupt. Clear the flag. */
  149. ha->flags.mbox_int = 0;
  150. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  151. if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
  152. rval = QLA_FUNCTION_FAILED;
  153. /* Load return mailbox registers. */
  154. iptr2 = mcp->mb;
  155. iptr = (uint16_t *)&ha->mailbox_out[0];
  156. mboxes = mcp->in_mb;
  157. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  158. if (mboxes & BIT_0)
  159. *iptr2 = *iptr;
  160. mboxes >>= 1;
  161. iptr2++;
  162. iptr++;
  163. }
  164. } else {
  165. #if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
  166. defined(QL_DEBUG_LEVEL_11)
  167. uint16_t mb0;
  168. uint32_t ictrl;
  169. if (IS_FWI2_CAPABLE(ha)) {
  170. mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
  171. ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
  172. } else {
  173. mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
  174. ictrl = RD_REG_WORD(&reg->isp.ictrl);
  175. }
  176. printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
  177. __func__, base_vha->host_no, command);
  178. printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
  179. base_vha->host_no, ictrl, jiffies);
  180. printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
  181. base_vha->host_no, mb0);
  182. qla2x00_dump_regs(base_vha);
  183. #endif
  184. rval = QLA_FUNCTION_TIMEOUT;
  185. }
  186. ha->flags.mbox_busy = 0;
  187. /* Clean up */
  188. ha->mcp = NULL;
  189. if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
  190. DEBUG11(printk("%s(%ld): checking for additional resp "
  191. "interrupt.\n", __func__, base_vha->host_no));
  192. /* polling mode for non isp_abort commands. */
  193. qla2x00_poll(ha->rsp_q_map[0]);
  194. }
  195. if (rval == QLA_FUNCTION_TIMEOUT &&
  196. mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
  197. if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
  198. ha->flags.eeh_busy) {
  199. /* not in dpc. schedule it for dpc to take over. */
  200. DEBUG(printk("%s(%ld): timeout schedule "
  201. "isp_abort_needed.\n", __func__,
  202. base_vha->host_no));
  203. DEBUG2_3_11(printk("%s(%ld): timeout schedule "
  204. "isp_abort_needed.\n", __func__,
  205. base_vha->host_no));
  206. qla_printk(KERN_WARNING, ha,
  207. "Mailbox command timeout occurred. Scheduling ISP "
  208. "abort. eeh_busy: 0x%x\n", ha->flags.eeh_busy);
  209. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  210. qla2xxx_wake_dpc(vha);
  211. } else if (!abort_active) {
  212. /* call abort directly since we are in the DPC thread */
  213. DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
  214. __func__, base_vha->host_no));
  215. DEBUG2_3_11(printk("%s(%ld): timeout calling "
  216. "abort_isp\n", __func__, base_vha->host_no));
  217. qla_printk(KERN_WARNING, ha,
  218. "Mailbox command timeout occurred. Issuing ISP "
  219. "abort.\n");
  220. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  221. clear_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  222. if (qla2x00_abort_isp(base_vha)) {
  223. /* Failed. retry later. */
  224. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  225. }
  226. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  227. DEBUG(printk("%s(%ld): finished abort_isp\n", __func__,
  228. base_vha->host_no));
  229. DEBUG2_3_11(printk("%s(%ld): finished abort_isp\n",
  230. __func__, base_vha->host_no));
  231. }
  232. }
  233. /* Allow next mbx cmd to come in. */
  234. complete(&ha->mbx_cmd_comp);
  235. if (rval) {
  236. DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
  237. "mbx2=%x, cmd=%x ****\n", __func__, base_vha->host_no,
  238. mcp->mb[0], mcp->mb[1], mcp->mb[2], command));
  239. } else {
  240. DEBUG11(printk("%s(%ld): done.\n", __func__,
  241. base_vha->host_no));
  242. }
  243. return rval;
  244. }
  245. int
  246. qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
  247. uint32_t risc_code_size)
  248. {
  249. int rval;
  250. struct qla_hw_data *ha = vha->hw;
  251. mbx_cmd_t mc;
  252. mbx_cmd_t *mcp = &mc;
  253. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  254. if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
  255. mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
  256. mcp->mb[8] = MSW(risc_addr);
  257. mcp->out_mb = MBX_8|MBX_0;
  258. } else {
  259. mcp->mb[0] = MBC_LOAD_RISC_RAM;
  260. mcp->out_mb = MBX_0;
  261. }
  262. mcp->mb[1] = LSW(risc_addr);
  263. mcp->mb[2] = MSW(req_dma);
  264. mcp->mb[3] = LSW(req_dma);
  265. mcp->mb[6] = MSW(MSD(req_dma));
  266. mcp->mb[7] = LSW(MSD(req_dma));
  267. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  268. if (IS_FWI2_CAPABLE(ha)) {
  269. mcp->mb[4] = MSW(risc_code_size);
  270. mcp->mb[5] = LSW(risc_code_size);
  271. mcp->out_mb |= MBX_5|MBX_4;
  272. } else {
  273. mcp->mb[4] = LSW(risc_code_size);
  274. mcp->out_mb |= MBX_4;
  275. }
  276. mcp->in_mb = MBX_0;
  277. mcp->tov = MBX_TOV_SECONDS;
  278. mcp->flags = 0;
  279. rval = qla2x00_mailbox_command(vha, mcp);
  280. if (rval != QLA_SUCCESS) {
  281. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  282. vha->host_no, rval, mcp->mb[0]));
  283. } else {
  284. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  285. }
  286. return rval;
  287. }
  288. #define EXTENDED_BB_CREDITS BIT_0
  289. /*
  290. * qla2x00_execute_fw
  291. * Start adapter firmware.
  292. *
  293. * Input:
  294. * ha = adapter block pointer.
  295. * TARGET_QUEUE_LOCK must be released.
  296. * ADAPTER_STATE_LOCK must be released.
  297. *
  298. * Returns:
  299. * qla2x00 local function return status code.
  300. *
  301. * Context:
  302. * Kernel context.
  303. */
  304. int
  305. qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
  306. {
  307. int rval;
  308. struct qla_hw_data *ha = vha->hw;
  309. mbx_cmd_t mc;
  310. mbx_cmd_t *mcp = &mc;
  311. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  312. mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
  313. mcp->out_mb = MBX_0;
  314. mcp->in_mb = MBX_0;
  315. if (IS_FWI2_CAPABLE(ha)) {
  316. mcp->mb[1] = MSW(risc_addr);
  317. mcp->mb[2] = LSW(risc_addr);
  318. mcp->mb[3] = 0;
  319. if (IS_QLA81XX(ha)) {
  320. struct nvram_81xx *nv = ha->nvram;
  321. mcp->mb[4] = (nv->enhanced_features &
  322. EXTENDED_BB_CREDITS);
  323. } else
  324. mcp->mb[4] = 0;
  325. mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
  326. mcp->in_mb |= MBX_1;
  327. } else {
  328. mcp->mb[1] = LSW(risc_addr);
  329. mcp->out_mb |= MBX_1;
  330. if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  331. mcp->mb[2] = 0;
  332. mcp->out_mb |= MBX_2;
  333. }
  334. }
  335. mcp->tov = MBX_TOV_SECONDS;
  336. mcp->flags = 0;
  337. rval = qla2x00_mailbox_command(vha, mcp);
  338. if (rval != QLA_SUCCESS) {
  339. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  340. vha->host_no, rval, mcp->mb[0]));
  341. } else {
  342. if (IS_FWI2_CAPABLE(ha)) {
  343. DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
  344. __func__, vha->host_no, mcp->mb[1]));
  345. } else {
  346. DEBUG11(printk("%s(%ld): done.\n", __func__,
  347. vha->host_no));
  348. }
  349. }
  350. return rval;
  351. }
  352. /*
  353. * qla2x00_get_fw_version
  354. * Get firmware version.
  355. *
  356. * Input:
  357. * ha: adapter state pointer.
  358. * major: pointer for major number.
  359. * minor: pointer for minor number.
  360. * subminor: pointer for subminor number.
  361. *
  362. * Returns:
  363. * qla2x00 local function return status code.
  364. *
  365. * Context:
  366. * Kernel context.
  367. */
  368. int
  369. qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
  370. uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
  371. uint32_t *mpi_caps, uint8_t *phy)
  372. {
  373. int rval;
  374. mbx_cmd_t mc;
  375. mbx_cmd_t *mcp = &mc;
  376. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  377. mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
  378. mcp->out_mb = MBX_0;
  379. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  380. if (IS_QLA81XX(vha->hw))
  381. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
  382. mcp->flags = 0;
  383. mcp->tov = MBX_TOV_SECONDS;
  384. rval = qla2x00_mailbox_command(vha, mcp);
  385. if (rval != QLA_SUCCESS)
  386. goto failed;
  387. /* Return mailbox data. */
  388. *major = mcp->mb[1];
  389. *minor = mcp->mb[2];
  390. *subminor = mcp->mb[3];
  391. *attributes = mcp->mb[6];
  392. if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
  393. *memory = 0x1FFFF; /* Defaults to 128KB. */
  394. else
  395. *memory = (mcp->mb[5] << 16) | mcp->mb[4];
  396. if (IS_QLA81XX(vha->hw)) {
  397. mpi[0] = mcp->mb[10] & 0xff;
  398. mpi[1] = mcp->mb[11] >> 8;
  399. mpi[2] = mcp->mb[11] & 0xff;
  400. *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13];
  401. phy[0] = mcp->mb[8] & 0xff;
  402. phy[1] = mcp->mb[9] >> 8;
  403. phy[2] = mcp->mb[9] & 0xff;
  404. }
  405. failed:
  406. if (rval != QLA_SUCCESS) {
  407. /*EMPTY*/
  408. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  409. vha->host_no, rval));
  410. } else {
  411. /*EMPTY*/
  412. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  413. }
  414. return rval;
  415. }
  416. /*
  417. * qla2x00_get_fw_options
  418. * Set firmware options.
  419. *
  420. * Input:
  421. * ha = adapter block pointer.
  422. * fwopt = pointer for firmware options.
  423. *
  424. * Returns:
  425. * qla2x00 local function return status code.
  426. *
  427. * Context:
  428. * Kernel context.
  429. */
  430. int
  431. qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  432. {
  433. int rval;
  434. mbx_cmd_t mc;
  435. mbx_cmd_t *mcp = &mc;
  436. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  437. mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
  438. mcp->out_mb = MBX_0;
  439. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  440. mcp->tov = MBX_TOV_SECONDS;
  441. mcp->flags = 0;
  442. rval = qla2x00_mailbox_command(vha, mcp);
  443. if (rval != QLA_SUCCESS) {
  444. /*EMPTY*/
  445. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  446. vha->host_no, rval));
  447. } else {
  448. fwopts[0] = mcp->mb[0];
  449. fwopts[1] = mcp->mb[1];
  450. fwopts[2] = mcp->mb[2];
  451. fwopts[3] = mcp->mb[3];
  452. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  453. }
  454. return rval;
  455. }
  456. /*
  457. * qla2x00_set_fw_options
  458. * Set firmware options.
  459. *
  460. * Input:
  461. * ha = adapter block pointer.
  462. * fwopt = pointer for firmware options.
  463. *
  464. * Returns:
  465. * qla2x00 local function return status code.
  466. *
  467. * Context:
  468. * Kernel context.
  469. */
  470. int
  471. qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  472. {
  473. int rval;
  474. mbx_cmd_t mc;
  475. mbx_cmd_t *mcp = &mc;
  476. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  477. mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
  478. mcp->mb[1] = fwopts[1];
  479. mcp->mb[2] = fwopts[2];
  480. mcp->mb[3] = fwopts[3];
  481. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  482. mcp->in_mb = MBX_0;
  483. if (IS_FWI2_CAPABLE(vha->hw)) {
  484. mcp->in_mb |= MBX_1;
  485. } else {
  486. mcp->mb[10] = fwopts[10];
  487. mcp->mb[11] = fwopts[11];
  488. mcp->mb[12] = 0; /* Undocumented, but used */
  489. mcp->out_mb |= MBX_12|MBX_11|MBX_10;
  490. }
  491. mcp->tov = MBX_TOV_SECONDS;
  492. mcp->flags = 0;
  493. rval = qla2x00_mailbox_command(vha, mcp);
  494. fwopts[0] = mcp->mb[0];
  495. if (rval != QLA_SUCCESS) {
  496. /*EMPTY*/
  497. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
  498. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  499. } else {
  500. /*EMPTY*/
  501. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  502. }
  503. return rval;
  504. }
  505. /*
  506. * qla2x00_mbx_reg_test
  507. * Mailbox register wrap test.
  508. *
  509. * Input:
  510. * ha = adapter block pointer.
  511. * TARGET_QUEUE_LOCK must be released.
  512. * ADAPTER_STATE_LOCK must be released.
  513. *
  514. * Returns:
  515. * qla2x00 local function return status code.
  516. *
  517. * Context:
  518. * Kernel context.
  519. */
  520. int
  521. qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
  522. {
  523. int rval;
  524. mbx_cmd_t mc;
  525. mbx_cmd_t *mcp = &mc;
  526. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): entered.\n", vha->host_no));
  527. mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
  528. mcp->mb[1] = 0xAAAA;
  529. mcp->mb[2] = 0x5555;
  530. mcp->mb[3] = 0xAA55;
  531. mcp->mb[4] = 0x55AA;
  532. mcp->mb[5] = 0xA5A5;
  533. mcp->mb[6] = 0x5A5A;
  534. mcp->mb[7] = 0x2525;
  535. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  536. mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  537. mcp->tov = MBX_TOV_SECONDS;
  538. mcp->flags = 0;
  539. rval = qla2x00_mailbox_command(vha, mcp);
  540. if (rval == QLA_SUCCESS) {
  541. if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
  542. mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
  543. rval = QLA_FUNCTION_FAILED;
  544. if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
  545. mcp->mb[7] != 0x2525)
  546. rval = QLA_FUNCTION_FAILED;
  547. }
  548. if (rval != QLA_SUCCESS) {
  549. /*EMPTY*/
  550. DEBUG2_3_11(printk("qla2x00_mbx_reg_test(%ld): failed=%x.\n",
  551. vha->host_no, rval));
  552. } else {
  553. /*EMPTY*/
  554. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): done.\n",
  555. vha->host_no));
  556. }
  557. return rval;
  558. }
  559. /*
  560. * qla2x00_verify_checksum
  561. * Verify firmware checksum.
  562. *
  563. * Input:
  564. * ha = adapter block pointer.
  565. * TARGET_QUEUE_LOCK must be released.
  566. * ADAPTER_STATE_LOCK must be released.
  567. *
  568. * Returns:
  569. * qla2x00 local function return status code.
  570. *
  571. * Context:
  572. * Kernel context.
  573. */
  574. int
  575. qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
  576. {
  577. int rval;
  578. mbx_cmd_t mc;
  579. mbx_cmd_t *mcp = &mc;
  580. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  581. mcp->mb[0] = MBC_VERIFY_CHECKSUM;
  582. mcp->out_mb = MBX_0;
  583. mcp->in_mb = MBX_0;
  584. if (IS_FWI2_CAPABLE(vha->hw)) {
  585. mcp->mb[1] = MSW(risc_addr);
  586. mcp->mb[2] = LSW(risc_addr);
  587. mcp->out_mb |= MBX_2|MBX_1;
  588. mcp->in_mb |= MBX_2|MBX_1;
  589. } else {
  590. mcp->mb[1] = LSW(risc_addr);
  591. mcp->out_mb |= MBX_1;
  592. mcp->in_mb |= MBX_1;
  593. }
  594. mcp->tov = MBX_TOV_SECONDS;
  595. mcp->flags = 0;
  596. rval = qla2x00_mailbox_command(vha, mcp);
  597. if (rval != QLA_SUCCESS) {
  598. DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
  599. vha->host_no, rval, IS_FWI2_CAPABLE(vha->hw) ?
  600. (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));
  601. } else {
  602. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  603. }
  604. return rval;
  605. }
  606. /*
  607. * qla2x00_issue_iocb
  608. * Issue IOCB using mailbox command
  609. *
  610. * Input:
  611. * ha = adapter state pointer.
  612. * buffer = buffer pointer.
  613. * phys_addr = physical address of buffer.
  614. * size = size of buffer.
  615. * TARGET_QUEUE_LOCK must be released.
  616. * ADAPTER_STATE_LOCK must be released.
  617. *
  618. * Returns:
  619. * qla2x00 local function return status code.
  620. *
  621. * Context:
  622. * Kernel context.
  623. */
  624. static int
  625. qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
  626. dma_addr_t phys_addr, size_t size, uint32_t tov)
  627. {
  628. int rval;
  629. mbx_cmd_t mc;
  630. mbx_cmd_t *mcp = &mc;
  631. mcp->mb[0] = MBC_IOCB_COMMAND_A64;
  632. mcp->mb[1] = 0;
  633. mcp->mb[2] = MSW(phys_addr);
  634. mcp->mb[3] = LSW(phys_addr);
  635. mcp->mb[6] = MSW(MSD(phys_addr));
  636. mcp->mb[7] = LSW(MSD(phys_addr));
  637. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  638. mcp->in_mb = MBX_2|MBX_0;
  639. mcp->tov = tov;
  640. mcp->flags = 0;
  641. rval = qla2x00_mailbox_command(vha, mcp);
  642. if (rval != QLA_SUCCESS) {
  643. /*EMPTY*/
  644. DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
  645. vha->host_no, rval));
  646. } else {
  647. sts_entry_t *sts_entry = (sts_entry_t *) buffer;
  648. /* Mask reserved bits. */
  649. sts_entry->entry_status &=
  650. IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
  651. }
  652. return rval;
  653. }
  654. int
  655. qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
  656. size_t size)
  657. {
  658. return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
  659. MBX_TOV_SECONDS);
  660. }
  661. /*
  662. * qla2x00_abort_command
  663. * Abort command aborts a specified IOCB.
  664. *
  665. * Input:
  666. * ha = adapter block pointer.
  667. * sp = SB structure pointer.
  668. *
  669. * Returns:
  670. * qla2x00 local function return status code.
  671. *
  672. * Context:
  673. * Kernel context.
  674. */
  675. int
  676. qla2x00_abort_command(srb_t *sp)
  677. {
  678. unsigned long flags = 0;
  679. int rval;
  680. uint32_t handle = 0;
  681. mbx_cmd_t mc;
  682. mbx_cmd_t *mcp = &mc;
  683. fc_port_t *fcport = sp->fcport;
  684. scsi_qla_host_t *vha = fcport->vha;
  685. struct qla_hw_data *ha = vha->hw;
  686. struct req_que *req = vha->req;
  687. DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", vha->host_no));
  688. spin_lock_irqsave(&ha->hardware_lock, flags);
  689. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  690. if (req->outstanding_cmds[handle] == sp)
  691. break;
  692. }
  693. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  694. if (handle == MAX_OUTSTANDING_COMMANDS) {
  695. /* command not found */
  696. return QLA_FUNCTION_FAILED;
  697. }
  698. mcp->mb[0] = MBC_ABORT_COMMAND;
  699. if (HAS_EXTENDED_IDS(ha))
  700. mcp->mb[1] = fcport->loop_id;
  701. else
  702. mcp->mb[1] = fcport->loop_id << 8;
  703. mcp->mb[2] = (uint16_t)handle;
  704. mcp->mb[3] = (uint16_t)(handle >> 16);
  705. mcp->mb[6] = (uint16_t)sp->cmd->device->lun;
  706. mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  707. mcp->in_mb = MBX_0;
  708. mcp->tov = MBX_TOV_SECONDS;
  709. mcp->flags = 0;
  710. rval = qla2x00_mailbox_command(vha, mcp);
  711. if (rval != QLA_SUCCESS) {
  712. DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n",
  713. vha->host_no, rval));
  714. } else {
  715. DEBUG11(printk("qla2x00_abort_command(%ld): done.\n",
  716. vha->host_no));
  717. }
  718. return rval;
  719. }
  720. int
  721. qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  722. {
  723. int rval, rval2;
  724. mbx_cmd_t mc;
  725. mbx_cmd_t *mcp = &mc;
  726. scsi_qla_host_t *vha;
  727. struct req_que *req;
  728. struct rsp_que *rsp;
  729. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  730. l = l;
  731. vha = fcport->vha;
  732. req = vha->hw->req_q_map[tag];
  733. rsp = vha->hw->rsp_q_map[tag];
  734. mcp->mb[0] = MBC_ABORT_TARGET;
  735. mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
  736. if (HAS_EXTENDED_IDS(vha->hw)) {
  737. mcp->mb[1] = fcport->loop_id;
  738. mcp->mb[10] = 0;
  739. mcp->out_mb |= MBX_10;
  740. } else {
  741. mcp->mb[1] = fcport->loop_id << 8;
  742. }
  743. mcp->mb[2] = vha->hw->loop_reset_delay;
  744. mcp->mb[9] = vha->vp_idx;
  745. mcp->in_mb = MBX_0;
  746. mcp->tov = MBX_TOV_SECONDS;
  747. mcp->flags = 0;
  748. rval = qla2x00_mailbox_command(vha, mcp);
  749. if (rval != QLA_SUCCESS) {
  750. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  751. vha->host_no, rval));
  752. }
  753. /* Issue marker IOCB. */
  754. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
  755. MK_SYNC_ID);
  756. if (rval2 != QLA_SUCCESS) {
  757. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  758. "(%x).\n", __func__, vha->host_no, rval2));
  759. } else {
  760. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  761. }
  762. return rval;
  763. }
  764. int
  765. qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  766. {
  767. int rval, rval2;
  768. mbx_cmd_t mc;
  769. mbx_cmd_t *mcp = &mc;
  770. scsi_qla_host_t *vha;
  771. struct req_que *req;
  772. struct rsp_que *rsp;
  773. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  774. vha = fcport->vha;
  775. req = vha->hw->req_q_map[tag];
  776. rsp = vha->hw->rsp_q_map[tag];
  777. mcp->mb[0] = MBC_LUN_RESET;
  778. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  779. if (HAS_EXTENDED_IDS(vha->hw))
  780. mcp->mb[1] = fcport->loop_id;
  781. else
  782. mcp->mb[1] = fcport->loop_id << 8;
  783. mcp->mb[2] = l;
  784. mcp->mb[3] = 0;
  785. mcp->mb[9] = vha->vp_idx;
  786. mcp->in_mb = MBX_0;
  787. mcp->tov = MBX_TOV_SECONDS;
  788. mcp->flags = 0;
  789. rval = qla2x00_mailbox_command(vha, mcp);
  790. if (rval != QLA_SUCCESS) {
  791. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  792. vha->host_no, rval));
  793. }
  794. /* Issue marker IOCB. */
  795. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  796. MK_SYNC_ID_LUN);
  797. if (rval2 != QLA_SUCCESS) {
  798. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  799. "(%x).\n", __func__, vha->host_no, rval2));
  800. } else {
  801. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  802. }
  803. return rval;
  804. }
  805. /*
  806. * qla2x00_get_adapter_id
  807. * Get adapter ID and topology.
  808. *
  809. * Input:
  810. * ha = adapter block pointer.
  811. * id = pointer for loop ID.
  812. * al_pa = pointer for AL_PA.
  813. * area = pointer for area.
  814. * domain = pointer for domain.
  815. * top = pointer for topology.
  816. * TARGET_QUEUE_LOCK must be released.
  817. * ADAPTER_STATE_LOCK must be released.
  818. *
  819. * Returns:
  820. * qla2x00 local function return status code.
  821. *
  822. * Context:
  823. * Kernel context.
  824. */
  825. int
  826. qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
  827. uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
  828. {
  829. int rval;
  830. mbx_cmd_t mc;
  831. mbx_cmd_t *mcp = &mc;
  832. DEBUG11(printk("qla2x00_get_adapter_id(%ld): entered.\n",
  833. vha->host_no));
  834. mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
  835. mcp->mb[9] = vha->vp_idx;
  836. mcp->out_mb = MBX_9|MBX_0;
  837. mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  838. if (IS_QLA81XX(vha->hw))
  839. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
  840. mcp->tov = MBX_TOV_SECONDS;
  841. mcp->flags = 0;
  842. rval = qla2x00_mailbox_command(vha, mcp);
  843. if (mcp->mb[0] == MBS_COMMAND_ERROR)
  844. rval = QLA_COMMAND_ERROR;
  845. else if (mcp->mb[0] == MBS_INVALID_COMMAND)
  846. rval = QLA_INVALID_COMMAND;
  847. /* Return data. */
  848. *id = mcp->mb[1];
  849. *al_pa = LSB(mcp->mb[2]);
  850. *area = MSB(mcp->mb[2]);
  851. *domain = LSB(mcp->mb[3]);
  852. *top = mcp->mb[6];
  853. *sw_cap = mcp->mb[7];
  854. if (rval != QLA_SUCCESS) {
  855. /*EMPTY*/
  856. DEBUG2_3_11(printk("qla2x00_get_adapter_id(%ld): failed=%x.\n",
  857. vha->host_no, rval));
  858. } else {
  859. DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n",
  860. vha->host_no));
  861. if (IS_QLA81XX(vha->hw)) {
  862. vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
  863. vha->fcoe_fcf_idx = mcp->mb[10];
  864. vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
  865. vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
  866. vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
  867. vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
  868. vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
  869. vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
  870. }
  871. }
  872. return rval;
  873. }
  874. /*
  875. * qla2x00_get_retry_cnt
  876. * Get current firmware login retry count and delay.
  877. *
  878. * Input:
  879. * ha = adapter block pointer.
  880. * retry_cnt = pointer to login retry count.
  881. * tov = pointer to login timeout value.
  882. *
  883. * Returns:
  884. * qla2x00 local function return status code.
  885. *
  886. * Context:
  887. * Kernel context.
  888. */
  889. int
  890. qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
  891. uint16_t *r_a_tov)
  892. {
  893. int rval;
  894. uint16_t ratov;
  895. mbx_cmd_t mc;
  896. mbx_cmd_t *mcp = &mc;
  897. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): entered.\n",
  898. vha->host_no));
  899. mcp->mb[0] = MBC_GET_RETRY_COUNT;
  900. mcp->out_mb = MBX_0;
  901. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  902. mcp->tov = MBX_TOV_SECONDS;
  903. mcp->flags = 0;
  904. rval = qla2x00_mailbox_command(vha, mcp);
  905. if (rval != QLA_SUCCESS) {
  906. /*EMPTY*/
  907. DEBUG2_3_11(printk("qla2x00_get_retry_cnt(%ld): failed = %x.\n",
  908. vha->host_no, mcp->mb[0]));
  909. } else {
  910. /* Convert returned data and check our values. */
  911. *r_a_tov = mcp->mb[3] / 2;
  912. ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
  913. if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
  914. /* Update to the larger values */
  915. *retry_cnt = (uint8_t)mcp->mb[1];
  916. *tov = ratov;
  917. }
  918. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): done. mb3=%d "
  919. "ratov=%d.\n", vha->host_no, mcp->mb[3], ratov));
  920. }
  921. return rval;
  922. }
  923. /*
  924. * qla2x00_init_firmware
  925. * Initialize adapter firmware.
  926. *
  927. * Input:
  928. * ha = adapter block pointer.
  929. * dptr = Initialization control block pointer.
  930. * size = size of initialization control block.
  931. * TARGET_QUEUE_LOCK must be released.
  932. * ADAPTER_STATE_LOCK must be released.
  933. *
  934. * Returns:
  935. * qla2x00 local function return status code.
  936. *
  937. * Context:
  938. * Kernel context.
  939. */
  940. int
  941. qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
  942. {
  943. int rval;
  944. mbx_cmd_t mc;
  945. mbx_cmd_t *mcp = &mc;
  946. struct qla_hw_data *ha = vha->hw;
  947. DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n",
  948. vha->host_no));
  949. if (ha->flags.npiv_supported)
  950. mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
  951. else
  952. mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
  953. mcp->mb[1] = 0;
  954. mcp->mb[2] = MSW(ha->init_cb_dma);
  955. mcp->mb[3] = LSW(ha->init_cb_dma);
  956. mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
  957. mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
  958. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  959. if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
  960. mcp->mb[1] = BIT_0;
  961. mcp->mb[10] = MSW(ha->ex_init_cb_dma);
  962. mcp->mb[11] = LSW(ha->ex_init_cb_dma);
  963. mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
  964. mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
  965. mcp->mb[14] = sizeof(*ha->ex_init_cb);
  966. mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
  967. }
  968. mcp->in_mb = MBX_0;
  969. mcp->buf_size = size;
  970. mcp->flags = MBX_DMA_OUT;
  971. mcp->tov = MBX_TOV_SECONDS;
  972. rval = qla2x00_mailbox_command(vha, mcp);
  973. if (rval != QLA_SUCCESS) {
  974. /*EMPTY*/
  975. DEBUG2_3_11(printk("qla2x00_init_firmware(%ld): failed=%x "
  976. "mb0=%x.\n",
  977. vha->host_no, rval, mcp->mb[0]));
  978. } else {
  979. /*EMPTY*/
  980. DEBUG11(printk("qla2x00_init_firmware(%ld): done.\n",
  981. vha->host_no));
  982. }
  983. return rval;
  984. }
  985. /*
  986. * qla2x00_get_port_database
  987. * Issue normal/enhanced get port database mailbox command
  988. * and copy device name as necessary.
  989. *
  990. * Input:
  991. * ha = adapter state pointer.
  992. * dev = structure pointer.
  993. * opt = enhanced cmd option byte.
  994. *
  995. * Returns:
  996. * qla2x00 local function return status code.
  997. *
  998. * Context:
  999. * Kernel context.
  1000. */
  1001. int
  1002. qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
  1003. {
  1004. int rval;
  1005. mbx_cmd_t mc;
  1006. mbx_cmd_t *mcp = &mc;
  1007. port_database_t *pd;
  1008. struct port_database_24xx *pd24;
  1009. dma_addr_t pd_dma;
  1010. struct qla_hw_data *ha = vha->hw;
  1011. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1012. pd24 = NULL;
  1013. pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
  1014. if (pd == NULL) {
  1015. DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
  1016. "structure.\n", __func__, vha->host_no));
  1017. return QLA_MEMORY_ALLOC_FAILED;
  1018. }
  1019. memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
  1020. mcp->mb[0] = MBC_GET_PORT_DATABASE;
  1021. if (opt != 0 && !IS_FWI2_CAPABLE(ha))
  1022. mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
  1023. mcp->mb[2] = MSW(pd_dma);
  1024. mcp->mb[3] = LSW(pd_dma);
  1025. mcp->mb[6] = MSW(MSD(pd_dma));
  1026. mcp->mb[7] = LSW(MSD(pd_dma));
  1027. mcp->mb[9] = vha->vp_idx;
  1028. mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1029. mcp->in_mb = MBX_0;
  1030. if (IS_FWI2_CAPABLE(ha)) {
  1031. mcp->mb[1] = fcport->loop_id;
  1032. mcp->mb[10] = opt;
  1033. mcp->out_mb |= MBX_10|MBX_1;
  1034. mcp->in_mb |= MBX_1;
  1035. } else if (HAS_EXTENDED_IDS(ha)) {
  1036. mcp->mb[1] = fcport->loop_id;
  1037. mcp->mb[10] = opt;
  1038. mcp->out_mb |= MBX_10|MBX_1;
  1039. } else {
  1040. mcp->mb[1] = fcport->loop_id << 8 | opt;
  1041. mcp->out_mb |= MBX_1;
  1042. }
  1043. mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
  1044. PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
  1045. mcp->flags = MBX_DMA_IN;
  1046. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1047. rval = qla2x00_mailbox_command(vha, mcp);
  1048. if (rval != QLA_SUCCESS)
  1049. goto gpd_error_out;
  1050. if (IS_FWI2_CAPABLE(ha)) {
  1051. pd24 = (struct port_database_24xx *) pd;
  1052. /* Check for logged in state. */
  1053. if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
  1054. pd24->last_login_state != PDS_PRLI_COMPLETE) {
  1055. DEBUG2(printk("%s(%ld): Unable to verify "
  1056. "login-state (%x/%x) for loop_id %x\n",
  1057. __func__, vha->host_no,
  1058. pd24->current_login_state,
  1059. pd24->last_login_state, fcport->loop_id));
  1060. rval = QLA_FUNCTION_FAILED;
  1061. goto gpd_error_out;
  1062. }
  1063. /* Names are little-endian. */
  1064. memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
  1065. memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
  1066. /* Get port_id of device. */
  1067. fcport->d_id.b.domain = pd24->port_id[0];
  1068. fcport->d_id.b.area = pd24->port_id[1];
  1069. fcport->d_id.b.al_pa = pd24->port_id[2];
  1070. fcport->d_id.b.rsvd_1 = 0;
  1071. /* If not target must be initiator or unknown type. */
  1072. if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
  1073. fcport->port_type = FCT_INITIATOR;
  1074. else
  1075. fcport->port_type = FCT_TARGET;
  1076. } else {
  1077. /* Check for logged in state. */
  1078. if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
  1079. pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
  1080. rval = QLA_FUNCTION_FAILED;
  1081. goto gpd_error_out;
  1082. }
  1083. /* Names are little-endian. */
  1084. memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
  1085. memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
  1086. /* Get port_id of device. */
  1087. fcport->d_id.b.domain = pd->port_id[0];
  1088. fcport->d_id.b.area = pd->port_id[3];
  1089. fcport->d_id.b.al_pa = pd->port_id[2];
  1090. fcport->d_id.b.rsvd_1 = 0;
  1091. /* If not target must be initiator or unknown type. */
  1092. if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
  1093. fcport->port_type = FCT_INITIATOR;
  1094. else
  1095. fcport->port_type = FCT_TARGET;
  1096. /* Passback COS information. */
  1097. fcport->supported_classes = (pd->options & BIT_4) ?
  1098. FC_COS_CLASS2: FC_COS_CLASS3;
  1099. }
  1100. gpd_error_out:
  1101. dma_pool_free(ha->s_dma_pool, pd, pd_dma);
  1102. if (rval != QLA_SUCCESS) {
  1103. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  1104. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1105. } else {
  1106. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1107. }
  1108. return rval;
  1109. }
  1110. /*
  1111. * qla2x00_get_firmware_state
  1112. * Get adapter firmware state.
  1113. *
  1114. * Input:
  1115. * ha = adapter block pointer.
  1116. * dptr = pointer for firmware state.
  1117. * TARGET_QUEUE_LOCK must be released.
  1118. * ADAPTER_STATE_LOCK must be released.
  1119. *
  1120. * Returns:
  1121. * qla2x00 local function return status code.
  1122. *
  1123. * Context:
  1124. * Kernel context.
  1125. */
  1126. int
  1127. qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
  1128. {
  1129. int rval;
  1130. mbx_cmd_t mc;
  1131. mbx_cmd_t *mcp = &mc;
  1132. DEBUG11(printk("qla2x00_get_firmware_state(%ld): entered.\n",
  1133. vha->host_no));
  1134. mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
  1135. mcp->out_mb = MBX_0;
  1136. if (IS_FWI2_CAPABLE(vha->hw))
  1137. mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  1138. else
  1139. mcp->in_mb = MBX_1|MBX_0;
  1140. mcp->tov = MBX_TOV_SECONDS;
  1141. mcp->flags = 0;
  1142. rval = qla2x00_mailbox_command(vha, mcp);
  1143. /* Return firmware states. */
  1144. states[0] = mcp->mb[1];
  1145. if (IS_FWI2_CAPABLE(vha->hw)) {
  1146. states[1] = mcp->mb[2];
  1147. states[2] = mcp->mb[3];
  1148. states[3] = mcp->mb[4];
  1149. states[4] = mcp->mb[5];
  1150. }
  1151. if (rval != QLA_SUCCESS) {
  1152. /*EMPTY*/
  1153. DEBUG2_3_11(printk("qla2x00_get_firmware_state(%ld): "
  1154. "failed=%x.\n", vha->host_no, rval));
  1155. } else {
  1156. /*EMPTY*/
  1157. DEBUG11(printk("qla2x00_get_firmware_state(%ld): done.\n",
  1158. vha->host_no));
  1159. }
  1160. return rval;
  1161. }
  1162. /*
  1163. * qla2x00_get_port_name
  1164. * Issue get port name mailbox command.
  1165. * Returned name is in big endian format.
  1166. *
  1167. * Input:
  1168. * ha = adapter block pointer.
  1169. * loop_id = loop ID of device.
  1170. * name = pointer for name.
  1171. * TARGET_QUEUE_LOCK must be released.
  1172. * ADAPTER_STATE_LOCK must be released.
  1173. *
  1174. * Returns:
  1175. * qla2x00 local function return status code.
  1176. *
  1177. * Context:
  1178. * Kernel context.
  1179. */
  1180. int
  1181. qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
  1182. uint8_t opt)
  1183. {
  1184. int rval;
  1185. mbx_cmd_t mc;
  1186. mbx_cmd_t *mcp = &mc;
  1187. DEBUG11(printk("qla2x00_get_port_name(%ld): entered.\n",
  1188. vha->host_no));
  1189. mcp->mb[0] = MBC_GET_PORT_NAME;
  1190. mcp->mb[9] = vha->vp_idx;
  1191. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  1192. if (HAS_EXTENDED_IDS(vha->hw)) {
  1193. mcp->mb[1] = loop_id;
  1194. mcp->mb[10] = opt;
  1195. mcp->out_mb |= MBX_10;
  1196. } else {
  1197. mcp->mb[1] = loop_id << 8 | opt;
  1198. }
  1199. mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1200. mcp->tov = MBX_TOV_SECONDS;
  1201. mcp->flags = 0;
  1202. rval = qla2x00_mailbox_command(vha, mcp);
  1203. if (rval != QLA_SUCCESS) {
  1204. /*EMPTY*/
  1205. DEBUG2_3_11(printk("qla2x00_get_port_name(%ld): failed=%x.\n",
  1206. vha->host_no, rval));
  1207. } else {
  1208. if (name != NULL) {
  1209. /* This function returns name in big endian. */
  1210. name[0] = MSB(mcp->mb[2]);
  1211. name[1] = LSB(mcp->mb[2]);
  1212. name[2] = MSB(mcp->mb[3]);
  1213. name[3] = LSB(mcp->mb[3]);
  1214. name[4] = MSB(mcp->mb[6]);
  1215. name[5] = LSB(mcp->mb[6]);
  1216. name[6] = MSB(mcp->mb[7]);
  1217. name[7] = LSB(mcp->mb[7]);
  1218. }
  1219. DEBUG11(printk("qla2x00_get_port_name(%ld): done.\n",
  1220. vha->host_no));
  1221. }
  1222. return rval;
  1223. }
  1224. /*
  1225. * qla2x00_lip_reset
  1226. * Issue LIP reset mailbox command.
  1227. *
  1228. * Input:
  1229. * ha = adapter block pointer.
  1230. * TARGET_QUEUE_LOCK must be released.
  1231. * ADAPTER_STATE_LOCK must be released.
  1232. *
  1233. * Returns:
  1234. * qla2x00 local function return status code.
  1235. *
  1236. * Context:
  1237. * Kernel context.
  1238. */
  1239. int
  1240. qla2x00_lip_reset(scsi_qla_host_t *vha)
  1241. {
  1242. int rval;
  1243. mbx_cmd_t mc;
  1244. mbx_cmd_t *mcp = &mc;
  1245. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1246. if (IS_QLA81XX(vha->hw)) {
  1247. /* Logout across all FCFs. */
  1248. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1249. mcp->mb[1] = BIT_1;
  1250. mcp->mb[2] = 0;
  1251. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1252. } else if (IS_FWI2_CAPABLE(vha->hw)) {
  1253. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1254. mcp->mb[1] = BIT_6;
  1255. mcp->mb[2] = 0;
  1256. mcp->mb[3] = vha->hw->loop_reset_delay;
  1257. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1258. } else {
  1259. mcp->mb[0] = MBC_LIP_RESET;
  1260. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1261. if (HAS_EXTENDED_IDS(vha->hw)) {
  1262. mcp->mb[1] = 0x00ff;
  1263. mcp->mb[10] = 0;
  1264. mcp->out_mb |= MBX_10;
  1265. } else {
  1266. mcp->mb[1] = 0xff00;
  1267. }
  1268. mcp->mb[2] = vha->hw->loop_reset_delay;
  1269. mcp->mb[3] = 0;
  1270. }
  1271. mcp->in_mb = MBX_0;
  1272. mcp->tov = MBX_TOV_SECONDS;
  1273. mcp->flags = 0;
  1274. rval = qla2x00_mailbox_command(vha, mcp);
  1275. if (rval != QLA_SUCCESS) {
  1276. /*EMPTY*/
  1277. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
  1278. __func__, vha->host_no, rval));
  1279. } else {
  1280. /*EMPTY*/
  1281. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1282. }
  1283. return rval;
  1284. }
  1285. /*
  1286. * qla2x00_send_sns
  1287. * Send SNS command.
  1288. *
  1289. * Input:
  1290. * ha = adapter block pointer.
  1291. * sns = pointer for command.
  1292. * cmd_size = command size.
  1293. * buf_size = response/command size.
  1294. * TARGET_QUEUE_LOCK must be released.
  1295. * ADAPTER_STATE_LOCK must be released.
  1296. *
  1297. * Returns:
  1298. * qla2x00 local function return status code.
  1299. *
  1300. * Context:
  1301. * Kernel context.
  1302. */
  1303. int
  1304. qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
  1305. uint16_t cmd_size, size_t buf_size)
  1306. {
  1307. int rval;
  1308. mbx_cmd_t mc;
  1309. mbx_cmd_t *mcp = &mc;
  1310. DEBUG11(printk("qla2x00_send_sns(%ld): entered.\n",
  1311. vha->host_no));
  1312. DEBUG11(printk("qla2x00_send_sns: retry cnt=%d ratov=%d total "
  1313. "tov=%d.\n", vha->hw->retry_count, vha->hw->login_timeout,
  1314. mcp->tov));
  1315. mcp->mb[0] = MBC_SEND_SNS_COMMAND;
  1316. mcp->mb[1] = cmd_size;
  1317. mcp->mb[2] = MSW(sns_phys_address);
  1318. mcp->mb[3] = LSW(sns_phys_address);
  1319. mcp->mb[6] = MSW(MSD(sns_phys_address));
  1320. mcp->mb[7] = LSW(MSD(sns_phys_address));
  1321. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1322. mcp->in_mb = MBX_0|MBX_1;
  1323. mcp->buf_size = buf_size;
  1324. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
  1325. mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
  1326. rval = qla2x00_mailbox_command(vha, mcp);
  1327. if (rval != QLA_SUCCESS) {
  1328. /*EMPTY*/
  1329. DEBUG(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1330. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1331. DEBUG2_3_11(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1332. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1333. } else {
  1334. /*EMPTY*/
  1335. DEBUG11(printk("qla2x00_send_sns(%ld): done.\n", vha->host_no));
  1336. }
  1337. return rval;
  1338. }
  1339. int
  1340. qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1341. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1342. {
  1343. int rval;
  1344. struct logio_entry_24xx *lg;
  1345. dma_addr_t lg_dma;
  1346. uint32_t iop[2];
  1347. struct qla_hw_data *ha = vha->hw;
  1348. struct req_que *req;
  1349. struct rsp_que *rsp;
  1350. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1351. if (ha->flags.cpu_affinity_enabled)
  1352. req = ha->req_q_map[0];
  1353. else
  1354. req = vha->req;
  1355. rsp = req->rsp;
  1356. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1357. if (lg == NULL) {
  1358. DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
  1359. __func__, vha->host_no));
  1360. return QLA_MEMORY_ALLOC_FAILED;
  1361. }
  1362. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1363. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1364. lg->entry_count = 1;
  1365. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1366. lg->nport_handle = cpu_to_le16(loop_id);
  1367. lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
  1368. if (opt & BIT_0)
  1369. lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
  1370. if (opt & BIT_1)
  1371. lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
  1372. lg->port_id[0] = al_pa;
  1373. lg->port_id[1] = area;
  1374. lg->port_id[2] = domain;
  1375. lg->vp_index = vha->vp_idx;
  1376. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1377. if (rval != QLA_SUCCESS) {
  1378. DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
  1379. "(%x).\n", __func__, vha->host_no, rval));
  1380. } else if (lg->entry_status != 0) {
  1381. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1382. "-- error status (%x).\n", __func__, vha->host_no,
  1383. lg->entry_status));
  1384. rval = QLA_FUNCTION_FAILED;
  1385. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1386. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1387. iop[1] = le32_to_cpu(lg->io_parameter[1]);
  1388. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1389. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1390. vha->host_no, le16_to_cpu(lg->comp_status), iop[0],
  1391. iop[1]));
  1392. switch (iop[0]) {
  1393. case LSC_SCODE_PORTID_USED:
  1394. mb[0] = MBS_PORT_ID_USED;
  1395. mb[1] = LSW(iop[1]);
  1396. break;
  1397. case LSC_SCODE_NPORT_USED:
  1398. mb[0] = MBS_LOOP_ID_USED;
  1399. break;
  1400. case LSC_SCODE_NOLINK:
  1401. case LSC_SCODE_NOIOCB:
  1402. case LSC_SCODE_NOXCB:
  1403. case LSC_SCODE_CMD_FAILED:
  1404. case LSC_SCODE_NOFABRIC:
  1405. case LSC_SCODE_FW_NOT_READY:
  1406. case LSC_SCODE_NOT_LOGGED_IN:
  1407. case LSC_SCODE_NOPCB:
  1408. case LSC_SCODE_ELS_REJECT:
  1409. case LSC_SCODE_CMD_PARAM_ERR:
  1410. case LSC_SCODE_NONPORT:
  1411. case LSC_SCODE_LOGGED_IN:
  1412. case LSC_SCODE_NOFLOGI_ACC:
  1413. default:
  1414. mb[0] = MBS_COMMAND_ERROR;
  1415. break;
  1416. }
  1417. } else {
  1418. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1419. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1420. mb[0] = MBS_COMMAND_COMPLETE;
  1421. mb[1] = 0;
  1422. if (iop[0] & BIT_4) {
  1423. if (iop[0] & BIT_8)
  1424. mb[1] |= BIT_1;
  1425. } else
  1426. mb[1] = BIT_0;
  1427. /* Passback COS information. */
  1428. mb[10] = 0;
  1429. if (lg->io_parameter[7] || lg->io_parameter[8])
  1430. mb[10] |= BIT_0; /* Class 2. */
  1431. if (lg->io_parameter[9] || lg->io_parameter[10])
  1432. mb[10] |= BIT_1; /* Class 3. */
  1433. }
  1434. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1435. return rval;
  1436. }
  1437. /*
  1438. * qla2x00_login_fabric
  1439. * Issue login fabric port mailbox command.
  1440. *
  1441. * Input:
  1442. * ha = adapter block pointer.
  1443. * loop_id = device loop ID.
  1444. * domain = device domain.
  1445. * area = device area.
  1446. * al_pa = device AL_PA.
  1447. * status = pointer for return status.
  1448. * opt = command options.
  1449. * TARGET_QUEUE_LOCK must be released.
  1450. * ADAPTER_STATE_LOCK must be released.
  1451. *
  1452. * Returns:
  1453. * qla2x00 local function return status code.
  1454. *
  1455. * Context:
  1456. * Kernel context.
  1457. */
  1458. int
  1459. qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1460. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1461. {
  1462. int rval;
  1463. mbx_cmd_t mc;
  1464. mbx_cmd_t *mcp = &mc;
  1465. struct qla_hw_data *ha = vha->hw;
  1466. DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", vha->host_no));
  1467. mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
  1468. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1469. if (HAS_EXTENDED_IDS(ha)) {
  1470. mcp->mb[1] = loop_id;
  1471. mcp->mb[10] = opt;
  1472. mcp->out_mb |= MBX_10;
  1473. } else {
  1474. mcp->mb[1] = (loop_id << 8) | opt;
  1475. }
  1476. mcp->mb[2] = domain;
  1477. mcp->mb[3] = area << 8 | al_pa;
  1478. mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
  1479. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1480. mcp->flags = 0;
  1481. rval = qla2x00_mailbox_command(vha, mcp);
  1482. /* Return mailbox statuses. */
  1483. if (mb != NULL) {
  1484. mb[0] = mcp->mb[0];
  1485. mb[1] = mcp->mb[1];
  1486. mb[2] = mcp->mb[2];
  1487. mb[6] = mcp->mb[6];
  1488. mb[7] = mcp->mb[7];
  1489. /* COS retrieved from Get-Port-Database mailbox command. */
  1490. mb[10] = 0;
  1491. }
  1492. if (rval != QLA_SUCCESS) {
  1493. /* RLU tmp code: need to change main mailbox_command function to
  1494. * return ok even when the mailbox completion value is not
  1495. * SUCCESS. The caller needs to be responsible to interpret
  1496. * the return values of this mailbox command if we're not
  1497. * to change too much of the existing code.
  1498. */
  1499. if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
  1500. mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
  1501. mcp->mb[0] == 0x4006)
  1502. rval = QLA_SUCCESS;
  1503. /*EMPTY*/
  1504. DEBUG2_3_11(printk("qla2x00_login_fabric(%ld): failed=%x "
  1505. "mb[0]=%x mb[1]=%x mb[2]=%x.\n", vha->host_no, rval,
  1506. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  1507. } else {
  1508. /*EMPTY*/
  1509. DEBUG11(printk("qla2x00_login_fabric(%ld): done.\n",
  1510. vha->host_no));
  1511. }
  1512. return rval;
  1513. }
  1514. /*
  1515. * qla2x00_login_local_device
  1516. * Issue login loop port mailbox command.
  1517. *
  1518. * Input:
  1519. * ha = adapter block pointer.
  1520. * loop_id = device loop ID.
  1521. * opt = command options.
  1522. *
  1523. * Returns:
  1524. * Return status code.
  1525. *
  1526. * Context:
  1527. * Kernel context.
  1528. *
  1529. */
  1530. int
  1531. qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
  1532. uint16_t *mb_ret, uint8_t opt)
  1533. {
  1534. int rval;
  1535. mbx_cmd_t mc;
  1536. mbx_cmd_t *mcp = &mc;
  1537. struct qla_hw_data *ha = vha->hw;
  1538. if (IS_FWI2_CAPABLE(ha))
  1539. return qla24xx_login_fabric(vha, fcport->loop_id,
  1540. fcport->d_id.b.domain, fcport->d_id.b.area,
  1541. fcport->d_id.b.al_pa, mb_ret, opt);
  1542. DEBUG3(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1543. mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
  1544. if (HAS_EXTENDED_IDS(ha))
  1545. mcp->mb[1] = fcport->loop_id;
  1546. else
  1547. mcp->mb[1] = fcport->loop_id << 8;
  1548. mcp->mb[2] = opt;
  1549. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1550. mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
  1551. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1552. mcp->flags = 0;
  1553. rval = qla2x00_mailbox_command(vha, mcp);
  1554. /* Return mailbox statuses. */
  1555. if (mb_ret != NULL) {
  1556. mb_ret[0] = mcp->mb[0];
  1557. mb_ret[1] = mcp->mb[1];
  1558. mb_ret[6] = mcp->mb[6];
  1559. mb_ret[7] = mcp->mb[7];
  1560. }
  1561. if (rval != QLA_SUCCESS) {
  1562. /* AV tmp code: need to change main mailbox_command function to
  1563. * return ok even when the mailbox completion value is not
  1564. * SUCCESS. The caller needs to be responsible to interpret
  1565. * the return values of this mailbox command if we're not
  1566. * to change too much of the existing code.
  1567. */
  1568. if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
  1569. rval = QLA_SUCCESS;
  1570. DEBUG(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1571. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1572. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1573. DEBUG2_3(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1574. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1575. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1576. } else {
  1577. /*EMPTY*/
  1578. DEBUG3(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1579. }
  1580. return (rval);
  1581. }
  1582. int
  1583. qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1584. uint8_t area, uint8_t al_pa)
  1585. {
  1586. int rval;
  1587. struct logio_entry_24xx *lg;
  1588. dma_addr_t lg_dma;
  1589. struct qla_hw_data *ha = vha->hw;
  1590. struct req_que *req;
  1591. struct rsp_que *rsp;
  1592. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1593. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1594. if (lg == NULL) {
  1595. DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
  1596. __func__, vha->host_no));
  1597. return QLA_MEMORY_ALLOC_FAILED;
  1598. }
  1599. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1600. if (ql2xmaxqueues > 1)
  1601. req = ha->req_q_map[0];
  1602. else
  1603. req = vha->req;
  1604. rsp = req->rsp;
  1605. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1606. lg->entry_count = 1;
  1607. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1608. lg->nport_handle = cpu_to_le16(loop_id);
  1609. lg->control_flags =
  1610. __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1611. lg->port_id[0] = al_pa;
  1612. lg->port_id[1] = area;
  1613. lg->port_id[2] = domain;
  1614. lg->vp_index = vha->vp_idx;
  1615. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1616. if (rval != QLA_SUCCESS) {
  1617. DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
  1618. "(%x).\n", __func__, vha->host_no, rval));
  1619. } else if (lg->entry_status != 0) {
  1620. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1621. "-- error status (%x).\n", __func__, vha->host_no,
  1622. lg->entry_status));
  1623. rval = QLA_FUNCTION_FAILED;
  1624. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1625. DEBUG2_3_11(printk("%s(%ld %d): failed to complete IOCB "
  1626. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1627. vha->host_no, vha->vp_idx, le16_to_cpu(lg->comp_status),
  1628. le32_to_cpu(lg->io_parameter[0]),
  1629. le32_to_cpu(lg->io_parameter[1])));
  1630. } else {
  1631. /*EMPTY*/
  1632. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1633. }
  1634. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1635. return rval;
  1636. }
  1637. /*
  1638. * qla2x00_fabric_logout
  1639. * Issue logout fabric port mailbox command.
  1640. *
  1641. * Input:
  1642. * ha = adapter block pointer.
  1643. * loop_id = device loop ID.
  1644. * TARGET_QUEUE_LOCK must be released.
  1645. * ADAPTER_STATE_LOCK must be released.
  1646. *
  1647. * Returns:
  1648. * qla2x00 local function return status code.
  1649. *
  1650. * Context:
  1651. * Kernel context.
  1652. */
  1653. int
  1654. qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1655. uint8_t area, uint8_t al_pa)
  1656. {
  1657. int rval;
  1658. mbx_cmd_t mc;
  1659. mbx_cmd_t *mcp = &mc;
  1660. DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
  1661. vha->host_no));
  1662. mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
  1663. mcp->out_mb = MBX_1|MBX_0;
  1664. if (HAS_EXTENDED_IDS(vha->hw)) {
  1665. mcp->mb[1] = loop_id;
  1666. mcp->mb[10] = 0;
  1667. mcp->out_mb |= MBX_10;
  1668. } else {
  1669. mcp->mb[1] = loop_id << 8;
  1670. }
  1671. mcp->in_mb = MBX_1|MBX_0;
  1672. mcp->tov = MBX_TOV_SECONDS;
  1673. mcp->flags = 0;
  1674. rval = qla2x00_mailbox_command(vha, mcp);
  1675. if (rval != QLA_SUCCESS) {
  1676. /*EMPTY*/
  1677. DEBUG2_3_11(printk("qla2x00_fabric_logout(%ld): failed=%x "
  1678. "mbx1=%x.\n", vha->host_no, rval, mcp->mb[1]));
  1679. } else {
  1680. /*EMPTY*/
  1681. DEBUG11(printk("qla2x00_fabric_logout(%ld): done.\n",
  1682. vha->host_no));
  1683. }
  1684. return rval;
  1685. }
  1686. /*
  1687. * qla2x00_full_login_lip
  1688. * Issue full login LIP mailbox command.
  1689. *
  1690. * Input:
  1691. * ha = adapter block pointer.
  1692. * TARGET_QUEUE_LOCK must be released.
  1693. * ADAPTER_STATE_LOCK must be released.
  1694. *
  1695. * Returns:
  1696. * qla2x00 local function return status code.
  1697. *
  1698. * Context:
  1699. * Kernel context.
  1700. */
  1701. int
  1702. qla2x00_full_login_lip(scsi_qla_host_t *vha)
  1703. {
  1704. int rval;
  1705. mbx_cmd_t mc;
  1706. mbx_cmd_t *mcp = &mc;
  1707. DEBUG11(printk("qla2x00_full_login_lip(%ld): entered.\n",
  1708. vha->host_no));
  1709. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1710. mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
  1711. mcp->mb[2] = 0;
  1712. mcp->mb[3] = 0;
  1713. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1714. mcp->in_mb = MBX_0;
  1715. mcp->tov = MBX_TOV_SECONDS;
  1716. mcp->flags = 0;
  1717. rval = qla2x00_mailbox_command(vha, mcp);
  1718. if (rval != QLA_SUCCESS) {
  1719. /*EMPTY*/
  1720. DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
  1721. vha->host_no, rval));
  1722. } else {
  1723. /*EMPTY*/
  1724. DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
  1725. vha->host_no));
  1726. }
  1727. return rval;
  1728. }
  1729. /*
  1730. * qla2x00_get_id_list
  1731. *
  1732. * Input:
  1733. * ha = adapter block pointer.
  1734. *
  1735. * Returns:
  1736. * qla2x00 local function return status code.
  1737. *
  1738. * Context:
  1739. * Kernel context.
  1740. */
  1741. int
  1742. qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
  1743. uint16_t *entries)
  1744. {
  1745. int rval;
  1746. mbx_cmd_t mc;
  1747. mbx_cmd_t *mcp = &mc;
  1748. DEBUG11(printk("qla2x00_get_id_list(%ld): entered.\n",
  1749. vha->host_no));
  1750. if (id_list == NULL)
  1751. return QLA_FUNCTION_FAILED;
  1752. mcp->mb[0] = MBC_GET_ID_LIST;
  1753. mcp->out_mb = MBX_0;
  1754. if (IS_FWI2_CAPABLE(vha->hw)) {
  1755. mcp->mb[2] = MSW(id_list_dma);
  1756. mcp->mb[3] = LSW(id_list_dma);
  1757. mcp->mb[6] = MSW(MSD(id_list_dma));
  1758. mcp->mb[7] = LSW(MSD(id_list_dma));
  1759. mcp->mb[8] = 0;
  1760. mcp->mb[9] = vha->vp_idx;
  1761. mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
  1762. } else {
  1763. mcp->mb[1] = MSW(id_list_dma);
  1764. mcp->mb[2] = LSW(id_list_dma);
  1765. mcp->mb[3] = MSW(MSD(id_list_dma));
  1766. mcp->mb[6] = LSW(MSD(id_list_dma));
  1767. mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
  1768. }
  1769. mcp->in_mb = MBX_1|MBX_0;
  1770. mcp->tov = MBX_TOV_SECONDS;
  1771. mcp->flags = 0;
  1772. rval = qla2x00_mailbox_command(vha, mcp);
  1773. if (rval != QLA_SUCCESS) {
  1774. /*EMPTY*/
  1775. DEBUG2_3_11(printk("qla2x00_get_id_list(%ld): failed=%x.\n",
  1776. vha->host_no, rval));
  1777. } else {
  1778. *entries = mcp->mb[1];
  1779. DEBUG11(printk("qla2x00_get_id_list(%ld): done.\n",
  1780. vha->host_no));
  1781. }
  1782. return rval;
  1783. }
  1784. /*
  1785. * qla2x00_get_resource_cnts
  1786. * Get current firmware resource counts.
  1787. *
  1788. * Input:
  1789. * ha = adapter block pointer.
  1790. *
  1791. * Returns:
  1792. * qla2x00 local function return status code.
  1793. *
  1794. * Context:
  1795. * Kernel context.
  1796. */
  1797. int
  1798. qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
  1799. uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
  1800. uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
  1801. {
  1802. int rval;
  1803. mbx_cmd_t mc;
  1804. mbx_cmd_t *mcp = &mc;
  1805. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1806. mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
  1807. mcp->out_mb = MBX_0;
  1808. mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1809. if (IS_QLA81XX(vha->hw))
  1810. mcp->in_mb |= MBX_12;
  1811. mcp->tov = MBX_TOV_SECONDS;
  1812. mcp->flags = 0;
  1813. rval = qla2x00_mailbox_command(vha, mcp);
  1814. if (rval != QLA_SUCCESS) {
  1815. /*EMPTY*/
  1816. DEBUG2_3_11(printk("%s(%ld): failed = %x.\n", __func__,
  1817. vha->host_no, mcp->mb[0]));
  1818. } else {
  1819. DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
  1820. "mb7=%x mb10=%x mb11=%x mb12=%x.\n", __func__,
  1821. vha->host_no, mcp->mb[1], mcp->mb[2], mcp->mb[3],
  1822. mcp->mb[6], mcp->mb[7], mcp->mb[10], mcp->mb[11],
  1823. mcp->mb[12]));
  1824. if (cur_xchg_cnt)
  1825. *cur_xchg_cnt = mcp->mb[3];
  1826. if (orig_xchg_cnt)
  1827. *orig_xchg_cnt = mcp->mb[6];
  1828. if (cur_iocb_cnt)
  1829. *cur_iocb_cnt = mcp->mb[7];
  1830. if (orig_iocb_cnt)
  1831. *orig_iocb_cnt = mcp->mb[10];
  1832. if (vha->hw->flags.npiv_supported && max_npiv_vports)
  1833. *max_npiv_vports = mcp->mb[11];
  1834. if (IS_QLA81XX(vha->hw) && max_fcfs)
  1835. *max_fcfs = mcp->mb[12];
  1836. }
  1837. return (rval);
  1838. }
  1839. #if defined(QL_DEBUG_LEVEL_3)
  1840. /*
  1841. * qla2x00_get_fcal_position_map
  1842. * Get FCAL (LILP) position map using mailbox command
  1843. *
  1844. * Input:
  1845. * ha = adapter state pointer.
  1846. * pos_map = buffer pointer (can be NULL).
  1847. *
  1848. * Returns:
  1849. * qla2x00 local function return status code.
  1850. *
  1851. * Context:
  1852. * Kernel context.
  1853. */
  1854. int
  1855. qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
  1856. {
  1857. int rval;
  1858. mbx_cmd_t mc;
  1859. mbx_cmd_t *mcp = &mc;
  1860. char *pmap;
  1861. dma_addr_t pmap_dma;
  1862. struct qla_hw_data *ha = vha->hw;
  1863. pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
  1864. if (pmap == NULL) {
  1865. DEBUG2_3_11(printk("%s(%ld): **** Mem Alloc Failed ****",
  1866. __func__, vha->host_no));
  1867. return QLA_MEMORY_ALLOC_FAILED;
  1868. }
  1869. memset(pmap, 0, FCAL_MAP_SIZE);
  1870. mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
  1871. mcp->mb[2] = MSW(pmap_dma);
  1872. mcp->mb[3] = LSW(pmap_dma);
  1873. mcp->mb[6] = MSW(MSD(pmap_dma));
  1874. mcp->mb[7] = LSW(MSD(pmap_dma));
  1875. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1876. mcp->in_mb = MBX_1|MBX_0;
  1877. mcp->buf_size = FCAL_MAP_SIZE;
  1878. mcp->flags = MBX_DMA_IN;
  1879. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1880. rval = qla2x00_mailbox_command(vha, mcp);
  1881. if (rval == QLA_SUCCESS) {
  1882. DEBUG11(printk("%s(%ld): (mb0=%x/mb1=%x) FC/AL Position Map "
  1883. "size (%x)\n", __func__, vha->host_no, mcp->mb[0],
  1884. mcp->mb[1], (unsigned)pmap[0]));
  1885. DEBUG11(qla2x00_dump_buffer(pmap, pmap[0] + 1));
  1886. if (pos_map)
  1887. memcpy(pos_map, pmap, FCAL_MAP_SIZE);
  1888. }
  1889. dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
  1890. if (rval != QLA_SUCCESS) {
  1891. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1892. vha->host_no, rval));
  1893. } else {
  1894. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1895. }
  1896. return rval;
  1897. }
  1898. #endif
  1899. /*
  1900. * qla2x00_get_link_status
  1901. *
  1902. * Input:
  1903. * ha = adapter block pointer.
  1904. * loop_id = device loop ID.
  1905. * ret_buf = pointer to link status return buffer.
  1906. *
  1907. * Returns:
  1908. * 0 = success.
  1909. * BIT_0 = mem alloc error.
  1910. * BIT_1 = mailbox error.
  1911. */
  1912. int
  1913. qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
  1914. struct link_statistics *stats, dma_addr_t stats_dma)
  1915. {
  1916. int rval;
  1917. mbx_cmd_t mc;
  1918. mbx_cmd_t *mcp = &mc;
  1919. uint32_t *siter, *diter, dwords;
  1920. struct qla_hw_data *ha = vha->hw;
  1921. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1922. mcp->mb[0] = MBC_GET_LINK_STATUS;
  1923. mcp->mb[2] = MSW(stats_dma);
  1924. mcp->mb[3] = LSW(stats_dma);
  1925. mcp->mb[6] = MSW(MSD(stats_dma));
  1926. mcp->mb[7] = LSW(MSD(stats_dma));
  1927. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1928. mcp->in_mb = MBX_0;
  1929. if (IS_FWI2_CAPABLE(ha)) {
  1930. mcp->mb[1] = loop_id;
  1931. mcp->mb[4] = 0;
  1932. mcp->mb[10] = 0;
  1933. mcp->out_mb |= MBX_10|MBX_4|MBX_1;
  1934. mcp->in_mb |= MBX_1;
  1935. } else if (HAS_EXTENDED_IDS(ha)) {
  1936. mcp->mb[1] = loop_id;
  1937. mcp->mb[10] = 0;
  1938. mcp->out_mb |= MBX_10|MBX_1;
  1939. } else {
  1940. mcp->mb[1] = loop_id << 8;
  1941. mcp->out_mb |= MBX_1;
  1942. }
  1943. mcp->tov = MBX_TOV_SECONDS;
  1944. mcp->flags = IOCTL_CMD;
  1945. rval = qla2x00_mailbox_command(vha, mcp);
  1946. if (rval == QLA_SUCCESS) {
  1947. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1948. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1949. __func__, vha->host_no, mcp->mb[0]));
  1950. rval = QLA_FUNCTION_FAILED;
  1951. } else {
  1952. /* Copy over data -- firmware data is LE. */
  1953. dwords = offsetof(struct link_statistics, unused1) / 4;
  1954. siter = diter = &stats->link_fail_cnt;
  1955. while (dwords--)
  1956. *diter++ = le32_to_cpu(*siter++);
  1957. }
  1958. } else {
  1959. /* Failed. */
  1960. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1961. vha->host_no, rval));
  1962. }
  1963. return rval;
  1964. }
  1965. int
  1966. qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
  1967. dma_addr_t stats_dma)
  1968. {
  1969. int rval;
  1970. mbx_cmd_t mc;
  1971. mbx_cmd_t *mcp = &mc;
  1972. uint32_t *siter, *diter, dwords;
  1973. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1974. mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
  1975. mcp->mb[2] = MSW(stats_dma);
  1976. mcp->mb[3] = LSW(stats_dma);
  1977. mcp->mb[6] = MSW(MSD(stats_dma));
  1978. mcp->mb[7] = LSW(MSD(stats_dma));
  1979. mcp->mb[8] = sizeof(struct link_statistics) / 4;
  1980. mcp->mb[9] = vha->vp_idx;
  1981. mcp->mb[10] = 0;
  1982. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1983. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  1984. mcp->tov = MBX_TOV_SECONDS;
  1985. mcp->flags = IOCTL_CMD;
  1986. rval = qla2x00_mailbox_command(vha, mcp);
  1987. if (rval == QLA_SUCCESS) {
  1988. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1989. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1990. __func__, vha->host_no, mcp->mb[0]));
  1991. rval = QLA_FUNCTION_FAILED;
  1992. } else {
  1993. /* Copy over data -- firmware data is LE. */
  1994. dwords = sizeof(struct link_statistics) / 4;
  1995. siter = diter = &stats->link_fail_cnt;
  1996. while (dwords--)
  1997. *diter++ = le32_to_cpu(*siter++);
  1998. }
  1999. } else {
  2000. /* Failed. */
  2001. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2002. vha->host_no, rval));
  2003. }
  2004. return rval;
  2005. }
  2006. int
  2007. qla24xx_abort_command(srb_t *sp)
  2008. {
  2009. int rval;
  2010. unsigned long flags = 0;
  2011. struct abort_entry_24xx *abt;
  2012. dma_addr_t abt_dma;
  2013. uint32_t handle;
  2014. fc_port_t *fcport = sp->fcport;
  2015. struct scsi_qla_host *vha = fcport->vha;
  2016. struct qla_hw_data *ha = vha->hw;
  2017. struct req_que *req = vha->req;
  2018. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2019. spin_lock_irqsave(&ha->hardware_lock, flags);
  2020. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  2021. if (req->outstanding_cmds[handle] == sp)
  2022. break;
  2023. }
  2024. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2025. if (handle == MAX_OUTSTANDING_COMMANDS) {
  2026. /* Command not found. */
  2027. return QLA_FUNCTION_FAILED;
  2028. }
  2029. abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
  2030. if (abt == NULL) {
  2031. DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
  2032. __func__, vha->host_no));
  2033. return QLA_MEMORY_ALLOC_FAILED;
  2034. }
  2035. memset(abt, 0, sizeof(struct abort_entry_24xx));
  2036. abt->entry_type = ABORT_IOCB_TYPE;
  2037. abt->entry_count = 1;
  2038. abt->handle = MAKE_HANDLE(req->id, abt->handle);
  2039. abt->nport_handle = cpu_to_le16(fcport->loop_id);
  2040. abt->handle_to_abort = handle;
  2041. abt->port_id[0] = fcport->d_id.b.al_pa;
  2042. abt->port_id[1] = fcport->d_id.b.area;
  2043. abt->port_id[2] = fcport->d_id.b.domain;
  2044. abt->vp_index = fcport->vp_idx;
  2045. abt->req_que_no = cpu_to_le16(req->id);
  2046. rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
  2047. if (rval != QLA_SUCCESS) {
  2048. DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
  2049. __func__, vha->host_no, rval));
  2050. } else if (abt->entry_status != 0) {
  2051. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2052. "-- error status (%x).\n", __func__, vha->host_no,
  2053. abt->entry_status));
  2054. rval = QLA_FUNCTION_FAILED;
  2055. } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
  2056. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2057. "-- completion status (%x).\n", __func__, vha->host_no,
  2058. le16_to_cpu(abt->nport_handle)));
  2059. rval = QLA_FUNCTION_FAILED;
  2060. } else {
  2061. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2062. }
  2063. dma_pool_free(ha->s_dma_pool, abt, abt_dma);
  2064. return rval;
  2065. }
  2066. struct tsk_mgmt_cmd {
  2067. union {
  2068. struct tsk_mgmt_entry tsk;
  2069. struct sts_entry_24xx sts;
  2070. } p;
  2071. };
  2072. static int
  2073. __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
  2074. unsigned int l, int tag)
  2075. {
  2076. int rval, rval2;
  2077. struct tsk_mgmt_cmd *tsk;
  2078. struct sts_entry_24xx *sts;
  2079. dma_addr_t tsk_dma;
  2080. scsi_qla_host_t *vha;
  2081. struct qla_hw_data *ha;
  2082. struct req_que *req;
  2083. struct rsp_que *rsp;
  2084. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  2085. vha = fcport->vha;
  2086. ha = vha->hw;
  2087. req = vha->req;
  2088. if (ha->flags.cpu_affinity_enabled)
  2089. rsp = ha->rsp_q_map[tag + 1];
  2090. else
  2091. rsp = req->rsp;
  2092. tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
  2093. if (tsk == NULL) {
  2094. DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
  2095. "IOCB.\n", __func__, vha->host_no));
  2096. return QLA_MEMORY_ALLOC_FAILED;
  2097. }
  2098. memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
  2099. tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
  2100. tsk->p.tsk.entry_count = 1;
  2101. tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
  2102. tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
  2103. tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2104. tsk->p.tsk.control_flags = cpu_to_le32(type);
  2105. tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
  2106. tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
  2107. tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
  2108. tsk->p.tsk.vp_index = fcport->vp_idx;
  2109. if (type == TCF_LUN_RESET) {
  2110. int_to_scsilun(l, &tsk->p.tsk.lun);
  2111. host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
  2112. sizeof(tsk->p.tsk.lun));
  2113. }
  2114. sts = &tsk->p.sts;
  2115. rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
  2116. if (rval != QLA_SUCCESS) {
  2117. DEBUG2_3_11(printk("%s(%ld): failed to issue %s Reset IOCB "
  2118. "(%x).\n", __func__, vha->host_no, name, rval));
  2119. } else if (sts->entry_status != 0) {
  2120. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2121. "-- error status (%x).\n", __func__, vha->host_no,
  2122. sts->entry_status));
  2123. rval = QLA_FUNCTION_FAILED;
  2124. } else if (sts->comp_status !=
  2125. __constant_cpu_to_le16(CS_COMPLETE)) {
  2126. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2127. "-- completion status (%x).\n", __func__,
  2128. vha->host_no, le16_to_cpu(sts->comp_status)));
  2129. rval = QLA_FUNCTION_FAILED;
  2130. } else if (!(le16_to_cpu(sts->scsi_status) &
  2131. SS_RESPONSE_INFO_LEN_VALID)) {
  2132. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2133. "-- no response info (%x).\n", __func__, vha->host_no,
  2134. le16_to_cpu(sts->scsi_status)));
  2135. rval = QLA_FUNCTION_FAILED;
  2136. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  2137. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2138. "-- not enough response info (%d).\n", __func__,
  2139. vha->host_no, le32_to_cpu(sts->rsp_data_len)));
  2140. rval = QLA_FUNCTION_FAILED;
  2141. } else if (sts->data[3]) {
  2142. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2143. "-- response (%x).\n", __func__,
  2144. vha->host_no, sts->data[3]));
  2145. rval = QLA_FUNCTION_FAILED;
  2146. }
  2147. /* Issue marker IOCB. */
  2148. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  2149. type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
  2150. if (rval2 != QLA_SUCCESS) {
  2151. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  2152. "(%x).\n", __func__, vha->host_no, rval2));
  2153. } else {
  2154. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2155. }
  2156. dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
  2157. return rval;
  2158. }
  2159. int
  2160. qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  2161. {
  2162. return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
  2163. }
  2164. int
  2165. qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  2166. {
  2167. return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
  2168. }
  2169. int
  2170. qla2x00_system_error(scsi_qla_host_t *vha)
  2171. {
  2172. int rval;
  2173. mbx_cmd_t mc;
  2174. mbx_cmd_t *mcp = &mc;
  2175. struct qla_hw_data *ha = vha->hw;
  2176. if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
  2177. return QLA_FUNCTION_FAILED;
  2178. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2179. mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
  2180. mcp->out_mb = MBX_0;
  2181. mcp->in_mb = MBX_0;
  2182. mcp->tov = 5;
  2183. mcp->flags = 0;
  2184. rval = qla2x00_mailbox_command(vha, mcp);
  2185. if (rval != QLA_SUCCESS) {
  2186. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2187. vha->host_no, rval));
  2188. } else {
  2189. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2190. }
  2191. return rval;
  2192. }
  2193. /**
  2194. * qla2x00_set_serdes_params() -
  2195. * @ha: HA context
  2196. *
  2197. * Returns
  2198. */
  2199. int
  2200. qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
  2201. uint16_t sw_em_2g, uint16_t sw_em_4g)
  2202. {
  2203. int rval;
  2204. mbx_cmd_t mc;
  2205. mbx_cmd_t *mcp = &mc;
  2206. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2207. mcp->mb[0] = MBC_SERDES_PARAMS;
  2208. mcp->mb[1] = BIT_0;
  2209. mcp->mb[2] = sw_em_1g | BIT_15;
  2210. mcp->mb[3] = sw_em_2g | BIT_15;
  2211. mcp->mb[4] = sw_em_4g | BIT_15;
  2212. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2213. mcp->in_mb = MBX_0;
  2214. mcp->tov = MBX_TOV_SECONDS;
  2215. mcp->flags = 0;
  2216. rval = qla2x00_mailbox_command(vha, mcp);
  2217. if (rval != QLA_SUCCESS) {
  2218. /*EMPTY*/
  2219. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2220. vha->host_no, rval, mcp->mb[0]));
  2221. } else {
  2222. /*EMPTY*/
  2223. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2224. }
  2225. return rval;
  2226. }
  2227. int
  2228. qla2x00_stop_firmware(scsi_qla_host_t *vha)
  2229. {
  2230. int rval;
  2231. mbx_cmd_t mc;
  2232. mbx_cmd_t *mcp = &mc;
  2233. if (!IS_FWI2_CAPABLE(vha->hw))
  2234. return QLA_FUNCTION_FAILED;
  2235. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2236. mcp->mb[0] = MBC_STOP_FIRMWARE;
  2237. mcp->out_mb = MBX_0;
  2238. mcp->in_mb = MBX_0;
  2239. mcp->tov = 5;
  2240. mcp->flags = 0;
  2241. rval = qla2x00_mailbox_command(vha, mcp);
  2242. if (rval != QLA_SUCCESS) {
  2243. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2244. vha->host_no, rval));
  2245. if (mcp->mb[0] == MBS_INVALID_COMMAND)
  2246. rval = QLA_INVALID_COMMAND;
  2247. } else {
  2248. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2249. }
  2250. return rval;
  2251. }
  2252. int
  2253. qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
  2254. uint16_t buffers)
  2255. {
  2256. int rval;
  2257. mbx_cmd_t mc;
  2258. mbx_cmd_t *mcp = &mc;
  2259. if (!IS_FWI2_CAPABLE(vha->hw))
  2260. return QLA_FUNCTION_FAILED;
  2261. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2262. return QLA_FUNCTION_FAILED;
  2263. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2264. mcp->mb[0] = MBC_TRACE_CONTROL;
  2265. mcp->mb[1] = TC_EFT_ENABLE;
  2266. mcp->mb[2] = LSW(eft_dma);
  2267. mcp->mb[3] = MSW(eft_dma);
  2268. mcp->mb[4] = LSW(MSD(eft_dma));
  2269. mcp->mb[5] = MSW(MSD(eft_dma));
  2270. mcp->mb[6] = buffers;
  2271. mcp->mb[7] = TC_AEN_DISABLE;
  2272. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2273. mcp->in_mb = MBX_1|MBX_0;
  2274. mcp->tov = MBX_TOV_SECONDS;
  2275. mcp->flags = 0;
  2276. rval = qla2x00_mailbox_command(vha, mcp);
  2277. if (rval != QLA_SUCCESS) {
  2278. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2279. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2280. } else {
  2281. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2282. }
  2283. return rval;
  2284. }
  2285. int
  2286. qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
  2287. {
  2288. int rval;
  2289. mbx_cmd_t mc;
  2290. mbx_cmd_t *mcp = &mc;
  2291. if (!IS_FWI2_CAPABLE(vha->hw))
  2292. return QLA_FUNCTION_FAILED;
  2293. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2294. return QLA_FUNCTION_FAILED;
  2295. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2296. mcp->mb[0] = MBC_TRACE_CONTROL;
  2297. mcp->mb[1] = TC_EFT_DISABLE;
  2298. mcp->out_mb = MBX_1|MBX_0;
  2299. mcp->in_mb = MBX_1|MBX_0;
  2300. mcp->tov = MBX_TOV_SECONDS;
  2301. mcp->flags = 0;
  2302. rval = qla2x00_mailbox_command(vha, mcp);
  2303. if (rval != QLA_SUCCESS) {
  2304. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2305. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2306. } else {
  2307. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2308. }
  2309. return rval;
  2310. }
  2311. int
  2312. qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
  2313. uint16_t buffers, uint16_t *mb, uint32_t *dwords)
  2314. {
  2315. int rval;
  2316. mbx_cmd_t mc;
  2317. mbx_cmd_t *mcp = &mc;
  2318. if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
  2319. return QLA_FUNCTION_FAILED;
  2320. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2321. return QLA_FUNCTION_FAILED;
  2322. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2323. mcp->mb[0] = MBC_TRACE_CONTROL;
  2324. mcp->mb[1] = TC_FCE_ENABLE;
  2325. mcp->mb[2] = LSW(fce_dma);
  2326. mcp->mb[3] = MSW(fce_dma);
  2327. mcp->mb[4] = LSW(MSD(fce_dma));
  2328. mcp->mb[5] = MSW(MSD(fce_dma));
  2329. mcp->mb[6] = buffers;
  2330. mcp->mb[7] = TC_AEN_DISABLE;
  2331. mcp->mb[8] = 0;
  2332. mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
  2333. mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
  2334. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2335. MBX_1|MBX_0;
  2336. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2337. mcp->tov = MBX_TOV_SECONDS;
  2338. mcp->flags = 0;
  2339. rval = qla2x00_mailbox_command(vha, mcp);
  2340. if (rval != QLA_SUCCESS) {
  2341. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2342. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2343. } else {
  2344. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2345. if (mb)
  2346. memcpy(mb, mcp->mb, 8 * sizeof(*mb));
  2347. if (dwords)
  2348. *dwords = buffers;
  2349. }
  2350. return rval;
  2351. }
  2352. int
  2353. qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
  2354. {
  2355. int rval;
  2356. mbx_cmd_t mc;
  2357. mbx_cmd_t *mcp = &mc;
  2358. if (!IS_FWI2_CAPABLE(vha->hw))
  2359. return QLA_FUNCTION_FAILED;
  2360. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2361. return QLA_FUNCTION_FAILED;
  2362. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2363. mcp->mb[0] = MBC_TRACE_CONTROL;
  2364. mcp->mb[1] = TC_FCE_DISABLE;
  2365. mcp->mb[2] = TC_FCE_DISABLE_TRACE;
  2366. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  2367. mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2368. MBX_1|MBX_0;
  2369. mcp->tov = MBX_TOV_SECONDS;
  2370. mcp->flags = 0;
  2371. rval = qla2x00_mailbox_command(vha, mcp);
  2372. if (rval != QLA_SUCCESS) {
  2373. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2374. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2375. } else {
  2376. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2377. if (wr)
  2378. *wr = (uint64_t) mcp->mb[5] << 48 |
  2379. (uint64_t) mcp->mb[4] << 32 |
  2380. (uint64_t) mcp->mb[3] << 16 |
  2381. (uint64_t) mcp->mb[2];
  2382. if (rd)
  2383. *rd = (uint64_t) mcp->mb[9] << 48 |
  2384. (uint64_t) mcp->mb[8] << 32 |
  2385. (uint64_t) mcp->mb[7] << 16 |
  2386. (uint64_t) mcp->mb[6];
  2387. }
  2388. return rval;
  2389. }
  2390. int
  2391. qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint16_t addr,
  2392. uint16_t off, uint16_t count)
  2393. {
  2394. int rval;
  2395. mbx_cmd_t mc;
  2396. mbx_cmd_t *mcp = &mc;
  2397. if (!IS_FWI2_CAPABLE(vha->hw))
  2398. return QLA_FUNCTION_FAILED;
  2399. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2400. mcp->mb[0] = MBC_READ_SFP;
  2401. mcp->mb[1] = addr;
  2402. mcp->mb[2] = MSW(sfp_dma);
  2403. mcp->mb[3] = LSW(sfp_dma);
  2404. mcp->mb[6] = MSW(MSD(sfp_dma));
  2405. mcp->mb[7] = LSW(MSD(sfp_dma));
  2406. mcp->mb[8] = count;
  2407. mcp->mb[9] = off;
  2408. mcp->mb[10] = 0;
  2409. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  2410. mcp->in_mb = MBX_0;
  2411. mcp->tov = MBX_TOV_SECONDS;
  2412. mcp->flags = 0;
  2413. rval = qla2x00_mailbox_command(vha, mcp);
  2414. if (rval != QLA_SUCCESS) {
  2415. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2416. vha->host_no, rval, mcp->mb[0]));
  2417. } else {
  2418. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2419. }
  2420. return rval;
  2421. }
  2422. int
  2423. qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2424. uint16_t port_speed, uint16_t *mb)
  2425. {
  2426. int rval;
  2427. mbx_cmd_t mc;
  2428. mbx_cmd_t *mcp = &mc;
  2429. if (!IS_IIDMA_CAPABLE(vha->hw))
  2430. return QLA_FUNCTION_FAILED;
  2431. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2432. mcp->mb[0] = MBC_PORT_PARAMS;
  2433. mcp->mb[1] = loop_id;
  2434. mcp->mb[2] = BIT_0;
  2435. if (IS_QLA81XX(vha->hw))
  2436. mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
  2437. else
  2438. mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
  2439. mcp->mb[9] = vha->vp_idx;
  2440. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2441. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2442. mcp->tov = MBX_TOV_SECONDS;
  2443. mcp->flags = 0;
  2444. rval = qla2x00_mailbox_command(vha, mcp);
  2445. /* Return mailbox statuses. */
  2446. if (mb != NULL) {
  2447. mb[0] = mcp->mb[0];
  2448. mb[1] = mcp->mb[1];
  2449. mb[3] = mcp->mb[3];
  2450. }
  2451. if (rval != QLA_SUCCESS) {
  2452. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2453. vha->host_no, rval));
  2454. } else {
  2455. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2456. }
  2457. return rval;
  2458. }
  2459. void
  2460. qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
  2461. struct vp_rpt_id_entry_24xx *rptid_entry)
  2462. {
  2463. uint8_t vp_idx;
  2464. uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
  2465. struct qla_hw_data *ha = vha->hw;
  2466. scsi_qla_host_t *vp;
  2467. scsi_qla_host_t *tvp;
  2468. if (rptid_entry->entry_status != 0)
  2469. return;
  2470. if (rptid_entry->format == 0) {
  2471. DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d,"
  2472. " number of VPs acquired %d\n", __func__, vha->host_no,
  2473. MSB(le16_to_cpu(rptid_entry->vp_count)),
  2474. LSB(le16_to_cpu(rptid_entry->vp_count))));
  2475. DEBUG15(printk("%s primary port id %02x%02x%02x\n", __func__,
  2476. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2477. rptid_entry->port_id[0]));
  2478. } else if (rptid_entry->format == 1) {
  2479. vp_idx = LSB(stat);
  2480. DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled "
  2481. "- status %d - "
  2482. "with port id %02x%02x%02x\n", __func__, vha->host_no,
  2483. vp_idx, MSB(stat),
  2484. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2485. rptid_entry->port_id[0]));
  2486. vp = vha;
  2487. if (vp_idx == 0 && (MSB(stat) != 1))
  2488. goto reg_needed;
  2489. if (MSB(stat) == 1) {
  2490. DEBUG2(printk("scsi(%ld): Could not acquire ID for "
  2491. "VP[%d].\n", vha->host_no, vp_idx));
  2492. return;
  2493. }
  2494. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2495. if (vp_idx == vp->vp_idx)
  2496. break;
  2497. if (!vp)
  2498. return;
  2499. vp->d_id.b.domain = rptid_entry->port_id[2];
  2500. vp->d_id.b.area = rptid_entry->port_id[1];
  2501. vp->d_id.b.al_pa = rptid_entry->port_id[0];
  2502. /*
  2503. * Cannot configure here as we are still sitting on the
  2504. * response queue. Handle it in dpc context.
  2505. */
  2506. set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
  2507. reg_needed:
  2508. set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
  2509. set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
  2510. set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
  2511. qla2xxx_wake_dpc(vha);
  2512. }
  2513. }
  2514. /*
  2515. * qla24xx_modify_vp_config
  2516. * Change VP configuration for vha
  2517. *
  2518. * Input:
  2519. * vha = adapter block pointer.
  2520. *
  2521. * Returns:
  2522. * qla2xxx local function return status code.
  2523. *
  2524. * Context:
  2525. * Kernel context.
  2526. */
  2527. int
  2528. qla24xx_modify_vp_config(scsi_qla_host_t *vha)
  2529. {
  2530. int rval;
  2531. struct vp_config_entry_24xx *vpmod;
  2532. dma_addr_t vpmod_dma;
  2533. struct qla_hw_data *ha = vha->hw;
  2534. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2535. /* This can be called by the parent */
  2536. vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
  2537. if (!vpmod) {
  2538. DEBUG2_3(printk("%s(%ld): failed to allocate Modify VP "
  2539. "IOCB.\n", __func__, vha->host_no));
  2540. return QLA_MEMORY_ALLOC_FAILED;
  2541. }
  2542. memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
  2543. vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
  2544. vpmod->entry_count = 1;
  2545. vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
  2546. vpmod->vp_count = 1;
  2547. vpmod->vp_index1 = vha->vp_idx;
  2548. vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
  2549. memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
  2550. memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
  2551. vpmod->entry_count = 1;
  2552. rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
  2553. if (rval != QLA_SUCCESS) {
  2554. DEBUG2_3_11(printk("%s(%ld): failed to issue VP config IOCB"
  2555. "(%x).\n", __func__, base_vha->host_no, rval));
  2556. } else if (vpmod->comp_status != 0) {
  2557. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2558. "-- error status (%x).\n", __func__, base_vha->host_no,
  2559. vpmod->comp_status));
  2560. rval = QLA_FUNCTION_FAILED;
  2561. } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2562. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2563. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2564. le16_to_cpu(vpmod->comp_status)));
  2565. rval = QLA_FUNCTION_FAILED;
  2566. } else {
  2567. /* EMPTY */
  2568. DEBUG11(printk("%s(%ld): done.\n", __func__,
  2569. base_vha->host_no));
  2570. fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
  2571. }
  2572. dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
  2573. return rval;
  2574. }
  2575. /*
  2576. * qla24xx_control_vp
  2577. * Enable a virtual port for given host
  2578. *
  2579. * Input:
  2580. * ha = adapter block pointer.
  2581. * vhba = virtual adapter (unused)
  2582. * index = index number for enabled VP
  2583. *
  2584. * Returns:
  2585. * qla2xxx local function return status code.
  2586. *
  2587. * Context:
  2588. * Kernel context.
  2589. */
  2590. int
  2591. qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
  2592. {
  2593. int rval;
  2594. int map, pos;
  2595. struct vp_ctrl_entry_24xx *vce;
  2596. dma_addr_t vce_dma;
  2597. struct qla_hw_data *ha = vha->hw;
  2598. int vp_index = vha->vp_idx;
  2599. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2600. DEBUG11(printk("%s(%ld): entered. Enabling index %d\n", __func__,
  2601. vha->host_no, vp_index));
  2602. if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
  2603. return QLA_PARAMETER_ERROR;
  2604. vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
  2605. if (!vce) {
  2606. DEBUG2_3(printk("%s(%ld): "
  2607. "failed to allocate VP Control IOCB.\n", __func__,
  2608. base_vha->host_no));
  2609. return QLA_MEMORY_ALLOC_FAILED;
  2610. }
  2611. memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
  2612. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2613. vce->entry_count = 1;
  2614. vce->command = cpu_to_le16(cmd);
  2615. vce->vp_count = __constant_cpu_to_le16(1);
  2616. /* index map in firmware starts with 1; decrement index
  2617. * this is ok as we never use index 0
  2618. */
  2619. map = (vp_index - 1) / 8;
  2620. pos = (vp_index - 1) & 7;
  2621. mutex_lock(&ha->vport_lock);
  2622. vce->vp_idx_map[map] |= 1 << pos;
  2623. mutex_unlock(&ha->vport_lock);
  2624. rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
  2625. if (rval != QLA_SUCCESS) {
  2626. DEBUG2_3_11(printk("%s(%ld): failed to issue VP control IOCB"
  2627. "(%x).\n", __func__, base_vha->host_no, rval));
  2628. printk("%s(%ld): failed to issue VP control IOCB"
  2629. "(%x).\n", __func__, base_vha->host_no, rval);
  2630. } else if (vce->entry_status != 0) {
  2631. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2632. "-- error status (%x).\n", __func__, base_vha->host_no,
  2633. vce->entry_status));
  2634. printk("%s(%ld): failed to complete IOCB "
  2635. "-- error status (%x).\n", __func__, base_vha->host_no,
  2636. vce->entry_status);
  2637. rval = QLA_FUNCTION_FAILED;
  2638. } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2639. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2640. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2641. le16_to_cpu(vce->comp_status)));
  2642. printk("%s(%ld): failed to complete IOCB "
  2643. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2644. le16_to_cpu(vce->comp_status));
  2645. rval = QLA_FUNCTION_FAILED;
  2646. } else {
  2647. DEBUG2(printk("%s(%ld): done.\n", __func__, base_vha->host_no));
  2648. }
  2649. dma_pool_free(ha->s_dma_pool, vce, vce_dma);
  2650. return rval;
  2651. }
  2652. /*
  2653. * qla2x00_send_change_request
  2654. * Receive or disable RSCN request from fabric controller
  2655. *
  2656. * Input:
  2657. * ha = adapter block pointer
  2658. * format = registration format:
  2659. * 0 - Reserved
  2660. * 1 - Fabric detected registration
  2661. * 2 - N_port detected registration
  2662. * 3 - Full registration
  2663. * FF - clear registration
  2664. * vp_idx = Virtual port index
  2665. *
  2666. * Returns:
  2667. * qla2x00 local function return status code.
  2668. *
  2669. * Context:
  2670. * Kernel Context
  2671. */
  2672. int
  2673. qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
  2674. uint16_t vp_idx)
  2675. {
  2676. int rval;
  2677. mbx_cmd_t mc;
  2678. mbx_cmd_t *mcp = &mc;
  2679. /*
  2680. * This command is implicitly executed by firmware during login for the
  2681. * physical hosts
  2682. */
  2683. if (vp_idx == 0)
  2684. return QLA_FUNCTION_FAILED;
  2685. mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
  2686. mcp->mb[1] = format;
  2687. mcp->mb[9] = vp_idx;
  2688. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  2689. mcp->in_mb = MBX_0|MBX_1;
  2690. mcp->tov = MBX_TOV_SECONDS;
  2691. mcp->flags = 0;
  2692. rval = qla2x00_mailbox_command(vha, mcp);
  2693. if (rval == QLA_SUCCESS) {
  2694. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2695. rval = BIT_1;
  2696. }
  2697. } else
  2698. rval = BIT_1;
  2699. return rval;
  2700. }
  2701. int
  2702. qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
  2703. uint32_t size)
  2704. {
  2705. int rval;
  2706. mbx_cmd_t mc;
  2707. mbx_cmd_t *mcp = &mc;
  2708. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2709. if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
  2710. mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
  2711. mcp->mb[8] = MSW(addr);
  2712. mcp->out_mb = MBX_8|MBX_0;
  2713. } else {
  2714. mcp->mb[0] = MBC_DUMP_RISC_RAM;
  2715. mcp->out_mb = MBX_0;
  2716. }
  2717. mcp->mb[1] = LSW(addr);
  2718. mcp->mb[2] = MSW(req_dma);
  2719. mcp->mb[3] = LSW(req_dma);
  2720. mcp->mb[6] = MSW(MSD(req_dma));
  2721. mcp->mb[7] = LSW(MSD(req_dma));
  2722. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  2723. if (IS_FWI2_CAPABLE(vha->hw)) {
  2724. mcp->mb[4] = MSW(size);
  2725. mcp->mb[5] = LSW(size);
  2726. mcp->out_mb |= MBX_5|MBX_4;
  2727. } else {
  2728. mcp->mb[4] = LSW(size);
  2729. mcp->out_mb |= MBX_4;
  2730. }
  2731. mcp->in_mb = MBX_0;
  2732. mcp->tov = MBX_TOV_SECONDS;
  2733. mcp->flags = 0;
  2734. rval = qla2x00_mailbox_command(vha, mcp);
  2735. if (rval != QLA_SUCCESS) {
  2736. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  2737. vha->host_no, rval, mcp->mb[0]));
  2738. } else {
  2739. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2740. }
  2741. return rval;
  2742. }
  2743. /* 84XX Support **************************************************************/
  2744. struct cs84xx_mgmt_cmd {
  2745. union {
  2746. struct verify_chip_entry_84xx req;
  2747. struct verify_chip_rsp_84xx rsp;
  2748. } p;
  2749. };
  2750. int
  2751. qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
  2752. {
  2753. int rval, retry;
  2754. struct cs84xx_mgmt_cmd *mn;
  2755. dma_addr_t mn_dma;
  2756. uint16_t options;
  2757. unsigned long flags;
  2758. struct qla_hw_data *ha = vha->hw;
  2759. DEBUG16(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2760. mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
  2761. if (mn == NULL) {
  2762. DEBUG2_3(printk("%s(%ld): failed to allocate Verify ISP84XX "
  2763. "IOCB.\n", __func__, vha->host_no));
  2764. return QLA_MEMORY_ALLOC_FAILED;
  2765. }
  2766. /* Force Update? */
  2767. options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
  2768. /* Diagnostic firmware? */
  2769. /* options |= MENLO_DIAG_FW; */
  2770. /* We update the firmware with only one data sequence. */
  2771. options |= VCO_END_OF_DATA;
  2772. do {
  2773. retry = 0;
  2774. memset(mn, 0, sizeof(*mn));
  2775. mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
  2776. mn->p.req.entry_count = 1;
  2777. mn->p.req.options = cpu_to_le16(options);
  2778. DEBUG16(printk("%s(%ld): Dump of Verify Request.\n", __func__,
  2779. vha->host_no));
  2780. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2781. sizeof(*mn)));
  2782. rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
  2783. if (rval != QLA_SUCCESS) {
  2784. DEBUG2_16(printk("%s(%ld): failed to issue Verify "
  2785. "IOCB (%x).\n", __func__, vha->host_no, rval));
  2786. goto verify_done;
  2787. }
  2788. DEBUG16(printk("%s(%ld): Dump of Verify Response.\n", __func__,
  2789. vha->host_no));
  2790. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2791. sizeof(*mn)));
  2792. status[0] = le16_to_cpu(mn->p.rsp.comp_status);
  2793. status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
  2794. le16_to_cpu(mn->p.rsp.failure_code) : 0;
  2795. DEBUG2_16(printk("%s(%ld): cs=%x fc=%x\n", __func__,
  2796. vha->host_no, status[0], status[1]));
  2797. if (status[0] != CS_COMPLETE) {
  2798. rval = QLA_FUNCTION_FAILED;
  2799. if (!(options & VCO_DONT_UPDATE_FW)) {
  2800. DEBUG2_16(printk("%s(%ld): Firmware update "
  2801. "failed. Retrying without update "
  2802. "firmware.\n", __func__, vha->host_no));
  2803. options |= VCO_DONT_UPDATE_FW;
  2804. options &= ~VCO_FORCE_UPDATE;
  2805. retry = 1;
  2806. }
  2807. } else {
  2808. DEBUG2_16(printk("%s(%ld): firmware updated to %x.\n",
  2809. __func__, vha->host_no,
  2810. le32_to_cpu(mn->p.rsp.fw_ver)));
  2811. /* NOTE: we only update OP firmware. */
  2812. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  2813. ha->cs84xx->op_fw_version =
  2814. le32_to_cpu(mn->p.rsp.fw_ver);
  2815. spin_unlock_irqrestore(&ha->cs84xx->access_lock,
  2816. flags);
  2817. }
  2818. } while (retry);
  2819. verify_done:
  2820. dma_pool_free(ha->s_dma_pool, mn, mn_dma);
  2821. if (rval != QLA_SUCCESS) {
  2822. DEBUG2_16(printk("%s(%ld): failed=%x.\n", __func__,
  2823. vha->host_no, rval));
  2824. } else {
  2825. DEBUG16(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2826. }
  2827. return rval;
  2828. }
  2829. int
  2830. qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
  2831. {
  2832. int rval;
  2833. unsigned long flags;
  2834. mbx_cmd_t mc;
  2835. mbx_cmd_t *mcp = &mc;
  2836. struct device_reg_25xxmq __iomem *reg;
  2837. struct qla_hw_data *ha = vha->hw;
  2838. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2839. mcp->mb[1] = req->options;
  2840. mcp->mb[2] = MSW(LSD(req->dma));
  2841. mcp->mb[3] = LSW(LSD(req->dma));
  2842. mcp->mb[6] = MSW(MSD(req->dma));
  2843. mcp->mb[7] = LSW(MSD(req->dma));
  2844. mcp->mb[5] = req->length;
  2845. if (req->rsp)
  2846. mcp->mb[10] = req->rsp->id;
  2847. mcp->mb[12] = req->qos;
  2848. mcp->mb[11] = req->vp_idx;
  2849. mcp->mb[13] = req->rid;
  2850. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2851. QLA_QUE_PAGE * req->id);
  2852. mcp->mb[4] = req->id;
  2853. /* que in ptr index */
  2854. mcp->mb[8] = 0;
  2855. /* que out ptr index */
  2856. mcp->mb[9] = 0;
  2857. mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
  2858. MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2859. mcp->in_mb = MBX_0;
  2860. mcp->flags = MBX_DMA_OUT;
  2861. mcp->tov = 60;
  2862. spin_lock_irqsave(&ha->hardware_lock, flags);
  2863. if (!(req->options & BIT_0)) {
  2864. WRT_REG_DWORD(&reg->req_q_in, 0);
  2865. WRT_REG_DWORD(&reg->req_q_out, 0);
  2866. }
  2867. req->req_q_in = &reg->req_q_in;
  2868. req->req_q_out = &reg->req_q_out;
  2869. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2870. rval = qla2x00_mailbox_command(vha, mcp);
  2871. if (rval != QLA_SUCCESS)
  2872. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x mb0=%x.\n",
  2873. __func__, vha->host_no, rval, mcp->mb[0]));
  2874. return rval;
  2875. }
  2876. int
  2877. qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
  2878. {
  2879. int rval;
  2880. unsigned long flags;
  2881. mbx_cmd_t mc;
  2882. mbx_cmd_t *mcp = &mc;
  2883. struct device_reg_25xxmq __iomem *reg;
  2884. struct qla_hw_data *ha = vha->hw;
  2885. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2886. mcp->mb[1] = rsp->options;
  2887. mcp->mb[2] = MSW(LSD(rsp->dma));
  2888. mcp->mb[3] = LSW(LSD(rsp->dma));
  2889. mcp->mb[6] = MSW(MSD(rsp->dma));
  2890. mcp->mb[7] = LSW(MSD(rsp->dma));
  2891. mcp->mb[5] = rsp->length;
  2892. mcp->mb[14] = rsp->msix->entry;
  2893. mcp->mb[13] = rsp->rid;
  2894. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2895. QLA_QUE_PAGE * rsp->id);
  2896. mcp->mb[4] = rsp->id;
  2897. /* que in ptr index */
  2898. mcp->mb[8] = 0;
  2899. /* que out ptr index */
  2900. mcp->mb[9] = 0;
  2901. mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
  2902. |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2903. mcp->in_mb = MBX_0;
  2904. mcp->flags = MBX_DMA_OUT;
  2905. mcp->tov = 60;
  2906. spin_lock_irqsave(&ha->hardware_lock, flags);
  2907. if (!(rsp->options & BIT_0)) {
  2908. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  2909. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  2910. }
  2911. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2912. rval = qla2x00_mailbox_command(vha, mcp);
  2913. if (rval != QLA_SUCCESS)
  2914. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x "
  2915. "mb0=%x.\n", __func__,
  2916. vha->host_no, rval, mcp->mb[0]));
  2917. return rval;
  2918. }
  2919. int
  2920. qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
  2921. {
  2922. int rval;
  2923. mbx_cmd_t mc;
  2924. mbx_cmd_t *mcp = &mc;
  2925. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2926. mcp->mb[0] = MBC_IDC_ACK;
  2927. memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2928. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2929. mcp->in_mb = MBX_0;
  2930. mcp->tov = MBX_TOV_SECONDS;
  2931. mcp->flags = 0;
  2932. rval = qla2x00_mailbox_command(vha, mcp);
  2933. if (rval != QLA_SUCCESS) {
  2934. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2935. vha->host_no, rval, mcp->mb[0]));
  2936. } else {
  2937. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2938. }
  2939. return rval;
  2940. }
  2941. int
  2942. qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
  2943. {
  2944. int rval;
  2945. mbx_cmd_t mc;
  2946. mbx_cmd_t *mcp = &mc;
  2947. if (!IS_QLA81XX(vha->hw))
  2948. return QLA_FUNCTION_FAILED;
  2949. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2950. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2951. mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
  2952. mcp->out_mb = MBX_1|MBX_0;
  2953. mcp->in_mb = MBX_1|MBX_0;
  2954. mcp->tov = MBX_TOV_SECONDS;
  2955. mcp->flags = 0;
  2956. rval = qla2x00_mailbox_command(vha, mcp);
  2957. if (rval != QLA_SUCCESS) {
  2958. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2959. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2960. } else {
  2961. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2962. *sector_size = mcp->mb[1];
  2963. }
  2964. return rval;
  2965. }
  2966. int
  2967. qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
  2968. {
  2969. int rval;
  2970. mbx_cmd_t mc;
  2971. mbx_cmd_t *mcp = &mc;
  2972. if (!IS_QLA81XX(vha->hw))
  2973. return QLA_FUNCTION_FAILED;
  2974. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2975. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2976. mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
  2977. FAC_OPT_CMD_WRITE_PROTECT;
  2978. mcp->out_mb = MBX_1|MBX_0;
  2979. mcp->in_mb = MBX_1|MBX_0;
  2980. mcp->tov = MBX_TOV_SECONDS;
  2981. mcp->flags = 0;
  2982. rval = qla2x00_mailbox_command(vha, mcp);
  2983. if (rval != QLA_SUCCESS) {
  2984. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2985. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2986. } else {
  2987. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2988. }
  2989. return rval;
  2990. }
  2991. int
  2992. qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
  2993. {
  2994. int rval;
  2995. mbx_cmd_t mc;
  2996. mbx_cmd_t *mcp = &mc;
  2997. if (!IS_QLA81XX(vha->hw))
  2998. return QLA_FUNCTION_FAILED;
  2999. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3000. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3001. mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
  3002. mcp->mb[2] = LSW(start);
  3003. mcp->mb[3] = MSW(start);
  3004. mcp->mb[4] = LSW(finish);
  3005. mcp->mb[5] = MSW(finish);
  3006. mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3007. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3008. mcp->tov = MBX_TOV_SECONDS;
  3009. mcp->flags = 0;
  3010. rval = qla2x00_mailbox_command(vha, mcp);
  3011. if (rval != QLA_SUCCESS) {
  3012. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  3013. "mb[2]=%x.\n", __func__, vha->host_no, rval, mcp->mb[0],
  3014. mcp->mb[1], mcp->mb[2]));
  3015. } else {
  3016. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3017. }
  3018. return rval;
  3019. }
  3020. int
  3021. qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
  3022. {
  3023. int rval = 0;
  3024. mbx_cmd_t mc;
  3025. mbx_cmd_t *mcp = &mc;
  3026. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3027. mcp->mb[0] = MBC_RESTART_MPI_FW;
  3028. mcp->out_mb = MBX_0;
  3029. mcp->in_mb = MBX_0|MBX_1;
  3030. mcp->tov = MBX_TOV_SECONDS;
  3031. mcp->flags = 0;
  3032. rval = qla2x00_mailbox_command(vha, mcp);
  3033. if (rval != QLA_SUCCESS) {
  3034. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3035. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3036. } else {
  3037. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3038. }
  3039. return rval;
  3040. }
  3041. int
  3042. qla2x00_read_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3043. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3044. {
  3045. int rval;
  3046. mbx_cmd_t mc;
  3047. mbx_cmd_t *mcp = &mc;
  3048. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3049. mcp->mb[0] = MBC_READ_SFP;
  3050. mcp->mb[1] = dev;
  3051. mcp->mb[2] = MSW(sfp_dma);
  3052. mcp->mb[3] = LSW(sfp_dma);
  3053. mcp->mb[6] = MSW(MSD(sfp_dma));
  3054. mcp->mb[7] = LSW(MSD(sfp_dma));
  3055. mcp->mb[8] = len;
  3056. mcp->mb[9] = adr;
  3057. mcp->mb[10] = opt;
  3058. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3059. mcp->in_mb = MBX_0;
  3060. mcp->tov = MBX_TOV_SECONDS;
  3061. mcp->flags = 0;
  3062. rval = qla2x00_mailbox_command(vha, mcp);
  3063. if (opt & BIT_0)
  3064. if (sfp)
  3065. *sfp = mcp->mb[8];
  3066. if (rval != QLA_SUCCESS) {
  3067. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3068. vha->host_no, rval, mcp->mb[0]));
  3069. } else {
  3070. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3071. }
  3072. return rval;
  3073. }
  3074. int
  3075. qla2x00_write_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3076. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3077. {
  3078. int rval;
  3079. mbx_cmd_t mc;
  3080. mbx_cmd_t *mcp = &mc;
  3081. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3082. if (opt & BIT_0)
  3083. if (sfp)
  3084. len = *sfp;
  3085. mcp->mb[0] = MBC_WRITE_SFP;
  3086. mcp->mb[1] = dev;
  3087. mcp->mb[2] = MSW(sfp_dma);
  3088. mcp->mb[3] = LSW(sfp_dma);
  3089. mcp->mb[6] = MSW(MSD(sfp_dma));
  3090. mcp->mb[7] = LSW(MSD(sfp_dma));
  3091. mcp->mb[8] = len;
  3092. mcp->mb[9] = adr;
  3093. mcp->mb[10] = opt;
  3094. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3095. mcp->in_mb = MBX_0;
  3096. mcp->tov = MBX_TOV_SECONDS;
  3097. mcp->flags = 0;
  3098. rval = qla2x00_mailbox_command(vha, mcp);
  3099. if (rval != QLA_SUCCESS) {
  3100. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3101. vha->host_no, rval, mcp->mb[0]));
  3102. } else {
  3103. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3104. }
  3105. return rval;
  3106. }
  3107. int
  3108. qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
  3109. uint16_t size_in_bytes, uint16_t *actual_size)
  3110. {
  3111. int rval;
  3112. mbx_cmd_t mc;
  3113. mbx_cmd_t *mcp = &mc;
  3114. if (!IS_QLA81XX(vha->hw))
  3115. return QLA_FUNCTION_FAILED;
  3116. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3117. mcp->mb[0] = MBC_GET_XGMAC_STATS;
  3118. mcp->mb[2] = MSW(stats_dma);
  3119. mcp->mb[3] = LSW(stats_dma);
  3120. mcp->mb[6] = MSW(MSD(stats_dma));
  3121. mcp->mb[7] = LSW(MSD(stats_dma));
  3122. mcp->mb[8] = size_in_bytes >> 2;
  3123. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  3124. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3125. mcp->tov = MBX_TOV_SECONDS;
  3126. mcp->flags = 0;
  3127. rval = qla2x00_mailbox_command(vha, mcp);
  3128. if (rval != QLA_SUCCESS) {
  3129. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3130. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3131. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3132. } else {
  3133. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3134. *actual_size = mcp->mb[2] << 2;
  3135. }
  3136. return rval;
  3137. }
  3138. int
  3139. qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
  3140. uint16_t size)
  3141. {
  3142. int rval;
  3143. mbx_cmd_t mc;
  3144. mbx_cmd_t *mcp = &mc;
  3145. if (!IS_QLA81XX(vha->hw))
  3146. return QLA_FUNCTION_FAILED;
  3147. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3148. mcp->mb[0] = MBC_GET_DCBX_PARAMS;
  3149. mcp->mb[1] = 0;
  3150. mcp->mb[2] = MSW(tlv_dma);
  3151. mcp->mb[3] = LSW(tlv_dma);
  3152. mcp->mb[6] = MSW(MSD(tlv_dma));
  3153. mcp->mb[7] = LSW(MSD(tlv_dma));
  3154. mcp->mb[8] = size;
  3155. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3156. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3157. mcp->tov = MBX_TOV_SECONDS;
  3158. mcp->flags = 0;
  3159. rval = qla2x00_mailbox_command(vha, mcp);
  3160. if (rval != QLA_SUCCESS) {
  3161. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3162. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3163. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3164. } else {
  3165. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3166. }
  3167. return rval;
  3168. }
  3169. int
  3170. qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
  3171. {
  3172. int rval;
  3173. mbx_cmd_t mc;
  3174. mbx_cmd_t *mcp = &mc;
  3175. if (!IS_FWI2_CAPABLE(vha->hw))
  3176. return QLA_FUNCTION_FAILED;
  3177. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3178. mcp->mb[0] = MBC_READ_RAM_EXTENDED;
  3179. mcp->mb[1] = LSW(risc_addr);
  3180. mcp->mb[8] = MSW(risc_addr);
  3181. mcp->out_mb = MBX_8|MBX_1|MBX_0;
  3182. mcp->in_mb = MBX_3|MBX_2|MBX_0;
  3183. mcp->tov = 30;
  3184. mcp->flags = 0;
  3185. rval = qla2x00_mailbox_command(vha, mcp);
  3186. if (rval != QLA_SUCCESS) {
  3187. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3188. vha->host_no, rval, mcp->mb[0]));
  3189. } else {
  3190. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3191. *data = mcp->mb[3] << 16 | mcp->mb[2];
  3192. }
  3193. return rval;
  3194. }
  3195. int
  3196. qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
  3197. {
  3198. int rval;
  3199. mbx_cmd_t mc;
  3200. mbx_cmd_t *mcp = &mc;
  3201. uint32_t iter_cnt = 0x1;
  3202. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3203. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3204. mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
  3205. mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
  3206. /* transfer count */
  3207. mcp->mb[10] = LSW(mreq->transfer_size);
  3208. mcp->mb[11] = MSW(mreq->transfer_size);
  3209. /* send data address */
  3210. mcp->mb[14] = LSW(mreq->send_dma);
  3211. mcp->mb[15] = MSW(mreq->send_dma);
  3212. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3213. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3214. /* recieve data address */
  3215. mcp->mb[16] = LSW(mreq->rcv_dma);
  3216. mcp->mb[17] = MSW(mreq->rcv_dma);
  3217. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3218. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3219. /* Iteration count */
  3220. mcp->mb[18] = LSW(iter_cnt);
  3221. mcp->mb[19] = MSW(iter_cnt);
  3222. mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
  3223. MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3224. if (IS_QLA81XX(vha->hw))
  3225. mcp->out_mb |= MBX_2;
  3226. mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
  3227. mcp->buf_size = mreq->transfer_size;
  3228. mcp->tov = MBX_TOV_SECONDS;
  3229. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3230. rval = qla2x00_mailbox_command(vha, mcp);
  3231. if (rval != QLA_SUCCESS) {
  3232. DEBUG2(printk(KERN_WARNING
  3233. "(%ld): failed=%x mb[0]=0x%x "
  3234. "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x mb[19]=0x%x. \n", vha->host_no, rval,
  3235. mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[18], mcp->mb[19]));
  3236. } else {
  3237. DEBUG2(printk(KERN_WARNING
  3238. "scsi(%ld): done.\n", vha->host_no));
  3239. }
  3240. /* Copy mailbox information */
  3241. memcpy( mresp, mcp->mb, 64);
  3242. mresp[3] = mcp->mb[18];
  3243. mresp[4] = mcp->mb[19];
  3244. return rval;
  3245. }
  3246. int
  3247. qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
  3248. {
  3249. int rval;
  3250. mbx_cmd_t mc;
  3251. mbx_cmd_t *mcp = &mc;
  3252. struct qla_hw_data *ha = vha->hw;
  3253. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3254. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3255. mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
  3256. mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
  3257. if (IS_QLA81XX(ha))
  3258. mcp->mb[1] |= BIT_15;
  3259. mcp->mb[2] = IS_QLA81XX(ha) ? vha->fcoe_fcf_idx : 0;
  3260. mcp->mb[16] = LSW(mreq->rcv_dma);
  3261. mcp->mb[17] = MSW(mreq->rcv_dma);
  3262. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3263. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3264. mcp->mb[10] = LSW(mreq->transfer_size);
  3265. mcp->mb[14] = LSW(mreq->send_dma);
  3266. mcp->mb[15] = MSW(mreq->send_dma);
  3267. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3268. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3269. mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
  3270. MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3271. if (IS_QLA81XX(ha))
  3272. mcp->out_mb |= MBX_2;
  3273. mcp->in_mb = MBX_0;
  3274. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
  3275. mcp->in_mb |= MBX_1;
  3276. if (IS_QLA81XX(ha))
  3277. mcp->in_mb |= MBX_3;
  3278. mcp->tov = MBX_TOV_SECONDS;
  3279. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3280. mcp->buf_size = mreq->transfer_size;
  3281. rval = qla2x00_mailbox_command(vha, mcp);
  3282. if (rval != QLA_SUCCESS) {
  3283. DEBUG2(printk(KERN_WARNING
  3284. "(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3285. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3286. } else {
  3287. DEBUG2(printk(KERN_WARNING
  3288. "scsi(%ld): done.\n", vha->host_no));
  3289. }
  3290. /* Copy mailbox information */
  3291. memcpy( mresp, mcp->mb, 32);
  3292. return rval;
  3293. }
  3294. int
  3295. qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic,
  3296. uint16_t *cmd_status)
  3297. {
  3298. int rval;
  3299. mbx_cmd_t mc;
  3300. mbx_cmd_t *mcp = &mc;
  3301. DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
  3302. ha->host_no, enable_diagnostic));
  3303. mcp->mb[0] = MBC_ISP84XX_RESET;
  3304. mcp->mb[1] = enable_diagnostic;
  3305. mcp->out_mb = MBX_1|MBX_0;
  3306. mcp->in_mb = MBX_1|MBX_0;
  3307. mcp->tov = MBX_TOV_SECONDS;
  3308. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3309. rval = qla2x00_mailbox_command(ha, mcp);
  3310. /* Return mailbox statuses. */
  3311. *cmd_status = mcp->mb[0];
  3312. if (rval != QLA_SUCCESS)
  3313. DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
  3314. rval));
  3315. else
  3316. DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
  3317. return rval;
  3318. }
  3319. int
  3320. qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
  3321. {
  3322. int rval;
  3323. mbx_cmd_t mc;
  3324. mbx_cmd_t *mcp = &mc;
  3325. if (!IS_FWI2_CAPABLE(vha->hw))
  3326. return QLA_FUNCTION_FAILED;
  3327. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3328. mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
  3329. mcp->mb[1] = LSW(risc_addr);
  3330. mcp->mb[2] = LSW(data);
  3331. mcp->mb[3] = MSW(data);
  3332. mcp->mb[8] = MSW(risc_addr);
  3333. mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
  3334. mcp->in_mb = MBX_0;
  3335. mcp->tov = 30;
  3336. mcp->flags = 0;
  3337. rval = qla2x00_mailbox_command(vha, mcp);
  3338. if (rval != QLA_SUCCESS) {
  3339. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3340. vha->host_no, rval, mcp->mb[0]));
  3341. } else {
  3342. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3343. }
  3344. return rval;
  3345. }
  3346. int
  3347. qla2x00_get_data_rate(scsi_qla_host_t *vha)
  3348. {
  3349. int rval;
  3350. mbx_cmd_t mc;
  3351. mbx_cmd_t *mcp = &mc;
  3352. struct qla_hw_data *ha = vha->hw;
  3353. if (!IS_FWI2_CAPABLE(ha))
  3354. return QLA_FUNCTION_FAILED;
  3355. DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
  3356. mcp->mb[0] = MBC_DATA_RATE;
  3357. mcp->mb[1] = 0;
  3358. mcp->out_mb = MBX_1|MBX_0;
  3359. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3360. mcp->tov = MBX_TOV_SECONDS;
  3361. mcp->flags = 0;
  3362. rval = qla2x00_mailbox_command(vha, mcp);
  3363. if (rval != QLA_SUCCESS) {
  3364. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3365. __func__, vha->host_no, rval, mcp->mb[0]));
  3366. } else {
  3367. DEBUG11(printk(KERN_INFO
  3368. "%s(%ld): done.\n", __func__, vha->host_no));
  3369. if (mcp->mb[1] != 0x7)
  3370. ha->link_data_rate = mcp->mb[1];
  3371. }
  3372. return rval;
  3373. }