qla_init.c 120 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575
  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  50. {
  51. int rval;
  52. struct qla_hw_data *ha = vha->hw;
  53. struct req_que *req = ha->req_q_map[0];
  54. /* Clear adapter flags. */
  55. vha->flags.online = 0;
  56. ha->flags.chip_reset_done = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->isp_abort_cnt = 0;
  65. ha->beacon_blink_led = 0;
  66. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  67. set_bit(0, ha->req_qid_map);
  68. set_bit(0, ha->rsp_qid_map);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops->pci_config(vha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  73. vha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops->reset_chip(vha);
  77. rval = qla2xxx_get_flash_info(vha);
  78. if (rval) {
  79. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  80. vha->host_no));
  81. return (rval);
  82. }
  83. ha->isp_ops->get_flash_version(vha, req->ring);
  84. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  85. ha->isp_ops->nvram_config(vha);
  86. if (ha->flags.disable_serdes) {
  87. /* Mask HBA via NVRAM settings? */
  88. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  89. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  90. vha->port_name[0], vha->port_name[1],
  91. vha->port_name[2], vha->port_name[3],
  92. vha->port_name[4], vha->port_name[5],
  93. vha->port_name[6], vha->port_name[7]);
  94. return QLA_FUNCTION_FAILED;
  95. }
  96. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  97. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  98. rval = ha->isp_ops->chip_diag(vha);
  99. if (rval)
  100. return (rval);
  101. rval = qla2x00_setup_chip(vha);
  102. if (rval)
  103. return (rval);
  104. }
  105. if (IS_QLA84XX(ha)) {
  106. ha->cs84xx = qla84xx_get_chip(vha);
  107. if (!ha->cs84xx) {
  108. qla_printk(KERN_ERR, ha,
  109. "Unable to configure ISP84XX.\n");
  110. return QLA_FUNCTION_FAILED;
  111. }
  112. }
  113. rval = qla2x00_init_rings(vha);
  114. ha->flags.chip_reset_done = 1;
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. unsigned long flags = 0;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. /* Wait for soft-reset to complete. */
  447. d2 = RD_REG_DWORD(&reg->ctrl_status);
  448. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  449. udelay(5);
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. barrier();
  452. }
  453. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  454. RD_REG_DWORD(&reg->hccr);
  455. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  456. RD_REG_DWORD(&reg->hccr);
  457. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  458. RD_REG_DWORD(&reg->hccr);
  459. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  460. for (cnt = 6000000 ; cnt && d2; cnt--) {
  461. udelay(5);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. barrier();
  464. }
  465. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  466. if (IS_NOPOLLING_TYPE(ha))
  467. ha->isp_ops->enable_intrs(ha);
  468. }
  469. /**
  470. * qla24xx_reset_chip() - Reset ISP24xx chip.
  471. * @ha: HA context
  472. *
  473. * Returns 0 on success.
  474. */
  475. void
  476. qla24xx_reset_chip(scsi_qla_host_t *vha)
  477. {
  478. struct qla_hw_data *ha = vha->hw;
  479. ha->isp_ops->disable_intrs(ha);
  480. /* Perform RISC reset. */
  481. qla24xx_reset_risc(vha);
  482. }
  483. /**
  484. * qla2x00_chip_diag() - Test chip for proper operation.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. int
  490. qla2x00_chip_diag(scsi_qla_host_t *vha)
  491. {
  492. int rval;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. unsigned long flags = 0;
  496. uint16_t data;
  497. uint32_t cnt;
  498. uint16_t mb[5];
  499. struct req_que *req = ha->req_q_map[0];
  500. /* Assume a failed state */
  501. rval = QLA_FUNCTION_FAILED;
  502. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  503. vha->host_no, (u_long)&reg->flash_address));
  504. spin_lock_irqsave(&ha->hardware_lock, flags);
  505. /* Reset ISP chip. */
  506. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  507. /*
  508. * We need to have a delay here since the card will not respond while
  509. * in reset causing an MCA on some architectures.
  510. */
  511. udelay(20);
  512. data = qla2x00_debounce_register(&reg->ctrl_status);
  513. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  514. udelay(5);
  515. data = RD_REG_WORD(&reg->ctrl_status);
  516. barrier();
  517. }
  518. if (!cnt)
  519. goto chip_diag_failed;
  520. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  521. vha->host_no));
  522. /* Reset RISC processor. */
  523. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  524. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  525. /* Workaround for QLA2312 PCI parity error */
  526. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  527. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  528. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  529. udelay(5);
  530. data = RD_MAILBOX_REG(ha, reg, 0);
  531. barrier();
  532. }
  533. } else
  534. udelay(10);
  535. if (!cnt)
  536. goto chip_diag_failed;
  537. /* Check product ID of chip */
  538. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  539. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  540. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  541. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  542. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  543. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  544. mb[3] != PROD_ID_3) {
  545. qla_printk(KERN_WARNING, ha,
  546. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  547. goto chip_diag_failed;
  548. }
  549. ha->product_id[0] = mb[1];
  550. ha->product_id[1] = mb[2];
  551. ha->product_id[2] = mb[3];
  552. ha->product_id[3] = mb[4];
  553. /* Adjust fw RISC transfer size */
  554. if (req->length > 1024)
  555. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  556. else
  557. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  558. req->length;
  559. if (IS_QLA2200(ha) &&
  560. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  561. /* Limit firmware transfer size with a 2200A */
  562. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  563. vha->host_no));
  564. ha->device_type |= DT_ISP2200A;
  565. ha->fw_transfer_size = 128;
  566. }
  567. /* Wrap Incoming Mailboxes Test. */
  568. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  569. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  570. rval = qla2x00_mbx_reg_test(vha);
  571. if (rval) {
  572. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  573. vha->host_no));
  574. qla_printk(KERN_WARNING, ha,
  575. "Failed mailbox send register test\n");
  576. }
  577. else {
  578. /* Flag a successful rval */
  579. rval = QLA_SUCCESS;
  580. }
  581. spin_lock_irqsave(&ha->hardware_lock, flags);
  582. chip_diag_failed:
  583. if (rval)
  584. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  585. "****\n", vha->host_no));
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return (rval);
  588. }
  589. /**
  590. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_chip_diag(scsi_qla_host_t *vha)
  597. {
  598. int rval;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct req_que *req = ha->req_q_map[0];
  601. /* Perform RISC reset. */
  602. qla24xx_reset_risc(vha);
  603. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  604. rval = qla2x00_mbx_reg_test(vha);
  605. if (rval) {
  606. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  607. vha->host_no));
  608. qla_printk(KERN_WARNING, ha,
  609. "Failed mailbox send register test\n");
  610. } else {
  611. /* Flag a successful rval */
  612. rval = QLA_SUCCESS;
  613. }
  614. return rval;
  615. }
  616. void
  617. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  618. {
  619. int rval;
  620. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  621. eft_size, fce_size, mq_size;
  622. dma_addr_t tc_dma;
  623. void *tc;
  624. struct qla_hw_data *ha = vha->hw;
  625. struct req_que *req = ha->req_q_map[0];
  626. struct rsp_que *rsp = ha->rsp_q_map[0];
  627. if (ha->fw_dump) {
  628. qla_printk(KERN_WARNING, ha,
  629. "Firmware dump previously allocated.\n");
  630. return;
  631. }
  632. ha->fw_dumped = 0;
  633. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  634. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  635. fixed_size = sizeof(struct qla2100_fw_dump);
  636. } else if (IS_QLA23XX(ha)) {
  637. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  638. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  639. sizeof(uint16_t);
  640. } else if (IS_FWI2_CAPABLE(ha)) {
  641. if (IS_QLA81XX(ha))
  642. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  643. else if (IS_QLA25XX(ha))
  644. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  645. else
  646. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  647. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  648. sizeof(uint32_t);
  649. if (ha->mqenable)
  650. mq_size = sizeof(struct qla2xxx_mq_chain);
  651. /* Allocate memory for Fibre Channel Event Buffer. */
  652. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  653. goto try_eft;
  654. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  655. GFP_KERNEL);
  656. if (!tc) {
  657. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  658. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  659. goto try_eft;
  660. }
  661. memset(tc, 0, FCE_SIZE);
  662. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  663. ha->fce_mb, &ha->fce_bufs);
  664. if (rval) {
  665. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  666. "FCE (%d).\n", rval);
  667. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  668. tc_dma);
  669. ha->flags.fce_enabled = 0;
  670. goto try_eft;
  671. }
  672. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  673. FCE_SIZE / 1024);
  674. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  675. ha->flags.fce_enabled = 1;
  676. ha->fce_dma = tc_dma;
  677. ha->fce = tc;
  678. try_eft:
  679. /* Allocate memory for Extended Trace Buffer. */
  680. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  681. GFP_KERNEL);
  682. if (!tc) {
  683. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  684. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  685. goto cont_alloc;
  686. }
  687. memset(tc, 0, EFT_SIZE);
  688. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  689. if (rval) {
  690. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  691. "EFT (%d).\n", rval);
  692. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  693. tc_dma);
  694. goto cont_alloc;
  695. }
  696. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  697. EFT_SIZE / 1024);
  698. eft_size = EFT_SIZE;
  699. ha->eft_dma = tc_dma;
  700. ha->eft = tc;
  701. }
  702. cont_alloc:
  703. req_q_size = req->length * sizeof(request_t);
  704. rsp_q_size = rsp->length * sizeof(response_t);
  705. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  706. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  707. ha->chain_offset = dump_size;
  708. dump_size += mq_size + fce_size;
  709. ha->fw_dump = vmalloc(dump_size);
  710. if (!ha->fw_dump) {
  711. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  712. "firmware dump!!!\n", dump_size / 1024);
  713. if (ha->eft) {
  714. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  715. ha->eft_dma);
  716. ha->eft = NULL;
  717. ha->eft_dma = 0;
  718. }
  719. return;
  720. }
  721. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  722. dump_size / 1024);
  723. ha->fw_dump_len = dump_size;
  724. ha->fw_dump->signature[0] = 'Q';
  725. ha->fw_dump->signature[1] = 'L';
  726. ha->fw_dump->signature[2] = 'G';
  727. ha->fw_dump->signature[3] = 'C';
  728. ha->fw_dump->version = __constant_htonl(1);
  729. ha->fw_dump->fixed_size = htonl(fixed_size);
  730. ha->fw_dump->mem_size = htonl(mem_size);
  731. ha->fw_dump->req_q_size = htonl(req_q_size);
  732. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  733. ha->fw_dump->eft_size = htonl(eft_size);
  734. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  735. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  736. ha->fw_dump->header_size =
  737. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  738. }
  739. /**
  740. * qla2x00_setup_chip() - Load and start RISC firmware.
  741. * @ha: HA context
  742. *
  743. * Returns 0 on success.
  744. */
  745. static int
  746. qla2x00_setup_chip(scsi_qla_host_t *vha)
  747. {
  748. int rval;
  749. uint32_t srisc_address = 0;
  750. struct qla_hw_data *ha = vha->hw;
  751. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  752. unsigned long flags;
  753. uint16_t fw_major_version;
  754. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  755. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  758. RD_REG_WORD(&reg->hccr);
  759. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  760. }
  761. /* Load firmware sequences */
  762. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  763. if (rval == QLA_SUCCESS) {
  764. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  765. "code.\n", vha->host_no));
  766. rval = qla2x00_verify_checksum(vha, srisc_address);
  767. if (rval == QLA_SUCCESS) {
  768. /* Start firmware execution. */
  769. DEBUG(printk("scsi(%ld): Checksum OK, start "
  770. "firmware.\n", vha->host_no));
  771. rval = qla2x00_execute_fw(vha, srisc_address);
  772. /* Retrieve firmware information. */
  773. if (rval == QLA_SUCCESS) {
  774. fw_major_version = ha->fw_major_version;
  775. rval = qla2x00_get_fw_version(vha,
  776. &ha->fw_major_version,
  777. &ha->fw_minor_version,
  778. &ha->fw_subminor_version,
  779. &ha->fw_attributes, &ha->fw_memory_size,
  780. ha->mpi_version, &ha->mpi_capabilities,
  781. ha->phy_version);
  782. if (rval != QLA_SUCCESS)
  783. goto failed;
  784. ha->flags.npiv_supported = 0;
  785. if (IS_QLA2XXX_MIDTYPE(ha) &&
  786. (ha->fw_attributes & BIT_2)) {
  787. ha->flags.npiv_supported = 1;
  788. if ((!ha->max_npiv_vports) ||
  789. ((ha->max_npiv_vports + 1) %
  790. MIN_MULTI_ID_FABRIC))
  791. ha->max_npiv_vports =
  792. MIN_MULTI_ID_FABRIC - 1;
  793. }
  794. qla2x00_get_resource_cnts(vha, NULL,
  795. &ha->fw_xcb_count, NULL, NULL,
  796. &ha->max_npiv_vports);
  797. if (!fw_major_version && ql2xallocfwdump)
  798. qla2x00_alloc_fw_dump(vha);
  799. }
  800. } else {
  801. DEBUG2(printk(KERN_INFO
  802. "scsi(%ld): ISP Firmware failed checksum.\n",
  803. vha->host_no));
  804. }
  805. }
  806. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  807. /* Enable proper parity. */
  808. spin_lock_irqsave(&ha->hardware_lock, flags);
  809. if (IS_QLA2300(ha))
  810. /* SRAM parity */
  811. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  812. else
  813. /* SRAM, Instruction RAM and GP RAM parity */
  814. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  815. RD_REG_WORD(&reg->hccr);
  816. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  817. }
  818. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  819. uint32_t size;
  820. rval = qla81xx_fac_get_sector_size(vha, &size);
  821. if (rval == QLA_SUCCESS) {
  822. ha->flags.fac_supported = 1;
  823. ha->fdt_block_size = size << 2;
  824. } else {
  825. qla_printk(KERN_ERR, ha,
  826. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  827. ha->fw_major_version, ha->fw_minor_version,
  828. ha->fw_subminor_version);
  829. }
  830. }
  831. failed:
  832. if (rval) {
  833. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  834. vha->host_no));
  835. }
  836. return (rval);
  837. }
  838. /**
  839. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  840. * @ha: HA context
  841. *
  842. * Beginning of request ring has initialization control block already built
  843. * by nvram config routine.
  844. *
  845. * Returns 0 on success.
  846. */
  847. void
  848. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  849. {
  850. uint16_t cnt;
  851. response_t *pkt;
  852. rsp->ring_ptr = rsp->ring;
  853. rsp->ring_index = 0;
  854. rsp->status_srb = NULL;
  855. pkt = rsp->ring_ptr;
  856. for (cnt = 0; cnt < rsp->length; cnt++) {
  857. pkt->signature = RESPONSE_PROCESSED;
  858. pkt++;
  859. }
  860. }
  861. /**
  862. * qla2x00_update_fw_options() - Read and process firmware options.
  863. * @ha: HA context
  864. *
  865. * Returns 0 on success.
  866. */
  867. void
  868. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  869. {
  870. uint16_t swing, emphasis, tx_sens, rx_sens;
  871. struct qla_hw_data *ha = vha->hw;
  872. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  873. qla2x00_get_fw_options(vha, ha->fw_options);
  874. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  875. return;
  876. /* Serial Link options. */
  877. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  878. vha->host_no));
  879. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  880. sizeof(ha->fw_seriallink_options)));
  881. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  882. if (ha->fw_seriallink_options[3] & BIT_2) {
  883. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  884. /* 1G settings */
  885. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  886. emphasis = (ha->fw_seriallink_options[2] &
  887. (BIT_4 | BIT_3)) >> 3;
  888. tx_sens = ha->fw_seriallink_options[0] &
  889. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  890. rx_sens = (ha->fw_seriallink_options[0] &
  891. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  892. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  893. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  894. if (rx_sens == 0x0)
  895. rx_sens = 0x3;
  896. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  897. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  898. ha->fw_options[10] |= BIT_5 |
  899. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  900. (tx_sens & (BIT_1 | BIT_0));
  901. /* 2G settings */
  902. swing = (ha->fw_seriallink_options[2] &
  903. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  904. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  905. tx_sens = ha->fw_seriallink_options[1] &
  906. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  907. rx_sens = (ha->fw_seriallink_options[1] &
  908. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  909. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  910. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  911. if (rx_sens == 0x0)
  912. rx_sens = 0x3;
  913. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  914. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  915. ha->fw_options[11] |= BIT_5 |
  916. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  917. (tx_sens & (BIT_1 | BIT_0));
  918. }
  919. /* FCP2 options. */
  920. /* Return command IOCBs without waiting for an ABTS to complete. */
  921. ha->fw_options[3] |= BIT_13;
  922. /* LED scheme. */
  923. if (ha->flags.enable_led_scheme)
  924. ha->fw_options[2] |= BIT_12;
  925. /* Detect ISP6312. */
  926. if (IS_QLA6312(ha))
  927. ha->fw_options[2] |= BIT_13;
  928. /* Update firmware options. */
  929. qla2x00_set_fw_options(vha, ha->fw_options);
  930. }
  931. void
  932. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  933. {
  934. int rval;
  935. struct qla_hw_data *ha = vha->hw;
  936. /* Update Serial Link options. */
  937. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  938. return;
  939. rval = qla2x00_set_serdes_params(vha,
  940. le16_to_cpu(ha->fw_seriallink_options24[1]),
  941. le16_to_cpu(ha->fw_seriallink_options24[2]),
  942. le16_to_cpu(ha->fw_seriallink_options24[3]));
  943. if (rval != QLA_SUCCESS) {
  944. qla_printk(KERN_WARNING, ha,
  945. "Unable to update Serial Link options (%x).\n", rval);
  946. }
  947. }
  948. void
  949. qla2x00_config_rings(struct scsi_qla_host *vha)
  950. {
  951. struct qla_hw_data *ha = vha->hw;
  952. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  953. struct req_que *req = ha->req_q_map[0];
  954. struct rsp_que *rsp = ha->rsp_q_map[0];
  955. /* Setup ring parameters in initialization control block. */
  956. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  957. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  958. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  959. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  960. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  961. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  962. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  963. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  964. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  965. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  966. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  967. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  968. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  969. }
  970. void
  971. qla24xx_config_rings(struct scsi_qla_host *vha)
  972. {
  973. struct qla_hw_data *ha = vha->hw;
  974. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  975. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  976. struct qla_msix_entry *msix;
  977. struct init_cb_24xx *icb;
  978. uint16_t rid = 0;
  979. struct req_que *req = ha->req_q_map[0];
  980. struct rsp_que *rsp = ha->rsp_q_map[0];
  981. /* Setup ring parameters in initialization control block. */
  982. icb = (struct init_cb_24xx *)ha->init_cb;
  983. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  984. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  985. icb->request_q_length = cpu_to_le16(req->length);
  986. icb->response_q_length = cpu_to_le16(rsp->length);
  987. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  988. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  989. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  990. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  991. if (ha->mqenable) {
  992. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  993. icb->rid = __constant_cpu_to_le16(rid);
  994. if (ha->flags.msix_enabled) {
  995. msix = &ha->msix_entries[1];
  996. DEBUG2_17(printk(KERN_INFO
  997. "Registering vector 0x%x for base que\n", msix->entry));
  998. icb->msix = cpu_to_le16(msix->entry);
  999. }
  1000. /* Use alternate PCI bus number */
  1001. if (MSB(rid))
  1002. icb->firmware_options_2 |=
  1003. __constant_cpu_to_le32(BIT_19);
  1004. /* Use alternate PCI devfn */
  1005. if (LSB(rid))
  1006. icb->firmware_options_2 |=
  1007. __constant_cpu_to_le32(BIT_18);
  1008. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1009. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1010. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1011. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1012. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1013. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1014. } else {
  1015. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1016. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1017. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1018. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1019. }
  1020. /* PCI posting */
  1021. RD_REG_DWORD(&ioreg->hccr);
  1022. }
  1023. /**
  1024. * qla2x00_init_rings() - Initializes firmware.
  1025. * @ha: HA context
  1026. *
  1027. * Beginning of request ring has initialization control block already built
  1028. * by nvram config routine.
  1029. *
  1030. * Returns 0 on success.
  1031. */
  1032. static int
  1033. qla2x00_init_rings(scsi_qla_host_t *vha)
  1034. {
  1035. int rval;
  1036. unsigned long flags = 0;
  1037. int cnt, que;
  1038. struct qla_hw_data *ha = vha->hw;
  1039. struct req_que *req;
  1040. struct rsp_que *rsp;
  1041. struct scsi_qla_host *vp;
  1042. struct mid_init_cb_24xx *mid_init_cb =
  1043. (struct mid_init_cb_24xx *) ha->init_cb;
  1044. spin_lock_irqsave(&ha->hardware_lock, flags);
  1045. /* Clear outstanding commands array. */
  1046. for (que = 0; que < ha->max_req_queues; que++) {
  1047. req = ha->req_q_map[que];
  1048. if (!req)
  1049. continue;
  1050. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1051. req->outstanding_cmds[cnt] = NULL;
  1052. req->current_outstanding_cmd = 1;
  1053. /* Initialize firmware. */
  1054. req->ring_ptr = req->ring;
  1055. req->ring_index = 0;
  1056. req->cnt = req->length;
  1057. }
  1058. for (que = 0; que < ha->max_rsp_queues; que++) {
  1059. rsp = ha->rsp_q_map[que];
  1060. if (!rsp)
  1061. continue;
  1062. /* Initialize response queue entries */
  1063. qla2x00_init_response_q_entries(rsp);
  1064. }
  1065. /* Clear RSCN queue. */
  1066. list_for_each_entry(vp, &ha->vp_list, list) {
  1067. vp->rscn_in_ptr = 0;
  1068. vp->rscn_out_ptr = 0;
  1069. }
  1070. ha->isp_ops->config_rings(vha);
  1071. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1072. /* Update any ISP specific firmware options before initialization. */
  1073. ha->isp_ops->update_fw_options(vha);
  1074. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1075. if (ha->flags.npiv_supported) {
  1076. if (ha->operating_mode == LOOP)
  1077. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1078. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1079. }
  1080. if (IS_FWI2_CAPABLE(ha)) {
  1081. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1082. mid_init_cb->init_cb.execution_throttle =
  1083. cpu_to_le16(ha->fw_xcb_count);
  1084. }
  1085. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1086. if (rval) {
  1087. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1088. vha->host_no));
  1089. } else {
  1090. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1091. vha->host_no));
  1092. }
  1093. return (rval);
  1094. }
  1095. /**
  1096. * qla2x00_fw_ready() - Waits for firmware ready.
  1097. * @ha: HA context
  1098. *
  1099. * Returns 0 on success.
  1100. */
  1101. static int
  1102. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1103. {
  1104. int rval;
  1105. unsigned long wtime, mtime, cs84xx_time;
  1106. uint16_t min_wait; /* Minimum wait time if loop is down */
  1107. uint16_t wait_time; /* Wait time if loop is coming ready */
  1108. uint16_t state[3];
  1109. struct qla_hw_data *ha = vha->hw;
  1110. rval = QLA_SUCCESS;
  1111. /* 20 seconds for loop down. */
  1112. min_wait = 20;
  1113. /*
  1114. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1115. * our own processing.
  1116. */
  1117. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1118. wait_time = min_wait;
  1119. }
  1120. /* Min wait time if loop down */
  1121. mtime = jiffies + (min_wait * HZ);
  1122. /* wait time before firmware ready */
  1123. wtime = jiffies + (wait_time * HZ);
  1124. /* Wait for ISP to finish LIP */
  1125. if (!vha->flags.init_done)
  1126. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1127. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1128. vha->host_no));
  1129. do {
  1130. rval = qla2x00_get_firmware_state(vha, state);
  1131. if (rval == QLA_SUCCESS) {
  1132. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1133. vha->device_flags &= ~DFLG_NO_CABLE;
  1134. }
  1135. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1136. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1137. "84xx=%x.\n", vha->host_no, state[0],
  1138. state[2]));
  1139. if ((state[2] & FSTATE_LOGGED_IN) &&
  1140. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1141. DEBUG16(printk("scsi(%ld): Sending "
  1142. "verify iocb.\n", vha->host_no));
  1143. cs84xx_time = jiffies;
  1144. rval = qla84xx_init_chip(vha);
  1145. if (rval != QLA_SUCCESS)
  1146. break;
  1147. /* Add time taken to initialize. */
  1148. cs84xx_time = jiffies - cs84xx_time;
  1149. wtime += cs84xx_time;
  1150. mtime += cs84xx_time;
  1151. DEBUG16(printk("scsi(%ld): Increasing "
  1152. "wait time by %ld. New time %ld\n",
  1153. vha->host_no, cs84xx_time, wtime));
  1154. }
  1155. } else if (state[0] == FSTATE_READY) {
  1156. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1157. vha->host_no));
  1158. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1159. &ha->login_timeout, &ha->r_a_tov);
  1160. rval = QLA_SUCCESS;
  1161. break;
  1162. }
  1163. rval = QLA_FUNCTION_FAILED;
  1164. if (atomic_read(&vha->loop_down_timer) &&
  1165. state[0] != FSTATE_READY) {
  1166. /* Loop down. Timeout on min_wait for states
  1167. * other than Wait for Login.
  1168. */
  1169. if (time_after_eq(jiffies, mtime)) {
  1170. qla_printk(KERN_INFO, ha,
  1171. "Cable is unplugged...\n");
  1172. vha->device_flags |= DFLG_NO_CABLE;
  1173. break;
  1174. }
  1175. }
  1176. } else {
  1177. /* Mailbox cmd failed. Timeout on min_wait. */
  1178. if (time_after_eq(jiffies, mtime))
  1179. break;
  1180. }
  1181. if (time_after_eq(jiffies, wtime))
  1182. break;
  1183. /* Delay for a while */
  1184. msleep(500);
  1185. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1186. vha->host_no, state[0], jiffies));
  1187. } while (1);
  1188. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1189. vha->host_no, state[0], jiffies));
  1190. if (rval) {
  1191. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1192. vha->host_no));
  1193. }
  1194. return (rval);
  1195. }
  1196. /*
  1197. * qla2x00_configure_hba
  1198. * Setup adapter context.
  1199. *
  1200. * Input:
  1201. * ha = adapter state pointer.
  1202. *
  1203. * Returns:
  1204. * 0 = success
  1205. *
  1206. * Context:
  1207. * Kernel context.
  1208. */
  1209. static int
  1210. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1211. {
  1212. int rval;
  1213. uint16_t loop_id;
  1214. uint16_t topo;
  1215. uint16_t sw_cap;
  1216. uint8_t al_pa;
  1217. uint8_t area;
  1218. uint8_t domain;
  1219. char connect_type[22];
  1220. struct qla_hw_data *ha = vha->hw;
  1221. /* Get host addresses. */
  1222. rval = qla2x00_get_adapter_id(vha,
  1223. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1224. if (rval != QLA_SUCCESS) {
  1225. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1226. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1227. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1228. __func__, vha->host_no));
  1229. } else {
  1230. qla_printk(KERN_WARNING, ha,
  1231. "ERROR -- Unable to get host loop ID.\n");
  1232. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1233. }
  1234. return (rval);
  1235. }
  1236. if (topo == 4) {
  1237. qla_printk(KERN_INFO, ha,
  1238. "Cannot get topology - retrying.\n");
  1239. return (QLA_FUNCTION_FAILED);
  1240. }
  1241. vha->loop_id = loop_id;
  1242. /* initialize */
  1243. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1244. ha->operating_mode = LOOP;
  1245. ha->switch_cap = 0;
  1246. switch (topo) {
  1247. case 0:
  1248. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1249. vha->host_no));
  1250. ha->current_topology = ISP_CFG_NL;
  1251. strcpy(connect_type, "(Loop)");
  1252. break;
  1253. case 1:
  1254. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1255. vha->host_no));
  1256. ha->switch_cap = sw_cap;
  1257. ha->current_topology = ISP_CFG_FL;
  1258. strcpy(connect_type, "(FL_Port)");
  1259. break;
  1260. case 2:
  1261. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1262. vha->host_no));
  1263. ha->operating_mode = P2P;
  1264. ha->current_topology = ISP_CFG_N;
  1265. strcpy(connect_type, "(N_Port-to-N_Port)");
  1266. break;
  1267. case 3:
  1268. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1269. vha->host_no));
  1270. ha->switch_cap = sw_cap;
  1271. ha->operating_mode = P2P;
  1272. ha->current_topology = ISP_CFG_F;
  1273. strcpy(connect_type, "(F_Port)");
  1274. break;
  1275. default:
  1276. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1277. "Using NL.\n",
  1278. vha->host_no, topo));
  1279. ha->current_topology = ISP_CFG_NL;
  1280. strcpy(connect_type, "(Loop)");
  1281. break;
  1282. }
  1283. /* Save Host port and loop ID. */
  1284. /* byte order - Big Endian */
  1285. vha->d_id.b.domain = domain;
  1286. vha->d_id.b.area = area;
  1287. vha->d_id.b.al_pa = al_pa;
  1288. if (!vha->flags.init_done)
  1289. qla_printk(KERN_INFO, ha,
  1290. "Topology - %s, Host Loop address 0x%x\n",
  1291. connect_type, vha->loop_id);
  1292. if (rval) {
  1293. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1294. } else {
  1295. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1296. }
  1297. return(rval);
  1298. }
  1299. static inline void
  1300. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1301. char *def)
  1302. {
  1303. char *st, *en;
  1304. uint16_t index;
  1305. struct qla_hw_data *ha = vha->hw;
  1306. int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha);
  1307. if (memcmp(model, BINZERO, len) != 0) {
  1308. strncpy(ha->model_number, model, len);
  1309. st = en = ha->model_number;
  1310. en += len - 1;
  1311. while (en > st) {
  1312. if (*en != 0x20 && *en != 0x00)
  1313. break;
  1314. *en-- = '\0';
  1315. }
  1316. index = (ha->pdev->subsystem_device & 0xff);
  1317. if (use_tbl &&
  1318. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1319. index < QLA_MODEL_NAMES)
  1320. strncpy(ha->model_desc,
  1321. qla2x00_model_name[index * 2 + 1],
  1322. sizeof(ha->model_desc) - 1);
  1323. } else {
  1324. index = (ha->pdev->subsystem_device & 0xff);
  1325. if (use_tbl &&
  1326. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1327. index < QLA_MODEL_NAMES) {
  1328. strcpy(ha->model_number,
  1329. qla2x00_model_name[index * 2]);
  1330. strncpy(ha->model_desc,
  1331. qla2x00_model_name[index * 2 + 1],
  1332. sizeof(ha->model_desc) - 1);
  1333. } else {
  1334. strcpy(ha->model_number, def);
  1335. }
  1336. }
  1337. if (IS_FWI2_CAPABLE(ha))
  1338. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1339. sizeof(ha->model_desc));
  1340. }
  1341. /* On sparc systems, obtain port and node WWN from firmware
  1342. * properties.
  1343. */
  1344. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1345. {
  1346. #ifdef CONFIG_SPARC
  1347. struct qla_hw_data *ha = vha->hw;
  1348. struct pci_dev *pdev = ha->pdev;
  1349. struct device_node *dp = pci_device_to_OF_node(pdev);
  1350. const u8 *val;
  1351. int len;
  1352. val = of_get_property(dp, "port-wwn", &len);
  1353. if (val && len >= WWN_SIZE)
  1354. memcpy(nv->port_name, val, WWN_SIZE);
  1355. val = of_get_property(dp, "node-wwn", &len);
  1356. if (val && len >= WWN_SIZE)
  1357. memcpy(nv->node_name, val, WWN_SIZE);
  1358. #endif
  1359. }
  1360. /*
  1361. * NVRAM configuration for ISP 2xxx
  1362. *
  1363. * Input:
  1364. * ha = adapter block pointer.
  1365. *
  1366. * Output:
  1367. * initialization control block in response_ring
  1368. * host adapters parameters in host adapter block
  1369. *
  1370. * Returns:
  1371. * 0 = success.
  1372. */
  1373. int
  1374. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1375. {
  1376. int rval;
  1377. uint8_t chksum = 0;
  1378. uint16_t cnt;
  1379. uint8_t *dptr1, *dptr2;
  1380. struct qla_hw_data *ha = vha->hw;
  1381. init_cb_t *icb = ha->init_cb;
  1382. nvram_t *nv = ha->nvram;
  1383. uint8_t *ptr = ha->nvram;
  1384. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1385. rval = QLA_SUCCESS;
  1386. /* Determine NVRAM starting address. */
  1387. ha->nvram_size = sizeof(nvram_t);
  1388. ha->nvram_base = 0;
  1389. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1390. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1391. ha->nvram_base = 0x80;
  1392. /* Get NVRAM data and calculate checksum. */
  1393. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1394. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1395. chksum += *ptr++;
  1396. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1397. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1398. /* Bad NVRAM data, set defaults parameters. */
  1399. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1400. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1401. /* Reset NVRAM data. */
  1402. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1403. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1404. nv->nvram_version);
  1405. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1406. "invalid -- WWPN) defaults.\n");
  1407. /*
  1408. * Set default initialization control block.
  1409. */
  1410. memset(nv, 0, ha->nvram_size);
  1411. nv->parameter_block_version = ICB_VERSION;
  1412. if (IS_QLA23XX(ha)) {
  1413. nv->firmware_options[0] = BIT_2 | BIT_1;
  1414. nv->firmware_options[1] = BIT_7 | BIT_5;
  1415. nv->add_firmware_options[0] = BIT_5;
  1416. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1417. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1418. nv->special_options[1] = BIT_7;
  1419. } else if (IS_QLA2200(ha)) {
  1420. nv->firmware_options[0] = BIT_2 | BIT_1;
  1421. nv->firmware_options[1] = BIT_7 | BIT_5;
  1422. nv->add_firmware_options[0] = BIT_5;
  1423. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1424. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1425. } else if (IS_QLA2100(ha)) {
  1426. nv->firmware_options[0] = BIT_3 | BIT_1;
  1427. nv->firmware_options[1] = BIT_5;
  1428. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1429. }
  1430. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1431. nv->execution_throttle = __constant_cpu_to_le16(16);
  1432. nv->retry_count = 8;
  1433. nv->retry_delay = 1;
  1434. nv->port_name[0] = 33;
  1435. nv->port_name[3] = 224;
  1436. nv->port_name[4] = 139;
  1437. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1438. nv->login_timeout = 4;
  1439. /*
  1440. * Set default host adapter parameters
  1441. */
  1442. nv->host_p[1] = BIT_2;
  1443. nv->reset_delay = 5;
  1444. nv->port_down_retry_count = 8;
  1445. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1446. nv->link_down_timeout = 60;
  1447. rval = 1;
  1448. }
  1449. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1450. /*
  1451. * The SN2 does not provide BIOS emulation which means you can't change
  1452. * potentially bogus BIOS settings. Force the use of default settings
  1453. * for link rate and frame size. Hope that the rest of the settings
  1454. * are valid.
  1455. */
  1456. if (ia64_platform_is("sn2")) {
  1457. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1458. if (IS_QLA23XX(ha))
  1459. nv->special_options[1] = BIT_7;
  1460. }
  1461. #endif
  1462. /* Reset Initialization control block */
  1463. memset(icb, 0, ha->init_cb_size);
  1464. /*
  1465. * Setup driver NVRAM options.
  1466. */
  1467. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1468. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1469. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1470. nv->firmware_options[1] &= ~BIT_4;
  1471. if (IS_QLA23XX(ha)) {
  1472. nv->firmware_options[0] |= BIT_2;
  1473. nv->firmware_options[0] &= ~BIT_3;
  1474. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1475. if (IS_QLA2300(ha)) {
  1476. if (ha->fb_rev == FPM_2310) {
  1477. strcpy(ha->model_number, "QLA2310");
  1478. } else {
  1479. strcpy(ha->model_number, "QLA2300");
  1480. }
  1481. } else {
  1482. qla2x00_set_model_info(vha, nv->model_number,
  1483. sizeof(nv->model_number), "QLA23xx");
  1484. }
  1485. } else if (IS_QLA2200(ha)) {
  1486. nv->firmware_options[0] |= BIT_2;
  1487. /*
  1488. * 'Point-to-point preferred, else loop' is not a safe
  1489. * connection mode setting.
  1490. */
  1491. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1492. (BIT_5 | BIT_4)) {
  1493. /* Force 'loop preferred, else point-to-point'. */
  1494. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1495. nv->add_firmware_options[0] |= BIT_5;
  1496. }
  1497. strcpy(ha->model_number, "QLA22xx");
  1498. } else /*if (IS_QLA2100(ha))*/ {
  1499. strcpy(ha->model_number, "QLA2100");
  1500. }
  1501. /*
  1502. * Copy over NVRAM RISC parameter block to initialization control block.
  1503. */
  1504. dptr1 = (uint8_t *)icb;
  1505. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1506. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1507. while (cnt--)
  1508. *dptr1++ = *dptr2++;
  1509. /* Copy 2nd half. */
  1510. dptr1 = (uint8_t *)icb->add_firmware_options;
  1511. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1512. while (cnt--)
  1513. *dptr1++ = *dptr2++;
  1514. /* Use alternate WWN? */
  1515. if (nv->host_p[1] & BIT_7) {
  1516. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1517. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1518. }
  1519. /* Prepare nodename */
  1520. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1521. /*
  1522. * Firmware will apply the following mask if the nodename was
  1523. * not provided.
  1524. */
  1525. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1526. icb->node_name[0] &= 0xF0;
  1527. }
  1528. /*
  1529. * Set host adapter parameters.
  1530. */
  1531. if (nv->host_p[0] & BIT_7)
  1532. ql2xextended_error_logging = 1;
  1533. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1534. /* Always load RISC code on non ISP2[12]00 chips. */
  1535. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1536. ha->flags.disable_risc_code_load = 0;
  1537. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1538. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1539. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1540. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1541. ha->flags.disable_serdes = 0;
  1542. ha->operating_mode =
  1543. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1544. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1545. sizeof(ha->fw_seriallink_options));
  1546. /* save HBA serial number */
  1547. ha->serial0 = icb->port_name[5];
  1548. ha->serial1 = icb->port_name[6];
  1549. ha->serial2 = icb->port_name[7];
  1550. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1551. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1552. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1553. ha->retry_count = nv->retry_count;
  1554. /* Set minimum login_timeout to 4 seconds. */
  1555. if (nv->login_timeout < ql2xlogintimeout)
  1556. nv->login_timeout = ql2xlogintimeout;
  1557. if (nv->login_timeout < 4)
  1558. nv->login_timeout = 4;
  1559. ha->login_timeout = nv->login_timeout;
  1560. icb->login_timeout = nv->login_timeout;
  1561. /* Set minimum RATOV to 100 tenths of a second. */
  1562. ha->r_a_tov = 100;
  1563. ha->loop_reset_delay = nv->reset_delay;
  1564. /* Link Down Timeout = 0:
  1565. *
  1566. * When Port Down timer expires we will start returning
  1567. * I/O's to OS with "DID_NO_CONNECT".
  1568. *
  1569. * Link Down Timeout != 0:
  1570. *
  1571. * The driver waits for the link to come up after link down
  1572. * before returning I/Os to OS with "DID_NO_CONNECT".
  1573. */
  1574. if (nv->link_down_timeout == 0) {
  1575. ha->loop_down_abort_time =
  1576. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1577. } else {
  1578. ha->link_down_timeout = nv->link_down_timeout;
  1579. ha->loop_down_abort_time =
  1580. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1581. }
  1582. /*
  1583. * Need enough time to try and get the port back.
  1584. */
  1585. ha->port_down_retry_count = nv->port_down_retry_count;
  1586. if (qlport_down_retry)
  1587. ha->port_down_retry_count = qlport_down_retry;
  1588. /* Set login_retry_count */
  1589. ha->login_retry_count = nv->retry_count;
  1590. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1591. ha->port_down_retry_count > 3)
  1592. ha->login_retry_count = ha->port_down_retry_count;
  1593. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1594. ha->login_retry_count = ha->port_down_retry_count;
  1595. if (ql2xloginretrycount)
  1596. ha->login_retry_count = ql2xloginretrycount;
  1597. icb->lun_enables = __constant_cpu_to_le16(0);
  1598. icb->command_resource_count = 0;
  1599. icb->immediate_notify_resource_count = 0;
  1600. icb->timeout = __constant_cpu_to_le16(0);
  1601. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1602. /* Enable RIO */
  1603. icb->firmware_options[0] &= ~BIT_3;
  1604. icb->add_firmware_options[0] &=
  1605. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1606. icb->add_firmware_options[0] |= BIT_2;
  1607. icb->response_accumulation_timer = 3;
  1608. icb->interrupt_delay_timer = 5;
  1609. vha->flags.process_response_queue = 1;
  1610. } else {
  1611. /* Enable ZIO. */
  1612. if (!vha->flags.init_done) {
  1613. ha->zio_mode = icb->add_firmware_options[0] &
  1614. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1615. ha->zio_timer = icb->interrupt_delay_timer ?
  1616. icb->interrupt_delay_timer: 2;
  1617. }
  1618. icb->add_firmware_options[0] &=
  1619. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1620. vha->flags.process_response_queue = 0;
  1621. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1622. ha->zio_mode = QLA_ZIO_MODE_6;
  1623. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1624. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1625. ha->zio_timer * 100));
  1626. qla_printk(KERN_INFO, ha,
  1627. "ZIO mode %d enabled; timer delay (%d us).\n",
  1628. ha->zio_mode, ha->zio_timer * 100);
  1629. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1630. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1631. vha->flags.process_response_queue = 1;
  1632. }
  1633. }
  1634. if (rval) {
  1635. DEBUG2_3(printk(KERN_WARNING
  1636. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1637. }
  1638. return (rval);
  1639. }
  1640. static void
  1641. qla2x00_rport_del(void *data)
  1642. {
  1643. fc_port_t *fcport = data;
  1644. struct fc_rport *rport;
  1645. spin_lock_irq(fcport->vha->host->host_lock);
  1646. rport = fcport->drport;
  1647. fcport->drport = NULL;
  1648. spin_unlock_irq(fcport->vha->host->host_lock);
  1649. if (rport)
  1650. fc_remote_port_delete(rport);
  1651. }
  1652. /**
  1653. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1654. * @ha: HA context
  1655. * @flags: allocation flags
  1656. *
  1657. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1658. */
  1659. static fc_port_t *
  1660. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1661. {
  1662. fc_port_t *fcport;
  1663. fcport = kzalloc(sizeof(fc_port_t), flags);
  1664. if (!fcport)
  1665. return NULL;
  1666. /* Setup fcport template structure. */
  1667. fcport->vha = vha;
  1668. fcport->vp_idx = vha->vp_idx;
  1669. fcport->port_type = FCT_UNKNOWN;
  1670. fcport->loop_id = FC_NO_LOOP_ID;
  1671. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1672. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1673. return fcport;
  1674. }
  1675. /*
  1676. * qla2x00_configure_loop
  1677. * Updates Fibre Channel Device Database with what is actually on loop.
  1678. *
  1679. * Input:
  1680. * ha = adapter block pointer.
  1681. *
  1682. * Returns:
  1683. * 0 = success.
  1684. * 1 = error.
  1685. * 2 = database was full and device was not configured.
  1686. */
  1687. static int
  1688. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1689. {
  1690. int rval;
  1691. unsigned long flags, save_flags;
  1692. struct qla_hw_data *ha = vha->hw;
  1693. rval = QLA_SUCCESS;
  1694. /* Get Initiator ID */
  1695. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1696. rval = qla2x00_configure_hba(vha);
  1697. if (rval != QLA_SUCCESS) {
  1698. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1699. vha->host_no));
  1700. return (rval);
  1701. }
  1702. }
  1703. save_flags = flags = vha->dpc_flags;
  1704. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1705. vha->host_no, flags));
  1706. /*
  1707. * If we have both an RSCN and PORT UPDATE pending then handle them
  1708. * both at the same time.
  1709. */
  1710. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1711. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1712. /* Determine what we need to do */
  1713. if (ha->current_topology == ISP_CFG_FL &&
  1714. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1715. vha->flags.rscn_queue_overflow = 1;
  1716. set_bit(RSCN_UPDATE, &flags);
  1717. } else if (ha->current_topology == ISP_CFG_F &&
  1718. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1719. vha->flags.rscn_queue_overflow = 1;
  1720. set_bit(RSCN_UPDATE, &flags);
  1721. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1722. } else if (ha->current_topology == ISP_CFG_N) {
  1723. clear_bit(RSCN_UPDATE, &flags);
  1724. } else if (!vha->flags.online ||
  1725. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1726. vha->flags.rscn_queue_overflow = 1;
  1727. set_bit(RSCN_UPDATE, &flags);
  1728. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1729. }
  1730. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1731. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1732. rval = QLA_FUNCTION_FAILED;
  1733. else
  1734. rval = qla2x00_configure_local_loop(vha);
  1735. }
  1736. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1737. if (LOOP_TRANSITION(vha))
  1738. rval = QLA_FUNCTION_FAILED;
  1739. else
  1740. rval = qla2x00_configure_fabric(vha);
  1741. }
  1742. if (rval == QLA_SUCCESS) {
  1743. if (atomic_read(&vha->loop_down_timer) ||
  1744. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1745. rval = QLA_FUNCTION_FAILED;
  1746. } else {
  1747. atomic_set(&vha->loop_state, LOOP_READY);
  1748. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1749. }
  1750. }
  1751. if (rval) {
  1752. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1753. __func__, vha->host_no));
  1754. } else {
  1755. DEBUG3(printk("%s: exiting normally\n", __func__));
  1756. }
  1757. /* Restore state if a resync event occurred during processing */
  1758. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1759. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1760. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1761. if (test_bit(RSCN_UPDATE, &save_flags))
  1762. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1763. }
  1764. return (rval);
  1765. }
  1766. /*
  1767. * qla2x00_configure_local_loop
  1768. * Updates Fibre Channel Device Database with local loop devices.
  1769. *
  1770. * Input:
  1771. * ha = adapter block pointer.
  1772. *
  1773. * Returns:
  1774. * 0 = success.
  1775. */
  1776. static int
  1777. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1778. {
  1779. int rval, rval2;
  1780. int found_devs;
  1781. int found;
  1782. fc_port_t *fcport, *new_fcport;
  1783. uint16_t index;
  1784. uint16_t entries;
  1785. char *id_iter;
  1786. uint16_t loop_id;
  1787. uint8_t domain, area, al_pa;
  1788. struct qla_hw_data *ha = vha->hw;
  1789. found_devs = 0;
  1790. new_fcport = NULL;
  1791. entries = MAX_FIBRE_DEVICES;
  1792. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1793. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1794. /* Get list of logged in devices. */
  1795. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1796. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1797. &entries);
  1798. if (rval != QLA_SUCCESS)
  1799. goto cleanup_allocation;
  1800. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1801. vha->host_no, entries));
  1802. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1803. entries * sizeof(struct gid_list_info)));
  1804. /* Allocate temporary fcport for any new fcports discovered. */
  1805. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1806. if (new_fcport == NULL) {
  1807. rval = QLA_MEMORY_ALLOC_FAILED;
  1808. goto cleanup_allocation;
  1809. }
  1810. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1811. /*
  1812. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1813. */
  1814. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1815. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1816. fcport->port_type != FCT_BROADCAST &&
  1817. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1818. DEBUG(printk("scsi(%ld): Marking port lost, "
  1819. "loop_id=0x%04x\n",
  1820. vha->host_no, fcport->loop_id));
  1821. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1822. }
  1823. }
  1824. /* Add devices to port list. */
  1825. id_iter = (char *)ha->gid_list;
  1826. for (index = 0; index < entries; index++) {
  1827. domain = ((struct gid_list_info *)id_iter)->domain;
  1828. area = ((struct gid_list_info *)id_iter)->area;
  1829. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1830. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1831. loop_id = (uint16_t)
  1832. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1833. else
  1834. loop_id = le16_to_cpu(
  1835. ((struct gid_list_info *)id_iter)->loop_id);
  1836. id_iter += ha->gid_list_info_size;
  1837. /* Bypass reserved domain fields. */
  1838. if ((domain & 0xf0) == 0xf0)
  1839. continue;
  1840. /* Bypass if not same domain and area of adapter. */
  1841. if (area && domain &&
  1842. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1843. continue;
  1844. /* Bypass invalid local loop ID. */
  1845. if (loop_id > LAST_LOCAL_LOOP_ID)
  1846. continue;
  1847. /* Fill in member data. */
  1848. new_fcport->d_id.b.domain = domain;
  1849. new_fcport->d_id.b.area = area;
  1850. new_fcport->d_id.b.al_pa = al_pa;
  1851. new_fcport->loop_id = loop_id;
  1852. new_fcport->vp_idx = vha->vp_idx;
  1853. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1854. if (rval2 != QLA_SUCCESS) {
  1855. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1856. "information -- get_port_database=%x, "
  1857. "loop_id=0x%04x\n",
  1858. vha->host_no, rval2, new_fcport->loop_id));
  1859. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1860. vha->host_no));
  1861. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1862. continue;
  1863. }
  1864. /* Check for matching device in port list. */
  1865. found = 0;
  1866. fcport = NULL;
  1867. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1868. if (memcmp(new_fcport->port_name, fcport->port_name,
  1869. WWN_SIZE))
  1870. continue;
  1871. fcport->flags &= ~FCF_FABRIC_DEVICE;
  1872. fcport->loop_id = new_fcport->loop_id;
  1873. fcport->port_type = new_fcport->port_type;
  1874. fcport->d_id.b24 = new_fcport->d_id.b24;
  1875. memcpy(fcport->node_name, new_fcport->node_name,
  1876. WWN_SIZE);
  1877. found++;
  1878. break;
  1879. }
  1880. if (!found) {
  1881. /* New device, add to fcports list. */
  1882. if (vha->vp_idx) {
  1883. new_fcport->vha = vha;
  1884. new_fcport->vp_idx = vha->vp_idx;
  1885. }
  1886. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1887. /* Allocate a new replacement fcport. */
  1888. fcport = new_fcport;
  1889. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1890. if (new_fcport == NULL) {
  1891. rval = QLA_MEMORY_ALLOC_FAILED;
  1892. goto cleanup_allocation;
  1893. }
  1894. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1895. }
  1896. /* Base iIDMA settings on HBA port speed. */
  1897. fcport->fp_speed = ha->link_data_rate;
  1898. qla2x00_update_fcport(vha, fcport);
  1899. found_devs++;
  1900. }
  1901. cleanup_allocation:
  1902. kfree(new_fcport);
  1903. if (rval != QLA_SUCCESS) {
  1904. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1905. "rval=%x\n", vha->host_no, rval));
  1906. }
  1907. return (rval);
  1908. }
  1909. static void
  1910. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1911. {
  1912. #define LS_UNKNOWN 2
  1913. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1914. int rval;
  1915. uint16_t mb[6];
  1916. struct qla_hw_data *ha = vha->hw;
  1917. if (!IS_IIDMA_CAPABLE(ha))
  1918. return;
  1919. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1920. fcport->fp_speed > ha->link_data_rate)
  1921. return;
  1922. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1923. mb);
  1924. if (rval != QLA_SUCCESS) {
  1925. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1926. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1927. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1928. fcport->port_name[2], fcport->port_name[3],
  1929. fcport->port_name[4], fcport->port_name[5],
  1930. fcport->port_name[6], fcport->port_name[7], rval,
  1931. fcport->fp_speed, mb[0], mb[1]));
  1932. } else {
  1933. DEBUG2(qla_printk(KERN_INFO, ha,
  1934. "iIDMA adjusted to %s GB/s on "
  1935. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1936. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1937. fcport->port_name[1], fcport->port_name[2],
  1938. fcport->port_name[3], fcport->port_name[4],
  1939. fcport->port_name[5], fcport->port_name[6],
  1940. fcport->port_name[7]));
  1941. }
  1942. }
  1943. static void
  1944. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1945. {
  1946. struct fc_rport_identifiers rport_ids;
  1947. struct fc_rport *rport;
  1948. struct qla_hw_data *ha = vha->hw;
  1949. if (fcport->drport)
  1950. qla2x00_rport_del(fcport);
  1951. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1952. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1953. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1954. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1955. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1956. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1957. if (!rport) {
  1958. qla_printk(KERN_WARNING, ha,
  1959. "Unable to allocate fc remote port!\n");
  1960. return;
  1961. }
  1962. spin_lock_irq(fcport->vha->host->host_lock);
  1963. *((fc_port_t **)rport->dd_data) = fcport;
  1964. spin_unlock_irq(fcport->vha->host->host_lock);
  1965. rport->supported_classes = fcport->supported_classes;
  1966. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1967. if (fcport->port_type == FCT_INITIATOR)
  1968. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1969. if (fcport->port_type == FCT_TARGET)
  1970. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1971. fc_remote_port_rolechg(rport, rport_ids.roles);
  1972. }
  1973. /*
  1974. * qla2x00_update_fcport
  1975. * Updates device on list.
  1976. *
  1977. * Input:
  1978. * ha = adapter block pointer.
  1979. * fcport = port structure pointer.
  1980. *
  1981. * Return:
  1982. * 0 - Success
  1983. * BIT_0 - error
  1984. *
  1985. * Context:
  1986. * Kernel context.
  1987. */
  1988. void
  1989. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1990. {
  1991. struct qla_hw_data *ha = vha->hw;
  1992. fcport->vha = vha;
  1993. fcport->login_retry = 0;
  1994. fcport->port_login_retry_count = ha->port_down_retry_count *
  1995. PORT_RETRY_TIME;
  1996. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  1997. PORT_RETRY_TIME);
  1998. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1999. qla2x00_iidma_fcport(vha, fcport);
  2000. atomic_set(&fcport->state, FCS_ONLINE);
  2001. qla2x00_reg_remote_port(vha, fcport);
  2002. }
  2003. /*
  2004. * qla2x00_configure_fabric
  2005. * Setup SNS devices with loop ID's.
  2006. *
  2007. * Input:
  2008. * ha = adapter block pointer.
  2009. *
  2010. * Returns:
  2011. * 0 = success.
  2012. * BIT_0 = error
  2013. */
  2014. static int
  2015. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2016. {
  2017. int rval, rval2;
  2018. fc_port_t *fcport, *fcptemp;
  2019. uint16_t next_loopid;
  2020. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2021. uint16_t loop_id;
  2022. LIST_HEAD(new_fcports);
  2023. struct qla_hw_data *ha = vha->hw;
  2024. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2025. /* If FL port exists, then SNS is present */
  2026. if (IS_FWI2_CAPABLE(ha))
  2027. loop_id = NPH_F_PORT;
  2028. else
  2029. loop_id = SNS_FL_PORT;
  2030. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2031. if (rval != QLA_SUCCESS) {
  2032. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2033. "Port\n", vha->host_no));
  2034. vha->device_flags &= ~SWITCH_FOUND;
  2035. return (QLA_SUCCESS);
  2036. }
  2037. vha->device_flags |= SWITCH_FOUND;
  2038. /* Mark devices that need re-synchronization. */
  2039. rval2 = qla2x00_device_resync(vha);
  2040. if (rval2 == QLA_RSCNS_HANDLED) {
  2041. /* No point doing the scan, just continue. */
  2042. return (QLA_SUCCESS);
  2043. }
  2044. do {
  2045. /* FDMI support. */
  2046. if (ql2xfdmienable &&
  2047. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2048. qla2x00_fdmi_register(vha);
  2049. /* Ensure we are logged into the SNS. */
  2050. if (IS_FWI2_CAPABLE(ha))
  2051. loop_id = NPH_SNS;
  2052. else
  2053. loop_id = SIMPLE_NAME_SERVER;
  2054. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2055. 0xfc, mb, BIT_1 | BIT_0);
  2056. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2057. DEBUG2(qla_printk(KERN_INFO, ha,
  2058. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2059. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2060. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2061. return (QLA_SUCCESS);
  2062. }
  2063. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2064. if (qla2x00_rft_id(vha)) {
  2065. /* EMPTY */
  2066. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2067. "TYPE failed.\n", vha->host_no));
  2068. }
  2069. if (qla2x00_rff_id(vha)) {
  2070. /* EMPTY */
  2071. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2072. "Features failed.\n", vha->host_no));
  2073. }
  2074. if (qla2x00_rnn_id(vha)) {
  2075. /* EMPTY */
  2076. DEBUG2(printk("scsi(%ld): Register Node Name "
  2077. "failed.\n", vha->host_no));
  2078. } else if (qla2x00_rsnn_nn(vha)) {
  2079. /* EMPTY */
  2080. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2081. "Node Name failed.\n", vha->host_no));
  2082. }
  2083. }
  2084. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2085. if (rval != QLA_SUCCESS)
  2086. break;
  2087. /*
  2088. * Logout all previous fabric devices marked lost, except
  2089. * tape devices.
  2090. */
  2091. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2092. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2093. break;
  2094. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2095. continue;
  2096. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2097. qla2x00_mark_device_lost(vha, fcport,
  2098. ql2xplogiabsentdevice, 0);
  2099. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2100. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2101. fcport->port_type != FCT_INITIATOR &&
  2102. fcport->port_type != FCT_BROADCAST) {
  2103. ha->isp_ops->fabric_logout(vha,
  2104. fcport->loop_id,
  2105. fcport->d_id.b.domain,
  2106. fcport->d_id.b.area,
  2107. fcport->d_id.b.al_pa);
  2108. fcport->loop_id = FC_NO_LOOP_ID;
  2109. }
  2110. }
  2111. }
  2112. /* Starting free loop ID. */
  2113. next_loopid = ha->min_external_loopid;
  2114. /*
  2115. * Scan through our port list and login entries that need to be
  2116. * logged in.
  2117. */
  2118. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2119. if (atomic_read(&vha->loop_down_timer) ||
  2120. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2121. break;
  2122. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2123. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2124. continue;
  2125. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2126. fcport->loop_id = next_loopid;
  2127. rval = qla2x00_find_new_loop_id(
  2128. base_vha, fcport);
  2129. if (rval != QLA_SUCCESS) {
  2130. /* Ran out of IDs to use */
  2131. break;
  2132. }
  2133. }
  2134. /* Login and update database */
  2135. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2136. }
  2137. /* Exit if out of loop IDs. */
  2138. if (rval != QLA_SUCCESS) {
  2139. break;
  2140. }
  2141. /*
  2142. * Login and add the new devices to our port list.
  2143. */
  2144. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2145. if (atomic_read(&vha->loop_down_timer) ||
  2146. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2147. break;
  2148. /* Find a new loop ID to use. */
  2149. fcport->loop_id = next_loopid;
  2150. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2151. if (rval != QLA_SUCCESS) {
  2152. /* Ran out of IDs to use */
  2153. break;
  2154. }
  2155. /* Login and update database */
  2156. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2157. if (vha->vp_idx) {
  2158. fcport->vha = vha;
  2159. fcport->vp_idx = vha->vp_idx;
  2160. }
  2161. list_move_tail(&fcport->list, &vha->vp_fcports);
  2162. }
  2163. } while (0);
  2164. /* Free all new device structures not processed. */
  2165. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2166. list_del(&fcport->list);
  2167. kfree(fcport);
  2168. }
  2169. if (rval) {
  2170. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2171. "rval=%d\n", vha->host_no, rval));
  2172. }
  2173. return (rval);
  2174. }
  2175. /*
  2176. * qla2x00_find_all_fabric_devs
  2177. *
  2178. * Input:
  2179. * ha = adapter block pointer.
  2180. * dev = database device entry pointer.
  2181. *
  2182. * Returns:
  2183. * 0 = success.
  2184. *
  2185. * Context:
  2186. * Kernel context.
  2187. */
  2188. static int
  2189. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2190. struct list_head *new_fcports)
  2191. {
  2192. int rval;
  2193. uint16_t loop_id;
  2194. fc_port_t *fcport, *new_fcport, *fcptemp;
  2195. int found;
  2196. sw_info_t *swl;
  2197. int swl_idx;
  2198. int first_dev, last_dev;
  2199. port_id_t wrap, nxt_d_id;
  2200. struct qla_hw_data *ha = vha->hw;
  2201. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2202. struct scsi_qla_host *tvp;
  2203. rval = QLA_SUCCESS;
  2204. /* Try GID_PT to get device list, else GAN. */
  2205. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2206. if (!swl) {
  2207. /*EMPTY*/
  2208. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2209. "on GA_NXT\n", vha->host_no));
  2210. } else {
  2211. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2212. kfree(swl);
  2213. swl = NULL;
  2214. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2215. kfree(swl);
  2216. swl = NULL;
  2217. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2218. kfree(swl);
  2219. swl = NULL;
  2220. } else if (ql2xiidmaenable &&
  2221. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2222. qla2x00_gpsc(vha, swl);
  2223. }
  2224. }
  2225. swl_idx = 0;
  2226. /* Allocate temporary fcport for any new fcports discovered. */
  2227. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2228. if (new_fcport == NULL) {
  2229. kfree(swl);
  2230. return (QLA_MEMORY_ALLOC_FAILED);
  2231. }
  2232. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2233. /* Set start port ID scan at adapter ID. */
  2234. first_dev = 1;
  2235. last_dev = 0;
  2236. /* Starting free loop ID. */
  2237. loop_id = ha->min_external_loopid;
  2238. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2239. if (qla2x00_is_reserved_id(vha, loop_id))
  2240. continue;
  2241. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2242. break;
  2243. if (swl != NULL) {
  2244. if (last_dev) {
  2245. wrap.b24 = new_fcport->d_id.b24;
  2246. } else {
  2247. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2248. memcpy(new_fcport->node_name,
  2249. swl[swl_idx].node_name, WWN_SIZE);
  2250. memcpy(new_fcport->port_name,
  2251. swl[swl_idx].port_name, WWN_SIZE);
  2252. memcpy(new_fcport->fabric_port_name,
  2253. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2254. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2255. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2256. last_dev = 1;
  2257. }
  2258. swl_idx++;
  2259. }
  2260. } else {
  2261. /* Send GA_NXT to the switch */
  2262. rval = qla2x00_ga_nxt(vha, new_fcport);
  2263. if (rval != QLA_SUCCESS) {
  2264. qla_printk(KERN_WARNING, ha,
  2265. "SNS scan failed -- assuming zero-entry "
  2266. "result...\n");
  2267. list_for_each_entry_safe(fcport, fcptemp,
  2268. new_fcports, list) {
  2269. list_del(&fcport->list);
  2270. kfree(fcport);
  2271. }
  2272. rval = QLA_SUCCESS;
  2273. break;
  2274. }
  2275. }
  2276. /* If wrap on switch device list, exit. */
  2277. if (first_dev) {
  2278. wrap.b24 = new_fcport->d_id.b24;
  2279. first_dev = 0;
  2280. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2281. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2282. vha->host_no, new_fcport->d_id.b.domain,
  2283. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2284. break;
  2285. }
  2286. /* Bypass if same physical adapter. */
  2287. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2288. continue;
  2289. /* Bypass virtual ports of the same host. */
  2290. found = 0;
  2291. if (ha->num_vhosts) {
  2292. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2293. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2294. found = 1;
  2295. break;
  2296. }
  2297. }
  2298. if (found)
  2299. continue;
  2300. }
  2301. /* Bypass if same domain and area of adapter. */
  2302. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2303. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2304. ISP_CFG_FL)
  2305. continue;
  2306. /* Bypass reserved domain fields. */
  2307. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2308. continue;
  2309. /* Locate matching device in database. */
  2310. found = 0;
  2311. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2312. if (memcmp(new_fcport->port_name, fcport->port_name,
  2313. WWN_SIZE))
  2314. continue;
  2315. found++;
  2316. /* Update port state. */
  2317. memcpy(fcport->fabric_port_name,
  2318. new_fcport->fabric_port_name, WWN_SIZE);
  2319. fcport->fp_speed = new_fcport->fp_speed;
  2320. /*
  2321. * If address the same and state FCS_ONLINE, nothing
  2322. * changed.
  2323. */
  2324. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2325. atomic_read(&fcport->state) == FCS_ONLINE) {
  2326. break;
  2327. }
  2328. /*
  2329. * If device was not a fabric device before.
  2330. */
  2331. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2332. fcport->d_id.b24 = new_fcport->d_id.b24;
  2333. fcport->loop_id = FC_NO_LOOP_ID;
  2334. fcport->flags |= (FCF_FABRIC_DEVICE |
  2335. FCF_LOGIN_NEEDED);
  2336. break;
  2337. }
  2338. /*
  2339. * Port ID changed or device was marked to be updated;
  2340. * Log it out if still logged in and mark it for
  2341. * relogin later.
  2342. */
  2343. fcport->d_id.b24 = new_fcport->d_id.b24;
  2344. fcport->flags |= FCF_LOGIN_NEEDED;
  2345. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2346. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2347. fcport->port_type != FCT_INITIATOR &&
  2348. fcport->port_type != FCT_BROADCAST) {
  2349. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2350. fcport->d_id.b.domain, fcport->d_id.b.area,
  2351. fcport->d_id.b.al_pa);
  2352. fcport->loop_id = FC_NO_LOOP_ID;
  2353. }
  2354. break;
  2355. }
  2356. if (found)
  2357. continue;
  2358. /* If device was not in our fcports list, then add it. */
  2359. list_add_tail(&new_fcport->list, new_fcports);
  2360. /* Allocate a new replacement fcport. */
  2361. nxt_d_id.b24 = new_fcport->d_id.b24;
  2362. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2363. if (new_fcport == NULL) {
  2364. kfree(swl);
  2365. return (QLA_MEMORY_ALLOC_FAILED);
  2366. }
  2367. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2368. new_fcport->d_id.b24 = nxt_d_id.b24;
  2369. }
  2370. kfree(swl);
  2371. kfree(new_fcport);
  2372. return (rval);
  2373. }
  2374. /*
  2375. * qla2x00_find_new_loop_id
  2376. * Scan through our port list and find a new usable loop ID.
  2377. *
  2378. * Input:
  2379. * ha: adapter state pointer.
  2380. * dev: port structure pointer.
  2381. *
  2382. * Returns:
  2383. * qla2x00 local function return status code.
  2384. *
  2385. * Context:
  2386. * Kernel context.
  2387. */
  2388. static int
  2389. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2390. {
  2391. int rval;
  2392. int found;
  2393. fc_port_t *fcport;
  2394. uint16_t first_loop_id;
  2395. struct qla_hw_data *ha = vha->hw;
  2396. struct scsi_qla_host *vp;
  2397. struct scsi_qla_host *tvp;
  2398. rval = QLA_SUCCESS;
  2399. /* Save starting loop ID. */
  2400. first_loop_id = dev->loop_id;
  2401. for (;;) {
  2402. /* Skip loop ID if already used by adapter. */
  2403. if (dev->loop_id == vha->loop_id)
  2404. dev->loop_id++;
  2405. /* Skip reserved loop IDs. */
  2406. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2407. dev->loop_id++;
  2408. /* Reset loop ID if passed the end. */
  2409. if (dev->loop_id > ha->max_loop_id) {
  2410. /* first loop ID. */
  2411. dev->loop_id = ha->min_external_loopid;
  2412. }
  2413. /* Check for loop ID being already in use. */
  2414. found = 0;
  2415. fcport = NULL;
  2416. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2417. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2418. if (fcport->loop_id == dev->loop_id &&
  2419. fcport != dev) {
  2420. /* ID possibly in use */
  2421. found++;
  2422. break;
  2423. }
  2424. }
  2425. if (found)
  2426. break;
  2427. }
  2428. /* If not in use then it is free to use. */
  2429. if (!found) {
  2430. break;
  2431. }
  2432. /* ID in use. Try next value. */
  2433. dev->loop_id++;
  2434. /* If wrap around. No free ID to use. */
  2435. if (dev->loop_id == first_loop_id) {
  2436. dev->loop_id = FC_NO_LOOP_ID;
  2437. rval = QLA_FUNCTION_FAILED;
  2438. break;
  2439. }
  2440. }
  2441. return (rval);
  2442. }
  2443. /*
  2444. * qla2x00_device_resync
  2445. * Marks devices in the database that needs resynchronization.
  2446. *
  2447. * Input:
  2448. * ha = adapter block pointer.
  2449. *
  2450. * Context:
  2451. * Kernel context.
  2452. */
  2453. static int
  2454. qla2x00_device_resync(scsi_qla_host_t *vha)
  2455. {
  2456. int rval;
  2457. uint32_t mask;
  2458. fc_port_t *fcport;
  2459. uint32_t rscn_entry;
  2460. uint8_t rscn_out_iter;
  2461. uint8_t format;
  2462. port_id_t d_id;
  2463. rval = QLA_RSCNS_HANDLED;
  2464. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2465. vha->flags.rscn_queue_overflow) {
  2466. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2467. format = MSB(MSW(rscn_entry));
  2468. d_id.b.domain = LSB(MSW(rscn_entry));
  2469. d_id.b.area = MSB(LSW(rscn_entry));
  2470. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2471. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2472. "[%02x/%02x%02x%02x].\n",
  2473. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2474. d_id.b.area, d_id.b.al_pa));
  2475. vha->rscn_out_ptr++;
  2476. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2477. vha->rscn_out_ptr = 0;
  2478. /* Skip duplicate entries. */
  2479. for (rscn_out_iter = vha->rscn_out_ptr;
  2480. !vha->flags.rscn_queue_overflow &&
  2481. rscn_out_iter != vha->rscn_in_ptr;
  2482. rscn_out_iter = (rscn_out_iter ==
  2483. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2484. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2485. break;
  2486. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2487. "entry found at [%d].\n", vha->host_no,
  2488. rscn_out_iter));
  2489. vha->rscn_out_ptr = rscn_out_iter;
  2490. }
  2491. /* Queue overflow, set switch default case. */
  2492. if (vha->flags.rscn_queue_overflow) {
  2493. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2494. "overflow.\n", vha->host_no));
  2495. format = 3;
  2496. vha->flags.rscn_queue_overflow = 0;
  2497. }
  2498. switch (format) {
  2499. case 0:
  2500. mask = 0xffffff;
  2501. break;
  2502. case 1:
  2503. mask = 0xffff00;
  2504. break;
  2505. case 2:
  2506. mask = 0xff0000;
  2507. break;
  2508. default:
  2509. mask = 0x0;
  2510. d_id.b24 = 0;
  2511. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2512. break;
  2513. }
  2514. rval = QLA_SUCCESS;
  2515. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2516. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2517. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2518. fcport->port_type == FCT_BROADCAST)
  2519. continue;
  2520. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2521. if (format != 3 ||
  2522. fcport->port_type != FCT_INITIATOR) {
  2523. qla2x00_mark_device_lost(vha, fcport,
  2524. 0, 0);
  2525. }
  2526. }
  2527. }
  2528. }
  2529. return (rval);
  2530. }
  2531. /*
  2532. * qla2x00_fabric_dev_login
  2533. * Login fabric target device and update FC port database.
  2534. *
  2535. * Input:
  2536. * ha: adapter state pointer.
  2537. * fcport: port structure list pointer.
  2538. * next_loopid: contains value of a new loop ID that can be used
  2539. * by the next login attempt.
  2540. *
  2541. * Returns:
  2542. * qla2x00 local function return status code.
  2543. *
  2544. * Context:
  2545. * Kernel context.
  2546. */
  2547. static int
  2548. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2549. uint16_t *next_loopid)
  2550. {
  2551. int rval;
  2552. int retry;
  2553. uint8_t opts;
  2554. struct qla_hw_data *ha = vha->hw;
  2555. rval = QLA_SUCCESS;
  2556. retry = 0;
  2557. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2558. if (rval == QLA_SUCCESS) {
  2559. /* Send an ADISC to tape devices.*/
  2560. opts = 0;
  2561. if (fcport->flags & FCF_TAPE_PRESENT)
  2562. opts |= BIT_1;
  2563. rval = qla2x00_get_port_database(vha, fcport, opts);
  2564. if (rval != QLA_SUCCESS) {
  2565. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2566. fcport->d_id.b.domain, fcport->d_id.b.area,
  2567. fcport->d_id.b.al_pa);
  2568. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2569. } else {
  2570. qla2x00_update_fcport(vha, fcport);
  2571. }
  2572. }
  2573. return (rval);
  2574. }
  2575. /*
  2576. * qla2x00_fabric_login
  2577. * Issue fabric login command.
  2578. *
  2579. * Input:
  2580. * ha = adapter block pointer.
  2581. * device = pointer to FC device type structure.
  2582. *
  2583. * Returns:
  2584. * 0 - Login successfully
  2585. * 1 - Login failed
  2586. * 2 - Initiator device
  2587. * 3 - Fatal error
  2588. */
  2589. int
  2590. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2591. uint16_t *next_loopid)
  2592. {
  2593. int rval;
  2594. int retry;
  2595. uint16_t tmp_loopid;
  2596. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2597. struct qla_hw_data *ha = vha->hw;
  2598. retry = 0;
  2599. tmp_loopid = 0;
  2600. for (;;) {
  2601. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2602. "for port %02x%02x%02x.\n",
  2603. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2604. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2605. /* Login fcport on switch. */
  2606. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2607. fcport->d_id.b.domain, fcport->d_id.b.area,
  2608. fcport->d_id.b.al_pa, mb, BIT_0);
  2609. if (mb[0] == MBS_PORT_ID_USED) {
  2610. /*
  2611. * Device has another loop ID. The firmware team
  2612. * recommends the driver perform an implicit login with
  2613. * the specified ID again. The ID we just used is save
  2614. * here so we return with an ID that can be tried by
  2615. * the next login.
  2616. */
  2617. retry++;
  2618. tmp_loopid = fcport->loop_id;
  2619. fcport->loop_id = mb[1];
  2620. DEBUG(printk("Fabric Login: port in use - next "
  2621. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2622. fcport->loop_id, fcport->d_id.b.domain,
  2623. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2624. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2625. /*
  2626. * Login succeeded.
  2627. */
  2628. if (retry) {
  2629. /* A retry occurred before. */
  2630. *next_loopid = tmp_loopid;
  2631. } else {
  2632. /*
  2633. * No retry occurred before. Just increment the
  2634. * ID value for next login.
  2635. */
  2636. *next_loopid = (fcport->loop_id + 1);
  2637. }
  2638. if (mb[1] & BIT_0) {
  2639. fcport->port_type = FCT_INITIATOR;
  2640. } else {
  2641. fcport->port_type = FCT_TARGET;
  2642. if (mb[1] & BIT_1) {
  2643. fcport->flags |= FCF_TAPE_PRESENT;
  2644. }
  2645. }
  2646. if (mb[10] & BIT_0)
  2647. fcport->supported_classes |= FC_COS_CLASS2;
  2648. if (mb[10] & BIT_1)
  2649. fcport->supported_classes |= FC_COS_CLASS3;
  2650. rval = QLA_SUCCESS;
  2651. break;
  2652. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2653. /*
  2654. * Loop ID already used, try next loop ID.
  2655. */
  2656. fcport->loop_id++;
  2657. rval = qla2x00_find_new_loop_id(vha, fcport);
  2658. if (rval != QLA_SUCCESS) {
  2659. /* Ran out of loop IDs to use */
  2660. break;
  2661. }
  2662. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2663. /*
  2664. * Firmware possibly timed out during login. If NO
  2665. * retries are left to do then the device is declared
  2666. * dead.
  2667. */
  2668. *next_loopid = fcport->loop_id;
  2669. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2670. fcport->d_id.b.domain, fcport->d_id.b.area,
  2671. fcport->d_id.b.al_pa);
  2672. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2673. rval = 1;
  2674. break;
  2675. } else {
  2676. /*
  2677. * unrecoverable / not handled error
  2678. */
  2679. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2680. "loop_id=%x jiffies=%lx.\n",
  2681. __func__, vha->host_no, mb[0],
  2682. fcport->d_id.b.domain, fcport->d_id.b.area,
  2683. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2684. *next_loopid = fcport->loop_id;
  2685. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2686. fcport->d_id.b.domain, fcport->d_id.b.area,
  2687. fcport->d_id.b.al_pa);
  2688. fcport->loop_id = FC_NO_LOOP_ID;
  2689. fcport->login_retry = 0;
  2690. rval = 3;
  2691. break;
  2692. }
  2693. }
  2694. return (rval);
  2695. }
  2696. /*
  2697. * qla2x00_local_device_login
  2698. * Issue local device login command.
  2699. *
  2700. * Input:
  2701. * ha = adapter block pointer.
  2702. * loop_id = loop id of device to login to.
  2703. *
  2704. * Returns (Where's the #define!!!!):
  2705. * 0 - Login successfully
  2706. * 1 - Login failed
  2707. * 3 - Fatal error
  2708. */
  2709. int
  2710. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2711. {
  2712. int rval;
  2713. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2714. memset(mb, 0, sizeof(mb));
  2715. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2716. if (rval == QLA_SUCCESS) {
  2717. /* Interrogate mailbox registers for any errors */
  2718. if (mb[0] == MBS_COMMAND_ERROR)
  2719. rval = 1;
  2720. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2721. /* device not in PCB table */
  2722. rval = 3;
  2723. }
  2724. return (rval);
  2725. }
  2726. /*
  2727. * qla2x00_loop_resync
  2728. * Resync with fibre channel devices.
  2729. *
  2730. * Input:
  2731. * ha = adapter block pointer.
  2732. *
  2733. * Returns:
  2734. * 0 = success
  2735. */
  2736. int
  2737. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2738. {
  2739. int rval = QLA_SUCCESS;
  2740. uint32_t wait_time;
  2741. struct req_que *req;
  2742. struct rsp_que *rsp;
  2743. if (ql2xmultique_tag)
  2744. req = vha->hw->req_q_map[0];
  2745. else
  2746. req = vha->req;
  2747. rsp = req->rsp;
  2748. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2749. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2750. if (vha->flags.online) {
  2751. if (!(rval = qla2x00_fw_ready(vha))) {
  2752. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2753. wait_time = 256;
  2754. do {
  2755. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2756. /* Issue a marker after FW becomes ready. */
  2757. qla2x00_marker(vha, req, rsp, 0, 0,
  2758. MK_SYNC_ALL);
  2759. vha->marker_needed = 0;
  2760. /* Remap devices on Loop. */
  2761. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2762. qla2x00_configure_loop(vha);
  2763. wait_time--;
  2764. } while (!atomic_read(&vha->loop_down_timer) &&
  2765. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2766. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2767. &vha->dpc_flags)));
  2768. }
  2769. }
  2770. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2771. return (QLA_FUNCTION_FAILED);
  2772. if (rval)
  2773. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2774. return (rval);
  2775. }
  2776. void
  2777. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2778. {
  2779. fc_port_t *fcport;
  2780. /* Go with deferred removal of rport references. */
  2781. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2782. if (fcport && fcport->drport &&
  2783. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2784. qla2x00_rport_del(fcport);
  2785. }
  2786. /*
  2787. * qla2x00_abort_isp
  2788. * Resets ISP and aborts all outstanding commands.
  2789. *
  2790. * Input:
  2791. * ha = adapter block pointer.
  2792. *
  2793. * Returns:
  2794. * 0 = success
  2795. */
  2796. int
  2797. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2798. {
  2799. int rval;
  2800. uint8_t status = 0;
  2801. struct qla_hw_data *ha = vha->hw;
  2802. struct scsi_qla_host *vp;
  2803. struct scsi_qla_host *tvp;
  2804. struct req_que *req = ha->req_q_map[0];
  2805. if (vha->flags.online) {
  2806. vha->flags.online = 0;
  2807. ha->flags.chip_reset_done = 0;
  2808. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2809. ha->qla_stats.total_isp_aborts++;
  2810. qla_printk(KERN_INFO, ha,
  2811. "Performing ISP error recovery - ha= %p.\n", ha);
  2812. ha->isp_ops->reset_chip(vha);
  2813. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2814. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2815. atomic_set(&vha->loop_state, LOOP_DOWN);
  2816. qla2x00_mark_all_devices_lost(vha, 0);
  2817. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2818. qla2x00_mark_all_devices_lost(vp, 0);
  2819. } else {
  2820. if (!atomic_read(&vha->loop_down_timer))
  2821. atomic_set(&vha->loop_down_timer,
  2822. LOOP_DOWN_TIME);
  2823. }
  2824. /* Requeue all commands in outstanding command list. */
  2825. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2826. ha->isp_ops->get_flash_version(vha, req->ring);
  2827. ha->isp_ops->nvram_config(vha);
  2828. if (!qla2x00_restart_isp(vha)) {
  2829. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2830. if (!atomic_read(&vha->loop_down_timer)) {
  2831. /*
  2832. * Issue marker command only when we are going
  2833. * to start the I/O .
  2834. */
  2835. vha->marker_needed = 1;
  2836. }
  2837. vha->flags.online = 1;
  2838. ha->isp_ops->enable_intrs(ha);
  2839. ha->isp_abort_cnt = 0;
  2840. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2841. if (ha->fce) {
  2842. ha->flags.fce_enabled = 1;
  2843. memset(ha->fce, 0,
  2844. fce_calc_size(ha->fce_bufs));
  2845. rval = qla2x00_enable_fce_trace(vha,
  2846. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2847. &ha->fce_bufs);
  2848. if (rval) {
  2849. qla_printk(KERN_WARNING, ha,
  2850. "Unable to reinitialize FCE "
  2851. "(%d).\n", rval);
  2852. ha->flags.fce_enabled = 0;
  2853. }
  2854. }
  2855. if (ha->eft) {
  2856. memset(ha->eft, 0, EFT_SIZE);
  2857. rval = qla2x00_enable_eft_trace(vha,
  2858. ha->eft_dma, EFT_NUM_BUFFERS);
  2859. if (rval) {
  2860. qla_printk(KERN_WARNING, ha,
  2861. "Unable to reinitialize EFT "
  2862. "(%d).\n", rval);
  2863. }
  2864. }
  2865. } else { /* failed the ISP abort */
  2866. vha->flags.online = 1;
  2867. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2868. if (ha->isp_abort_cnt == 0) {
  2869. qla_printk(KERN_WARNING, ha,
  2870. "ISP error recovery failed - "
  2871. "board disabled\n");
  2872. /*
  2873. * The next call disables the board
  2874. * completely.
  2875. */
  2876. ha->isp_ops->reset_adapter(vha);
  2877. vha->flags.online = 0;
  2878. clear_bit(ISP_ABORT_RETRY,
  2879. &vha->dpc_flags);
  2880. status = 0;
  2881. } else { /* schedule another ISP abort */
  2882. ha->isp_abort_cnt--;
  2883. DEBUG(printk("qla%ld: ISP abort - "
  2884. "retry remaining %d\n",
  2885. vha->host_no, ha->isp_abort_cnt));
  2886. status = 1;
  2887. }
  2888. } else {
  2889. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2890. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2891. "- retrying (%d) more times\n",
  2892. vha->host_no, ha->isp_abort_cnt));
  2893. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2894. status = 1;
  2895. }
  2896. }
  2897. }
  2898. if (!status) {
  2899. DEBUG(printk(KERN_INFO
  2900. "qla2x00_abort_isp(%ld): succeeded.\n",
  2901. vha->host_no));
  2902. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2903. if (vp->vp_idx)
  2904. qla2x00_vp_abort_isp(vp);
  2905. }
  2906. } else {
  2907. qla_printk(KERN_INFO, ha,
  2908. "qla2x00_abort_isp: **** FAILED ****\n");
  2909. }
  2910. return(status);
  2911. }
  2912. /*
  2913. * qla2x00_restart_isp
  2914. * restarts the ISP after a reset
  2915. *
  2916. * Input:
  2917. * ha = adapter block pointer.
  2918. *
  2919. * Returns:
  2920. * 0 = success
  2921. */
  2922. static int
  2923. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2924. {
  2925. int status = 0;
  2926. uint32_t wait_time;
  2927. struct qla_hw_data *ha = vha->hw;
  2928. struct req_que *req = ha->req_q_map[0];
  2929. struct rsp_que *rsp = ha->rsp_q_map[0];
  2930. /* If firmware needs to be loaded */
  2931. if (qla2x00_isp_firmware(vha)) {
  2932. vha->flags.online = 0;
  2933. status = ha->isp_ops->chip_diag(vha);
  2934. if (!status)
  2935. status = qla2x00_setup_chip(vha);
  2936. }
  2937. if (!status && !(status = qla2x00_init_rings(vha))) {
  2938. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2939. ha->flags.chip_reset_done = 1;
  2940. /* Initialize the queues in use */
  2941. qla25xx_init_queues(ha);
  2942. status = qla2x00_fw_ready(vha);
  2943. if (!status) {
  2944. DEBUG(printk("%s(): Start configure loop, "
  2945. "status = %d\n", __func__, status));
  2946. /* Issue a marker after FW becomes ready. */
  2947. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2948. vha->flags.online = 1;
  2949. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2950. wait_time = 256;
  2951. do {
  2952. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2953. qla2x00_configure_loop(vha);
  2954. wait_time--;
  2955. } while (!atomic_read(&vha->loop_down_timer) &&
  2956. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2957. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2958. &vha->dpc_flags)));
  2959. }
  2960. /* if no cable then assume it's good */
  2961. if ((vha->device_flags & DFLG_NO_CABLE))
  2962. status = 0;
  2963. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2964. __func__,
  2965. status));
  2966. }
  2967. return (status);
  2968. }
  2969. static int
  2970. qla25xx_init_queues(struct qla_hw_data *ha)
  2971. {
  2972. struct rsp_que *rsp = NULL;
  2973. struct req_que *req = NULL;
  2974. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2975. int ret = -1;
  2976. int i;
  2977. for (i = 1; i < ha->max_rsp_queues; i++) {
  2978. rsp = ha->rsp_q_map[i];
  2979. if (rsp) {
  2980. rsp->options &= ~BIT_0;
  2981. ret = qla25xx_init_rsp_que(base_vha, rsp);
  2982. if (ret != QLA_SUCCESS)
  2983. DEBUG2_17(printk(KERN_WARNING
  2984. "%s Rsp que:%d init failed\n", __func__,
  2985. rsp->id));
  2986. else
  2987. DEBUG2_17(printk(KERN_INFO
  2988. "%s Rsp que:%d inited\n", __func__,
  2989. rsp->id));
  2990. }
  2991. }
  2992. for (i = 1; i < ha->max_req_queues; i++) {
  2993. req = ha->req_q_map[i];
  2994. if (req) {
  2995. /* Clear outstanding commands array. */
  2996. req->options &= ~BIT_0;
  2997. ret = qla25xx_init_req_que(base_vha, req);
  2998. if (ret != QLA_SUCCESS)
  2999. DEBUG2_17(printk(KERN_WARNING
  3000. "%s Req que:%d init failed\n", __func__,
  3001. req->id));
  3002. else
  3003. DEBUG2_17(printk(KERN_WARNING
  3004. "%s Req que:%d inited\n", __func__,
  3005. req->id));
  3006. }
  3007. }
  3008. return ret;
  3009. }
  3010. /*
  3011. * qla2x00_reset_adapter
  3012. * Reset adapter.
  3013. *
  3014. * Input:
  3015. * ha = adapter block pointer.
  3016. */
  3017. void
  3018. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3019. {
  3020. unsigned long flags = 0;
  3021. struct qla_hw_data *ha = vha->hw;
  3022. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3023. vha->flags.online = 0;
  3024. ha->isp_ops->disable_intrs(ha);
  3025. spin_lock_irqsave(&ha->hardware_lock, flags);
  3026. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3027. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3028. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3029. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3030. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3031. }
  3032. void
  3033. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3034. {
  3035. unsigned long flags = 0;
  3036. struct qla_hw_data *ha = vha->hw;
  3037. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3038. vha->flags.online = 0;
  3039. ha->isp_ops->disable_intrs(ha);
  3040. spin_lock_irqsave(&ha->hardware_lock, flags);
  3041. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3042. RD_REG_DWORD(&reg->hccr);
  3043. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3044. RD_REG_DWORD(&reg->hccr);
  3045. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3046. if (IS_NOPOLLING_TYPE(ha))
  3047. ha->isp_ops->enable_intrs(ha);
  3048. }
  3049. /* On sparc systems, obtain port and node WWN from firmware
  3050. * properties.
  3051. */
  3052. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3053. struct nvram_24xx *nv)
  3054. {
  3055. #ifdef CONFIG_SPARC
  3056. struct qla_hw_data *ha = vha->hw;
  3057. struct pci_dev *pdev = ha->pdev;
  3058. struct device_node *dp = pci_device_to_OF_node(pdev);
  3059. const u8 *val;
  3060. int len;
  3061. val = of_get_property(dp, "port-wwn", &len);
  3062. if (val && len >= WWN_SIZE)
  3063. memcpy(nv->port_name, val, WWN_SIZE);
  3064. val = of_get_property(dp, "node-wwn", &len);
  3065. if (val && len >= WWN_SIZE)
  3066. memcpy(nv->node_name, val, WWN_SIZE);
  3067. #endif
  3068. }
  3069. int
  3070. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3071. {
  3072. int rval;
  3073. struct init_cb_24xx *icb;
  3074. struct nvram_24xx *nv;
  3075. uint32_t *dptr;
  3076. uint8_t *dptr1, *dptr2;
  3077. uint32_t chksum;
  3078. uint16_t cnt;
  3079. struct qla_hw_data *ha = vha->hw;
  3080. rval = QLA_SUCCESS;
  3081. icb = (struct init_cb_24xx *)ha->init_cb;
  3082. nv = ha->nvram;
  3083. /* Determine NVRAM starting address. */
  3084. if (ha->flags.port0) {
  3085. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3086. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3087. } else {
  3088. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3089. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3090. }
  3091. ha->nvram_size = sizeof(struct nvram_24xx);
  3092. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3093. /* Get VPD data into cache */
  3094. ha->vpd = ha->nvram + VPD_OFFSET;
  3095. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3096. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3097. /* Get NVRAM data into cache and calculate checksum. */
  3098. dptr = (uint32_t *)nv;
  3099. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3100. ha->nvram_size);
  3101. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3102. chksum += le32_to_cpu(*dptr++);
  3103. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3104. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3105. /* Bad NVRAM data, set defaults parameters. */
  3106. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3107. || nv->id[3] != ' ' ||
  3108. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3109. /* Reset NVRAM data. */
  3110. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3111. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3112. le16_to_cpu(nv->nvram_version));
  3113. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3114. "invalid -- WWPN) defaults.\n");
  3115. /*
  3116. * Set default initialization control block.
  3117. */
  3118. memset(nv, 0, ha->nvram_size);
  3119. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3120. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3121. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3122. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3123. nv->exchange_count = __constant_cpu_to_le16(0);
  3124. nv->hard_address = __constant_cpu_to_le16(124);
  3125. nv->port_name[0] = 0x21;
  3126. nv->port_name[1] = 0x00 + ha->port_no;
  3127. nv->port_name[2] = 0x00;
  3128. nv->port_name[3] = 0xe0;
  3129. nv->port_name[4] = 0x8b;
  3130. nv->port_name[5] = 0x1c;
  3131. nv->port_name[6] = 0x55;
  3132. nv->port_name[7] = 0x86;
  3133. nv->node_name[0] = 0x20;
  3134. nv->node_name[1] = 0x00;
  3135. nv->node_name[2] = 0x00;
  3136. nv->node_name[3] = 0xe0;
  3137. nv->node_name[4] = 0x8b;
  3138. nv->node_name[5] = 0x1c;
  3139. nv->node_name[6] = 0x55;
  3140. nv->node_name[7] = 0x86;
  3141. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3142. nv->login_retry_count = __constant_cpu_to_le16(8);
  3143. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3144. nv->login_timeout = __constant_cpu_to_le16(0);
  3145. nv->firmware_options_1 =
  3146. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3147. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3148. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3149. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3150. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3151. nv->efi_parameters = __constant_cpu_to_le32(0);
  3152. nv->reset_delay = 5;
  3153. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3154. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3155. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3156. rval = 1;
  3157. }
  3158. /* Reset Initialization control block */
  3159. memset(icb, 0, ha->init_cb_size);
  3160. /* Copy 1st segment. */
  3161. dptr1 = (uint8_t *)icb;
  3162. dptr2 = (uint8_t *)&nv->version;
  3163. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3164. while (cnt--)
  3165. *dptr1++ = *dptr2++;
  3166. icb->login_retry_count = nv->login_retry_count;
  3167. icb->link_down_on_nos = nv->link_down_on_nos;
  3168. /* Copy 2nd segment. */
  3169. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3170. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3171. cnt = (uint8_t *)&icb->reserved_3 -
  3172. (uint8_t *)&icb->interrupt_delay_timer;
  3173. while (cnt--)
  3174. *dptr1++ = *dptr2++;
  3175. /*
  3176. * Setup driver NVRAM options.
  3177. */
  3178. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3179. "QLA2462");
  3180. /* Use alternate WWN? */
  3181. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3182. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3183. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3184. }
  3185. /* Prepare nodename */
  3186. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3187. /*
  3188. * Firmware will apply the following mask if the nodename was
  3189. * not provided.
  3190. */
  3191. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3192. icb->node_name[0] &= 0xF0;
  3193. }
  3194. /* Set host adapter parameters. */
  3195. ha->flags.disable_risc_code_load = 0;
  3196. ha->flags.enable_lip_reset = 0;
  3197. ha->flags.enable_lip_full_login =
  3198. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3199. ha->flags.enable_target_reset =
  3200. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3201. ha->flags.enable_led_scheme = 0;
  3202. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3203. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3204. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3205. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3206. sizeof(ha->fw_seriallink_options24));
  3207. /* save HBA serial number */
  3208. ha->serial0 = icb->port_name[5];
  3209. ha->serial1 = icb->port_name[6];
  3210. ha->serial2 = icb->port_name[7];
  3211. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3212. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3213. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3214. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3215. /* Set minimum login_timeout to 4 seconds. */
  3216. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3217. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3218. if (le16_to_cpu(nv->login_timeout) < 4)
  3219. nv->login_timeout = __constant_cpu_to_le16(4);
  3220. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3221. icb->login_timeout = nv->login_timeout;
  3222. /* Set minimum RATOV to 100 tenths of a second. */
  3223. ha->r_a_tov = 100;
  3224. ha->loop_reset_delay = nv->reset_delay;
  3225. /* Link Down Timeout = 0:
  3226. *
  3227. * When Port Down timer expires we will start returning
  3228. * I/O's to OS with "DID_NO_CONNECT".
  3229. *
  3230. * Link Down Timeout != 0:
  3231. *
  3232. * The driver waits for the link to come up after link down
  3233. * before returning I/Os to OS with "DID_NO_CONNECT".
  3234. */
  3235. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3236. ha->loop_down_abort_time =
  3237. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3238. } else {
  3239. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3240. ha->loop_down_abort_time =
  3241. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3242. }
  3243. /* Need enough time to try and get the port back. */
  3244. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3245. if (qlport_down_retry)
  3246. ha->port_down_retry_count = qlport_down_retry;
  3247. /* Set login_retry_count */
  3248. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3249. if (ha->port_down_retry_count ==
  3250. le16_to_cpu(nv->port_down_retry_count) &&
  3251. ha->port_down_retry_count > 3)
  3252. ha->login_retry_count = ha->port_down_retry_count;
  3253. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3254. ha->login_retry_count = ha->port_down_retry_count;
  3255. if (ql2xloginretrycount)
  3256. ha->login_retry_count = ql2xloginretrycount;
  3257. /* Enable ZIO. */
  3258. if (!vha->flags.init_done) {
  3259. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3260. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3261. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3262. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3263. }
  3264. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3265. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3266. vha->flags.process_response_queue = 0;
  3267. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3268. ha->zio_mode = QLA_ZIO_MODE_6;
  3269. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3270. "(%d us).\n", vha->host_no, ha->zio_mode,
  3271. ha->zio_timer * 100));
  3272. qla_printk(KERN_INFO, ha,
  3273. "ZIO mode %d enabled; timer delay (%d us).\n",
  3274. ha->zio_mode, ha->zio_timer * 100);
  3275. icb->firmware_options_2 |= cpu_to_le32(
  3276. (uint32_t)ha->zio_mode);
  3277. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3278. vha->flags.process_response_queue = 1;
  3279. }
  3280. if (rval) {
  3281. DEBUG2_3(printk(KERN_WARNING
  3282. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3283. }
  3284. return (rval);
  3285. }
  3286. static int
  3287. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3288. uint32_t faddr)
  3289. {
  3290. int rval = QLA_SUCCESS;
  3291. int segments, fragment;
  3292. uint32_t *dcode, dlen;
  3293. uint32_t risc_addr;
  3294. uint32_t risc_size;
  3295. uint32_t i;
  3296. struct qla_hw_data *ha = vha->hw;
  3297. struct req_que *req = ha->req_q_map[0];
  3298. qla_printk(KERN_INFO, ha,
  3299. "FW: Loading from flash (%x)...\n", faddr);
  3300. rval = QLA_SUCCESS;
  3301. segments = FA_RISC_CODE_SEGMENTS;
  3302. dcode = (uint32_t *)req->ring;
  3303. *srisc_addr = 0;
  3304. /* Validate firmware image by checking version. */
  3305. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3306. for (i = 0; i < 4; i++)
  3307. dcode[i] = be32_to_cpu(dcode[i]);
  3308. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3309. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3310. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3311. dcode[3] == 0)) {
  3312. qla_printk(KERN_WARNING, ha,
  3313. "Unable to verify integrity of flash firmware image!\n");
  3314. qla_printk(KERN_WARNING, ha,
  3315. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3316. dcode[1], dcode[2], dcode[3]);
  3317. return QLA_FUNCTION_FAILED;
  3318. }
  3319. while (segments && rval == QLA_SUCCESS) {
  3320. /* Read segment's load information. */
  3321. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3322. risc_addr = be32_to_cpu(dcode[2]);
  3323. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3324. risc_size = be32_to_cpu(dcode[3]);
  3325. fragment = 0;
  3326. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3327. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3328. if (dlen > risc_size)
  3329. dlen = risc_size;
  3330. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3331. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3332. vha->host_no, risc_addr, dlen, faddr));
  3333. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3334. for (i = 0; i < dlen; i++)
  3335. dcode[i] = swab32(dcode[i]);
  3336. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3337. dlen);
  3338. if (rval) {
  3339. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3340. "segment %d of firmware\n", vha->host_no,
  3341. fragment));
  3342. qla_printk(KERN_WARNING, ha,
  3343. "[ERROR] Failed to load segment %d of "
  3344. "firmware\n", fragment);
  3345. break;
  3346. }
  3347. faddr += dlen;
  3348. risc_addr += dlen;
  3349. risc_size -= dlen;
  3350. fragment++;
  3351. }
  3352. /* Next segment. */
  3353. segments--;
  3354. }
  3355. return rval;
  3356. }
  3357. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3358. int
  3359. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3360. {
  3361. int rval;
  3362. int i, fragment;
  3363. uint16_t *wcode, *fwcode;
  3364. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3365. struct fw_blob *blob;
  3366. struct qla_hw_data *ha = vha->hw;
  3367. struct req_que *req = ha->req_q_map[0];
  3368. /* Load firmware blob. */
  3369. blob = qla2x00_request_firmware(vha);
  3370. if (!blob) {
  3371. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3372. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3373. "from: " QLA_FW_URL ".\n");
  3374. return QLA_FUNCTION_FAILED;
  3375. }
  3376. rval = QLA_SUCCESS;
  3377. wcode = (uint16_t *)req->ring;
  3378. *srisc_addr = 0;
  3379. fwcode = (uint16_t *)blob->fw->data;
  3380. fwclen = 0;
  3381. /* Validate firmware image by checking version. */
  3382. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3383. qla_printk(KERN_WARNING, ha,
  3384. "Unable to verify integrity of firmware image (%Zd)!\n",
  3385. blob->fw->size);
  3386. goto fail_fw_integrity;
  3387. }
  3388. for (i = 0; i < 4; i++)
  3389. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3390. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3391. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3392. wcode[2] == 0 && wcode[3] == 0)) {
  3393. qla_printk(KERN_WARNING, ha,
  3394. "Unable to verify integrity of firmware image!\n");
  3395. qla_printk(KERN_WARNING, ha,
  3396. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3397. wcode[1], wcode[2], wcode[3]);
  3398. goto fail_fw_integrity;
  3399. }
  3400. seg = blob->segs;
  3401. while (*seg && rval == QLA_SUCCESS) {
  3402. risc_addr = *seg;
  3403. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3404. risc_size = be16_to_cpu(fwcode[3]);
  3405. /* Validate firmware image size. */
  3406. fwclen += risc_size * sizeof(uint16_t);
  3407. if (blob->fw->size < fwclen) {
  3408. qla_printk(KERN_WARNING, ha,
  3409. "Unable to verify integrity of firmware image "
  3410. "(%Zd)!\n", blob->fw->size);
  3411. goto fail_fw_integrity;
  3412. }
  3413. fragment = 0;
  3414. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3415. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3416. if (wlen > risc_size)
  3417. wlen = risc_size;
  3418. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3419. "addr %x, number of words 0x%x.\n", vha->host_no,
  3420. risc_addr, wlen));
  3421. for (i = 0; i < wlen; i++)
  3422. wcode[i] = swab16(fwcode[i]);
  3423. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3424. wlen);
  3425. if (rval) {
  3426. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3427. "segment %d of firmware\n", vha->host_no,
  3428. fragment));
  3429. qla_printk(KERN_WARNING, ha,
  3430. "[ERROR] Failed to load segment %d of "
  3431. "firmware\n", fragment);
  3432. break;
  3433. }
  3434. fwcode += wlen;
  3435. risc_addr += wlen;
  3436. risc_size -= wlen;
  3437. fragment++;
  3438. }
  3439. /* Next segment. */
  3440. seg++;
  3441. }
  3442. return rval;
  3443. fail_fw_integrity:
  3444. return QLA_FUNCTION_FAILED;
  3445. }
  3446. static int
  3447. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3448. {
  3449. int rval;
  3450. int segments, fragment;
  3451. uint32_t *dcode, dlen;
  3452. uint32_t risc_addr;
  3453. uint32_t risc_size;
  3454. uint32_t i;
  3455. struct fw_blob *blob;
  3456. uint32_t *fwcode, fwclen;
  3457. struct qla_hw_data *ha = vha->hw;
  3458. struct req_que *req = ha->req_q_map[0];
  3459. /* Load firmware blob. */
  3460. blob = qla2x00_request_firmware(vha);
  3461. if (!blob) {
  3462. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3463. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3464. "from: " QLA_FW_URL ".\n");
  3465. return QLA_FUNCTION_FAILED;
  3466. }
  3467. qla_printk(KERN_INFO, ha,
  3468. "FW: Loading via request-firmware...\n");
  3469. rval = QLA_SUCCESS;
  3470. segments = FA_RISC_CODE_SEGMENTS;
  3471. dcode = (uint32_t *)req->ring;
  3472. *srisc_addr = 0;
  3473. fwcode = (uint32_t *)blob->fw->data;
  3474. fwclen = 0;
  3475. /* Validate firmware image by checking version. */
  3476. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3477. qla_printk(KERN_WARNING, ha,
  3478. "Unable to verify integrity of firmware image (%Zd)!\n",
  3479. blob->fw->size);
  3480. goto fail_fw_integrity;
  3481. }
  3482. for (i = 0; i < 4; i++)
  3483. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3484. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3485. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3486. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3487. dcode[3] == 0)) {
  3488. qla_printk(KERN_WARNING, ha,
  3489. "Unable to verify integrity of firmware image!\n");
  3490. qla_printk(KERN_WARNING, ha,
  3491. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3492. dcode[1], dcode[2], dcode[3]);
  3493. goto fail_fw_integrity;
  3494. }
  3495. while (segments && rval == QLA_SUCCESS) {
  3496. risc_addr = be32_to_cpu(fwcode[2]);
  3497. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3498. risc_size = be32_to_cpu(fwcode[3]);
  3499. /* Validate firmware image size. */
  3500. fwclen += risc_size * sizeof(uint32_t);
  3501. if (blob->fw->size < fwclen) {
  3502. qla_printk(KERN_WARNING, ha,
  3503. "Unable to verify integrity of firmware image "
  3504. "(%Zd)!\n", blob->fw->size);
  3505. goto fail_fw_integrity;
  3506. }
  3507. fragment = 0;
  3508. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3509. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3510. if (dlen > risc_size)
  3511. dlen = risc_size;
  3512. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3513. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3514. risc_addr, dlen));
  3515. for (i = 0; i < dlen; i++)
  3516. dcode[i] = swab32(fwcode[i]);
  3517. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3518. dlen);
  3519. if (rval) {
  3520. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3521. "segment %d of firmware\n", vha->host_no,
  3522. fragment));
  3523. qla_printk(KERN_WARNING, ha,
  3524. "[ERROR] Failed to load segment %d of "
  3525. "firmware\n", fragment);
  3526. break;
  3527. }
  3528. fwcode += dlen;
  3529. risc_addr += dlen;
  3530. risc_size -= dlen;
  3531. fragment++;
  3532. }
  3533. /* Next segment. */
  3534. segments--;
  3535. }
  3536. return rval;
  3537. fail_fw_integrity:
  3538. return QLA_FUNCTION_FAILED;
  3539. }
  3540. int
  3541. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3542. {
  3543. int rval;
  3544. if (ql2xfwloadbin == 1)
  3545. return qla81xx_load_risc(vha, srisc_addr);
  3546. /*
  3547. * FW Load priority:
  3548. * 1) Firmware via request-firmware interface (.bin file).
  3549. * 2) Firmware residing in flash.
  3550. */
  3551. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3552. if (rval == QLA_SUCCESS)
  3553. return rval;
  3554. return qla24xx_load_risc_flash(vha, srisc_addr,
  3555. vha->hw->flt_region_fw);
  3556. }
  3557. int
  3558. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3559. {
  3560. int rval;
  3561. struct qla_hw_data *ha = vha->hw;
  3562. if (ql2xfwloadbin == 2)
  3563. goto try_blob_fw;
  3564. /*
  3565. * FW Load priority:
  3566. * 1) Firmware residing in flash.
  3567. * 2) Firmware via request-firmware interface (.bin file).
  3568. * 3) Golden-Firmware residing in flash -- limited operation.
  3569. */
  3570. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3571. if (rval == QLA_SUCCESS)
  3572. return rval;
  3573. try_blob_fw:
  3574. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3575. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3576. return rval;
  3577. qla_printk(KERN_ERR, ha,
  3578. "FW: Attempting to fallback to golden firmware...\n");
  3579. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3580. if (rval != QLA_SUCCESS)
  3581. return rval;
  3582. qla_printk(KERN_ERR, ha,
  3583. "FW: Please update operational firmware...\n");
  3584. ha->flags.running_gold_fw = 1;
  3585. return rval;
  3586. }
  3587. void
  3588. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3589. {
  3590. int ret, retries;
  3591. struct qla_hw_data *ha = vha->hw;
  3592. if (!IS_FWI2_CAPABLE(ha))
  3593. return;
  3594. if (!ha->fw_major_version)
  3595. return;
  3596. ret = qla2x00_stop_firmware(vha);
  3597. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3598. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3599. ha->isp_ops->reset_chip(vha);
  3600. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3601. continue;
  3602. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3603. continue;
  3604. qla_printk(KERN_INFO, ha,
  3605. "Attempting retry of stop-firmware command...\n");
  3606. ret = qla2x00_stop_firmware(vha);
  3607. }
  3608. }
  3609. int
  3610. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3611. {
  3612. int rval = QLA_SUCCESS;
  3613. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3614. struct qla_hw_data *ha = vha->hw;
  3615. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3616. struct req_que *req;
  3617. struct rsp_que *rsp;
  3618. if (!vha->vp_idx)
  3619. return -EINVAL;
  3620. rval = qla2x00_fw_ready(base_vha);
  3621. if (ql2xmultique_tag)
  3622. req = ha->req_q_map[0];
  3623. else
  3624. req = vha->req;
  3625. rsp = req->rsp;
  3626. if (rval == QLA_SUCCESS) {
  3627. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3628. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3629. }
  3630. vha->flags.management_server_logged_in = 0;
  3631. /* Login to SNS first */
  3632. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3633. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3634. DEBUG15(qla_printk(KERN_INFO, ha,
  3635. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3636. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3637. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3638. return (QLA_FUNCTION_FAILED);
  3639. }
  3640. atomic_set(&vha->loop_down_timer, 0);
  3641. atomic_set(&vha->loop_state, LOOP_UP);
  3642. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3643. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3644. rval = qla2x00_loop_resync(base_vha);
  3645. return rval;
  3646. }
  3647. /* 84XX Support **************************************************************/
  3648. static LIST_HEAD(qla_cs84xx_list);
  3649. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3650. static struct qla_chip_state_84xx *
  3651. qla84xx_get_chip(struct scsi_qla_host *vha)
  3652. {
  3653. struct qla_chip_state_84xx *cs84xx;
  3654. struct qla_hw_data *ha = vha->hw;
  3655. mutex_lock(&qla_cs84xx_mutex);
  3656. /* Find any shared 84xx chip. */
  3657. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3658. if (cs84xx->bus == ha->pdev->bus) {
  3659. kref_get(&cs84xx->kref);
  3660. goto done;
  3661. }
  3662. }
  3663. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3664. if (!cs84xx)
  3665. goto done;
  3666. kref_init(&cs84xx->kref);
  3667. spin_lock_init(&cs84xx->access_lock);
  3668. mutex_init(&cs84xx->fw_update_mutex);
  3669. cs84xx->bus = ha->pdev->bus;
  3670. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3671. done:
  3672. mutex_unlock(&qla_cs84xx_mutex);
  3673. return cs84xx;
  3674. }
  3675. static void
  3676. __qla84xx_chip_release(struct kref *kref)
  3677. {
  3678. struct qla_chip_state_84xx *cs84xx =
  3679. container_of(kref, struct qla_chip_state_84xx, kref);
  3680. mutex_lock(&qla_cs84xx_mutex);
  3681. list_del(&cs84xx->list);
  3682. mutex_unlock(&qla_cs84xx_mutex);
  3683. kfree(cs84xx);
  3684. }
  3685. void
  3686. qla84xx_put_chip(struct scsi_qla_host *vha)
  3687. {
  3688. struct qla_hw_data *ha = vha->hw;
  3689. if (ha->cs84xx)
  3690. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3691. }
  3692. static int
  3693. qla84xx_init_chip(scsi_qla_host_t *vha)
  3694. {
  3695. int rval;
  3696. uint16_t status[2];
  3697. struct qla_hw_data *ha = vha->hw;
  3698. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3699. rval = qla84xx_verify_chip(vha, status);
  3700. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3701. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3702. QLA_SUCCESS;
  3703. }
  3704. /* 81XX Support **************************************************************/
  3705. int
  3706. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3707. {
  3708. int rval;
  3709. struct init_cb_81xx *icb;
  3710. struct nvram_81xx *nv;
  3711. uint32_t *dptr;
  3712. uint8_t *dptr1, *dptr2;
  3713. uint32_t chksum;
  3714. uint16_t cnt;
  3715. struct qla_hw_data *ha = vha->hw;
  3716. rval = QLA_SUCCESS;
  3717. icb = (struct init_cb_81xx *)ha->init_cb;
  3718. nv = ha->nvram;
  3719. /* Determine NVRAM starting address. */
  3720. ha->nvram_size = sizeof(struct nvram_81xx);
  3721. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3722. /* Get VPD data into cache */
  3723. ha->vpd = ha->nvram + VPD_OFFSET;
  3724. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3725. ha->vpd_size);
  3726. /* Get NVRAM data into cache and calculate checksum. */
  3727. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3728. ha->nvram_size);
  3729. dptr = (uint32_t *)nv;
  3730. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3731. chksum += le32_to_cpu(*dptr++);
  3732. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3733. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3734. /* Bad NVRAM data, set defaults parameters. */
  3735. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3736. || nv->id[3] != ' ' ||
  3737. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3738. /* Reset NVRAM data. */
  3739. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3740. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3741. le16_to_cpu(nv->nvram_version));
  3742. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3743. "invalid -- WWPN) defaults.\n");
  3744. /*
  3745. * Set default initialization control block.
  3746. */
  3747. memset(nv, 0, ha->nvram_size);
  3748. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3749. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3750. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3751. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3752. nv->exchange_count = __constant_cpu_to_le16(0);
  3753. nv->port_name[0] = 0x21;
  3754. nv->port_name[1] = 0x00 + ha->port_no;
  3755. nv->port_name[2] = 0x00;
  3756. nv->port_name[3] = 0xe0;
  3757. nv->port_name[4] = 0x8b;
  3758. nv->port_name[5] = 0x1c;
  3759. nv->port_name[6] = 0x55;
  3760. nv->port_name[7] = 0x86;
  3761. nv->node_name[0] = 0x20;
  3762. nv->node_name[1] = 0x00;
  3763. nv->node_name[2] = 0x00;
  3764. nv->node_name[3] = 0xe0;
  3765. nv->node_name[4] = 0x8b;
  3766. nv->node_name[5] = 0x1c;
  3767. nv->node_name[6] = 0x55;
  3768. nv->node_name[7] = 0x86;
  3769. nv->login_retry_count = __constant_cpu_to_le16(8);
  3770. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3771. nv->login_timeout = __constant_cpu_to_le16(0);
  3772. nv->firmware_options_1 =
  3773. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3774. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3775. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3776. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3777. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3778. nv->efi_parameters = __constant_cpu_to_le32(0);
  3779. nv->reset_delay = 5;
  3780. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3781. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3782. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3783. nv->enode_mac[0] = 0x01;
  3784. nv->enode_mac[1] = 0x02;
  3785. nv->enode_mac[2] = 0x03;
  3786. nv->enode_mac[3] = 0x04;
  3787. nv->enode_mac[4] = 0x05;
  3788. nv->enode_mac[5] = 0x06 + ha->port_no;
  3789. rval = 1;
  3790. }
  3791. /* Reset Initialization control block */
  3792. memset(icb, 0, sizeof(struct init_cb_81xx));
  3793. /* Copy 1st segment. */
  3794. dptr1 = (uint8_t *)icb;
  3795. dptr2 = (uint8_t *)&nv->version;
  3796. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3797. while (cnt--)
  3798. *dptr1++ = *dptr2++;
  3799. icb->login_retry_count = nv->login_retry_count;
  3800. /* Copy 2nd segment. */
  3801. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3802. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3803. cnt = (uint8_t *)&icb->reserved_5 -
  3804. (uint8_t *)&icb->interrupt_delay_timer;
  3805. while (cnt--)
  3806. *dptr1++ = *dptr2++;
  3807. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3808. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3809. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3810. icb->enode_mac[0] = 0x01;
  3811. icb->enode_mac[1] = 0x02;
  3812. icb->enode_mac[2] = 0x03;
  3813. icb->enode_mac[3] = 0x04;
  3814. icb->enode_mac[4] = 0x05;
  3815. icb->enode_mac[5] = 0x06 + ha->port_no;
  3816. }
  3817. /* Use extended-initialization control block. */
  3818. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3819. /*
  3820. * Setup driver NVRAM options.
  3821. */
  3822. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3823. "QLE81XX");
  3824. /* Use alternate WWN? */
  3825. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3826. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3827. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3828. }
  3829. /* Prepare nodename */
  3830. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3831. /*
  3832. * Firmware will apply the following mask if the nodename was
  3833. * not provided.
  3834. */
  3835. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3836. icb->node_name[0] &= 0xF0;
  3837. }
  3838. /* Set host adapter parameters. */
  3839. ha->flags.disable_risc_code_load = 0;
  3840. ha->flags.enable_lip_reset = 0;
  3841. ha->flags.enable_lip_full_login =
  3842. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3843. ha->flags.enable_target_reset =
  3844. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3845. ha->flags.enable_led_scheme = 0;
  3846. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3847. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3848. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3849. /* save HBA serial number */
  3850. ha->serial0 = icb->port_name[5];
  3851. ha->serial1 = icb->port_name[6];
  3852. ha->serial2 = icb->port_name[7];
  3853. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3854. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3855. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3856. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3857. /* Set minimum login_timeout to 4 seconds. */
  3858. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3859. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3860. if (le16_to_cpu(nv->login_timeout) < 4)
  3861. nv->login_timeout = __constant_cpu_to_le16(4);
  3862. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3863. icb->login_timeout = nv->login_timeout;
  3864. /* Set minimum RATOV to 100 tenths of a second. */
  3865. ha->r_a_tov = 100;
  3866. ha->loop_reset_delay = nv->reset_delay;
  3867. /* Link Down Timeout = 0:
  3868. *
  3869. * When Port Down timer expires we will start returning
  3870. * I/O's to OS with "DID_NO_CONNECT".
  3871. *
  3872. * Link Down Timeout != 0:
  3873. *
  3874. * The driver waits for the link to come up after link down
  3875. * before returning I/Os to OS with "DID_NO_CONNECT".
  3876. */
  3877. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3878. ha->loop_down_abort_time =
  3879. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3880. } else {
  3881. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3882. ha->loop_down_abort_time =
  3883. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3884. }
  3885. /* Need enough time to try and get the port back. */
  3886. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3887. if (qlport_down_retry)
  3888. ha->port_down_retry_count = qlport_down_retry;
  3889. /* Set login_retry_count */
  3890. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3891. if (ha->port_down_retry_count ==
  3892. le16_to_cpu(nv->port_down_retry_count) &&
  3893. ha->port_down_retry_count > 3)
  3894. ha->login_retry_count = ha->port_down_retry_count;
  3895. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3896. ha->login_retry_count = ha->port_down_retry_count;
  3897. if (ql2xloginretrycount)
  3898. ha->login_retry_count = ql2xloginretrycount;
  3899. /* Enable ZIO. */
  3900. if (!vha->flags.init_done) {
  3901. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3902. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3903. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3904. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3905. }
  3906. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3907. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3908. vha->flags.process_response_queue = 0;
  3909. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3910. ha->zio_mode = QLA_ZIO_MODE_6;
  3911. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3912. "(%d us).\n", vha->host_no, ha->zio_mode,
  3913. ha->zio_timer * 100));
  3914. qla_printk(KERN_INFO, ha,
  3915. "ZIO mode %d enabled; timer delay (%d us).\n",
  3916. ha->zio_mode, ha->zio_timer * 100);
  3917. icb->firmware_options_2 |= cpu_to_le32(
  3918. (uint32_t)ha->zio_mode);
  3919. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3920. vha->flags.process_response_queue = 1;
  3921. }
  3922. if (rval) {
  3923. DEBUG2_3(printk(KERN_WARNING
  3924. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3925. }
  3926. return (rval);
  3927. }
  3928. void
  3929. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3930. {
  3931. }