nouveau_fence.c 13 KB

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  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_ramht.h"
  30. #include "nouveau_dma.h"
  31. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  32. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  33. struct nouveau_fence {
  34. struct nouveau_channel *channel;
  35. struct kref refcount;
  36. struct list_head entry;
  37. uint32_t sequence;
  38. bool signalled;
  39. void (*work)(void *priv, bool signalled);
  40. void *priv;
  41. };
  42. struct nouveau_semaphore {
  43. struct kref ref;
  44. struct drm_device *dev;
  45. struct drm_mm_node *mem;
  46. };
  47. static inline struct nouveau_fence *
  48. nouveau_fence(void *sync_obj)
  49. {
  50. return (struct nouveau_fence *)sync_obj;
  51. }
  52. static void
  53. nouveau_fence_del(struct kref *ref)
  54. {
  55. struct nouveau_fence *fence =
  56. container_of(ref, struct nouveau_fence, refcount);
  57. nouveau_channel_ref(NULL, &fence->channel);
  58. kfree(fence);
  59. }
  60. void
  61. nouveau_fence_update(struct nouveau_channel *chan)
  62. {
  63. struct drm_device *dev = chan->dev;
  64. struct nouveau_fence *tmp, *fence;
  65. uint32_t sequence;
  66. spin_lock(&chan->fence.lock);
  67. /* Fetch the last sequence if the channel is still up and running */
  68. if (likely(!list_empty(&chan->fence.pending))) {
  69. if (USE_REFCNT(dev))
  70. sequence = nvchan_rd32(chan, 0x48);
  71. else
  72. sequence = atomic_read(&chan->fence.last_sequence_irq);
  73. if (chan->fence.sequence_ack == sequence)
  74. goto out;
  75. chan->fence.sequence_ack = sequence;
  76. }
  77. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  78. sequence = fence->sequence;
  79. fence->signalled = true;
  80. list_del(&fence->entry);
  81. if (unlikely(fence->work))
  82. fence->work(fence->priv, true);
  83. kref_put(&fence->refcount, nouveau_fence_del);
  84. if (sequence == chan->fence.sequence_ack)
  85. break;
  86. }
  87. out:
  88. spin_unlock(&chan->fence.lock);
  89. }
  90. int
  91. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  92. bool emit)
  93. {
  94. struct nouveau_fence *fence;
  95. int ret = 0;
  96. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  97. if (!fence)
  98. return -ENOMEM;
  99. kref_init(&fence->refcount);
  100. nouveau_channel_ref(chan, &fence->channel);
  101. if (emit)
  102. ret = nouveau_fence_emit(fence);
  103. if (ret)
  104. nouveau_fence_unref(&fence);
  105. *pfence = fence;
  106. return ret;
  107. }
  108. struct nouveau_channel *
  109. nouveau_fence_channel(struct nouveau_fence *fence)
  110. {
  111. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  112. }
  113. int
  114. nouveau_fence_emit(struct nouveau_fence *fence)
  115. {
  116. struct nouveau_channel *chan = fence->channel;
  117. struct drm_device *dev = chan->dev;
  118. int ret;
  119. ret = RING_SPACE(chan, 2);
  120. if (ret)
  121. return ret;
  122. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  123. nouveau_fence_update(chan);
  124. BUG_ON(chan->fence.sequence ==
  125. chan->fence.sequence_ack - 1);
  126. }
  127. fence->sequence = ++chan->fence.sequence;
  128. kref_get(&fence->refcount);
  129. spin_lock(&chan->fence.lock);
  130. list_add_tail(&fence->entry, &chan->fence.pending);
  131. spin_unlock(&chan->fence.lock);
  132. BEGIN_RING(chan, NvSubSw, USE_REFCNT(dev) ? 0x0050 : 0x0150, 1);
  133. OUT_RING(chan, fence->sequence);
  134. FIRE_RING(chan);
  135. return 0;
  136. }
  137. void
  138. nouveau_fence_work(struct nouveau_fence *fence,
  139. void (*work)(void *priv, bool signalled),
  140. void *priv)
  141. {
  142. BUG_ON(fence->work);
  143. spin_lock(&fence->channel->fence.lock);
  144. if (fence->signalled) {
  145. work(priv, true);
  146. } else {
  147. fence->work = work;
  148. fence->priv = priv;
  149. }
  150. spin_unlock(&fence->channel->fence.lock);
  151. }
  152. void
  153. __nouveau_fence_unref(void **sync_obj)
  154. {
  155. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  156. if (fence)
  157. kref_put(&fence->refcount, nouveau_fence_del);
  158. *sync_obj = NULL;
  159. }
  160. void *
  161. __nouveau_fence_ref(void *sync_obj)
  162. {
  163. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  164. kref_get(&fence->refcount);
  165. return sync_obj;
  166. }
  167. bool
  168. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  169. {
  170. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  171. struct nouveau_channel *chan = fence->channel;
  172. if (fence->signalled)
  173. return true;
  174. nouveau_fence_update(chan);
  175. return fence->signalled;
  176. }
  177. int
  178. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  179. {
  180. unsigned long timeout = jiffies + (3 * DRM_HZ);
  181. unsigned long sleep_time = jiffies + 1;
  182. int ret = 0;
  183. while (1) {
  184. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  185. break;
  186. if (time_after_eq(jiffies, timeout)) {
  187. ret = -EBUSY;
  188. break;
  189. }
  190. __set_current_state(intr ? TASK_INTERRUPTIBLE
  191. : TASK_UNINTERRUPTIBLE);
  192. if (lazy && time_after_eq(jiffies, sleep_time))
  193. schedule_timeout(1);
  194. if (intr && signal_pending(current)) {
  195. ret = -ERESTARTSYS;
  196. break;
  197. }
  198. }
  199. __set_current_state(TASK_RUNNING);
  200. return ret;
  201. }
  202. static struct nouveau_semaphore *
  203. alloc_semaphore(struct drm_device *dev)
  204. {
  205. struct drm_nouveau_private *dev_priv = dev->dev_private;
  206. struct nouveau_semaphore *sema;
  207. int ret;
  208. if (!USE_SEMA(dev))
  209. return NULL;
  210. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  211. if (!sema)
  212. goto fail;
  213. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  214. if (ret)
  215. goto fail;
  216. spin_lock(&dev_priv->fence.lock);
  217. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, 4, 0, 0);
  218. if (sema->mem)
  219. sema->mem = drm_mm_get_block_atomic(sema->mem, 4, 0);
  220. spin_unlock(&dev_priv->fence.lock);
  221. if (!sema->mem)
  222. goto fail;
  223. kref_init(&sema->ref);
  224. sema->dev = dev;
  225. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 0);
  226. return sema;
  227. fail:
  228. kfree(sema);
  229. return NULL;
  230. }
  231. static void
  232. free_semaphore(struct kref *ref)
  233. {
  234. struct nouveau_semaphore *sema =
  235. container_of(ref, struct nouveau_semaphore, ref);
  236. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  237. spin_lock(&dev_priv->fence.lock);
  238. drm_mm_put_block(sema->mem);
  239. spin_unlock(&dev_priv->fence.lock);
  240. kfree(sema);
  241. }
  242. static void
  243. semaphore_work(void *priv, bool signalled)
  244. {
  245. struct nouveau_semaphore *sema = priv;
  246. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  247. if (unlikely(!signalled))
  248. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  249. kref_put(&sema->ref, free_semaphore);
  250. }
  251. static int
  252. emit_semaphore(struct nouveau_channel *chan, int method,
  253. struct nouveau_semaphore *sema)
  254. {
  255. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  256. struct nouveau_fence *fence;
  257. bool smart = (dev_priv->card_type >= NV_50);
  258. int ret;
  259. ret = RING_SPACE(chan, smart ? 8 : 4);
  260. if (ret)
  261. return ret;
  262. if (smart) {
  263. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  264. OUT_RING(chan, NvSema);
  265. }
  266. BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
  267. OUT_RING(chan, sema->mem->start);
  268. if (smart && method == NV_SW_SEMAPHORE_ACQUIRE) {
  269. /*
  270. * NV50 tries to be too smart and context-switch
  271. * between semaphores instead of doing a "first come,
  272. * first served" strategy like previous cards
  273. * do.
  274. *
  275. * That's bad because the ACQUIRE latency can get as
  276. * large as the PFIFO context time slice in the
  277. * typical DRI2 case where you have several
  278. * outstanding semaphores at the same moment.
  279. *
  280. * If we're going to ACQUIRE, force the card to
  281. * context switch before, just in case the matching
  282. * RELEASE is already scheduled to be executed in
  283. * another channel.
  284. */
  285. BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
  286. OUT_RING(chan, 0);
  287. }
  288. BEGIN_RING(chan, NvSubSw, method, 1);
  289. OUT_RING(chan, 1);
  290. if (smart && method == NV_SW_SEMAPHORE_RELEASE) {
  291. /*
  292. * Force the card to context switch, there may be
  293. * another channel waiting for the semaphore we just
  294. * released.
  295. */
  296. BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
  297. OUT_RING(chan, 0);
  298. }
  299. /* Delay semaphore destruction until its work is done */
  300. ret = nouveau_fence_new(chan, &fence, true);
  301. if (ret)
  302. return ret;
  303. kref_get(&sema->ref);
  304. nouveau_fence_work(fence, semaphore_work, sema);
  305. nouveau_fence_unref(&fence);
  306. return 0;
  307. }
  308. int
  309. nouveau_fence_sync(struct nouveau_fence *fence,
  310. struct nouveau_channel *wchan)
  311. {
  312. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  313. struct drm_device *dev = wchan->dev;
  314. struct nouveau_semaphore *sema;
  315. int ret = 0;
  316. if (likely(!chan || chan == wchan ||
  317. nouveau_fence_signalled(fence)))
  318. goto out;
  319. sema = alloc_semaphore(dev);
  320. if (!sema) {
  321. /* Early card or broken userspace, fall back to
  322. * software sync. */
  323. ret = nouveau_fence_wait(fence, true, false);
  324. goto out;
  325. }
  326. /* try to take chan's mutex, if we can't take it right away
  327. * we have to fallback to software sync to prevent locking
  328. * order issues
  329. */
  330. if (!mutex_trylock(&chan->mutex)) {
  331. ret = nouveau_fence_wait(fence, true, false);
  332. goto out_unref;
  333. }
  334. /* Make wchan wait until it gets signalled */
  335. ret = emit_semaphore(wchan, NV_SW_SEMAPHORE_ACQUIRE, sema);
  336. if (ret)
  337. goto out_unlock;
  338. /* Signal the semaphore from chan */
  339. ret = emit_semaphore(chan, NV_SW_SEMAPHORE_RELEASE, sema);
  340. out_unlock:
  341. mutex_unlock(&chan->mutex);
  342. out_unref:
  343. kref_put(&sema->ref, free_semaphore);
  344. out:
  345. if (chan)
  346. nouveau_channel_put_unlocked(&chan);
  347. return ret;
  348. }
  349. int
  350. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  351. {
  352. return 0;
  353. }
  354. int
  355. nouveau_fence_channel_init(struct nouveau_channel *chan)
  356. {
  357. struct drm_device *dev = chan->dev;
  358. struct drm_nouveau_private *dev_priv = dev->dev_private;
  359. struct nouveau_gpuobj *obj = NULL;
  360. int ret;
  361. /* Create an NV_SW object for various sync purposes */
  362. ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
  363. if (ret)
  364. return ret;
  365. ret = RING_SPACE(chan, 2);
  366. if (ret)
  367. return ret;
  368. BEGIN_RING(chan, NvSubSw, 0, 1);
  369. OUT_RING(chan, NvSw);
  370. /* Create a DMA object for the shared cross-channel sync area. */
  371. if (USE_SEMA(dev)) {
  372. struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
  373. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
  374. mem->start << PAGE_SHIFT,
  375. mem->size, NV_MEM_ACCESS_RW,
  376. NV_MEM_TARGET_VRAM, &obj);
  377. if (ret)
  378. return ret;
  379. ret = nouveau_ramht_insert(chan, NvSema, obj);
  380. nouveau_gpuobj_ref(NULL, &obj);
  381. if (ret)
  382. return ret;
  383. ret = RING_SPACE(chan, 2);
  384. if (ret)
  385. return ret;
  386. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  387. OUT_RING(chan, NvSema);
  388. }
  389. FIRE_RING(chan);
  390. INIT_LIST_HEAD(&chan->fence.pending);
  391. spin_lock_init(&chan->fence.lock);
  392. atomic_set(&chan->fence.last_sequence_irq, 0);
  393. return 0;
  394. }
  395. void
  396. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  397. {
  398. struct nouveau_fence *tmp, *fence;
  399. spin_lock(&chan->fence.lock);
  400. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  401. fence->signalled = true;
  402. list_del(&fence->entry);
  403. if (unlikely(fence->work))
  404. fence->work(fence->priv, false);
  405. kref_put(&fence->refcount, nouveau_fence_del);
  406. }
  407. spin_unlock(&chan->fence.lock);
  408. }
  409. int
  410. nouveau_fence_init(struct drm_device *dev)
  411. {
  412. struct drm_nouveau_private *dev_priv = dev->dev_private;
  413. int ret;
  414. /* Create a shared VRAM heap for cross-channel sync. */
  415. if (USE_SEMA(dev)) {
  416. ret = nouveau_bo_new(dev, NULL, 4096, 0, TTM_PL_FLAG_VRAM,
  417. 0, 0, false, true, &dev_priv->fence.bo);
  418. if (ret)
  419. return ret;
  420. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  421. if (ret)
  422. goto fail;
  423. ret = nouveau_bo_map(dev_priv->fence.bo);
  424. if (ret)
  425. goto fail;
  426. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  427. dev_priv->fence.bo->bo.mem.size);
  428. if (ret)
  429. goto fail;
  430. spin_lock_init(&dev_priv->fence.lock);
  431. }
  432. return 0;
  433. fail:
  434. nouveau_bo_unmap(dev_priv->fence.bo);
  435. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  436. return ret;
  437. }
  438. void
  439. nouveau_fence_fini(struct drm_device *dev)
  440. {
  441. struct drm_nouveau_private *dev_priv = dev->dev_private;
  442. if (USE_SEMA(dev)) {
  443. drm_mm_takedown(&dev_priv->fence.heap);
  444. nouveau_bo_unmap(dev_priv->fence.bo);
  445. nouveau_bo_unpin(dev_priv->fence.bo);
  446. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  447. }
  448. }