pasemi_mac.c 31 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317
  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
  57. #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
  59. #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
  62. & ((ring)->size - 1))
  63. #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
  64. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  65. MODULE_LICENSE("GPL");
  66. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  67. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  68. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  69. module_param(debug, int, 0);
  70. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  71. static struct pasdma_status *dma_status;
  72. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  73. unsigned int val)
  74. {
  75. out_le32(mac->iob_regs+reg, val);
  76. }
  77. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  78. {
  79. return in_le32(mac->regs+reg);
  80. }
  81. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  82. unsigned int val)
  83. {
  84. out_le32(mac->regs+reg, val);
  85. }
  86. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  87. {
  88. return in_le32(mac->dma_regs+reg);
  89. }
  90. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  91. unsigned int val)
  92. {
  93. out_le32(mac->dma_regs+reg, val);
  94. }
  95. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  96. {
  97. struct pci_dev *pdev = mac->pdev;
  98. struct device_node *dn = pci_device_to_OF_node(pdev);
  99. int len;
  100. const u8 *maddr;
  101. u8 addr[6];
  102. if (!dn) {
  103. dev_dbg(&pdev->dev,
  104. "No device node for mac, not configuring\n");
  105. return -ENOENT;
  106. }
  107. maddr = of_get_property(dn, "local-mac-address", &len);
  108. if (maddr && len == 6) {
  109. memcpy(mac->mac_addr, maddr, 6);
  110. return 0;
  111. }
  112. /* Some old versions of firmware mistakenly uses mac-address
  113. * (and as a string) instead of a byte array in local-mac-address.
  114. */
  115. if (maddr == NULL)
  116. maddr = of_get_property(dn, "mac-address", NULL);
  117. if (maddr == NULL) {
  118. dev_warn(&pdev->dev,
  119. "no mac address in device tree, not configuring\n");
  120. return -ENOENT;
  121. }
  122. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  123. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  124. dev_warn(&pdev->dev,
  125. "can't parse mac address, not configuring\n");
  126. return -EINVAL;
  127. }
  128. memcpy(mac->mac_addr, addr, 6);
  129. return 0;
  130. }
  131. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  132. {
  133. struct pasemi_mac_rxring *ring;
  134. struct pasemi_mac *mac = netdev_priv(dev);
  135. int chan_id = mac->dma_rxch;
  136. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  137. if (!ring)
  138. goto out_ring;
  139. spin_lock_init(&ring->lock);
  140. ring->size = RX_RING_SIZE;
  141. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  142. RX_RING_SIZE, GFP_KERNEL);
  143. if (!ring->desc_info)
  144. goto out_desc_info;
  145. /* Allocate descriptors */
  146. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  147. RX_RING_SIZE *
  148. sizeof(struct pas_dma_xct_descr),
  149. &ring->dma, GFP_KERNEL);
  150. if (!ring->desc)
  151. goto out_desc;
  152. memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  153. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  154. RX_RING_SIZE * sizeof(u64),
  155. &ring->buf_dma, GFP_KERNEL);
  156. if (!ring->buffers)
  157. goto out_buffers;
  158. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  159. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  160. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  161. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  162. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
  163. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  164. PAS_DMA_RXCHAN_CFG_HBU(2));
  165. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  166. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  167. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  168. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  169. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  170. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  171. PAS_DMA_RXINT_CFG_DHL(2));
  172. ring->next_to_fill = 0;
  173. ring->next_to_clean = 0;
  174. snprintf(ring->irq_name, sizeof(ring->irq_name),
  175. "%s rx", dev->name);
  176. mac->rx = ring;
  177. return 0;
  178. out_buffers:
  179. dma_free_coherent(&mac->dma_pdev->dev,
  180. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  181. mac->rx->desc, mac->rx->dma);
  182. out_desc:
  183. kfree(ring->desc_info);
  184. out_desc_info:
  185. kfree(ring);
  186. out_ring:
  187. return -ENOMEM;
  188. }
  189. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  190. {
  191. struct pasemi_mac *mac = netdev_priv(dev);
  192. u32 val;
  193. int chan_id = mac->dma_txch;
  194. struct pasemi_mac_txring *ring;
  195. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  196. if (!ring)
  197. goto out_ring;
  198. spin_lock_init(&ring->lock);
  199. ring->size = TX_RING_SIZE;
  200. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  201. TX_RING_SIZE, GFP_KERNEL);
  202. if (!ring->desc_info)
  203. goto out_desc_info;
  204. /* Allocate descriptors */
  205. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  206. TX_RING_SIZE *
  207. sizeof(struct pas_dma_xct_descr),
  208. &ring->dma, GFP_KERNEL);
  209. if (!ring->desc)
  210. goto out_desc;
  211. memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  212. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  213. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  214. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  215. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
  216. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  217. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  218. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  219. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  220. PAS_DMA_TXCHAN_CFG_UP |
  221. PAS_DMA_TXCHAN_CFG_WT(2));
  222. ring->next_to_fill = 0;
  223. ring->next_to_clean = 0;
  224. snprintf(ring->irq_name, sizeof(ring->irq_name),
  225. "%s tx", dev->name);
  226. mac->tx = ring;
  227. return 0;
  228. out_desc:
  229. kfree(ring->desc_info);
  230. out_desc_info:
  231. kfree(ring);
  232. out_ring:
  233. return -ENOMEM;
  234. }
  235. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  236. {
  237. struct pasemi_mac *mac = netdev_priv(dev);
  238. unsigned int i;
  239. struct pasemi_mac_buffer *info;
  240. struct pas_dma_xct_descr *dp;
  241. for (i = 0; i < TX_RING_SIZE; i++) {
  242. info = &TX_DESC_INFO(mac, i);
  243. dp = &TX_DESC(mac, i);
  244. if (info->dma) {
  245. if (info->skb) {
  246. pci_unmap_single(mac->dma_pdev,
  247. info->dma,
  248. info->skb->len,
  249. PCI_DMA_TODEVICE);
  250. dev_kfree_skb_any(info->skb);
  251. }
  252. info->dma = 0;
  253. info->skb = NULL;
  254. dp->mactx = 0;
  255. dp->ptr = 0;
  256. }
  257. }
  258. dma_free_coherent(&mac->dma_pdev->dev,
  259. TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  260. mac->tx->desc, mac->tx->dma);
  261. kfree(mac->tx->desc_info);
  262. kfree(mac->tx);
  263. mac->tx = NULL;
  264. }
  265. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  266. {
  267. struct pasemi_mac *mac = netdev_priv(dev);
  268. unsigned int i;
  269. struct pasemi_mac_buffer *info;
  270. struct pas_dma_xct_descr *dp;
  271. for (i = 0; i < RX_RING_SIZE; i++) {
  272. info = &RX_DESC_INFO(mac, i);
  273. dp = &RX_DESC(mac, i);
  274. if (info->skb) {
  275. if (info->dma) {
  276. pci_unmap_single(mac->dma_pdev,
  277. info->dma,
  278. info->skb->len,
  279. PCI_DMA_FROMDEVICE);
  280. dev_kfree_skb_any(info->skb);
  281. }
  282. info->dma = 0;
  283. info->skb = NULL;
  284. dp->macrx = 0;
  285. dp->ptr = 0;
  286. }
  287. }
  288. dma_free_coherent(&mac->dma_pdev->dev,
  289. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  290. mac->rx->desc, mac->rx->dma);
  291. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  292. mac->rx->buffers, mac->rx->buf_dma);
  293. kfree(mac->rx->desc_info);
  294. kfree(mac->rx);
  295. mac->rx = NULL;
  296. }
  297. static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
  298. {
  299. struct pasemi_mac *mac = netdev_priv(dev);
  300. unsigned int i;
  301. int start = mac->rx->next_to_fill;
  302. unsigned int limit, count;
  303. limit = RING_AVAIL(mac->rx);
  304. /* Check to see if we're doing first-time setup */
  305. if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
  306. limit = RX_RING_SIZE;
  307. if (limit <= 0)
  308. return;
  309. i = start;
  310. for (count = limit; count; count--) {
  311. struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
  312. u64 *buff = &RX_BUFF(mac, i);
  313. struct sk_buff *skb;
  314. dma_addr_t dma;
  315. /* skb might still be in there for recycle on short receives */
  316. if (info->skb)
  317. skb = info->skb;
  318. else
  319. skb = dev_alloc_skb(BUF_SIZE);
  320. if (unlikely(!skb))
  321. break;
  322. dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
  323. PCI_DMA_FROMDEVICE);
  324. if (unlikely(dma_mapping_error(dma))) {
  325. dev_kfree_skb_irq(info->skb);
  326. break;
  327. }
  328. info->skb = skb;
  329. info->dma = dma;
  330. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  331. i++;
  332. }
  333. wmb();
  334. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
  335. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
  336. mac->rx->next_to_fill += limit - count;
  337. }
  338. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  339. {
  340. unsigned int reg, pcnt;
  341. /* Re-enable packet count interrupts: finally
  342. * ack the packet count interrupt we got in rx_intr.
  343. */
  344. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  345. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  346. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  347. }
  348. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  349. {
  350. unsigned int reg, pcnt;
  351. /* Re-enable packet count interrupts */
  352. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  353. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  354. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  355. }
  356. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  357. {
  358. unsigned int n;
  359. int count;
  360. struct pas_dma_xct_descr *dp;
  361. struct pasemi_mac_buffer *info;
  362. struct sk_buff *skb;
  363. unsigned int i, len;
  364. u64 macrx;
  365. dma_addr_t dma;
  366. spin_lock(&mac->rx->lock);
  367. n = mac->rx->next_to_clean;
  368. for (count = limit; count; count--) {
  369. rmb();
  370. dp = &RX_DESC(mac, n);
  371. prefetchw(dp);
  372. macrx = dp->macrx;
  373. if (!(macrx & XCT_MACRX_O))
  374. break;
  375. info = NULL;
  376. /* We have to scan for our skb since there's no way
  377. * to back-map them from the descriptor, and if we
  378. * have several receive channels then they might not
  379. * show up in the same order as they were put on the
  380. * interface ring.
  381. */
  382. dma = (dp->ptr & XCT_PTR_ADDR_M);
  383. for (i = n; i < (n + RX_RING_SIZE); i++) {
  384. info = &RX_DESC_INFO(mac, i);
  385. if (info->dma == dma)
  386. break;
  387. }
  388. prefetchw(info);
  389. skb = info->skb;
  390. prefetchw(skb);
  391. info->dma = 0;
  392. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  393. PCI_DMA_FROMDEVICE);
  394. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  395. if (len < 256) {
  396. struct sk_buff *new_skb =
  397. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  398. if (new_skb) {
  399. skb_reserve(new_skb, NET_IP_ALIGN);
  400. memcpy(new_skb->data, skb->data, len);
  401. /* save the skb in buffer_info as good */
  402. skb = new_skb;
  403. }
  404. /* else just continue with the old one */
  405. } else
  406. info->skb = NULL;
  407. skb_put(skb, len);
  408. if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
  409. skb->ip_summed = CHECKSUM_UNNECESSARY;
  410. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  411. XCT_MACRX_CSUM_S;
  412. } else
  413. skb->ip_summed = CHECKSUM_NONE;
  414. mac->netdev->stats.rx_bytes += len;
  415. mac->netdev->stats.rx_packets++;
  416. skb->protocol = eth_type_trans(skb, mac->netdev);
  417. netif_receive_skb(skb);
  418. dp->ptr = 0;
  419. dp->macrx = 0;
  420. n++;
  421. }
  422. mac->rx->next_to_clean += limit - count;
  423. pasemi_mac_replenish_rx_ring(mac->netdev);
  424. spin_unlock(&mac->rx->lock);
  425. return count;
  426. }
  427. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  428. {
  429. int i;
  430. struct pasemi_mac_buffer *info;
  431. struct pas_dma_xct_descr *dp;
  432. unsigned int start, count, limit;
  433. unsigned int total_count;
  434. unsigned long flags;
  435. struct sk_buff *skbs[32];
  436. dma_addr_t dmas[32];
  437. total_count = 0;
  438. restart:
  439. spin_lock_irqsave(&mac->tx->lock, flags);
  440. start = mac->tx->next_to_clean;
  441. limit = min(mac->tx->next_to_fill, start+32);
  442. count = 0;
  443. for (i = start; i < limit; i++) {
  444. dp = &TX_DESC(mac, i);
  445. if (unlikely(dp->mactx & XCT_MACTX_O))
  446. /* Not yet transmitted */
  447. break;
  448. info = &TX_DESC_INFO(mac, i);
  449. skbs[count] = info->skb;
  450. dmas[count] = info->dma;
  451. info->skb = NULL;
  452. info->dma = 0;
  453. dp->mactx = 0;
  454. dp->ptr = 0;
  455. count++;
  456. }
  457. mac->tx->next_to_clean += count;
  458. spin_unlock_irqrestore(&mac->tx->lock, flags);
  459. netif_wake_queue(mac->netdev);
  460. for (i = 0; i < count; i++) {
  461. pci_unmap_single(mac->dma_pdev, dmas[i],
  462. skbs[i]->len, PCI_DMA_TODEVICE);
  463. dev_kfree_skb_irq(skbs[i]);
  464. }
  465. total_count += count;
  466. /* If the batch was full, try to clean more */
  467. if (count == 32)
  468. goto restart;
  469. return total_count;
  470. }
  471. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  472. {
  473. struct net_device *dev = data;
  474. struct pasemi_mac *mac = netdev_priv(dev);
  475. unsigned int reg;
  476. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  477. return IRQ_NONE;
  478. if (*mac->rx_status & PAS_STATUS_ERROR)
  479. printk("rx_status reported error\n");
  480. /* Don't reset packet count so it won't fire again but clear
  481. * all others.
  482. */
  483. reg = 0;
  484. if (*mac->rx_status & PAS_STATUS_SOFT)
  485. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  486. if (*mac->rx_status & PAS_STATUS_ERROR)
  487. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  488. if (*mac->rx_status & PAS_STATUS_TIMER)
  489. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  490. netif_rx_schedule(dev, &mac->napi);
  491. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  492. return IRQ_HANDLED;
  493. }
  494. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  495. {
  496. struct net_device *dev = data;
  497. struct pasemi_mac *mac = netdev_priv(dev);
  498. unsigned int reg, pcnt;
  499. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  500. return IRQ_NONE;
  501. pasemi_mac_clean_tx(mac);
  502. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  503. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  504. if (*mac->tx_status & PAS_STATUS_SOFT)
  505. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  506. if (*mac->tx_status & PAS_STATUS_ERROR)
  507. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  508. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  509. return IRQ_HANDLED;
  510. }
  511. static void pasemi_adjust_link(struct net_device *dev)
  512. {
  513. struct pasemi_mac *mac = netdev_priv(dev);
  514. int msg;
  515. unsigned int flags;
  516. unsigned int new_flags;
  517. if (!mac->phydev->link) {
  518. /* If no link, MAC speed settings don't matter. Just report
  519. * link down and return.
  520. */
  521. if (mac->link && netif_msg_link(mac))
  522. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  523. netif_carrier_off(dev);
  524. mac->link = 0;
  525. return;
  526. } else
  527. netif_carrier_on(dev);
  528. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  529. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  530. PAS_MAC_CFG_PCFG_TSR_M);
  531. if (!mac->phydev->duplex)
  532. new_flags |= PAS_MAC_CFG_PCFG_HD;
  533. switch (mac->phydev->speed) {
  534. case 1000:
  535. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  536. PAS_MAC_CFG_PCFG_TSR_1G;
  537. break;
  538. case 100:
  539. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  540. PAS_MAC_CFG_PCFG_TSR_100M;
  541. break;
  542. case 10:
  543. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  544. PAS_MAC_CFG_PCFG_TSR_10M;
  545. break;
  546. default:
  547. printk("Unsupported speed %d\n", mac->phydev->speed);
  548. }
  549. /* Print on link or speed/duplex change */
  550. msg = mac->link != mac->phydev->link || flags != new_flags;
  551. mac->duplex = mac->phydev->duplex;
  552. mac->speed = mac->phydev->speed;
  553. mac->link = mac->phydev->link;
  554. if (new_flags != flags)
  555. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  556. if (msg && netif_msg_link(mac))
  557. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  558. dev->name, mac->speed, mac->duplex ? "full" : "half");
  559. }
  560. static int pasemi_mac_phy_init(struct net_device *dev)
  561. {
  562. struct pasemi_mac *mac = netdev_priv(dev);
  563. struct device_node *dn, *phy_dn;
  564. struct phy_device *phydev;
  565. unsigned int phy_id;
  566. const phandle *ph;
  567. const unsigned int *prop;
  568. struct resource r;
  569. int ret;
  570. dn = pci_device_to_OF_node(mac->pdev);
  571. ph = of_get_property(dn, "phy-handle", NULL);
  572. if (!ph)
  573. return -ENODEV;
  574. phy_dn = of_find_node_by_phandle(*ph);
  575. prop = of_get_property(phy_dn, "reg", NULL);
  576. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  577. if (ret)
  578. goto err;
  579. phy_id = *prop;
  580. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  581. of_node_put(phy_dn);
  582. mac->link = 0;
  583. mac->speed = 0;
  584. mac->duplex = -1;
  585. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  586. if (IS_ERR(phydev)) {
  587. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  588. return PTR_ERR(phydev);
  589. }
  590. mac->phydev = phydev;
  591. return 0;
  592. err:
  593. of_node_put(phy_dn);
  594. return -ENODEV;
  595. }
  596. static int pasemi_mac_open(struct net_device *dev)
  597. {
  598. struct pasemi_mac *mac = netdev_priv(dev);
  599. int base_irq;
  600. unsigned int flags;
  601. int ret;
  602. /* enable rx section */
  603. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  604. /* enable tx section */
  605. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  606. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  607. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  608. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  609. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  610. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  611. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  612. if (mac->type == MAC_TYPE_GMAC)
  613. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  614. else
  615. flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
  616. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  617. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  618. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  619. PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
  620. /* Clear out any residual packet count state from firmware */
  621. pasemi_mac_restart_rx_intr(mac);
  622. pasemi_mac_restart_tx_intr(mac);
  623. /* 0xffffff is max value, about 16ms */
  624. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  625. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  626. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  627. ret = pasemi_mac_setup_rx_resources(dev);
  628. if (ret)
  629. goto out_rx_resources;
  630. ret = pasemi_mac_setup_tx_resources(dev);
  631. if (ret)
  632. goto out_tx_resources;
  633. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  634. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  635. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  636. /* enable rx if */
  637. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  638. PAS_DMA_RXINT_RCMDSTA_EN);
  639. /* enable rx channel */
  640. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  641. PAS_DMA_RXCHAN_CCMDSTA_EN |
  642. PAS_DMA_RXCHAN_CCMDSTA_DU);
  643. /* enable tx channel */
  644. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  645. PAS_DMA_TXCHAN_TCMDSTA_EN);
  646. pasemi_mac_replenish_rx_ring(dev);
  647. ret = pasemi_mac_phy_init(dev);
  648. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  649. * failed init due to -ENODEV.
  650. */
  651. if (ret && ret != -ENODEV)
  652. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  653. netif_start_queue(dev);
  654. napi_enable(&mac->napi);
  655. /* Interrupts are a bit different for our DMA controller: While
  656. * it's got one a regular PCI device header, the interrupt there
  657. * is really the base of the range it's using. Each tx and rx
  658. * channel has it's own interrupt source.
  659. */
  660. base_irq = virq_to_hw(mac->dma_pdev->irq);
  661. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  662. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  663. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  664. mac->tx->irq_name, dev);
  665. if (ret) {
  666. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  667. base_irq + mac->dma_txch, ret);
  668. goto out_tx_int;
  669. }
  670. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  671. mac->rx->irq_name, dev);
  672. if (ret) {
  673. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  674. base_irq + 20 + mac->dma_rxch, ret);
  675. goto out_rx_int;
  676. }
  677. if (mac->phydev)
  678. phy_start(mac->phydev);
  679. return 0;
  680. out_rx_int:
  681. free_irq(mac->tx_irq, dev);
  682. out_tx_int:
  683. napi_disable(&mac->napi);
  684. netif_stop_queue(dev);
  685. pasemi_mac_free_tx_resources(dev);
  686. out_tx_resources:
  687. pasemi_mac_free_rx_resources(dev);
  688. out_rx_resources:
  689. return ret;
  690. }
  691. #define MAX_RETRIES 5000
  692. static int pasemi_mac_close(struct net_device *dev)
  693. {
  694. struct pasemi_mac *mac = netdev_priv(dev);
  695. unsigned int stat;
  696. int retries;
  697. if (mac->phydev) {
  698. phy_stop(mac->phydev);
  699. phy_disconnect(mac->phydev);
  700. }
  701. netif_stop_queue(dev);
  702. napi_disable(&mac->napi);
  703. /* Clean out any pending buffers */
  704. pasemi_mac_clean_tx(mac);
  705. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  706. /* Disable interface */
  707. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  708. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  709. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  710. for (retries = 0; retries < MAX_RETRIES; retries++) {
  711. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  712. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  713. break;
  714. cond_resched();
  715. }
  716. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  717. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  718. for (retries = 0; retries < MAX_RETRIES; retries++) {
  719. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  720. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  721. break;
  722. cond_resched();
  723. }
  724. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  725. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  726. for (retries = 0; retries < MAX_RETRIES; retries++) {
  727. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  728. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  729. break;
  730. cond_resched();
  731. }
  732. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  733. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  734. /* Then, disable the channel. This must be done separately from
  735. * stopping, since you can't disable when active.
  736. */
  737. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  738. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  739. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  740. free_irq(mac->tx_irq, dev);
  741. free_irq(mac->rx_irq, dev);
  742. /* Free resources */
  743. pasemi_mac_free_rx_resources(dev);
  744. pasemi_mac_free_tx_resources(dev);
  745. return 0;
  746. }
  747. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  748. {
  749. struct pasemi_mac *mac = netdev_priv(dev);
  750. struct pasemi_mac_txring *txring;
  751. struct pasemi_mac_buffer *info;
  752. struct pas_dma_xct_descr *dp;
  753. u64 dflags, mactx, ptr;
  754. dma_addr_t map;
  755. unsigned long flags;
  756. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  757. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  758. const unsigned char *nh = skb_network_header(skb);
  759. switch (ip_hdr(skb)->protocol) {
  760. case IPPROTO_TCP:
  761. dflags |= XCT_MACTX_CSUM_TCP;
  762. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  763. dflags |= XCT_MACTX_IPO(nh - skb->data);
  764. break;
  765. case IPPROTO_UDP:
  766. dflags |= XCT_MACTX_CSUM_UDP;
  767. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  768. dflags |= XCT_MACTX_IPO(nh - skb->data);
  769. break;
  770. }
  771. }
  772. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  773. if (dma_mapping_error(map))
  774. return NETDEV_TX_BUSY;
  775. mactx = dflags | XCT_MACTX_LLEN(skb->len);
  776. ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  777. txring = mac->tx;
  778. spin_lock_irqsave(&txring->lock, flags);
  779. if (RING_AVAIL(txring) <= 1) {
  780. spin_unlock_irqrestore(&txring->lock, flags);
  781. pasemi_mac_clean_tx(mac);
  782. pasemi_mac_restart_tx_intr(mac);
  783. spin_lock_irqsave(&txring->lock, flags);
  784. if (RING_AVAIL(txring) <= 1) {
  785. /* Still no room -- stop the queue and wait for tx
  786. * intr when there's room.
  787. */
  788. netif_stop_queue(dev);
  789. goto out_err;
  790. }
  791. }
  792. dp = &TX_DESC(mac, txring->next_to_fill);
  793. info = &TX_DESC_INFO(mac, txring->next_to_fill);
  794. dp->mactx = mactx;
  795. dp->ptr = ptr;
  796. info->dma = map;
  797. info->skb = skb;
  798. txring->next_to_fill++;
  799. dev->stats.tx_packets++;
  800. dev->stats.tx_bytes += skb->len;
  801. spin_unlock_irqrestore(&txring->lock, flags);
  802. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  803. return NETDEV_TX_OK;
  804. out_err:
  805. spin_unlock_irqrestore(&txring->lock, flags);
  806. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  807. return NETDEV_TX_BUSY;
  808. }
  809. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  810. {
  811. struct pasemi_mac *mac = netdev_priv(dev);
  812. unsigned int flags;
  813. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  814. /* Set promiscuous */
  815. if (dev->flags & IFF_PROMISC)
  816. flags |= PAS_MAC_CFG_PCFG_PR;
  817. else
  818. flags &= ~PAS_MAC_CFG_PCFG_PR;
  819. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  820. }
  821. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  822. {
  823. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  824. struct net_device *dev = mac->netdev;
  825. int pkts;
  826. pasemi_mac_clean_tx(mac);
  827. pkts = pasemi_mac_clean_rx(mac, budget);
  828. if (pkts < budget) {
  829. /* all done, no more packets present */
  830. netif_rx_complete(dev, napi);
  831. pasemi_mac_restart_rx_intr(mac);
  832. }
  833. return pkts;
  834. }
  835. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  836. {
  837. struct device_node *dn;
  838. void __iomem *ret;
  839. dn = pci_device_to_OF_node(p);
  840. if (!dn)
  841. goto fallback;
  842. ret = of_iomap(dn, index);
  843. if (!ret)
  844. goto fallback;
  845. return ret;
  846. fallback:
  847. /* This is hardcoded and ugly, but we have some firmware versions
  848. * that don't provide the register space in the device tree. Luckily
  849. * they are at well-known locations so we can just do the math here.
  850. */
  851. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  852. }
  853. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  854. {
  855. struct resource res;
  856. struct device_node *dn;
  857. int err;
  858. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  859. if (!mac->dma_pdev) {
  860. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  861. return -ENODEV;
  862. }
  863. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  864. if (!mac->iob_pdev) {
  865. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  866. return -ENODEV;
  867. }
  868. mac->regs = map_onedev(mac->pdev, 0);
  869. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  870. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  871. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  872. dev_err(&mac->pdev->dev, "Can't map registers\n");
  873. return -ENODEV;
  874. }
  875. /* The dma status structure is located in the I/O bridge, and
  876. * is cache coherent.
  877. */
  878. if (!dma_status) {
  879. dn = pci_device_to_OF_node(mac->iob_pdev);
  880. if (dn)
  881. err = of_address_to_resource(dn, 1, &res);
  882. if (!dn || err) {
  883. /* Fallback for old firmware */
  884. res.start = 0xfd800000;
  885. res.end = res.start + 0x1000;
  886. }
  887. dma_status = __ioremap(res.start, res.end-res.start, 0);
  888. }
  889. return 0;
  890. }
  891. static int __devinit
  892. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  893. {
  894. static int index = 0;
  895. struct net_device *dev;
  896. struct pasemi_mac *mac;
  897. int err;
  898. DECLARE_MAC_BUF(mac_buf);
  899. err = pci_enable_device(pdev);
  900. if (err)
  901. return err;
  902. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  903. if (dev == NULL) {
  904. dev_err(&pdev->dev,
  905. "pasemi_mac: Could not allocate ethernet device.\n");
  906. err = -ENOMEM;
  907. goto out_disable_device;
  908. }
  909. pci_set_drvdata(pdev, dev);
  910. SET_NETDEV_DEV(dev, &pdev->dev);
  911. mac = netdev_priv(dev);
  912. mac->pdev = pdev;
  913. mac->netdev = dev;
  914. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  915. dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
  916. /* These should come out of the device tree eventually */
  917. mac->dma_txch = index;
  918. mac->dma_rxch = index;
  919. /* We probe GMAC before XAUI, but the DMA interfaces are
  920. * in XAUI, GMAC order.
  921. */
  922. if (index < 4)
  923. mac->dma_if = index + 2;
  924. else
  925. mac->dma_if = index - 4;
  926. index++;
  927. switch (pdev->device) {
  928. case 0xa005:
  929. mac->type = MAC_TYPE_GMAC;
  930. break;
  931. case 0xa006:
  932. mac->type = MAC_TYPE_XAUI;
  933. break;
  934. default:
  935. err = -ENODEV;
  936. goto out;
  937. }
  938. /* get mac addr from device tree */
  939. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  940. err = -ENODEV;
  941. goto out;
  942. }
  943. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  944. dev->open = pasemi_mac_open;
  945. dev->stop = pasemi_mac_close;
  946. dev->hard_start_xmit = pasemi_mac_start_tx;
  947. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  948. err = pasemi_mac_map_regs(mac);
  949. if (err)
  950. goto out;
  951. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  952. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  953. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  954. /* Enable most messages by default */
  955. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  956. err = register_netdev(dev);
  957. if (err) {
  958. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  959. err);
  960. goto out;
  961. } else
  962. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  963. "hw addr %s\n",
  964. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  965. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  966. print_mac(mac_buf, dev->dev_addr));
  967. return err;
  968. out:
  969. if (mac->iob_pdev)
  970. pci_dev_put(mac->iob_pdev);
  971. if (mac->dma_pdev)
  972. pci_dev_put(mac->dma_pdev);
  973. if (mac->dma_regs)
  974. iounmap(mac->dma_regs);
  975. if (mac->iob_regs)
  976. iounmap(mac->iob_regs);
  977. if (mac->regs)
  978. iounmap(mac->regs);
  979. free_netdev(dev);
  980. out_disable_device:
  981. pci_disable_device(pdev);
  982. return err;
  983. }
  984. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  985. {
  986. struct net_device *netdev = pci_get_drvdata(pdev);
  987. struct pasemi_mac *mac;
  988. if (!netdev)
  989. return;
  990. mac = netdev_priv(netdev);
  991. unregister_netdev(netdev);
  992. pci_disable_device(pdev);
  993. pci_dev_put(mac->dma_pdev);
  994. pci_dev_put(mac->iob_pdev);
  995. iounmap(mac->regs);
  996. iounmap(mac->dma_regs);
  997. iounmap(mac->iob_regs);
  998. pci_set_drvdata(pdev, NULL);
  999. free_netdev(netdev);
  1000. }
  1001. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  1002. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  1003. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  1004. { },
  1005. };
  1006. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  1007. static struct pci_driver pasemi_mac_driver = {
  1008. .name = "pasemi_mac",
  1009. .id_table = pasemi_mac_pci_tbl,
  1010. .probe = pasemi_mac_probe,
  1011. .remove = __devexit_p(pasemi_mac_remove),
  1012. };
  1013. static void __exit pasemi_mac_cleanup_module(void)
  1014. {
  1015. pci_unregister_driver(&pasemi_mac_driver);
  1016. __iounmap(dma_status);
  1017. dma_status = NULL;
  1018. }
  1019. int pasemi_mac_init_module(void)
  1020. {
  1021. return pci_register_driver(&pasemi_mac_driver);
  1022. }
  1023. module_init(pasemi_mac_init_module);
  1024. module_exit(pasemi_mac_cleanup_module);