board-mop500-msp.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250
  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License terms: GNU General Public License (GPL), version 2
  5. */
  6. #include <linux/platform_device.h>
  7. #include <linux/init.h>
  8. #include <linux/gpio.h>
  9. #include <plat/gpio-nomadik.h>
  10. #include <plat/pincfg.h>
  11. #include <plat/ste_dma40.h>
  12. #include <mach/devices.h>
  13. #include <ste-dma40-db8500.h>
  14. #include <mach/hardware.h>
  15. #include <mach/irqs.h>
  16. #include <mach/msp.h>
  17. #include "board-mop500.h"
  18. #include "devices-db8500.h"
  19. #include "pins-db8500.h"
  20. /* MSP1/3 Tx/Rx usage protection */
  21. static DEFINE_SPINLOCK(msp_rxtx_lock);
  22. /* Reference Count */
  23. static int msp_rxtx_ref;
  24. static pin_cfg_t mop500_msp1_pins_init[] = {
  25. GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_DISABLE,
  26. GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
  27. GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
  28. GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
  29. };
  30. static pin_cfg_t mop500_msp1_pins_exit[] = {
  31. GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_ENABLE,
  32. GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
  33. GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
  34. GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
  35. };
  36. int msp13_i2s_init(void)
  37. {
  38. int retval = 0;
  39. unsigned long flags;
  40. spin_lock_irqsave(&msp_rxtx_lock, flags);
  41. if (msp_rxtx_ref == 0)
  42. retval = nmk_config_pins(
  43. ARRAY_AND_SIZE(mop500_msp1_pins_init));
  44. if (!retval)
  45. msp_rxtx_ref++;
  46. spin_unlock_irqrestore(&msp_rxtx_lock, flags);
  47. return retval;
  48. }
  49. int msp13_i2s_exit(void)
  50. {
  51. int retval = 0;
  52. unsigned long flags;
  53. spin_lock_irqsave(&msp_rxtx_lock, flags);
  54. WARN_ON(!msp_rxtx_ref);
  55. msp_rxtx_ref--;
  56. if (msp_rxtx_ref == 0)
  57. retval = nmk_config_pins_sleep(
  58. ARRAY_AND_SIZE(mop500_msp1_pins_exit));
  59. spin_unlock_irqrestore(&msp_rxtx_lock, flags);
  60. return retval;
  61. }
  62. static struct stedma40_chan_cfg msp0_dma_rx = {
  63. .high_priority = true,
  64. .dir = STEDMA40_PERIPH_TO_MEM,
  65. .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,
  66. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  67. .src_info.psize = STEDMA40_PSIZE_LOG_4,
  68. .dst_info.psize = STEDMA40_PSIZE_LOG_4,
  69. /* data_width is set during configuration */
  70. };
  71. static struct stedma40_chan_cfg msp0_dma_tx = {
  72. .high_priority = true,
  73. .dir = STEDMA40_MEM_TO_PERIPH,
  74. .src_dev_type = STEDMA40_DEV_DST_MEMORY,
  75. .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,
  76. .src_info.psize = STEDMA40_PSIZE_LOG_4,
  77. .dst_info.psize = STEDMA40_PSIZE_LOG_4,
  78. /* data_width is set during configuration */
  79. };
  80. static struct msp_i2s_platform_data msp0_platform_data = {
  81. .id = MSP_I2S_0,
  82. .msp_i2s_dma_rx = &msp0_dma_rx,
  83. .msp_i2s_dma_tx = &msp0_dma_tx,
  84. };
  85. static struct stedma40_chan_cfg msp1_dma_rx = {
  86. .high_priority = true,
  87. .dir = STEDMA40_PERIPH_TO_MEM,
  88. .src_dev_type = DB8500_DMA_DEV30_MSP3_RX,
  89. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  90. .src_info.psize = STEDMA40_PSIZE_LOG_4,
  91. .dst_info.psize = STEDMA40_PSIZE_LOG_4,
  92. /* data_width is set during configuration */
  93. };
  94. static struct stedma40_chan_cfg msp1_dma_tx = {
  95. .high_priority = true,
  96. .dir = STEDMA40_MEM_TO_PERIPH,
  97. .src_dev_type = STEDMA40_DEV_DST_MEMORY,
  98. .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,
  99. .src_info.psize = STEDMA40_PSIZE_LOG_4,
  100. .dst_info.psize = STEDMA40_PSIZE_LOG_4,
  101. /* data_width is set during configuration */
  102. };
  103. static struct msp_i2s_platform_data msp1_platform_data = {
  104. .id = MSP_I2S_1,
  105. .msp_i2s_dma_rx = NULL,
  106. .msp_i2s_dma_tx = &msp1_dma_tx,
  107. .msp_i2s_init = msp13_i2s_init,
  108. .msp_i2s_exit = msp13_i2s_exit,
  109. };
  110. static struct stedma40_chan_cfg msp2_dma_rx = {
  111. .high_priority = true,
  112. .dir = STEDMA40_PERIPH_TO_MEM,
  113. .src_dev_type = DB8500_DMA_DEV14_MSP2_RX,
  114. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  115. /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */
  116. .src_info.psize = STEDMA40_PSIZE_LOG_1,
  117. .dst_info.psize = STEDMA40_PSIZE_LOG_1,
  118. /* data_width is set during configuration */
  119. };
  120. static struct stedma40_chan_cfg msp2_dma_tx = {
  121. .high_priority = true,
  122. .dir = STEDMA40_MEM_TO_PERIPH,
  123. .src_dev_type = STEDMA40_DEV_DST_MEMORY,
  124. .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,
  125. .src_info.psize = STEDMA40_PSIZE_LOG_4,
  126. .dst_info.psize = STEDMA40_PSIZE_LOG_4,
  127. .use_fixed_channel = true,
  128. .phy_channel = 1,
  129. /* data_width is set during configuration */
  130. };
  131. static int db8500_add_msp_i2s(struct device *parent, int id,
  132. resource_size_t base, int irq,
  133. struct msp_i2s_platform_data *pdata)
  134. {
  135. struct platform_device *pdev;
  136. struct resource res[] = {
  137. DEFINE_RES_MEM(base, SZ_4K),
  138. DEFINE_RES_IRQ(irq),
  139. };
  140. pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
  141. id, irq);
  142. pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
  143. res, ARRAY_SIZE(res),
  144. pdata, sizeof(*pdata));
  145. if (!pdev) {
  146. pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
  147. id);
  148. return -EIO;
  149. }
  150. return 0;
  151. }
  152. /* Platform device for ASoC U8500 machine */
  153. static struct platform_device snd_soc_u8500 = {
  154. .name = "snd-soc-u8500",
  155. .id = 0,
  156. .dev = {
  157. .platform_data = NULL,
  158. },
  159. };
  160. /* Platform device for Ux500-PCM */
  161. static struct platform_device ux500_pcm = {
  162. .name = "ux500-pcm",
  163. .id = 0,
  164. .dev = {
  165. .platform_data = NULL,
  166. },
  167. };
  168. static struct msp_i2s_platform_data msp2_platform_data = {
  169. .id = MSP_I2S_2,
  170. .msp_i2s_dma_rx = &msp2_dma_rx,
  171. .msp_i2s_dma_tx = &msp2_dma_tx,
  172. };
  173. static struct msp_i2s_platform_data msp3_platform_data = {
  174. .id = MSP_I2S_3,
  175. .msp_i2s_dma_rx = &msp1_dma_rx,
  176. .msp_i2s_dma_tx = NULL,
  177. .msp_i2s_init = msp13_i2s_init,
  178. .msp_i2s_exit = msp13_i2s_exit,
  179. };
  180. int mop500_msp_init(struct device *parent)
  181. {
  182. int ret;
  183. pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
  184. platform_device_register(&snd_soc_u8500);
  185. pr_info("Initialize MSP I2S-devices.\n");
  186. ret = db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
  187. &msp0_platform_data);
  188. ret |= db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
  189. &msp1_platform_data);
  190. ret |= db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
  191. &msp2_platform_data);
  192. ret |= db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
  193. &msp3_platform_data);
  194. pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
  195. platform_device_register(&ux500_pcm);
  196. return ret;
  197. }