mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <asm/mtrr.h>
  20. #include <asm/mpspec.h>
  21. #include <asm/pgalloc.h>
  22. #include <asm/io_apic.h>
  23. #include <asm/proto.h>
  24. #include <asm/bios_ebda.h>
  25. #include <asm/e820.h>
  26. #include <asm/trampoline.h>
  27. #include <asm/setup.h>
  28. #include <asm/smp.h>
  29. #include <asm/apic.h>
  30. /*
  31. * Checksum an MP configuration block.
  32. */
  33. static int __init mpf_checksum(unsigned char *mp, int len)
  34. {
  35. int sum = 0;
  36. while (len--)
  37. sum += *mp++;
  38. return sum & 0xFF;
  39. }
  40. static void __init MP_processor_info(struct mpc_cpu *m)
  41. {
  42. int apicid;
  43. char *bootup_cpu = "";
  44. if (!(m->cpuflag & CPU_ENABLED)) {
  45. disabled_cpus++;
  46. return;
  47. }
  48. if (x86_quirks->mpc_apic_id)
  49. apicid = x86_quirks->mpc_apic_id(m);
  50. else
  51. apicid = m->apicid;
  52. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  53. bootup_cpu = " (Bootup-CPU)";
  54. boot_cpu_physical_apicid = m->apicid;
  55. }
  56. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  57. generic_processor_info(apicid, m->apicver);
  58. }
  59. #ifdef CONFIG_X86_IO_APIC
  60. static void __init MP_bus_info(struct mpc_bus *m)
  61. {
  62. char str[7];
  63. memcpy(str, m->bustype, 6);
  64. str[6] = 0;
  65. if (x86_quirks->mpc_oem_bus_info)
  66. x86_quirks->mpc_oem_bus_info(m, str);
  67. else
  68. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  69. #if MAX_MP_BUSSES < 256
  70. if (m->busid >= MAX_MP_BUSSES) {
  71. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  72. " is too large, max. supported is %d\n",
  73. m->busid, str, MAX_MP_BUSSES - 1);
  74. return;
  75. }
  76. #endif
  77. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  78. set_bit(m->busid, mp_bus_not_pci);
  79. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  80. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  81. #endif
  82. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  83. if (x86_quirks->mpc_oem_pci_bus)
  84. x86_quirks->mpc_oem_pci_bus(m);
  85. clear_bit(m->busid, mp_bus_not_pci);
  86. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  87. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  88. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  89. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  90. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  91. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  92. #endif
  93. } else
  94. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  95. }
  96. #endif
  97. #ifdef CONFIG_X86_IO_APIC
  98. static int bad_ioapic(unsigned long address)
  99. {
  100. if (nr_ioapics >= MAX_IO_APICS) {
  101. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  102. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  103. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  104. }
  105. if (!address) {
  106. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  107. " found in table, skipping!\n");
  108. return 1;
  109. }
  110. return 0;
  111. }
  112. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  113. {
  114. if (!(m->flags & MPC_APIC_USABLE))
  115. return;
  116. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  117. m->apicid, m->apicver, m->apicaddr);
  118. if (bad_ioapic(m->apicaddr))
  119. return;
  120. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  121. mp_ioapics[nr_ioapics].apicid = m->apicid;
  122. mp_ioapics[nr_ioapics].type = m->type;
  123. mp_ioapics[nr_ioapics].apicver = m->apicver;
  124. mp_ioapics[nr_ioapics].flags = m->flags;
  125. nr_ioapics++;
  126. }
  127. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  128. {
  129. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  130. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  131. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  132. m->srcbusirq, m->dstapic, m->dstirq);
  133. }
  134. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  135. {
  136. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  137. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  138. mp_irq->irqtype, mp_irq->irqflag & 3,
  139. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  140. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  141. }
  142. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  143. struct mpc_intsrc *mp_irq)
  144. {
  145. mp_irq->dstapic = m->dstapic;
  146. mp_irq->type = m->type;
  147. mp_irq->irqtype = m->irqtype;
  148. mp_irq->irqflag = m->irqflag;
  149. mp_irq->srcbus = m->srcbus;
  150. mp_irq->srcbusirq = m->srcbusirq;
  151. mp_irq->dstirq = m->dstirq;
  152. }
  153. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  154. struct mpc_intsrc *m)
  155. {
  156. m->dstapic = mp_irq->dstapic;
  157. m->type = mp_irq->type;
  158. m->irqtype = mp_irq->irqtype;
  159. m->irqflag = mp_irq->irqflag;
  160. m->srcbus = mp_irq->srcbus;
  161. m->srcbusirq = mp_irq->srcbusirq;
  162. m->dstirq = mp_irq->dstirq;
  163. }
  164. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  165. struct mpc_intsrc *m)
  166. {
  167. if (mp_irq->dstapic != m->dstapic)
  168. return 1;
  169. if (mp_irq->type != m->type)
  170. return 2;
  171. if (mp_irq->irqtype != m->irqtype)
  172. return 3;
  173. if (mp_irq->irqflag != m->irqflag)
  174. return 4;
  175. if (mp_irq->srcbus != m->srcbus)
  176. return 5;
  177. if (mp_irq->srcbusirq != m->srcbusirq)
  178. return 6;
  179. if (mp_irq->dstirq != m->dstirq)
  180. return 7;
  181. return 0;
  182. }
  183. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  184. {
  185. int i;
  186. print_MP_intsrc_info(m);
  187. for (i = 0; i < mp_irq_entries; i++) {
  188. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  189. return;
  190. }
  191. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  192. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  193. panic("Max # of irq sources exceeded!!\n");
  194. }
  195. #endif
  196. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  197. {
  198. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  199. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  200. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  201. m->srcbusirq, m->destapic, m->destapiclint);
  202. }
  203. /*
  204. * Read/parse the MPC
  205. */
  206. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  207. {
  208. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  209. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  210. mpc->signature[0], mpc->signature[1],
  211. mpc->signature[2], mpc->signature[3]);
  212. return 0;
  213. }
  214. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  215. printk(KERN_ERR "MPTABLE: checksum error!\n");
  216. return 0;
  217. }
  218. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  219. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  220. mpc->spec);
  221. return 0;
  222. }
  223. if (!mpc->lapic) {
  224. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  225. return 0;
  226. }
  227. memcpy(oem, mpc->oem, 8);
  228. oem[8] = 0;
  229. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  230. memcpy(str, mpc->productid, 12);
  231. str[12] = 0;
  232. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  233. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  234. return 1;
  235. }
  236. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  237. {
  238. char str[16];
  239. char oem[10];
  240. int count = sizeof(*mpc);
  241. unsigned char *mpt = ((unsigned char *)mpc) + count;
  242. if (!smp_check_mpc(mpc, oem, str))
  243. return 0;
  244. #ifdef CONFIG_X86_32
  245. generic_mps_oem_check(mpc, oem, str);
  246. #endif
  247. /* save the local APIC address, it might be non-default */
  248. if (!acpi_lapic)
  249. mp_lapic_addr = mpc->lapic;
  250. if (early)
  251. return 1;
  252. if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
  253. struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
  254. x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
  255. }
  256. /*
  257. * Now process the configuration blocks.
  258. */
  259. if (x86_quirks->mpc_record)
  260. *x86_quirks->mpc_record = 0;
  261. while (count < mpc->length) {
  262. switch (*mpt) {
  263. case MP_PROCESSOR:
  264. {
  265. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  266. /* ACPI may have already provided this data */
  267. if (!acpi_lapic)
  268. MP_processor_info(m);
  269. mpt += sizeof(*m);
  270. count += sizeof(*m);
  271. break;
  272. }
  273. case MP_BUS:
  274. {
  275. struct mpc_bus *m = (struct mpc_bus *)mpt;
  276. #ifdef CONFIG_X86_IO_APIC
  277. MP_bus_info(m);
  278. #endif
  279. mpt += sizeof(*m);
  280. count += sizeof(*m);
  281. break;
  282. }
  283. case MP_IOAPIC:
  284. {
  285. #ifdef CONFIG_X86_IO_APIC
  286. struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
  287. MP_ioapic_info(m);
  288. #endif
  289. mpt += sizeof(struct mpc_ioapic);
  290. count += sizeof(struct mpc_ioapic);
  291. break;
  292. }
  293. case MP_INTSRC:
  294. {
  295. #ifdef CONFIG_X86_IO_APIC
  296. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  297. MP_intsrc_info(m);
  298. #endif
  299. mpt += sizeof(struct mpc_intsrc);
  300. count += sizeof(struct mpc_intsrc);
  301. break;
  302. }
  303. case MP_LINTSRC:
  304. {
  305. struct mpc_lintsrc *m =
  306. (struct mpc_lintsrc *)mpt;
  307. MP_lintsrc_info(m);
  308. mpt += sizeof(*m);
  309. count += sizeof(*m);
  310. break;
  311. }
  312. default:
  313. /* wrong mptable */
  314. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  315. printk(KERN_ERR "type %x\n", *mpt);
  316. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  317. 1, mpc, mpc->length, 1);
  318. count = mpc->length;
  319. break;
  320. }
  321. if (x86_quirks->mpc_record)
  322. (*x86_quirks->mpc_record)++;
  323. }
  324. #ifdef CONFIG_X86_BIGSMP
  325. generic_bigsmp_probe();
  326. #endif
  327. if (apic->setup_apic_routing)
  328. apic->setup_apic_routing();
  329. if (!num_processors)
  330. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  331. return num_processors;
  332. }
  333. #ifdef CONFIG_X86_IO_APIC
  334. static int __init ELCR_trigger(unsigned int irq)
  335. {
  336. unsigned int port;
  337. port = 0x4d0 + (irq >> 3);
  338. return (inb(port) >> (irq & 7)) & 1;
  339. }
  340. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  341. {
  342. struct mpc_intsrc intsrc;
  343. int i;
  344. int ELCR_fallback = 0;
  345. intsrc.type = MP_INTSRC;
  346. intsrc.irqflag = 0; /* conforming */
  347. intsrc.srcbus = 0;
  348. intsrc.dstapic = mp_ioapics[0].apicid;
  349. intsrc.irqtype = mp_INT;
  350. /*
  351. * If true, we have an ISA/PCI system with no IRQ entries
  352. * in the MP table. To prevent the PCI interrupts from being set up
  353. * incorrectly, we try to use the ELCR. The sanity check to see if
  354. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  355. * never be level sensitive, so we simply see if the ELCR agrees.
  356. * If it does, we assume it's valid.
  357. */
  358. if (mpc_default_type == 5) {
  359. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  360. "falling back to ELCR\n");
  361. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  362. ELCR_trigger(13))
  363. printk(KERN_ERR "ELCR contains invalid data... "
  364. "not using ELCR\n");
  365. else {
  366. printk(KERN_INFO
  367. "Using ELCR to identify PCI interrupts\n");
  368. ELCR_fallback = 1;
  369. }
  370. }
  371. for (i = 0; i < 16; i++) {
  372. switch (mpc_default_type) {
  373. case 2:
  374. if (i == 0 || i == 13)
  375. continue; /* IRQ0 & IRQ13 not connected */
  376. /* fall through */
  377. default:
  378. if (i == 2)
  379. continue; /* IRQ2 is never connected */
  380. }
  381. if (ELCR_fallback) {
  382. /*
  383. * If the ELCR indicates a level-sensitive interrupt, we
  384. * copy that information over to the MP table in the
  385. * irqflag field (level sensitive, active high polarity).
  386. */
  387. if (ELCR_trigger(i))
  388. intsrc.irqflag = 13;
  389. else
  390. intsrc.irqflag = 0;
  391. }
  392. intsrc.srcbusirq = i;
  393. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  394. MP_intsrc_info(&intsrc);
  395. }
  396. intsrc.irqtype = mp_ExtINT;
  397. intsrc.srcbusirq = 0;
  398. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  399. MP_intsrc_info(&intsrc);
  400. }
  401. static void __init construct_ioapic_table(int mpc_default_type)
  402. {
  403. struct mpc_ioapic ioapic;
  404. struct mpc_bus bus;
  405. bus.type = MP_BUS;
  406. bus.busid = 0;
  407. switch (mpc_default_type) {
  408. default:
  409. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  410. mpc_default_type);
  411. /* fall through */
  412. case 1:
  413. case 5:
  414. memcpy(bus.bustype, "ISA ", 6);
  415. break;
  416. case 2:
  417. case 6:
  418. case 3:
  419. memcpy(bus.bustype, "EISA ", 6);
  420. break;
  421. case 4:
  422. case 7:
  423. memcpy(bus.bustype, "MCA ", 6);
  424. }
  425. MP_bus_info(&bus);
  426. if (mpc_default_type > 4) {
  427. bus.busid = 1;
  428. memcpy(bus.bustype, "PCI ", 6);
  429. MP_bus_info(&bus);
  430. }
  431. ioapic.type = MP_IOAPIC;
  432. ioapic.apicid = 2;
  433. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  434. ioapic.flags = MPC_APIC_USABLE;
  435. ioapic.apicaddr = 0xFEC00000;
  436. MP_ioapic_info(&ioapic);
  437. /*
  438. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  439. */
  440. construct_default_ioirq_mptable(mpc_default_type);
  441. }
  442. #else
  443. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  444. #endif
  445. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  446. {
  447. struct mpc_cpu processor;
  448. struct mpc_lintsrc lintsrc;
  449. int linttypes[2] = { mp_ExtINT, mp_NMI };
  450. int i;
  451. /*
  452. * local APIC has default address
  453. */
  454. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  455. /*
  456. * 2 CPUs, numbered 0 & 1.
  457. */
  458. processor.type = MP_PROCESSOR;
  459. /* Either an integrated APIC or a discrete 82489DX. */
  460. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  461. processor.cpuflag = CPU_ENABLED;
  462. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  463. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  464. processor.featureflag = boot_cpu_data.x86_capability[0];
  465. processor.reserved[0] = 0;
  466. processor.reserved[1] = 0;
  467. for (i = 0; i < 2; i++) {
  468. processor.apicid = i;
  469. MP_processor_info(&processor);
  470. }
  471. construct_ioapic_table(mpc_default_type);
  472. lintsrc.type = MP_LINTSRC;
  473. lintsrc.irqflag = 0; /* conforming */
  474. lintsrc.srcbusid = 0;
  475. lintsrc.srcbusirq = 0;
  476. lintsrc.destapic = MP_APIC_ALL;
  477. for (i = 0; i < 2; i++) {
  478. lintsrc.irqtype = linttypes[i];
  479. lintsrc.destapiclint = i;
  480. MP_lintsrc_info(&lintsrc);
  481. }
  482. }
  483. static struct mpf_intel *mpf_found;
  484. /*
  485. * Scan the memory blocks for an SMP configuration block.
  486. */
  487. static void __init __get_smp_config(unsigned int early)
  488. {
  489. struct mpf_intel *mpf = mpf_found;
  490. if (!mpf)
  491. return;
  492. if (acpi_lapic && early)
  493. return;
  494. /*
  495. * MPS doesn't support hyperthreading, aka only have
  496. * thread 0 apic id in MPS table
  497. */
  498. if (acpi_lapic && acpi_ioapic)
  499. return;
  500. if (x86_quirks->mach_get_smp_config) {
  501. if (x86_quirks->mach_get_smp_config(early))
  502. return;
  503. }
  504. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  505. mpf->specification);
  506. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  507. if (mpf->feature2 & (1 << 7)) {
  508. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  509. pic_mode = 1;
  510. } else {
  511. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  512. pic_mode = 0;
  513. }
  514. #endif
  515. /*
  516. * Now see if we need to read further.
  517. */
  518. if (mpf->feature1 != 0) {
  519. if (early) {
  520. /*
  521. * local APIC has default address
  522. */
  523. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  524. return;
  525. }
  526. printk(KERN_INFO "Default MP configuration #%d\n",
  527. mpf->feature1);
  528. construct_default_ISA_mptable(mpf->feature1);
  529. } else if (mpf->physptr) {
  530. /*
  531. * Read the physical hardware table. Anything here will
  532. * override the defaults.
  533. */
  534. if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
  535. #ifdef CONFIG_X86_LOCAL_APIC
  536. smp_found_config = 0;
  537. #endif
  538. printk(KERN_ERR
  539. "BIOS bug, MP table errors detected!...\n");
  540. printk(KERN_ERR "... disabling SMP support. "
  541. "(tell your hw vendor)\n");
  542. return;
  543. }
  544. if (early)
  545. return;
  546. #ifdef CONFIG_X86_IO_APIC
  547. /*
  548. * If there are no explicit MP IRQ entries, then we are
  549. * broken. We set up most of the low 16 IO-APIC pins to
  550. * ISA defaults and hope it will work.
  551. */
  552. if (!mp_irq_entries) {
  553. struct mpc_bus bus;
  554. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  555. "using default mptable. "
  556. "(tell your hw vendor)\n");
  557. bus.type = MP_BUS;
  558. bus.busid = 0;
  559. memcpy(bus.bustype, "ISA ", 6);
  560. MP_bus_info(&bus);
  561. construct_default_ioirq_mptable(0);
  562. }
  563. #endif
  564. } else
  565. BUG();
  566. if (!early)
  567. printk(KERN_INFO "Processors: %d\n", num_processors);
  568. /*
  569. * Only use the first configuration found.
  570. */
  571. }
  572. void __init early_get_smp_config(void)
  573. {
  574. __get_smp_config(1);
  575. }
  576. void __init get_smp_config(void)
  577. {
  578. __get_smp_config(0);
  579. }
  580. static int __init smp_scan_config(unsigned long base, unsigned long length,
  581. unsigned reserve)
  582. {
  583. unsigned int *bp = phys_to_virt(base);
  584. struct mpf_intel *mpf;
  585. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  586. bp, length);
  587. BUILD_BUG_ON(sizeof(*mpf) != 16);
  588. while (length > 0) {
  589. mpf = (struct mpf_intel *)bp;
  590. if ((*bp == SMP_MAGIC_IDENT) &&
  591. (mpf->length == 1) &&
  592. !mpf_checksum((unsigned char *)bp, 16) &&
  593. ((mpf->specification == 1)
  594. || (mpf->specification == 4))) {
  595. #ifdef CONFIG_X86_LOCAL_APIC
  596. smp_found_config = 1;
  597. #endif
  598. mpf_found = mpf;
  599. printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
  600. mpf, (u64)virt_to_phys(mpf));
  601. if (!reserve)
  602. return 1;
  603. reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
  604. BOOTMEM_DEFAULT);
  605. if (mpf->physptr) {
  606. unsigned long size = PAGE_SIZE;
  607. #ifdef CONFIG_X86_32
  608. /*
  609. * We cannot access to MPC table to compute
  610. * table size yet, as only few megabytes from
  611. * the bottom is mapped now.
  612. * PC-9800's MPC table places on the very last
  613. * of physical memory; so that simply reserving
  614. * PAGE_SIZE from mpf->physptr yields BUG()
  615. * in reserve_bootmem.
  616. * also need to make sure physptr is below than
  617. * max_low_pfn
  618. * we don't need reserve the area above max_low_pfn
  619. */
  620. unsigned long end = max_low_pfn * PAGE_SIZE;
  621. if (mpf->physptr < end) {
  622. if (mpf->physptr + size > end)
  623. size = end - mpf->physptr;
  624. reserve_bootmem_generic(mpf->physptr, size,
  625. BOOTMEM_DEFAULT);
  626. }
  627. #else
  628. reserve_bootmem_generic(mpf->physptr, size,
  629. BOOTMEM_DEFAULT);
  630. #endif
  631. }
  632. return 1;
  633. }
  634. bp += 4;
  635. length -= 16;
  636. }
  637. return 0;
  638. }
  639. static void __init __find_smp_config(unsigned int reserve)
  640. {
  641. unsigned int address;
  642. if (x86_quirks->mach_find_smp_config) {
  643. if (x86_quirks->mach_find_smp_config(reserve))
  644. return;
  645. }
  646. /*
  647. * FIXME: Linux assumes you have 640K of base ram..
  648. * this continues the error...
  649. *
  650. * 1) Scan the bottom 1K for a signature
  651. * 2) Scan the top 1K of base RAM
  652. * 3) Scan the 64K of bios
  653. */
  654. if (smp_scan_config(0x0, 0x400, reserve) ||
  655. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  656. smp_scan_config(0xF0000, 0x10000, reserve))
  657. return;
  658. /*
  659. * If it is an SMP machine we should know now, unless the
  660. * configuration is in an EISA/MCA bus machine with an
  661. * extended bios data area.
  662. *
  663. * there is a real-mode segmented pointer pointing to the
  664. * 4K EBDA area at 0x40E, calculate and scan it here.
  665. *
  666. * NOTE! There are Linux loaders that will corrupt the EBDA
  667. * area, and as such this kind of SMP config may be less
  668. * trustworthy, simply because the SMP table may have been
  669. * stomped on during early boot. These loaders are buggy and
  670. * should be fixed.
  671. *
  672. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  673. */
  674. address = get_bios_ebda();
  675. if (address)
  676. smp_scan_config(address, 0x400, reserve);
  677. }
  678. void __init early_find_smp_config(void)
  679. {
  680. __find_smp_config(0);
  681. }
  682. void __init find_smp_config(void)
  683. {
  684. __find_smp_config(1);
  685. }
  686. #ifdef CONFIG_X86_IO_APIC
  687. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  688. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  689. {
  690. int i;
  691. if (m->irqtype != mp_INT)
  692. return 0;
  693. if (m->irqflag != 0x0f)
  694. return 0;
  695. /* not legacy */
  696. for (i = 0; i < mp_irq_entries; i++) {
  697. if (mp_irqs[i].irqtype != mp_INT)
  698. continue;
  699. if (mp_irqs[i].irqflag != 0x0f)
  700. continue;
  701. if (mp_irqs[i].srcbus != m->srcbus)
  702. continue;
  703. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  704. continue;
  705. if (irq_used[i]) {
  706. /* already claimed */
  707. return -2;
  708. }
  709. irq_used[i] = 1;
  710. return i;
  711. }
  712. /* not found */
  713. return -1;
  714. }
  715. #define SPARE_SLOT_NUM 20
  716. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  717. #endif
  718. static int __init replace_intsrc_all(struct mpc_table *mpc,
  719. unsigned long mpc_new_phys,
  720. unsigned long mpc_new_length)
  721. {
  722. #ifdef CONFIG_X86_IO_APIC
  723. int i;
  724. int nr_m_spare = 0;
  725. #endif
  726. int count = sizeof(*mpc);
  727. unsigned char *mpt = ((unsigned char *)mpc) + count;
  728. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  729. while (count < mpc->length) {
  730. switch (*mpt) {
  731. case MP_PROCESSOR:
  732. {
  733. struct mpc_cpu *m = (struct mpc_cpu *)mpt;
  734. mpt += sizeof(*m);
  735. count += sizeof(*m);
  736. break;
  737. }
  738. case MP_BUS:
  739. {
  740. struct mpc_bus *m = (struct mpc_bus *)mpt;
  741. mpt += sizeof(*m);
  742. count += sizeof(*m);
  743. break;
  744. }
  745. case MP_IOAPIC:
  746. {
  747. mpt += sizeof(struct mpc_ioapic);
  748. count += sizeof(struct mpc_ioapic);
  749. break;
  750. }
  751. case MP_INTSRC:
  752. {
  753. #ifdef CONFIG_X86_IO_APIC
  754. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  755. printk(KERN_INFO "OLD ");
  756. print_MP_intsrc_info(m);
  757. i = get_MP_intsrc_index(m);
  758. if (i > 0) {
  759. assign_to_mpc_intsrc(&mp_irqs[i], m);
  760. printk(KERN_INFO "NEW ");
  761. print_mp_irq_info(&mp_irqs[i]);
  762. } else if (!i) {
  763. /* legacy, do nothing */
  764. } else if (nr_m_spare < SPARE_SLOT_NUM) {
  765. /*
  766. * not found (-1), or duplicated (-2)
  767. * are invalid entries,
  768. * we need to use the slot later
  769. */
  770. m_spare[nr_m_spare] = m;
  771. nr_m_spare++;
  772. }
  773. #endif
  774. mpt += sizeof(struct mpc_intsrc);
  775. count += sizeof(struct mpc_intsrc);
  776. break;
  777. }
  778. case MP_LINTSRC:
  779. {
  780. struct mpc_lintsrc *m =
  781. (struct mpc_lintsrc *)mpt;
  782. mpt += sizeof(*m);
  783. count += sizeof(*m);
  784. break;
  785. }
  786. default:
  787. /* wrong mptable */
  788. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  789. printk(KERN_ERR "type %x\n", *mpt);
  790. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  791. 1, mpc, mpc->length, 1);
  792. goto out;
  793. }
  794. }
  795. #ifdef CONFIG_X86_IO_APIC
  796. for (i = 0; i < mp_irq_entries; i++) {
  797. if (irq_used[i])
  798. continue;
  799. if (mp_irqs[i].irqtype != mp_INT)
  800. continue;
  801. if (mp_irqs[i].irqflag != 0x0f)
  802. continue;
  803. if (nr_m_spare > 0) {
  804. printk(KERN_INFO "*NEW* found ");
  805. nr_m_spare--;
  806. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  807. m_spare[nr_m_spare] = NULL;
  808. } else {
  809. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  810. count += sizeof(struct mpc_intsrc);
  811. if (!mpc_new_phys) {
  812. printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
  813. } else {
  814. if (count <= mpc_new_length)
  815. printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
  816. else {
  817. printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
  818. goto out;
  819. }
  820. }
  821. assign_to_mpc_intsrc(&mp_irqs[i], m);
  822. mpc->length = count;
  823. mpt += sizeof(struct mpc_intsrc);
  824. }
  825. print_mp_irq_info(&mp_irqs[i]);
  826. }
  827. #endif
  828. out:
  829. /* update checksum */
  830. mpc->checksum = 0;
  831. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  832. return 0;
  833. }
  834. static int __initdata enable_update_mptable;
  835. static int __init update_mptable_setup(char *str)
  836. {
  837. enable_update_mptable = 1;
  838. return 0;
  839. }
  840. early_param("update_mptable", update_mptable_setup);
  841. static unsigned long __initdata mpc_new_phys;
  842. static unsigned long mpc_new_length __initdata = 4096;
  843. /* alloc_mptable or alloc_mptable=4k */
  844. static int __initdata alloc_mptable;
  845. static int __init parse_alloc_mptable_opt(char *p)
  846. {
  847. enable_update_mptable = 1;
  848. alloc_mptable = 1;
  849. if (!p)
  850. return 0;
  851. mpc_new_length = memparse(p, &p);
  852. return 0;
  853. }
  854. early_param("alloc_mptable", parse_alloc_mptable_opt);
  855. void __init early_reserve_e820_mpc_new(void)
  856. {
  857. if (enable_update_mptable && alloc_mptable) {
  858. u64 startt = 0;
  859. #ifdef CONFIG_X86_TRAMPOLINE
  860. startt = TRAMPOLINE_BASE;
  861. #endif
  862. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  863. }
  864. }
  865. static int __init update_mp_table(void)
  866. {
  867. char str[16];
  868. char oem[10];
  869. struct mpf_intel *mpf;
  870. struct mpc_table *mpc, *mpc_new;
  871. if (!enable_update_mptable)
  872. return 0;
  873. mpf = mpf_found;
  874. if (!mpf)
  875. return 0;
  876. /*
  877. * Now see if we need to go further.
  878. */
  879. if (mpf->feature1 != 0)
  880. return 0;
  881. if (!mpf->physptr)
  882. return 0;
  883. mpc = phys_to_virt(mpf->physptr);
  884. if (!smp_check_mpc(mpc, oem, str))
  885. return 0;
  886. printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
  887. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  888. if (mpc_new_phys && mpc->length > mpc_new_length) {
  889. mpc_new_phys = 0;
  890. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  891. mpc_new_length);
  892. }
  893. if (!mpc_new_phys) {
  894. unsigned char old, new;
  895. /* check if we can change the postion */
  896. mpc->checksum = 0;
  897. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  898. mpc->checksum = 0xff;
  899. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  900. if (old == new) {
  901. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  902. return 0;
  903. }
  904. printk(KERN_INFO "use in-positon replacing\n");
  905. } else {
  906. mpf->physptr = mpc_new_phys;
  907. mpc_new = phys_to_virt(mpc_new_phys);
  908. memcpy(mpc_new, mpc, mpc->length);
  909. mpc = mpc_new;
  910. /* check if we can modify that */
  911. if (mpc_new_phys - mpf->physptr) {
  912. struct mpf_intel *mpf_new;
  913. /* steal 16 bytes from [0, 1k) */
  914. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  915. mpf_new = phys_to_virt(0x400 - 16);
  916. memcpy(mpf_new, mpf, 16);
  917. mpf = mpf_new;
  918. mpf->physptr = mpc_new_phys;
  919. }
  920. mpf->checksum = 0;
  921. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  922. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  923. }
  924. /*
  925. * only replace the one with mp_INT and
  926. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  927. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  928. * may need pci=routeirq for all coverage
  929. */
  930. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  931. return 0;
  932. }
  933. late_initcall(update_mp_table);