board-ap325rxa.c 12 KB

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  1. /*
  2. * Renesas - AP-325RXA
  3. * (Compatible with Algo System ., LTD. - AP-320A)
  4. *
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. * Author : Yusuke Goda <goda.yuske@renesas.com>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/mtd/sh_flctl.h>
  18. #include <linux/delay.h>
  19. #include <linux/i2c.h>
  20. #include <linux/smsc911x.h>
  21. #include <linux/gpio.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/spi_gpio.h>
  24. #include <media/soc_camera.h>
  25. #include <media/soc_camera_platform.h>
  26. #include <media/sh_mobile_ceu.h>
  27. #include <video/sh_mobile_lcdc.h>
  28. #include <asm/io.h>
  29. #include <asm/clock.h>
  30. #include <cpu/sh7723.h>
  31. static struct smsc911x_platform_config smsc911x_config = {
  32. .phy_interface = PHY_INTERFACE_MODE_MII,
  33. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  34. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  35. .flags = SMSC911X_USE_32BIT,
  36. };
  37. static struct resource smsc9118_resources[] = {
  38. [0] = {
  39. .start = 0xb6080000,
  40. .end = 0xb60fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = 35,
  45. .end = 35,
  46. .flags = IORESOURCE_IRQ,
  47. }
  48. };
  49. static struct platform_device smsc9118_device = {
  50. .name = "smsc911x",
  51. .id = -1,
  52. .num_resources = ARRAY_SIZE(smsc9118_resources),
  53. .resource = smsc9118_resources,
  54. .dev = {
  55. .platform_data = &smsc911x_config,
  56. },
  57. };
  58. /*
  59. * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
  60. * If this area erased, this board can not boot.
  61. */
  62. static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  63. {
  64. .name = "uboot",
  65. .offset = 0,
  66. .size = (1 * 1024 * 1024),
  67. .mask_flags = MTD_WRITEABLE, /* Read-only */
  68. }, {
  69. .name = "kernel",
  70. .offset = MTDPART_OFS_APPEND,
  71. .size = (2 * 1024 * 1024),
  72. }, {
  73. .name = "free-area0",
  74. .offset = MTDPART_OFS_APPEND,
  75. .size = ((7 * 1024 * 1024) + (512 * 1024)),
  76. }, {
  77. .name = "CPLD-Data",
  78. .offset = MTDPART_OFS_APPEND,
  79. .mask_flags = MTD_WRITEABLE, /* Read-only */
  80. .size = (1024 * 128 * 2),
  81. }, {
  82. .name = "free-area1",
  83. .offset = MTDPART_OFS_APPEND,
  84. .size = MTDPART_SIZ_FULL,
  85. },
  86. };
  87. static struct physmap_flash_data ap325rxa_nor_flash_data = {
  88. .width = 2,
  89. .parts = ap325rxa_nor_flash_partitions,
  90. .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
  91. };
  92. static struct resource ap325rxa_nor_flash_resources[] = {
  93. [0] = {
  94. .name = "NOR Flash",
  95. .start = 0x00000000,
  96. .end = 0x00ffffff,
  97. .flags = IORESOURCE_MEM,
  98. }
  99. };
  100. static struct platform_device ap325rxa_nor_flash_device = {
  101. .name = "physmap-flash",
  102. .resource = ap325rxa_nor_flash_resources,
  103. .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
  104. .dev = {
  105. .platform_data = &ap325rxa_nor_flash_data,
  106. },
  107. };
  108. static struct mtd_partition nand_partition_info[] = {
  109. {
  110. .name = "nand_data",
  111. .offset = 0,
  112. .size = MTDPART_SIZ_FULL,
  113. },
  114. };
  115. static struct resource nand_flash_resources[] = {
  116. [0] = {
  117. .start = 0xa4530000,
  118. .end = 0xa45300ff,
  119. .flags = IORESOURCE_MEM,
  120. }
  121. };
  122. static struct sh_flctl_platform_data nand_flash_data = {
  123. .parts = nand_partition_info,
  124. .nr_parts = ARRAY_SIZE(nand_partition_info),
  125. .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
  126. .has_hwecc = 1,
  127. };
  128. static struct platform_device nand_flash_device = {
  129. .name = "sh_flctl",
  130. .resource = nand_flash_resources,
  131. .num_resources = ARRAY_SIZE(nand_flash_resources),
  132. .dev = {
  133. .platform_data = &nand_flash_data,
  134. },
  135. };
  136. #define FPGA_LCDREG 0xB4100180
  137. #define FPGA_BKLREG 0xB4100212
  138. #define FPGA_LCDREG_VAL 0x0018
  139. #define PORT_MSELCRB 0xA4050182
  140. #define PORT_HIZCRC 0xA405015C
  141. #define PORT_DRVCRA 0xA405018A
  142. #define PORT_DRVCRB 0xA405018C
  143. static void ap320_wvga_power_on(void *board_data)
  144. {
  145. msleep(100);
  146. /* ASD AP-320/325 LCD ON */
  147. ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
  148. /* backlight */
  149. gpio_set_value(GPIO_PTS3, 0);
  150. ctrl_outw(0x100, FPGA_BKLREG);
  151. }
  152. static void ap320_wvga_power_off(void *board_data)
  153. {
  154. /* backlight */
  155. ctrl_outw(0, FPGA_BKLREG);
  156. gpio_set_value(GPIO_PTS3, 1);
  157. /* ASD AP-320/325 LCD OFF */
  158. ctrl_outw(0, FPGA_LCDREG);
  159. }
  160. static struct sh_mobile_lcdc_info lcdc_info = {
  161. .clock_source = LCDC_CLK_EXTERNAL,
  162. .ch[0] = {
  163. .chan = LCDC_CHAN_MAINLCD,
  164. .bpp = 16,
  165. .interface_type = RGB18,
  166. .clock_divider = 1,
  167. .lcd_cfg = {
  168. .name = "LB070WV1",
  169. .xres = 800,
  170. .yres = 480,
  171. .left_margin = 40,
  172. .right_margin = 160,
  173. .hsync_len = 8,
  174. .upper_margin = 63,
  175. .lower_margin = 80,
  176. .vsync_len = 1,
  177. .sync = 0, /* hsync and vsync are active low */
  178. },
  179. .lcd_size_cfg = { /* 7.0 inch */
  180. .width = 152,
  181. .height = 91,
  182. },
  183. .board_cfg = {
  184. .display_on = ap320_wvga_power_on,
  185. .display_off = ap320_wvga_power_off,
  186. },
  187. }
  188. };
  189. static struct resource lcdc_resources[] = {
  190. [0] = {
  191. .name = "LCDC",
  192. .start = 0xfe940000, /* P4-only space */
  193. .end = 0xfe941fff,
  194. .flags = IORESOURCE_MEM,
  195. },
  196. [1] = {
  197. .start = 28,
  198. .flags = IORESOURCE_IRQ,
  199. },
  200. };
  201. static struct platform_device lcdc_device = {
  202. .name = "sh_mobile_lcdc_fb",
  203. .num_resources = ARRAY_SIZE(lcdc_resources),
  204. .resource = lcdc_resources,
  205. .dev = {
  206. .platform_data = &lcdc_info,
  207. },
  208. };
  209. static void camera_power(int val)
  210. {
  211. gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
  212. mdelay(10);
  213. }
  214. #ifdef CONFIG_I2C
  215. static unsigned char camera_ncm03j_magic[] =
  216. {
  217. 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
  218. 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
  219. 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
  220. 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
  221. 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
  222. 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
  223. 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
  224. 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
  225. 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
  226. 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
  227. 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
  228. 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
  229. 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
  230. 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
  231. 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
  232. 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
  233. };
  234. static int camera_set_capture(struct soc_camera_platform_info *info,
  235. int enable)
  236. {
  237. struct i2c_adapter *a = i2c_get_adapter(0);
  238. struct i2c_msg msg;
  239. int ret = 0;
  240. int i;
  241. camera_power(0);
  242. if (!enable)
  243. return 0; /* no disable for now */
  244. camera_power(1);
  245. for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
  246. u_int8_t buf[8];
  247. msg.addr = 0x6e;
  248. msg.buf = buf;
  249. msg.len = 2;
  250. msg.flags = 0;
  251. buf[0] = camera_ncm03j_magic[i];
  252. buf[1] = camera_ncm03j_magic[i + 1];
  253. ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
  254. }
  255. return ret;
  256. }
  257. static struct soc_camera_platform_info camera_info = {
  258. .iface = 0,
  259. .format_name = "UYVY",
  260. .format_depth = 16,
  261. .format = {
  262. .pixelformat = V4L2_PIX_FMT_UYVY,
  263. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  264. .width = 640,
  265. .height = 480,
  266. },
  267. .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
  268. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
  269. .set_capture = camera_set_capture,
  270. };
  271. static struct platform_device camera_device = {
  272. .name = "soc_camera_platform",
  273. .dev = {
  274. .platform_data = &camera_info,
  275. },
  276. };
  277. #endif /* CONFIG_I2C */
  278. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  279. .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
  280. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
  281. };
  282. static struct resource ceu_resources[] = {
  283. [0] = {
  284. .name = "CEU",
  285. .start = 0xfe910000,
  286. .end = 0xfe91009f,
  287. .flags = IORESOURCE_MEM,
  288. },
  289. [1] = {
  290. .start = 52,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. [2] = {
  294. /* place holder for contiguous memory */
  295. },
  296. };
  297. static struct platform_device ceu_device = {
  298. .name = "sh_mobile_ceu",
  299. .id = 0, /* "ceu0" clock */
  300. .num_resources = ARRAY_SIZE(ceu_resources),
  301. .resource = ceu_resources,
  302. .dev = {
  303. .platform_data = &sh_mobile_ceu_info,
  304. },
  305. };
  306. struct spi_gpio_platform_data sdcard_cn3_platform_data = {
  307. .sck = GPIO_PTD0,
  308. .mosi = GPIO_PTD1,
  309. .miso = GPIO_PTD2,
  310. .num_chipselect = 1,
  311. };
  312. static struct platform_device sdcard_cn3_device = {
  313. .name = "spi_gpio",
  314. .dev = {
  315. .platform_data = &sdcard_cn3_platform_data,
  316. },
  317. };
  318. static struct platform_device *ap325rxa_devices[] __initdata = {
  319. &smsc9118_device,
  320. &ap325rxa_nor_flash_device,
  321. &lcdc_device,
  322. &ceu_device,
  323. #ifdef CONFIG_I2C
  324. &camera_device,
  325. #endif
  326. &nand_flash_device,
  327. &sdcard_cn3_device,
  328. };
  329. static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
  330. {
  331. I2C_BOARD_INFO("pcf8563", 0x51),
  332. },
  333. };
  334. static struct spi_board_info ap325rxa_spi_devices[] = {
  335. {
  336. .modalias = "mmc_spi",
  337. .max_speed_hz = 5000000,
  338. .chip_select = 0,
  339. .controller_data = (void *) GPIO_PTD5,
  340. },
  341. };
  342. static int __init ap325rxa_devices_setup(void)
  343. {
  344. /* LD3 and LD4 LEDs */
  345. gpio_request(GPIO_PTX5, NULL); /* RUN */
  346. gpio_direction_output(GPIO_PTX5, 1);
  347. gpio_export(GPIO_PTX5, 0);
  348. gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
  349. gpio_direction_output(GPIO_PTX4, 0);
  350. gpio_export(GPIO_PTX4, 0);
  351. /* SW1 input */
  352. gpio_request(GPIO_PTF7, NULL); /* MODE */
  353. gpio_direction_input(GPIO_PTF7);
  354. gpio_export(GPIO_PTF7, 0);
  355. /* LCDC */
  356. gpio_request(GPIO_FN_LCDD15, NULL);
  357. gpio_request(GPIO_FN_LCDD14, NULL);
  358. gpio_request(GPIO_FN_LCDD13, NULL);
  359. gpio_request(GPIO_FN_LCDD12, NULL);
  360. gpio_request(GPIO_FN_LCDD11, NULL);
  361. gpio_request(GPIO_FN_LCDD10, NULL);
  362. gpio_request(GPIO_FN_LCDD9, NULL);
  363. gpio_request(GPIO_FN_LCDD8, NULL);
  364. gpio_request(GPIO_FN_LCDD7, NULL);
  365. gpio_request(GPIO_FN_LCDD6, NULL);
  366. gpio_request(GPIO_FN_LCDD5, NULL);
  367. gpio_request(GPIO_FN_LCDD4, NULL);
  368. gpio_request(GPIO_FN_LCDD3, NULL);
  369. gpio_request(GPIO_FN_LCDD2, NULL);
  370. gpio_request(GPIO_FN_LCDD1, NULL);
  371. gpio_request(GPIO_FN_LCDD0, NULL);
  372. gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
  373. gpio_request(GPIO_FN_LCDDCK, NULL);
  374. gpio_request(GPIO_FN_LCDVEPWC, NULL);
  375. gpio_request(GPIO_FN_LCDVCPWC, NULL);
  376. gpio_request(GPIO_FN_LCDVSYN, NULL);
  377. gpio_request(GPIO_FN_LCDHSYN, NULL);
  378. gpio_request(GPIO_FN_LCDDISP, NULL);
  379. gpio_request(GPIO_FN_LCDDON, NULL);
  380. /* LCD backlight */
  381. gpio_request(GPIO_PTS3, NULL);
  382. gpio_direction_output(GPIO_PTS3, 1);
  383. /* CEU */
  384. gpio_request(GPIO_FN_VIO_CLK2, NULL);
  385. gpio_request(GPIO_FN_VIO_VD2, NULL);
  386. gpio_request(GPIO_FN_VIO_HD2, NULL);
  387. gpio_request(GPIO_FN_VIO_FLD, NULL);
  388. gpio_request(GPIO_FN_VIO_CKO, NULL);
  389. gpio_request(GPIO_FN_VIO_D15, NULL);
  390. gpio_request(GPIO_FN_VIO_D14, NULL);
  391. gpio_request(GPIO_FN_VIO_D13, NULL);
  392. gpio_request(GPIO_FN_VIO_D12, NULL);
  393. gpio_request(GPIO_FN_VIO_D11, NULL);
  394. gpio_request(GPIO_FN_VIO_D10, NULL);
  395. gpio_request(GPIO_FN_VIO_D9, NULL);
  396. gpio_request(GPIO_FN_VIO_D8, NULL);
  397. gpio_request(GPIO_PTZ7, NULL);
  398. gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
  399. gpio_request(GPIO_PTZ6, NULL);
  400. gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
  401. gpio_request(GPIO_PTZ5, NULL);
  402. gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
  403. gpio_request(GPIO_PTZ4, NULL);
  404. gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
  405. ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
  406. /* FLCTL */
  407. gpio_request(GPIO_FN_FCE, NULL);
  408. gpio_request(GPIO_FN_NAF7, NULL);
  409. gpio_request(GPIO_FN_NAF6, NULL);
  410. gpio_request(GPIO_FN_NAF5, NULL);
  411. gpio_request(GPIO_FN_NAF4, NULL);
  412. gpio_request(GPIO_FN_NAF3, NULL);
  413. gpio_request(GPIO_FN_NAF2, NULL);
  414. gpio_request(GPIO_FN_NAF1, NULL);
  415. gpio_request(GPIO_FN_NAF0, NULL);
  416. gpio_request(GPIO_FN_FCDE, NULL);
  417. gpio_request(GPIO_FN_FOE, NULL);
  418. gpio_request(GPIO_FN_FSC, NULL);
  419. gpio_request(GPIO_FN_FWE, NULL);
  420. gpio_request(GPIO_FN_FRB, NULL);
  421. ctrl_outw(0, PORT_HIZCRC);
  422. ctrl_outw(0xFFFF, PORT_DRVCRA);
  423. ctrl_outw(0xFFFF, PORT_DRVCRB);
  424. platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
  425. i2c_register_board_info(0, ap325rxa_i2c_devices,
  426. ARRAY_SIZE(ap325rxa_i2c_devices));
  427. spi_register_board_info(ap325rxa_spi_devices,
  428. ARRAY_SIZE(ap325rxa_spi_devices));
  429. return platform_add_devices(ap325rxa_devices,
  430. ARRAY_SIZE(ap325rxa_devices));
  431. }
  432. device_initcall(ap325rxa_devices_setup);
  433. static struct sh_machine_vector mv_ap325rxa __initmv = {
  434. .mv_name = "AP-325RXA",
  435. };