mx3_camera.c 33 KB

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  1. /*
  2. * V4L2 Driver for i.MX3x camera host
  3. *
  4. * Copyright (C) 2008
  5. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/version.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/interrupt.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-dev.h>
  21. #include <media/videobuf-dma-contig.h>
  22. #include <media/soc_camera.h>
  23. #include <mach/ipu.h>
  24. #include <mach/mx3_camera.h>
  25. #define MX3_CAM_DRV_NAME "mx3-camera"
  26. /* CMOS Sensor Interface Registers */
  27. #define CSI_REG_START 0x60
  28. #define CSI_SENS_CONF (0x60 - CSI_REG_START)
  29. #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
  30. #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
  31. #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
  32. #define CSI_TST_CTRL (0x70 - CSI_REG_START)
  33. #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
  34. #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
  35. #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
  36. #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
  37. #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
  38. #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
  39. #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
  40. #define CSI_SENS_CONF_DATA_POL_SHIFT 2
  41. #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
  42. #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
  43. #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
  44. #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
  45. #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
  46. #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
  47. #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
  48. #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  49. #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  50. #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  51. #define MAX_VIDEO_MEM 16
  52. struct mx3_camera_buffer {
  53. /* common v4l buffer stuff -- must be first */
  54. struct videobuf_buffer vb;
  55. const struct soc_camera_data_format *fmt;
  56. /* One descriptot per scatterlist (per frame) */
  57. struct dma_async_tx_descriptor *txd;
  58. /* We have to "build" a scatterlist ourselves - one element per frame */
  59. struct scatterlist sg;
  60. };
  61. /**
  62. * struct mx3_camera_dev - i.MX3x camera (CSI) object
  63. * @dev: camera device, to which the coherent buffer is attached
  64. * @icd: currently attached camera sensor
  65. * @clk: pointer to clock
  66. * @base: remapped register base address
  67. * @pdata: platform data
  68. * @platform_flags: platform flags
  69. * @mclk: master clock frequency in Hz
  70. * @capture: list of capture videobuffers
  71. * @lock: protects video buffer lists
  72. * @active: active video buffer
  73. * @idmac_channel: array of pointers to IPU DMAC DMA channels
  74. * @soc_host: embedded soc_host object
  75. */
  76. struct mx3_camera_dev {
  77. /*
  78. * i.MX3x is only supposed to handle one camera on its Camera Sensor
  79. * Interface. If anyone ever builds hardware to enable more than one
  80. * camera _simultaneously_, they will have to modify this driver too
  81. */
  82. struct soc_camera_device *icd;
  83. struct clk *clk;
  84. void __iomem *base;
  85. struct mx3_camera_pdata *pdata;
  86. unsigned long platform_flags;
  87. unsigned long mclk;
  88. struct list_head capture;
  89. spinlock_t lock; /* Protects video buffer lists */
  90. struct mx3_camera_buffer *active;
  91. /* IDMAC / dmaengine interface */
  92. struct idmac_channel *idmac_channel[1]; /* We need one channel */
  93. struct soc_camera_host soc_host;
  94. };
  95. struct dma_chan_request {
  96. struct mx3_camera_dev *mx3_cam;
  97. enum ipu_channel id;
  98. };
  99. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
  100. static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
  101. {
  102. return __raw_readl(mx3->base + reg);
  103. }
  104. static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
  105. {
  106. __raw_writel(value, mx3->base + reg);
  107. }
  108. /* Called from the IPU IDMAC ISR */
  109. static void mx3_cam_dma_done(void *arg)
  110. {
  111. struct idmac_tx_desc *desc = to_tx_desc(arg);
  112. struct dma_chan *chan = desc->txd.chan;
  113. struct idmac_channel *ichannel = to_idmac_chan(chan);
  114. struct mx3_camera_dev *mx3_cam = ichannel->client;
  115. struct videobuf_buffer *vb;
  116. dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
  117. desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
  118. spin_lock(&mx3_cam->lock);
  119. if (mx3_cam->active) {
  120. vb = &mx3_cam->active->vb;
  121. list_del_init(&vb->queue);
  122. vb->state = VIDEOBUF_DONE;
  123. do_gettimeofday(&vb->ts);
  124. vb->field_count++;
  125. wake_up(&vb->done);
  126. }
  127. if (list_empty(&mx3_cam->capture)) {
  128. mx3_cam->active = NULL;
  129. spin_unlock(&mx3_cam->lock);
  130. /*
  131. * stop capture - without further buffers IPU_CHA_BUF0_RDY will
  132. * not get updated
  133. */
  134. return;
  135. }
  136. mx3_cam->active = list_entry(mx3_cam->capture.next,
  137. struct mx3_camera_buffer, vb.queue);
  138. mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
  139. spin_unlock(&mx3_cam->lock);
  140. }
  141. static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
  142. {
  143. struct soc_camera_device *icd = vq->priv_data;
  144. struct videobuf_buffer *vb = &buf->vb;
  145. struct dma_async_tx_descriptor *txd = buf->txd;
  146. struct idmac_channel *ichan;
  147. BUG_ON(in_interrupt());
  148. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  149. vb, vb->baddr, vb->bsize);
  150. /*
  151. * This waits until this buffer is out of danger, i.e., until it is no
  152. * longer in STATE_QUEUED or STATE_ACTIVE
  153. */
  154. videobuf_waiton(vb, 0, 0);
  155. if (txd) {
  156. ichan = to_idmac_chan(txd->chan);
  157. async_tx_ack(txd);
  158. }
  159. videobuf_dma_contig_free(vq, vb);
  160. buf->txd = NULL;
  161. vb->state = VIDEOBUF_NEEDS_INIT;
  162. }
  163. /*
  164. * Videobuf operations
  165. */
  166. /*
  167. * Calculate the __buffer__ (not data) size and number of buffers.
  168. * Called with .vb_lock held
  169. */
  170. static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  171. unsigned int *size)
  172. {
  173. struct soc_camera_device *icd = vq->priv_data;
  174. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  175. struct mx3_camera_dev *mx3_cam = ici->priv;
  176. /*
  177. * bits-per-pixel (depth) as specified in camera's pixel format does
  178. * not necessarily match what the camera interface writes to RAM, but
  179. * it should be good enough for now.
  180. */
  181. unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
  182. if (!mx3_cam->idmac_channel[0])
  183. return -EINVAL;
  184. *size = icd->rect_current.width * icd->rect_current.height * bpp;
  185. if (!*count)
  186. *count = 32;
  187. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  188. *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
  189. return 0;
  190. }
  191. /* Called with .vb_lock held */
  192. static int mx3_videobuf_prepare(struct videobuf_queue *vq,
  193. struct videobuf_buffer *vb, enum v4l2_field field)
  194. {
  195. struct soc_camera_device *icd = vq->priv_data;
  196. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  197. struct mx3_camera_dev *mx3_cam = ici->priv;
  198. struct mx3_camera_buffer *buf =
  199. container_of(vb, struct mx3_camera_buffer, vb);
  200. /* current_fmt _must_ always be set */
  201. size_t new_size = icd->rect_current.width * icd->rect_current.height *
  202. ((icd->current_fmt->depth + 7) >> 3);
  203. int ret;
  204. /*
  205. * I think, in buf_prepare you only have to protect global data,
  206. * the actual buffer is yours
  207. */
  208. if (buf->fmt != icd->current_fmt ||
  209. vb->width != icd->rect_current.width ||
  210. vb->height != icd->rect_current.height ||
  211. vb->field != field) {
  212. buf->fmt = icd->current_fmt;
  213. vb->width = icd->rect_current.width;
  214. vb->height = icd->rect_current.height;
  215. vb->field = field;
  216. if (vb->state != VIDEOBUF_NEEDS_INIT)
  217. free_buffer(vq, buf);
  218. }
  219. if (vb->baddr && vb->bsize < new_size) {
  220. /* User provided buffer, but it is too small */
  221. ret = -ENOMEM;
  222. goto out;
  223. }
  224. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  225. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  226. struct scatterlist *sg = &buf->sg;
  227. /*
  228. * The total size of video-buffers that will be allocated / mapped.
  229. * *size that we calculated in videobuf_setup gets assigned to
  230. * vb->bsize, and now we use the same calculation to get vb->size.
  231. */
  232. vb->size = new_size;
  233. /* This actually (allocates and) maps buffers */
  234. ret = videobuf_iolock(vq, vb, NULL);
  235. if (ret)
  236. goto fail;
  237. /*
  238. * We will have to configure the IDMAC channel. It has two slots
  239. * for DMA buffers, we shall enter the first two buffers there,
  240. * and then submit new buffers in DMA-ready interrupts
  241. */
  242. sg_init_table(sg, 1);
  243. sg_dma_address(sg) = videobuf_to_dma_contig(vb);
  244. sg_dma_len(sg) = vb->size;
  245. buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
  246. &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
  247. DMA_PREP_INTERRUPT);
  248. if (!buf->txd) {
  249. ret = -EIO;
  250. goto fail;
  251. }
  252. buf->txd->callback_param = buf->txd;
  253. buf->txd->callback = mx3_cam_dma_done;
  254. vb->state = VIDEOBUF_PREPARED;
  255. }
  256. return 0;
  257. fail:
  258. free_buffer(vq, buf);
  259. out:
  260. return ret;
  261. }
  262. static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
  263. {
  264. /* Add more formats as need arises and test possibilities appear... */
  265. switch (fourcc) {
  266. case V4L2_PIX_FMT_RGB565:
  267. return IPU_PIX_FMT_RGB565;
  268. case V4L2_PIX_FMT_RGB24:
  269. return IPU_PIX_FMT_RGB24;
  270. case V4L2_PIX_FMT_RGB332:
  271. return IPU_PIX_FMT_RGB332;
  272. case V4L2_PIX_FMT_YUV422P:
  273. return IPU_PIX_FMT_YVU422P;
  274. default:
  275. return IPU_PIX_FMT_GENERIC;
  276. }
  277. }
  278. /*
  279. * Called with .vb_lock mutex held and
  280. * under spinlock_irqsave(&mx3_cam->lock, ...)
  281. */
  282. static void mx3_videobuf_queue(struct videobuf_queue *vq,
  283. struct videobuf_buffer *vb)
  284. {
  285. struct soc_camera_device *icd = vq->priv_data;
  286. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  287. struct mx3_camera_dev *mx3_cam = ici->priv;
  288. struct mx3_camera_buffer *buf =
  289. container_of(vb, struct mx3_camera_buffer, vb);
  290. struct dma_async_tx_descriptor *txd = buf->txd;
  291. struct idmac_channel *ichan = to_idmac_chan(txd->chan);
  292. struct idmac_video_param *video = &ichan->params.video;
  293. const struct soc_camera_data_format *data_fmt = icd->current_fmt;
  294. dma_cookie_t cookie;
  295. BUG_ON(!irqs_disabled());
  296. /* This is the configuration of one sg-element */
  297. video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
  298. video->out_width = icd->rect_current.width;
  299. video->out_height = icd->rect_current.height;
  300. video->out_stride = icd->rect_current.width;
  301. #ifdef DEBUG
  302. /* helps to see what DMA actually has written */
  303. memset((void *)vb->baddr, 0xaa, vb->bsize);
  304. #endif
  305. list_add_tail(&vb->queue, &mx3_cam->capture);
  306. if (!mx3_cam->active) {
  307. mx3_cam->active = buf;
  308. vb->state = VIDEOBUF_ACTIVE;
  309. } else {
  310. vb->state = VIDEOBUF_QUEUED;
  311. }
  312. spin_unlock_irq(&mx3_cam->lock);
  313. cookie = txd->tx_submit(txd);
  314. dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
  315. spin_lock_irq(&mx3_cam->lock);
  316. if (cookie >= 0)
  317. return;
  318. /* Submit error */
  319. vb->state = VIDEOBUF_PREPARED;
  320. list_del_init(&vb->queue);
  321. if (mx3_cam->active == buf)
  322. mx3_cam->active = NULL;
  323. }
  324. /* Called with .vb_lock held */
  325. static void mx3_videobuf_release(struct videobuf_queue *vq,
  326. struct videobuf_buffer *vb)
  327. {
  328. struct soc_camera_device *icd = vq->priv_data;
  329. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  330. struct mx3_camera_dev *mx3_cam = ici->priv;
  331. struct mx3_camera_buffer *buf =
  332. container_of(vb, struct mx3_camera_buffer, vb);
  333. unsigned long flags;
  334. dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
  335. mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
  336. vb->state, list_empty(&vb->queue) ? "" : "not ");
  337. spin_lock_irqsave(&mx3_cam->lock, flags);
  338. if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
  339. !list_empty(&vb->queue)) {
  340. vb->state = VIDEOBUF_ERROR;
  341. list_del_init(&vb->queue);
  342. if (mx3_cam->active == buf)
  343. mx3_cam->active = NULL;
  344. }
  345. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  346. free_buffer(vq, buf);
  347. }
  348. static struct videobuf_queue_ops mx3_videobuf_ops = {
  349. .buf_setup = mx3_videobuf_setup,
  350. .buf_prepare = mx3_videobuf_prepare,
  351. .buf_queue = mx3_videobuf_queue,
  352. .buf_release = mx3_videobuf_release,
  353. };
  354. static void mx3_camera_init_videobuf(struct videobuf_queue *q,
  355. struct soc_camera_device *icd)
  356. {
  357. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  358. struct mx3_camera_dev *mx3_cam = ici->priv;
  359. videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
  360. &mx3_cam->lock,
  361. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  362. V4L2_FIELD_NONE,
  363. sizeof(struct mx3_camera_buffer), icd);
  364. }
  365. /* First part of ipu_csi_init_interface() */
  366. static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
  367. struct soc_camera_device *icd)
  368. {
  369. u32 conf;
  370. long rate;
  371. /* Set default size: ipu_csi_set_window_size() */
  372. csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
  373. /* ...and position to 0:0: ipu_csi_set_window_pos() */
  374. conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  375. csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
  376. /* We use only gated clock synchronisation mode so far */
  377. conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
  378. /* Set generic data, platform-biggest bus-width */
  379. conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  380. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  381. conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  382. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  383. conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  384. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  385. conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  386. else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
  387. conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  388. if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
  389. conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
  390. if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
  391. conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
  392. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  393. conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  394. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  395. conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  396. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  397. conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  398. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  399. conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  400. /* ipu_csi_init_interface() */
  401. csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
  402. clk_enable(mx3_cam->clk);
  403. rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
  404. dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
  405. if (rate)
  406. clk_set_rate(mx3_cam->clk, rate);
  407. }
  408. /* Called with .video_lock held */
  409. static int mx3_camera_add_device(struct soc_camera_device *icd)
  410. {
  411. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  412. struct mx3_camera_dev *mx3_cam = ici->priv;
  413. if (mx3_cam->icd)
  414. return -EBUSY;
  415. mx3_camera_activate(mx3_cam, icd);
  416. mx3_cam->icd = icd;
  417. dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
  418. icd->devnum);
  419. return 0;
  420. }
  421. /* Called with .video_lock held */
  422. static void mx3_camera_remove_device(struct soc_camera_device *icd)
  423. {
  424. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  425. struct mx3_camera_dev *mx3_cam = ici->priv;
  426. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  427. BUG_ON(icd != mx3_cam->icd);
  428. if (*ichan) {
  429. dma_release_channel(&(*ichan)->dma_chan);
  430. *ichan = NULL;
  431. }
  432. clk_disable(mx3_cam->clk);
  433. mx3_cam->icd = NULL;
  434. dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
  435. icd->devnum);
  436. }
  437. static bool channel_change_requested(struct soc_camera_device *icd,
  438. struct v4l2_rect *rect)
  439. {
  440. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  441. struct mx3_camera_dev *mx3_cam = ici->priv;
  442. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  443. /* Do buffers have to be re-allocated or channel re-configured? */
  444. return ichan && rect->width * rect->height >
  445. icd->rect_current.width * icd->rect_current.height;
  446. }
  447. static int test_platform_param(struct mx3_camera_dev *mx3_cam,
  448. unsigned char buswidth, unsigned long *flags)
  449. {
  450. /*
  451. * Platform specified synchronization and pixel clock polarities are
  452. * only a recommendation and are only used during probing. MX3x
  453. * camera interface only works in master mode, i.e., uses HSYNC and
  454. * VSYNC signals from the sensor
  455. */
  456. *flags = SOCAM_MASTER |
  457. SOCAM_HSYNC_ACTIVE_HIGH |
  458. SOCAM_HSYNC_ACTIVE_LOW |
  459. SOCAM_VSYNC_ACTIVE_HIGH |
  460. SOCAM_VSYNC_ACTIVE_LOW |
  461. SOCAM_PCLK_SAMPLE_RISING |
  462. SOCAM_PCLK_SAMPLE_FALLING |
  463. SOCAM_DATA_ACTIVE_HIGH |
  464. SOCAM_DATA_ACTIVE_LOW;
  465. /* If requested data width is supported by the platform, use it or any
  466. * possible lower value - i.MX31 is smart enough to schift bits */
  467. switch (buswidth) {
  468. case 15:
  469. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
  470. return -EINVAL;
  471. *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
  472. SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  473. break;
  474. case 10:
  475. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
  476. return -EINVAL;
  477. *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
  478. SOCAM_DATAWIDTH_4;
  479. break;
  480. case 8:
  481. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
  482. return -EINVAL;
  483. *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  484. break;
  485. case 4:
  486. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
  487. return -EINVAL;
  488. *flags |= SOCAM_DATAWIDTH_4;
  489. break;
  490. default:
  491. dev_info(mx3_cam->soc_host.v4l2_dev.dev, "Unsupported bus width %d\n",
  492. buswidth);
  493. return -EINVAL;
  494. }
  495. return 0;
  496. }
  497. static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
  498. const unsigned int depth)
  499. {
  500. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  501. struct mx3_camera_dev *mx3_cam = ici->priv;
  502. unsigned long bus_flags, camera_flags;
  503. int ret = test_platform_param(mx3_cam, depth, &bus_flags);
  504. dev_dbg(icd->dev.parent, "requested bus width %d bit: %d\n", depth, ret);
  505. if (ret < 0)
  506. return ret;
  507. camera_flags = icd->ops->query_bus_param(icd);
  508. ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  509. if (ret < 0)
  510. dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
  511. camera_flags, bus_flags);
  512. return ret;
  513. }
  514. static bool chan_filter(struct dma_chan *chan, void *arg)
  515. {
  516. struct dma_chan_request *rq = arg;
  517. struct mx3_camera_pdata *pdata;
  518. if (!rq)
  519. return false;
  520. pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
  521. return rq->id == chan->chan_id &&
  522. pdata->dma_dev == chan->device->dev;
  523. }
  524. static const struct soc_camera_data_format mx3_camera_formats[] = {
  525. {
  526. .name = "Bayer (sRGB) 8 bit",
  527. .depth = 8,
  528. .fourcc = V4L2_PIX_FMT_SBGGR8,
  529. .colorspace = V4L2_COLORSPACE_SRGB,
  530. }, {
  531. .name = "Monochrome 8 bit",
  532. .depth = 8,
  533. .fourcc = V4L2_PIX_FMT_GREY,
  534. .colorspace = V4L2_COLORSPACE_JPEG,
  535. },
  536. };
  537. static bool buswidth_supported(struct soc_camera_host *ici, int depth)
  538. {
  539. struct mx3_camera_dev *mx3_cam = ici->priv;
  540. switch (depth) {
  541. case 4:
  542. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
  543. case 8:
  544. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
  545. case 10:
  546. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
  547. case 15:
  548. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
  549. }
  550. return false;
  551. }
  552. static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
  553. struct soc_camera_format_xlate *xlate)
  554. {
  555. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  556. int formats = 0, buswidth, ret;
  557. buswidth = icd->formats[idx].depth;
  558. if (!buswidth_supported(ici, buswidth))
  559. return 0;
  560. ret = mx3_camera_try_bus_param(icd, buswidth);
  561. if (ret < 0)
  562. return 0;
  563. switch (icd->formats[idx].fourcc) {
  564. case V4L2_PIX_FMT_SGRBG10:
  565. formats++;
  566. if (xlate) {
  567. xlate->host_fmt = &mx3_camera_formats[0];
  568. xlate->cam_fmt = icd->formats + idx;
  569. xlate->buswidth = buswidth;
  570. xlate++;
  571. dev_dbg(icd->dev.parent, "Providing format %s using %s\n",
  572. mx3_camera_formats[0].name,
  573. icd->formats[idx].name);
  574. }
  575. goto passthrough;
  576. case V4L2_PIX_FMT_Y16:
  577. formats++;
  578. if (xlate) {
  579. xlate->host_fmt = &mx3_camera_formats[1];
  580. xlate->cam_fmt = icd->formats + idx;
  581. xlate->buswidth = buswidth;
  582. xlate++;
  583. dev_dbg(icd->dev.parent, "Providing format %s using %s\n",
  584. mx3_camera_formats[0].name,
  585. icd->formats[idx].name);
  586. }
  587. default:
  588. passthrough:
  589. /* Generic pass-through */
  590. formats++;
  591. if (xlate) {
  592. xlate->host_fmt = icd->formats + idx;
  593. xlate->cam_fmt = icd->formats + idx;
  594. xlate->buswidth = buswidth;
  595. xlate++;
  596. dev_dbg(icd->dev.parent,
  597. "Providing format %s in pass-through mode\n",
  598. icd->formats[idx].name);
  599. }
  600. }
  601. return formats;
  602. }
  603. static void configure_geometry(struct mx3_camera_dev *mx3_cam,
  604. struct v4l2_rect *rect)
  605. {
  606. u32 ctrl, width_field, height_field;
  607. /* Setup frame size - this cannot be changed on-the-fly... */
  608. width_field = rect->width - 1;
  609. height_field = rect->height - 1;
  610. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
  611. csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
  612. csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
  613. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
  614. /* ...and position */
  615. ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  616. /* Sensor does the cropping */
  617. csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
  618. /*
  619. * No need to free resources here if we fail, we'll see if we need to
  620. * do this next time we are called
  621. */
  622. }
  623. static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
  624. {
  625. dma_cap_mask_t mask;
  626. struct dma_chan *chan;
  627. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  628. /* We have to use IDMAC_IC_7 for Bayer / generic data */
  629. struct dma_chan_request rq = {.mx3_cam = mx3_cam,
  630. .id = IDMAC_IC_7};
  631. if (*ichan) {
  632. struct videobuf_buffer *vb, *_vb;
  633. dma_release_channel(&(*ichan)->dma_chan);
  634. *ichan = NULL;
  635. mx3_cam->active = NULL;
  636. list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
  637. list_del_init(&vb->queue);
  638. vb->state = VIDEOBUF_ERROR;
  639. wake_up(&vb->done);
  640. }
  641. }
  642. dma_cap_zero(mask);
  643. dma_cap_set(DMA_SLAVE, mask);
  644. dma_cap_set(DMA_PRIVATE, mask);
  645. chan = dma_request_channel(mask, chan_filter, &rq);
  646. if (!chan)
  647. return -EBUSY;
  648. *ichan = to_idmac_chan(chan);
  649. (*ichan)->client = mx3_cam;
  650. return 0;
  651. }
  652. static int mx3_camera_set_crop(struct soc_camera_device *icd,
  653. struct v4l2_crop *a)
  654. {
  655. struct v4l2_rect *rect = &a->c;
  656. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  657. struct mx3_camera_dev *mx3_cam = ici->priv;
  658. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  659. /*
  660. * We now know pixel formats and can decide upon DMA-channel(s)
  661. * So far only direct camera-to-memory is supported
  662. */
  663. if (channel_change_requested(icd, rect)) {
  664. int ret = acquire_dma_channel(mx3_cam);
  665. if (ret < 0)
  666. return ret;
  667. }
  668. configure_geometry(mx3_cam, rect);
  669. return v4l2_subdev_call(sd, video, s_crop, a);
  670. }
  671. static int mx3_camera_set_fmt(struct soc_camera_device *icd,
  672. struct v4l2_format *f)
  673. {
  674. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  675. struct mx3_camera_dev *mx3_cam = ici->priv;
  676. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  677. const struct soc_camera_format_xlate *xlate;
  678. struct v4l2_pix_format *pix = &f->fmt.pix;
  679. struct v4l2_rect rect = {
  680. .left = icd->rect_current.left,
  681. .top = icd->rect_current.top,
  682. .width = pix->width,
  683. .height = pix->height,
  684. };
  685. int ret;
  686. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  687. if (!xlate) {
  688. dev_warn(icd->dev.parent, "Format %x not found\n", pix->pixelformat);
  689. return -EINVAL;
  690. }
  691. ret = acquire_dma_channel(mx3_cam);
  692. if (ret < 0)
  693. return ret;
  694. /*
  695. * Might have to perform a complete interface initialisation like in
  696. * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
  697. * mxc_v4l2_s_fmt()
  698. */
  699. configure_geometry(mx3_cam, &rect);
  700. ret = v4l2_subdev_call(sd, video, s_fmt, f);
  701. if (!ret) {
  702. icd->buswidth = xlate->buswidth;
  703. icd->current_fmt = xlate->host_fmt;
  704. }
  705. return ret;
  706. }
  707. static int mx3_camera_try_fmt(struct soc_camera_device *icd,
  708. struct v4l2_format *f)
  709. {
  710. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  711. const struct soc_camera_format_xlate *xlate;
  712. struct v4l2_pix_format *pix = &f->fmt.pix;
  713. __u32 pixfmt = pix->pixelformat;
  714. enum v4l2_field field;
  715. int ret;
  716. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  717. if (pixfmt && !xlate) {
  718. dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
  719. return -EINVAL;
  720. }
  721. /* limit to MX3 hardware capabilities */
  722. if (pix->height > 4096)
  723. pix->height = 4096;
  724. if (pix->width > 4096)
  725. pix->width = 4096;
  726. pix->bytesperline = pix->width *
  727. DIV_ROUND_UP(xlate->host_fmt->depth, 8);
  728. pix->sizeimage = pix->height * pix->bytesperline;
  729. /* camera has to see its format, but the user the original one */
  730. pix->pixelformat = xlate->cam_fmt->fourcc;
  731. /* limit to sensor capabilities */
  732. ret = v4l2_subdev_call(sd, video, try_fmt, f);
  733. pix->pixelformat = xlate->host_fmt->fourcc;
  734. field = pix->field;
  735. if (field == V4L2_FIELD_ANY) {
  736. pix->field = V4L2_FIELD_NONE;
  737. } else if (field != V4L2_FIELD_NONE) {
  738. dev_err(&icd->dev, "Field type %d unsupported.\n", field);
  739. return -EINVAL;
  740. }
  741. return ret;
  742. }
  743. static int mx3_camera_reqbufs(struct soc_camera_file *icf,
  744. struct v4l2_requestbuffers *p)
  745. {
  746. return 0;
  747. }
  748. static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
  749. {
  750. struct soc_camera_file *icf = file->private_data;
  751. return videobuf_poll_stream(file, &icf->vb_vidq, pt);
  752. }
  753. static int mx3_camera_querycap(struct soc_camera_host *ici,
  754. struct v4l2_capability *cap)
  755. {
  756. /* cap->name is set by the firendly caller:-> */
  757. strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
  758. cap->version = KERNEL_VERSION(0, 2, 2);
  759. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  760. return 0;
  761. }
  762. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  763. {
  764. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  765. struct mx3_camera_dev *mx3_cam = ici->priv;
  766. unsigned long bus_flags, camera_flags, common_flags;
  767. u32 dw, sens_conf;
  768. int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
  769. const struct soc_camera_format_xlate *xlate;
  770. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  771. if (!xlate) {
  772. dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
  773. return -EINVAL;
  774. }
  775. dev_dbg(icd->dev.parent, "requested bus width %d bit: %d\n",
  776. icd->buswidth, ret);
  777. if (ret < 0)
  778. return ret;
  779. camera_flags = icd->ops->query_bus_param(icd);
  780. common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  781. dev_dbg(icd->dev.parent, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
  782. camera_flags, bus_flags, common_flags);
  783. if (!common_flags) {
  784. dev_dbg(icd->dev.parent, "no common flags");
  785. return -EINVAL;
  786. }
  787. /* Make choices, based on platform preferences */
  788. if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
  789. (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
  790. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  791. common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
  792. else
  793. common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
  794. }
  795. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  796. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  797. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  798. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  799. else
  800. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  801. }
  802. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  803. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  804. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  805. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  806. else
  807. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  808. }
  809. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  810. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  811. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  812. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  813. else
  814. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  815. }
  816. /* Make the camera work in widest common mode, we'll take care of
  817. * the rest */
  818. if (common_flags & SOCAM_DATAWIDTH_15)
  819. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  820. SOCAM_DATAWIDTH_15;
  821. else if (common_flags & SOCAM_DATAWIDTH_10)
  822. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  823. SOCAM_DATAWIDTH_10;
  824. else if (common_flags & SOCAM_DATAWIDTH_8)
  825. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  826. SOCAM_DATAWIDTH_8;
  827. else
  828. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  829. SOCAM_DATAWIDTH_4;
  830. ret = icd->ops->set_bus_param(icd, common_flags);
  831. if (ret < 0) {
  832. dev_dbg(icd->dev.parent, "camera set_bus_param(%lx) returned %d\n",
  833. common_flags, ret);
  834. return ret;
  835. }
  836. /*
  837. * So far only gated clock mode is supported. Add a line
  838. * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
  839. * below and select the required mode when supporting other
  840. * synchronisation protocols.
  841. */
  842. sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
  843. ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
  844. (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
  845. (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
  846. (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
  847. (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
  848. (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
  849. /* TODO: Support RGB and YUV formats */
  850. /* This has been set in mx3_camera_activate(), but we clear it above */
  851. sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  852. if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
  853. sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  854. if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
  855. sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  856. if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
  857. sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  858. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  859. sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  860. /* Just do what we're asked to do */
  861. switch (xlate->host_fmt->depth) {
  862. case 4:
  863. dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  864. break;
  865. case 8:
  866. dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  867. break;
  868. case 10:
  869. dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  870. break;
  871. default:
  872. /*
  873. * Actually it can only be 15 now, default is just to silence
  874. * compiler warnings
  875. */
  876. case 15:
  877. dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  878. }
  879. csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
  880. dev_dbg(icd->dev.parent, "Set SENS_CONF to %x\n", sens_conf | dw);
  881. return 0;
  882. }
  883. static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
  884. .owner = THIS_MODULE,
  885. .add = mx3_camera_add_device,
  886. .remove = mx3_camera_remove_device,
  887. .set_crop = mx3_camera_set_crop,
  888. .set_fmt = mx3_camera_set_fmt,
  889. .try_fmt = mx3_camera_try_fmt,
  890. .get_formats = mx3_camera_get_formats,
  891. .init_videobuf = mx3_camera_init_videobuf,
  892. .reqbufs = mx3_camera_reqbufs,
  893. .poll = mx3_camera_poll,
  894. .querycap = mx3_camera_querycap,
  895. .set_bus_param = mx3_camera_set_bus_param,
  896. };
  897. static int __devinit mx3_camera_probe(struct platform_device *pdev)
  898. {
  899. struct mx3_camera_dev *mx3_cam;
  900. struct resource *res;
  901. void __iomem *base;
  902. int err = 0;
  903. struct soc_camera_host *soc_host;
  904. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  905. if (!res) {
  906. err = -ENODEV;
  907. goto egetres;
  908. }
  909. mx3_cam = vmalloc(sizeof(*mx3_cam));
  910. if (!mx3_cam) {
  911. dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
  912. err = -ENOMEM;
  913. goto ealloc;
  914. }
  915. memset(mx3_cam, 0, sizeof(*mx3_cam));
  916. mx3_cam->clk = clk_get(&pdev->dev, NULL);
  917. if (IS_ERR(mx3_cam->clk)) {
  918. err = PTR_ERR(mx3_cam->clk);
  919. goto eclkget;
  920. }
  921. mx3_cam->pdata = pdev->dev.platform_data;
  922. mx3_cam->platform_flags = mx3_cam->pdata->flags;
  923. if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
  924. MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
  925. MX3_CAMERA_DATAWIDTH_15))) {
  926. /* Platform hasn't set available data widths. This is bad.
  927. * Warn and use a default. */
  928. dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
  929. "data widths, using default 8 bit\n");
  930. mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
  931. }
  932. mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
  933. if (!mx3_cam->mclk) {
  934. dev_warn(&pdev->dev,
  935. "mclk_10khz == 0! Please, fix your platform data. "
  936. "Using default 20MHz\n");
  937. mx3_cam->mclk = 20000000;
  938. }
  939. /* list of video-buffers */
  940. INIT_LIST_HEAD(&mx3_cam->capture);
  941. spin_lock_init(&mx3_cam->lock);
  942. base = ioremap(res->start, resource_size(res));
  943. if (!base) {
  944. pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
  945. err = -ENOMEM;
  946. goto eioremap;
  947. }
  948. mx3_cam->base = base;
  949. soc_host = &mx3_cam->soc_host;
  950. soc_host->drv_name = MX3_CAM_DRV_NAME;
  951. soc_host->ops = &mx3_soc_camera_host_ops;
  952. soc_host->priv = mx3_cam;
  953. soc_host->v4l2_dev.dev = &pdev->dev;
  954. soc_host->nr = pdev->id;
  955. err = soc_camera_host_register(soc_host);
  956. if (err)
  957. goto ecamhostreg;
  958. /* IDMAC interface */
  959. dmaengine_get();
  960. return 0;
  961. ecamhostreg:
  962. iounmap(base);
  963. eioremap:
  964. clk_put(mx3_cam->clk);
  965. eclkget:
  966. vfree(mx3_cam);
  967. ealloc:
  968. egetres:
  969. return err;
  970. }
  971. static int __devexit mx3_camera_remove(struct platform_device *pdev)
  972. {
  973. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  974. struct mx3_camera_dev *mx3_cam = container_of(soc_host,
  975. struct mx3_camera_dev, soc_host);
  976. clk_put(mx3_cam->clk);
  977. soc_camera_host_unregister(soc_host);
  978. iounmap(mx3_cam->base);
  979. /*
  980. * The channel has either not been allocated,
  981. * or should have been released
  982. */
  983. if (WARN_ON(mx3_cam->idmac_channel[0]))
  984. dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
  985. vfree(mx3_cam);
  986. dmaengine_put();
  987. dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
  988. return 0;
  989. }
  990. static struct platform_driver mx3_camera_driver = {
  991. .driver = {
  992. .name = MX3_CAM_DRV_NAME,
  993. },
  994. .probe = mx3_camera_probe,
  995. .remove = __devexit_p(mx3_camera_remove),
  996. };
  997. static int __init mx3_camera_init(void)
  998. {
  999. return platform_driver_register(&mx3_camera_driver);
  1000. }
  1001. static void __exit mx3_camera_exit(void)
  1002. {
  1003. platform_driver_unregister(&mx3_camera_driver);
  1004. }
  1005. module_init(mx3_camera_init);
  1006. module_exit(mx3_camera_exit);
  1007. MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
  1008. MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
  1009. MODULE_LICENSE("GPL v2");
  1010. MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);