mx1_camera.c 20 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/time.h>
  31. #include <linux/version.h>
  32. #include <linux/videodev2.h>
  33. #include <media/soc_camera.h>
  34. #include <media/v4l2-common.h>
  35. #include <media/v4l2-dev.h>
  36. #include <media/videobuf-dma-contig.h>
  37. #include <asm/dma.h>
  38. #include <asm/fiq.h>
  39. #include <mach/dma-mx1-mx2.h>
  40. #include <mach/hardware.h>
  41. #include <mach/mx1_camera.h>
  42. /*
  43. * CSI registers
  44. */
  45. #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
  46. #define DMA_DIMR 0x08 /* Interrupt mask Register */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  73. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  74. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  75. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  76. SOCAM_DATAWIDTH_8)
  77. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  78. /*
  79. * Structures
  80. */
  81. /* buffer for one video frame */
  82. struct mx1_buffer {
  83. /* common v4l buffer stuff -- must be first */
  84. struct videobuf_buffer vb;
  85. const struct soc_camera_data_format *fmt;
  86. int inwork;
  87. };
  88. /* i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  89. * Interface. If anyone ever builds hardware to enable more than
  90. * one camera, they will have to modify this driver too */
  91. struct mx1_camera_dev {
  92. struct soc_camera_host soc_host;
  93. struct soc_camera_device *icd;
  94. struct mx1_camera_pdata *pdata;
  95. struct mx1_buffer *active;
  96. struct resource *res;
  97. struct clk *clk;
  98. struct list_head capture;
  99. void __iomem *base;
  100. int dma_chan;
  101. unsigned int irq;
  102. unsigned long mclk;
  103. spinlock_t lock;
  104. };
  105. /*
  106. * Videobuf operations
  107. */
  108. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  109. unsigned int *size)
  110. {
  111. struct soc_camera_device *icd = vq->priv_data;
  112. *size = icd->rect_current.width * icd->rect_current.height *
  113. ((icd->current_fmt->depth + 7) >> 3);
  114. if (!*count)
  115. *count = 32;
  116. while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  117. (*count)--;
  118. dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
  119. return 0;
  120. }
  121. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  122. {
  123. struct soc_camera_device *icd = vq->priv_data;
  124. struct videobuf_buffer *vb = &buf->vb;
  125. BUG_ON(in_interrupt());
  126. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  127. vb, vb->baddr, vb->bsize);
  128. /* This waits until this buffer is out of danger, i.e., until it is no
  129. * longer in STATE_QUEUED or STATE_ACTIVE */
  130. videobuf_waiton(vb, 0, 0);
  131. videobuf_dma_contig_free(vq, vb);
  132. vb->state = VIDEOBUF_NEEDS_INIT;
  133. }
  134. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  135. struct videobuf_buffer *vb, enum v4l2_field field)
  136. {
  137. struct soc_camera_device *icd = vq->priv_data;
  138. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  139. int ret;
  140. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  141. vb, vb->baddr, vb->bsize);
  142. /* Added list head initialization on alloc */
  143. WARN_ON(!list_empty(&vb->queue));
  144. BUG_ON(NULL == icd->current_fmt);
  145. /* I think, in buf_prepare you only have to protect global data,
  146. * the actual buffer is yours */
  147. buf->inwork = 1;
  148. if (buf->fmt != icd->current_fmt ||
  149. vb->width != icd->rect_current.width ||
  150. vb->height != icd->rect_current.height ||
  151. vb->field != field) {
  152. buf->fmt = icd->current_fmt;
  153. vb->width = icd->rect_current.width;
  154. vb->height = icd->rect_current.height;
  155. vb->field = field;
  156. vb->state = VIDEOBUF_NEEDS_INIT;
  157. }
  158. vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
  159. if (0 != vb->baddr && vb->bsize < vb->size) {
  160. ret = -EINVAL;
  161. goto out;
  162. }
  163. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  164. ret = videobuf_iolock(vq, vb, NULL);
  165. if (ret)
  166. goto fail;
  167. vb->state = VIDEOBUF_PREPARED;
  168. }
  169. buf->inwork = 0;
  170. return 0;
  171. fail:
  172. free_buffer(vq, buf);
  173. out:
  174. buf->inwork = 0;
  175. return ret;
  176. }
  177. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  178. {
  179. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  180. int ret;
  181. if (unlikely(!pcdev->active)) {
  182. dev_err(pcdev->icd->dev.parent, "DMA End IRQ with no active buffer\n");
  183. return -EFAULT;
  184. }
  185. /* setup sg list for future DMA */
  186. ret = imx_dma_setup_single(pcdev->dma_chan,
  187. videobuf_to_dma_contig(vbuf),
  188. vbuf->size, pcdev->res->start +
  189. CSIRXR, DMA_MODE_READ);
  190. if (unlikely(ret))
  191. dev_err(pcdev->icd->dev.parent, "Failed to setup DMA sg list\n");
  192. return ret;
  193. }
  194. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  195. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  196. struct videobuf_buffer *vb)
  197. {
  198. struct soc_camera_device *icd = vq->priv_data;
  199. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  200. struct mx1_camera_dev *pcdev = ici->priv;
  201. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  202. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  203. vb, vb->baddr, vb->bsize);
  204. list_add_tail(&vb->queue, &pcdev->capture);
  205. vb->state = VIDEOBUF_ACTIVE;
  206. if (!pcdev->active) {
  207. pcdev->active = buf;
  208. /* setup sg list for future DMA */
  209. if (!mx1_camera_setup_dma(pcdev)) {
  210. unsigned int temp;
  211. /* enable SOF irq */
  212. temp = __raw_readl(pcdev->base + CSICR1) |
  213. CSICR1_SOF_INTEN;
  214. __raw_writel(temp, pcdev->base + CSICR1);
  215. }
  216. }
  217. }
  218. static void mx1_videobuf_release(struct videobuf_queue *vq,
  219. struct videobuf_buffer *vb)
  220. {
  221. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  222. #ifdef DEBUG
  223. struct soc_camera_device *icd = vq->priv_data;
  224. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  225. vb, vb->baddr, vb->bsize);
  226. switch (vb->state) {
  227. case VIDEOBUF_ACTIVE:
  228. dev_dbg(&icd->dev, "%s (active)\n", __func__);
  229. break;
  230. case VIDEOBUF_QUEUED:
  231. dev_dbg(&icd->dev, "%s (queued)\n", __func__);
  232. break;
  233. case VIDEOBUF_PREPARED:
  234. dev_dbg(&icd->dev, "%s (prepared)\n", __func__);
  235. break;
  236. default:
  237. dev_dbg(&icd->dev, "%s (unknown)\n", __func__);
  238. break;
  239. }
  240. #endif
  241. free_buffer(vq, buf);
  242. }
  243. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  244. struct videobuf_buffer *vb,
  245. struct mx1_buffer *buf)
  246. {
  247. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  248. list_del_init(&vb->queue);
  249. vb->state = VIDEOBUF_DONE;
  250. do_gettimeofday(&vb->ts);
  251. vb->field_count++;
  252. wake_up(&vb->done);
  253. if (list_empty(&pcdev->capture)) {
  254. pcdev->active = NULL;
  255. return;
  256. }
  257. pcdev->active = list_entry(pcdev->capture.next,
  258. struct mx1_buffer, vb.queue);
  259. /* setup sg list for future DMA */
  260. if (likely(!mx1_camera_setup_dma(pcdev))) {
  261. unsigned int temp;
  262. /* enable SOF irq */
  263. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  264. __raw_writel(temp, pcdev->base + CSICR1);
  265. }
  266. }
  267. static void mx1_camera_dma_irq(int channel, void *data)
  268. {
  269. struct mx1_camera_dev *pcdev = data;
  270. struct mx1_buffer *buf;
  271. struct videobuf_buffer *vb;
  272. unsigned long flags;
  273. spin_lock_irqsave(&pcdev->lock, flags);
  274. imx_dma_disable(channel);
  275. if (unlikely(!pcdev->active)) {
  276. dev_err(pcdev->icd->dev.parent, "DMA End IRQ with no active buffer\n");
  277. goto out;
  278. }
  279. vb = &pcdev->active->vb;
  280. buf = container_of(vb, struct mx1_buffer, vb);
  281. WARN_ON(buf->inwork || list_empty(&vb->queue));
  282. dev_dbg(pcdev->icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  283. vb, vb->baddr, vb->bsize);
  284. mx1_camera_wakeup(pcdev, vb, buf);
  285. out:
  286. spin_unlock_irqrestore(&pcdev->lock, flags);
  287. }
  288. static struct videobuf_queue_ops mx1_videobuf_ops = {
  289. .buf_setup = mx1_videobuf_setup,
  290. .buf_prepare = mx1_videobuf_prepare,
  291. .buf_queue = mx1_videobuf_queue,
  292. .buf_release = mx1_videobuf_release,
  293. };
  294. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  295. struct soc_camera_device *icd)
  296. {
  297. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  298. struct mx1_camera_dev *pcdev = ici->priv;
  299. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
  300. &pcdev->lock,
  301. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  302. V4L2_FIELD_NONE,
  303. sizeof(struct mx1_buffer), icd);
  304. }
  305. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  306. {
  307. unsigned int mclk = pcdev->mclk;
  308. unsigned long div;
  309. unsigned long lcdclk;
  310. lcdclk = clk_get_rate(pcdev->clk);
  311. /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  312. * they get a nice Oops */
  313. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  314. dev_dbg(pcdev->icd->dev.parent, "System clock %lukHz, target freq %dkHz, "
  315. "divisor %lu\n", lcdclk / 1000, mclk / 1000, div);
  316. return div;
  317. }
  318. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  319. {
  320. unsigned int csicr1 = CSICR1_EN;
  321. dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
  322. clk_enable(pcdev->clk);
  323. /* enable CSI before doing anything else */
  324. __raw_writel(csicr1, pcdev->base + CSICR1);
  325. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  326. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  327. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  328. __raw_writel(csicr1, pcdev->base + CSICR1);
  329. }
  330. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  331. {
  332. dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
  333. /* Disable all CSI interface */
  334. __raw_writel(0x00, pcdev->base + CSICR1);
  335. clk_disable(pcdev->clk);
  336. }
  337. /* The following two functions absolutely depend on the fact, that
  338. * there can be only one camera on i.MX1/i.MXL camera sensor interface */
  339. static int mx1_camera_add_device(struct soc_camera_device *icd)
  340. {
  341. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  342. struct mx1_camera_dev *pcdev = ici->priv;
  343. int ret;
  344. if (pcdev->icd) {
  345. ret = -EBUSY;
  346. goto ebusy;
  347. }
  348. dev_info(&icd->dev, "MX1 Camera driver attached to camera %d\n",
  349. icd->devnum);
  350. mx1_camera_activate(pcdev);
  351. pcdev->icd = icd;
  352. ebusy:
  353. return ret;
  354. }
  355. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  356. {
  357. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  358. struct mx1_camera_dev *pcdev = ici->priv;
  359. unsigned int csicr1;
  360. BUG_ON(icd != pcdev->icd);
  361. /* disable interrupts */
  362. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  363. __raw_writel(csicr1, pcdev->base + CSICR1);
  364. /* Stop DMA engine */
  365. imx_dma_disable(pcdev->dma_chan);
  366. dev_info(&icd->dev, "MX1 Camera driver detached from camera %d\n",
  367. icd->devnum);
  368. mx1_camera_deactivate(pcdev);
  369. pcdev->icd = NULL;
  370. }
  371. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  372. struct v4l2_crop *a)
  373. {
  374. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  375. return v4l2_subdev_call(sd, video, s_crop, a);
  376. }
  377. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  378. {
  379. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  380. struct mx1_camera_dev *pcdev = ici->priv;
  381. unsigned long camera_flags, common_flags;
  382. unsigned int csicr1;
  383. int ret;
  384. camera_flags = icd->ops->query_bus_param(icd);
  385. /* MX1 supports only 8bit buswidth */
  386. common_flags = soc_camera_bus_param_compatible(camera_flags,
  387. CSI_BUS_FLAGS);
  388. if (!common_flags)
  389. return -EINVAL;
  390. icd->buswidth = 8;
  391. /* Make choises, based on platform choice */
  392. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  393. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  394. if (!pcdev->pdata ||
  395. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  396. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  397. else
  398. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  399. }
  400. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  401. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  402. if (!pcdev->pdata ||
  403. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  404. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  405. else
  406. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  407. }
  408. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  409. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  410. if (!pcdev->pdata ||
  411. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  412. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  413. else
  414. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  415. }
  416. ret = icd->ops->set_bus_param(icd, common_flags);
  417. if (ret < 0)
  418. return ret;
  419. csicr1 = __raw_readl(pcdev->base + CSICR1);
  420. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  421. csicr1 |= CSICR1_REDGE;
  422. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  423. csicr1 |= CSICR1_SOF_POL;
  424. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  425. csicr1 |= CSICR1_DATA_POL;
  426. __raw_writel(csicr1, pcdev->base + CSICR1);
  427. return 0;
  428. }
  429. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  430. struct v4l2_format *f)
  431. {
  432. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  433. const struct soc_camera_format_xlate *xlate;
  434. struct v4l2_pix_format *pix = &f->fmt.pix;
  435. int ret;
  436. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  437. if (!xlate) {
  438. dev_warn(icd->dev.parent, "Format %x not found\n", pix->pixelformat);
  439. return -EINVAL;
  440. }
  441. ret = v4l2_subdev_call(sd, video, s_fmt, f);
  442. if (!ret) {
  443. icd->buswidth = xlate->buswidth;
  444. icd->current_fmt = xlate->host_fmt;
  445. }
  446. return ret;
  447. }
  448. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  449. struct v4l2_format *f)
  450. {
  451. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  452. /* TODO: limit to mx1 hardware capabilities */
  453. /* limit to sensor capabilities */
  454. return v4l2_subdev_call(sd, video, try_fmt, f);
  455. }
  456. static int mx1_camera_reqbufs(struct soc_camera_file *icf,
  457. struct v4l2_requestbuffers *p)
  458. {
  459. int i;
  460. /* This is for locking debugging only. I removed spinlocks and now I
  461. * check whether .prepare is ever called on a linked buffer, or whether
  462. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  463. * it hadn't triggered */
  464. for (i = 0; i < p->count; i++) {
  465. struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
  466. struct mx1_buffer, vb);
  467. buf->inwork = 0;
  468. INIT_LIST_HEAD(&buf->vb.queue);
  469. }
  470. return 0;
  471. }
  472. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  473. {
  474. struct soc_camera_file *icf = file->private_data;
  475. struct mx1_buffer *buf;
  476. buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
  477. vb.stream);
  478. poll_wait(file, &buf->vb.done, pt);
  479. if (buf->vb.state == VIDEOBUF_DONE ||
  480. buf->vb.state == VIDEOBUF_ERROR)
  481. return POLLIN | POLLRDNORM;
  482. return 0;
  483. }
  484. static int mx1_camera_querycap(struct soc_camera_host *ici,
  485. struct v4l2_capability *cap)
  486. {
  487. /* cap->name is set by the friendly caller:-> */
  488. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  489. cap->version = VERSION_CODE;
  490. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  491. return 0;
  492. }
  493. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  494. .owner = THIS_MODULE,
  495. .add = mx1_camera_add_device,
  496. .remove = mx1_camera_remove_device,
  497. .set_bus_param = mx1_camera_set_bus_param,
  498. .set_crop = mx1_camera_set_crop,
  499. .set_fmt = mx1_camera_set_fmt,
  500. .try_fmt = mx1_camera_try_fmt,
  501. .init_videobuf = mx1_camera_init_videobuf,
  502. .reqbufs = mx1_camera_reqbufs,
  503. .poll = mx1_camera_poll,
  504. .querycap = mx1_camera_querycap,
  505. };
  506. static struct fiq_handler fh = {
  507. .name = "csi_sof"
  508. };
  509. static int __init mx1_camera_probe(struct platform_device *pdev)
  510. {
  511. struct mx1_camera_dev *pcdev;
  512. struct resource *res;
  513. struct pt_regs regs;
  514. struct clk *clk;
  515. void __iomem *base;
  516. unsigned int irq;
  517. int err = 0;
  518. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  519. irq = platform_get_irq(pdev, 0);
  520. if (!res || !irq) {
  521. err = -ENODEV;
  522. goto exit;
  523. }
  524. clk = clk_get(&pdev->dev, "csi_clk");
  525. if (IS_ERR(clk)) {
  526. err = PTR_ERR(clk);
  527. goto exit;
  528. }
  529. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  530. if (!pcdev) {
  531. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  532. err = -ENOMEM;
  533. goto exit_put_clk;
  534. }
  535. pcdev->res = res;
  536. pcdev->clk = clk;
  537. pcdev->pdata = pdev->dev.platform_data;
  538. if (pcdev->pdata)
  539. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  540. if (!pcdev->mclk) {
  541. dev_warn(&pdev->dev,
  542. "mclk_10khz == 0! Please, fix your platform data. "
  543. "Using default 20MHz\n");
  544. pcdev->mclk = 20000000;
  545. }
  546. INIT_LIST_HEAD(&pcdev->capture);
  547. spin_lock_init(&pcdev->lock);
  548. /*
  549. * Request the regions.
  550. */
  551. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  552. err = -EBUSY;
  553. goto exit_kfree;
  554. }
  555. base = ioremap(res->start, resource_size(res));
  556. if (!base) {
  557. err = -ENOMEM;
  558. goto exit_release;
  559. }
  560. pcdev->irq = irq;
  561. pcdev->base = base;
  562. /* request dma */
  563. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  564. if (pcdev->dma_chan < 0) {
  565. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  566. err = -EBUSY;
  567. goto exit_iounmap;
  568. }
  569. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  570. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  571. pcdev);
  572. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  573. IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
  574. /* burst length : 16 words = 64 bytes */
  575. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  576. /* request irq */
  577. err = claim_fiq(&fh);
  578. if (err) {
  579. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  580. goto exit_free_dma;
  581. }
  582. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  583. &mx1_camera_sof_fiq_start);
  584. regs.ARM_r8 = DMA_BASE + DMA_DIMR;
  585. regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
  586. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  587. regs.ARM_fp = (long)pcdev->base + CSISR;
  588. regs.ARM_sp = 1 << pcdev->dma_chan;
  589. set_fiq_regs(&regs);
  590. mxc_set_irq_fiq(irq, 1);
  591. enable_fiq(irq);
  592. pcdev->soc_host.drv_name = DRIVER_NAME;
  593. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  594. pcdev->soc_host.priv = pcdev;
  595. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  596. pcdev->soc_host.nr = pdev->id;
  597. err = soc_camera_host_register(&pcdev->soc_host);
  598. if (err)
  599. goto exit_free_irq;
  600. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  601. return 0;
  602. exit_free_irq:
  603. disable_fiq(irq);
  604. mxc_set_irq_fiq(irq, 0);
  605. release_fiq(&fh);
  606. exit_free_dma:
  607. imx_dma_free(pcdev->dma_chan);
  608. exit_iounmap:
  609. iounmap(base);
  610. exit_release:
  611. release_mem_region(res->start, resource_size(res));
  612. exit_kfree:
  613. kfree(pcdev);
  614. exit_put_clk:
  615. clk_put(clk);
  616. exit:
  617. return err;
  618. }
  619. static int __exit mx1_camera_remove(struct platform_device *pdev)
  620. {
  621. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  622. struct mx1_camera_dev *pcdev = container_of(soc_host,
  623. struct mx1_camera_dev, soc_host);
  624. struct resource *res;
  625. imx_dma_free(pcdev->dma_chan);
  626. disable_fiq(pcdev->irq);
  627. mxc_set_irq_fiq(pcdev->irq, 0);
  628. release_fiq(&fh);
  629. clk_put(pcdev->clk);
  630. soc_camera_host_unregister(soc_host);
  631. iounmap(pcdev->base);
  632. res = pcdev->res;
  633. release_mem_region(res->start, resource_size(res));
  634. kfree(pcdev);
  635. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  636. return 0;
  637. }
  638. static struct platform_driver mx1_camera_driver = {
  639. .driver = {
  640. .name = DRIVER_NAME,
  641. },
  642. .remove = __exit_p(mx1_camera_remove),
  643. };
  644. static int __init mx1_camera_init(void)
  645. {
  646. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  647. }
  648. static void __exit mx1_camera_exit(void)
  649. {
  650. return platform_driver_unregister(&mx1_camera_driver);
  651. }
  652. module_init(mx1_camera_init);
  653. module_exit(mx1_camera_exit);
  654. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  655. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  656. MODULE_LICENSE("GPL v2");
  657. MODULE_ALIAS("platform:" DRIVER_NAME);