idma.c 9.9 KB

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  1. /*
  2. * sound/soc/samsung/idma.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * I2S0's Internal DMA driver
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/slab.h>
  18. #include <linux/module.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include "i2s.h"
  23. #include "idma.h"
  24. #include "dma.h"
  25. #include "i2s-regs.h"
  26. #define ST_RUNNING (1<<0)
  27. #define ST_OPENED (1<<1)
  28. static const struct snd_pcm_hardware idma_hardware = {
  29. .info = SNDRV_PCM_INFO_INTERLEAVED |
  30. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  31. SNDRV_PCM_INFO_MMAP |
  32. SNDRV_PCM_INFO_MMAP_VALID |
  33. SNDRV_PCM_INFO_PAUSE |
  34. SNDRV_PCM_INFO_RESUME,
  35. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  36. SNDRV_PCM_FMTBIT_U16_LE |
  37. SNDRV_PCM_FMTBIT_S24_LE |
  38. SNDRV_PCM_FMTBIT_U24_LE |
  39. SNDRV_PCM_FMTBIT_U8 |
  40. SNDRV_PCM_FMTBIT_S8,
  41. .channels_min = 2,
  42. .channels_max = 2,
  43. .buffer_bytes_max = MAX_IDMA_BUFFER,
  44. .period_bytes_min = 128,
  45. .period_bytes_max = MAX_IDMA_PERIOD,
  46. .periods_min = 1,
  47. .periods_max = 2,
  48. };
  49. struct idma_ctrl {
  50. spinlock_t lock;
  51. int state;
  52. dma_addr_t start;
  53. dma_addr_t pos;
  54. dma_addr_t end;
  55. dma_addr_t period;
  56. dma_addr_t periodsz;
  57. void *token;
  58. void (*cb)(void *dt, int bytes_xfer);
  59. };
  60. static struct idma_info {
  61. spinlock_t lock;
  62. void __iomem *regs;
  63. dma_addr_t lp_tx_addr;
  64. } idma;
  65. static int idma_irq;
  66. static void idma_getpos(dma_addr_t *src)
  67. {
  68. *src = idma.lp_tx_addr +
  69. (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
  70. }
  71. static int idma_enqueue(struct snd_pcm_substream *substream)
  72. {
  73. struct snd_pcm_runtime *runtime = substream->runtime;
  74. struct idma_ctrl *prtd = substream->runtime->private_data;
  75. u32 val;
  76. spin_lock(&prtd->lock);
  77. prtd->token = (void *) substream;
  78. spin_unlock(&prtd->lock);
  79. /* Internal DMA Level0 Interrupt Address */
  80. val = idma.lp_tx_addr + prtd->periodsz;
  81. writel(val, idma.regs + I2SLVL0ADDR);
  82. /* Start address0 of I2S internal DMA operation. */
  83. val = idma.lp_tx_addr;
  84. writel(val, idma.regs + I2SSTR0);
  85. /*
  86. * Transfer block size for I2S internal DMA.
  87. * Should decide transfer size before start dma operation
  88. */
  89. val = readl(idma.regs + I2SSIZE);
  90. val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
  91. val |= (((runtime->dma_bytes >> 2) &
  92. I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
  93. writel(val, idma.regs + I2SSIZE);
  94. val = readl(idma.regs + I2SAHB);
  95. val |= AHB_INTENLVL0;
  96. writel(val, idma.regs + I2SAHB);
  97. return 0;
  98. }
  99. static void idma_setcallbk(struct snd_pcm_substream *substream,
  100. void (*cb)(void *, int))
  101. {
  102. struct idma_ctrl *prtd = substream->runtime->private_data;
  103. spin_lock(&prtd->lock);
  104. prtd->cb = cb;
  105. spin_unlock(&prtd->lock);
  106. }
  107. static void idma_control(int op)
  108. {
  109. u32 val = readl(idma.regs + I2SAHB);
  110. spin_lock(&idma.lock);
  111. switch (op) {
  112. case LPAM_DMA_START:
  113. val |= (AHB_INTENLVL0 | AHB_DMAEN);
  114. break;
  115. case LPAM_DMA_STOP:
  116. val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
  117. break;
  118. default:
  119. spin_unlock(&idma.lock);
  120. return;
  121. }
  122. writel(val, idma.regs + I2SAHB);
  123. spin_unlock(&idma.lock);
  124. }
  125. static void idma_done(void *id, int bytes_xfer)
  126. {
  127. struct snd_pcm_substream *substream = id;
  128. struct idma_ctrl *prtd = substream->runtime->private_data;
  129. if (prtd && (prtd->state & ST_RUNNING))
  130. snd_pcm_period_elapsed(substream);
  131. }
  132. static int idma_hw_params(struct snd_pcm_substream *substream,
  133. struct snd_pcm_hw_params *params)
  134. {
  135. struct snd_pcm_runtime *runtime = substream->runtime;
  136. struct idma_ctrl *prtd = substream->runtime->private_data;
  137. u32 mod = readl(idma.regs + I2SMOD);
  138. u32 ahb = readl(idma.regs + I2SAHB);
  139. ahb |= (AHB_DMARLD | AHB_INTMASK);
  140. mod |= MOD_TXS_IDMA;
  141. writel(ahb, idma.regs + I2SAHB);
  142. writel(mod, idma.regs + I2SMOD);
  143. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  144. runtime->dma_bytes = params_buffer_bytes(params);
  145. prtd->start = prtd->pos = runtime->dma_addr;
  146. prtd->period = params_periods(params);
  147. prtd->periodsz = params_period_bytes(params);
  148. prtd->end = runtime->dma_addr + runtime->dma_bytes;
  149. idma_setcallbk(substream, idma_done);
  150. return 0;
  151. }
  152. static int idma_hw_free(struct snd_pcm_substream *substream)
  153. {
  154. snd_pcm_set_runtime_buffer(substream, NULL);
  155. return 0;
  156. }
  157. static int idma_prepare(struct snd_pcm_substream *substream)
  158. {
  159. struct idma_ctrl *prtd = substream->runtime->private_data;
  160. prtd->pos = prtd->start;
  161. /* flush the DMA channel */
  162. idma_control(LPAM_DMA_STOP);
  163. idma_enqueue(substream);
  164. return 0;
  165. }
  166. static int idma_trigger(struct snd_pcm_substream *substream, int cmd)
  167. {
  168. struct idma_ctrl *prtd = substream->runtime->private_data;
  169. int ret = 0;
  170. spin_lock(&prtd->lock);
  171. switch (cmd) {
  172. case SNDRV_PCM_TRIGGER_RESUME:
  173. case SNDRV_PCM_TRIGGER_START:
  174. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  175. prtd->state |= ST_RUNNING;
  176. idma_control(LPAM_DMA_START);
  177. break;
  178. case SNDRV_PCM_TRIGGER_SUSPEND:
  179. case SNDRV_PCM_TRIGGER_STOP:
  180. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  181. prtd->state &= ~ST_RUNNING;
  182. idma_control(LPAM_DMA_STOP);
  183. break;
  184. default:
  185. ret = -EINVAL;
  186. break;
  187. }
  188. spin_unlock(&prtd->lock);
  189. return ret;
  190. }
  191. static snd_pcm_uframes_t
  192. idma_pointer(struct snd_pcm_substream *substream)
  193. {
  194. struct snd_pcm_runtime *runtime = substream->runtime;
  195. struct idma_ctrl *prtd = runtime->private_data;
  196. dma_addr_t src;
  197. unsigned long res;
  198. spin_lock(&prtd->lock);
  199. idma_getpos(&src);
  200. res = src - prtd->start;
  201. spin_unlock(&prtd->lock);
  202. return bytes_to_frames(substream->runtime, res);
  203. }
  204. static int idma_mmap(struct snd_pcm_substream *substream,
  205. struct vm_area_struct *vma)
  206. {
  207. struct snd_pcm_runtime *runtime = substream->runtime;
  208. unsigned long size, offset;
  209. int ret;
  210. /* From snd_pcm_lib_mmap_iomem */
  211. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  212. size = vma->vm_end - vma->vm_start;
  213. offset = vma->vm_pgoff << PAGE_SHIFT;
  214. ret = io_remap_pfn_range(vma, vma->vm_start,
  215. (runtime->dma_addr + offset) >> PAGE_SHIFT,
  216. size, vma->vm_page_prot);
  217. return ret;
  218. }
  219. static irqreturn_t iis_irq(int irqno, void *dev_id)
  220. {
  221. struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
  222. u32 iiscon, iisahb, val, addr;
  223. iisahb = readl(idma.regs + I2SAHB);
  224. iiscon = readl(idma.regs + I2SCON);
  225. val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
  226. if (val) {
  227. iisahb |= val;
  228. writel(iisahb, idma.regs + I2SAHB);
  229. addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
  230. addr += prtd->periodsz;
  231. addr %= (prtd->end - prtd->start);
  232. addr += idma.lp_tx_addr;
  233. writel(addr, idma.regs + I2SLVL0ADDR);
  234. if (prtd->cb)
  235. prtd->cb(prtd->token, prtd->period);
  236. }
  237. return IRQ_HANDLED;
  238. }
  239. static int idma_open(struct snd_pcm_substream *substream)
  240. {
  241. struct snd_pcm_runtime *runtime = substream->runtime;
  242. struct idma_ctrl *prtd;
  243. int ret;
  244. snd_soc_set_runtime_hwparams(substream, &idma_hardware);
  245. prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
  246. if (prtd == NULL)
  247. return -ENOMEM;
  248. ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
  249. if (ret < 0) {
  250. pr_err("fail to claim i2s irq , ret = %d\n", ret);
  251. kfree(prtd);
  252. return ret;
  253. }
  254. spin_lock_init(&prtd->lock);
  255. runtime->private_data = prtd;
  256. return 0;
  257. }
  258. static int idma_close(struct snd_pcm_substream *substream)
  259. {
  260. struct snd_pcm_runtime *runtime = substream->runtime;
  261. struct idma_ctrl *prtd = runtime->private_data;
  262. free_irq(idma_irq, prtd);
  263. if (!prtd)
  264. pr_err("idma_close called with prtd == NULL\n");
  265. kfree(prtd);
  266. return 0;
  267. }
  268. static struct snd_pcm_ops idma_ops = {
  269. .open = idma_open,
  270. .close = idma_close,
  271. .ioctl = snd_pcm_lib_ioctl,
  272. .trigger = idma_trigger,
  273. .pointer = idma_pointer,
  274. .mmap = idma_mmap,
  275. .hw_params = idma_hw_params,
  276. .hw_free = idma_hw_free,
  277. .prepare = idma_prepare,
  278. };
  279. static void idma_free(struct snd_pcm *pcm)
  280. {
  281. struct snd_pcm_substream *substream;
  282. struct snd_dma_buffer *buf;
  283. substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  284. if (!substream)
  285. return;
  286. buf = &substream->dma_buffer;
  287. if (!buf->area)
  288. return;
  289. iounmap(buf->area);
  290. buf->area = NULL;
  291. buf->addr = 0;
  292. }
  293. static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
  294. {
  295. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  296. struct snd_dma_buffer *buf = &substream->dma_buffer;
  297. buf->dev.dev = pcm->card->dev;
  298. buf->private_data = NULL;
  299. /* Assign PCM buffer pointers */
  300. buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
  301. buf->addr = idma.lp_tx_addr;
  302. buf->bytes = idma_hardware.buffer_bytes_max;
  303. buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes);
  304. return 0;
  305. }
  306. static int idma_new(struct snd_soc_pcm_runtime *rtd)
  307. {
  308. struct snd_card *card = rtd->card->snd_card;
  309. struct snd_pcm *pcm = rtd->pcm;
  310. int ret;
  311. ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  312. if (ret)
  313. return ret;
  314. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  315. ret = preallocate_idma_buffer(pcm,
  316. SNDRV_PCM_STREAM_PLAYBACK);
  317. }
  318. return ret;
  319. }
  320. void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
  321. {
  322. spin_lock_init(&idma.lock);
  323. idma.regs = regs;
  324. idma.lp_tx_addr = addr;
  325. }
  326. EXPORT_SYMBOL_GPL(idma_reg_addr_init);
  327. static struct snd_soc_platform_driver asoc_idma_platform = {
  328. .ops = &idma_ops,
  329. .pcm_new = idma_new,
  330. .pcm_free = idma_free,
  331. };
  332. static int asoc_idma_platform_probe(struct platform_device *pdev)
  333. {
  334. idma_irq = platform_get_irq(pdev, 0);
  335. if (idma_irq < 0)
  336. return idma_irq;
  337. return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform);
  338. }
  339. static int asoc_idma_platform_remove(struct platform_device *pdev)
  340. {
  341. snd_soc_unregister_platform(&pdev->dev);
  342. return 0;
  343. }
  344. static struct platform_driver asoc_idma_driver = {
  345. .driver = {
  346. .name = "samsung-idma",
  347. .owner = THIS_MODULE,
  348. },
  349. .probe = asoc_idma_platform_probe,
  350. .remove = asoc_idma_platform_remove,
  351. };
  352. module_platform_driver(asoc_idma_driver);
  353. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  354. MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
  355. MODULE_LICENSE("GPL");