recv.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926
  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  18. struct ieee80211_hdr *hdr)
  19. {
  20. struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  21. int i;
  22. spin_lock_bh(&sc->wiphy_lock);
  23. for (i = 0; i < sc->num_sec_wiphy; i++) {
  24. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  25. if (aphy == NULL)
  26. continue;
  27. if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  28. == 0) {
  29. hw = aphy->hw;
  30. break;
  31. }
  32. }
  33. spin_unlock_bh(&sc->wiphy_lock);
  34. return hw;
  35. }
  36. /*
  37. * Setup and link descriptors.
  38. *
  39. * 11N: we can no longer afford to self link the last descriptor.
  40. * MAC acknowledges BA status as long as it copies frames to host
  41. * buffer (or rx fifo). This can incorrectly acknowledge packets
  42. * to a sender if last desc is self-linked.
  43. */
  44. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  45. {
  46. struct ath_hw *ah = sc->sc_ah;
  47. struct ath_common *common = ath9k_hw_common(ah);
  48. struct ath_desc *ds;
  49. struct sk_buff *skb;
  50. ATH_RXBUF_RESET(bf);
  51. ds = bf->bf_desc;
  52. ds->ds_link = 0; /* link to null */
  53. ds->ds_data = bf->bf_buf_addr;
  54. /* virtual addr of the beginning of the buffer. */
  55. skb = bf->bf_mpdu;
  56. BUG_ON(skb == NULL);
  57. ds->ds_vdata = skb->data;
  58. /*
  59. * setup rx descriptors. The rx_bufsize here tells the hardware
  60. * how much data it can DMA to us and that we are prepared
  61. * to process
  62. */
  63. ath9k_hw_setuprxdesc(ah, ds,
  64. common->rx_bufsize,
  65. 0);
  66. if (sc->rx.rxlink == NULL)
  67. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  68. else
  69. *sc->rx.rxlink = bf->bf_daddr;
  70. sc->rx.rxlink = &ds->ds_link;
  71. ath9k_hw_rxena(ah);
  72. }
  73. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  74. {
  75. /* XXX block beacon interrupts */
  76. ath9k_hw_setantenna(sc->sc_ah, antenna);
  77. sc->rx.defant = antenna;
  78. sc->rx.rxotherant = 0;
  79. }
  80. /* Assumes you've already done the endian to CPU conversion */
  81. static bool ath9k_rx_accept(struct ath_common *common,
  82. struct sk_buff *skb,
  83. struct ieee80211_rx_status *rxs,
  84. struct ath_rx_status *rx_stats,
  85. bool *decrypt_error)
  86. {
  87. struct ath_hw *ah = common->ah;
  88. struct ieee80211_hdr *hdr;
  89. __le16 fc;
  90. hdr = (struct ieee80211_hdr *) skb->data;
  91. fc = hdr->frame_control;
  92. if (!rx_stats->rs_datalen)
  93. return false;
  94. /*
  95. * rs_status follows rs_datalen so if rs_datalen is too large
  96. * we can take a hint that hardware corrupted it, so ignore
  97. * those frames.
  98. */
  99. if (rx_stats->rs_datalen > common->rx_bufsize)
  100. return false;
  101. if (rx_stats->rs_more) {
  102. /*
  103. * Frame spans multiple descriptors; this cannot happen yet
  104. * as we don't support jumbograms. If not in monitor mode,
  105. * discard the frame. Enable this if you want to see
  106. * error frames in Monitor mode.
  107. */
  108. if (ah->opmode != NL80211_IFTYPE_MONITOR)
  109. return false;
  110. } else if (rx_stats->rs_status != 0) {
  111. if (rx_stats->rs_status & ATH9K_RXERR_CRC)
  112. rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
  113. if (rx_stats->rs_status & ATH9K_RXERR_PHY)
  114. return false;
  115. if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
  116. *decrypt_error = true;
  117. } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
  118. if (ieee80211_is_ctl(fc))
  119. /*
  120. * Sometimes, we get invalid
  121. * MIC failures on valid control frames.
  122. * Remove these mic errors.
  123. */
  124. rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
  125. else
  126. rxs->flag |= RX_FLAG_MMIC_ERROR;
  127. }
  128. /*
  129. * Reject error frames with the exception of
  130. * decryption and MIC failures. For monitor mode,
  131. * we also ignore the CRC error.
  132. */
  133. if (ah->opmode == NL80211_IFTYPE_MONITOR) {
  134. if (rx_stats->rs_status &
  135. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  136. ATH9K_RXERR_CRC))
  137. return false;
  138. } else {
  139. if (rx_stats->rs_status &
  140. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  141. return false;
  142. }
  143. }
  144. }
  145. return true;
  146. }
  147. static u8 ath9k_process_rate(struct ath_common *common,
  148. struct ieee80211_hw *hw,
  149. struct ath_rx_status *rx_stats,
  150. struct ieee80211_rx_status *rxs,
  151. struct sk_buff *skb)
  152. {
  153. struct ieee80211_supported_band *sband;
  154. enum ieee80211_band band;
  155. unsigned int i = 0;
  156. band = hw->conf.channel->band;
  157. sband = hw->wiphy->bands[band];
  158. if (rx_stats->rs_rate & 0x80) {
  159. /* HT rate */
  160. rxs->flag |= RX_FLAG_HT;
  161. if (rx_stats->rs_flags & ATH9K_RX_2040)
  162. rxs->flag |= RX_FLAG_40MHZ;
  163. if (rx_stats->rs_flags & ATH9K_RX_GI)
  164. rxs->flag |= RX_FLAG_SHORT_GI;
  165. return rx_stats->rs_rate & 0x7f;
  166. }
  167. for (i = 0; i < sband->n_bitrates; i++) {
  168. if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
  169. return i;
  170. if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
  171. rxs->flag |= RX_FLAG_SHORTPRE;
  172. return i;
  173. }
  174. }
  175. /* No valid hardware bitrate found -- we should not get here */
  176. ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
  177. "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
  178. if ((common->debug_mask & ATH_DBG_XMIT))
  179. print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
  180. return 0;
  181. }
  182. /*
  183. * Theory for reporting quality:
  184. *
  185. * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
  186. * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
  187. * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
  188. *
  189. * MCS 7 is the highets MCS index usable by a 1-stream device.
  190. * MCS 15 is the highest MCS index usable by a 2-stream device.
  191. *
  192. * All ath9k devices are either 1-stream or 2-stream.
  193. *
  194. * How many bars you see is derived from the qual reporting.
  195. *
  196. * A more elaborate scheme can be used here but it requires tables
  197. * of SNR/throughput for each possible mode used. For the MCS table
  198. * you can refer to the wireless wiki:
  199. *
  200. * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
  201. *
  202. */
  203. static int ath9k_compute_qual(struct ieee80211_hw *hw,
  204. struct ath_rx_status *rx_stats)
  205. {
  206. int qual;
  207. if (conf_is_ht(&hw->conf))
  208. qual = rx_stats->rs_rssi * 100 / 45;
  209. else
  210. qual = rx_stats->rs_rssi * 100 / 35;
  211. /*
  212. * rssi can be more than 45 though, anything above that
  213. * should be considered at 100%
  214. */
  215. if (qual > 100)
  216. qual = 100;
  217. return qual;
  218. }
  219. static void ath9k_process_rssi(struct ath_common *common,
  220. struct ieee80211_hw *hw,
  221. struct sk_buff *skb,
  222. struct ath_rx_status *rx_stats)
  223. {
  224. struct ath_hw *ah = common->ah;
  225. struct ieee80211_sta *sta;
  226. struct ieee80211_hdr *hdr;
  227. struct ath_node *an;
  228. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  229. __le16 fc;
  230. hdr = (struct ieee80211_hdr *)skb->data;
  231. fc = hdr->frame_control;
  232. rcu_read_lock();
  233. /* XXX: use ieee80211_find_sta! */
  234. sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
  235. if (sta) {
  236. an = (struct ath_node *) sta->drv_priv;
  237. if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
  238. !rx_stats->rs_moreaggr)
  239. ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
  240. last_rssi = an->last_rssi;
  241. }
  242. rcu_read_unlock();
  243. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  244. rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
  245. ATH_RSSI_EP_MULTIPLIER);
  246. if (rx_stats->rs_rssi < 0)
  247. rx_stats->rs_rssi = 0;
  248. else if (rx_stats->rs_rssi > 127)
  249. rx_stats->rs_rssi = 127;
  250. /* Update Beacon RSSI, this is used by ANI. */
  251. if (ieee80211_is_beacon(fc))
  252. ah->stats.avgbrssi = rx_stats->rs_rssi;
  253. }
  254. /*
  255. * For Decrypt or Demic errors, we only mark packet status here and always push
  256. * up the frame up to let mac80211 handle the actual error case, be it no
  257. * decryption key or real decryption error. This let us keep statistics there.
  258. */
  259. static int ath9k_rx_skb_preprocess(struct ath_common *common,
  260. struct ieee80211_hw *hw,
  261. struct sk_buff *skb,
  262. struct ath_rx_status *rx_stats,
  263. struct ieee80211_rx_status *rx_status,
  264. bool *decrypt_error)
  265. {
  266. struct ath_hw *ah = common->ah;
  267. if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
  268. return -EINVAL;
  269. ath9k_process_rssi(common, hw, skb, rx_stats);
  270. rx_status->rate_idx = ath9k_process_rate(common, hw,
  271. rx_stats, rx_status, skb);
  272. rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
  273. rx_status->band = hw->conf.channel->band;
  274. rx_status->freq = hw->conf.channel->center_freq;
  275. rx_status->noise = common->ani.noise_floor;
  276. rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
  277. rx_status->antenna = rx_stats->rs_antenna;
  278. rx_status->qual = ath9k_compute_qual(hw, rx_stats);
  279. rx_status->flag |= RX_FLAG_TSFT;
  280. return 0;
  281. }
  282. static void ath9k_rx_skb_postprocess(struct ath_common *common,
  283. struct sk_buff *skb,
  284. struct ath_rx_status *rx_stats,
  285. struct ieee80211_rx_status *rxs,
  286. bool decrypt_error)
  287. {
  288. struct ath_hw *ah = common->ah;
  289. struct ieee80211_hdr *hdr;
  290. int hdrlen, padsize;
  291. u8 keyix;
  292. __le16 fc;
  293. /* see if any padding is done by the hw and remove it */
  294. hdr = (struct ieee80211_hdr *) skb->data;
  295. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  296. fc = hdr->frame_control;
  297. /* The MAC header is padded to have 32-bit boundary if the
  298. * packet payload is non-zero. The general calculation for
  299. * padsize would take into account odd header lengths:
  300. * padsize = (4 - hdrlen % 4) % 4; However, since only
  301. * even-length headers are used, padding can only be 0 or 2
  302. * bytes and we can optimize this a bit. In addition, we must
  303. * not try to remove padding from short control frames that do
  304. * not have payload. */
  305. padsize = hdrlen & 3;
  306. if (padsize && hdrlen >= 24) {
  307. memmove(skb->data + padsize, skb->data, hdrlen);
  308. skb_pull(skb, padsize);
  309. }
  310. keyix = rx_stats->rs_keyix;
  311. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
  312. rxs->flag |= RX_FLAG_DECRYPTED;
  313. } else if (ieee80211_has_protected(fc)
  314. && !decrypt_error && skb->len >= hdrlen + 4) {
  315. keyix = skb->data[hdrlen + 3] >> 6;
  316. if (test_bit(keyix, common->keymap))
  317. rxs->flag |= RX_FLAG_DECRYPTED;
  318. }
  319. if (ah->sw_mgmt_crypto &&
  320. (rxs->flag & RX_FLAG_DECRYPTED) &&
  321. ieee80211_is_mgmt(fc))
  322. /* Use software decrypt for management frames. */
  323. rxs->flag &= ~RX_FLAG_DECRYPTED;
  324. }
  325. static void ath_opmode_init(struct ath_softc *sc)
  326. {
  327. struct ath_hw *ah = sc->sc_ah;
  328. struct ath_common *common = ath9k_hw_common(ah);
  329. u32 rfilt, mfilt[2];
  330. /* configure rx filter */
  331. rfilt = ath_calcrxfilter(sc);
  332. ath9k_hw_setrxfilter(ah, rfilt);
  333. /* configure bssid mask */
  334. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  335. ath_hw_setbssidmask(common);
  336. /* configure operational mode */
  337. ath9k_hw_setopmode(ah);
  338. /* Handle any link-level address change. */
  339. ath9k_hw_setmac(ah, common->macaddr);
  340. /* calculate and install multicast filter */
  341. mfilt[0] = mfilt[1] = ~0;
  342. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  343. }
  344. int ath_rx_init(struct ath_softc *sc, int nbufs)
  345. {
  346. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  347. struct sk_buff *skb;
  348. struct ath_buf *bf;
  349. int error = 0;
  350. spin_lock_init(&sc->rx.rxflushlock);
  351. sc->sc_flags &= ~SC_OP_RXFLUSH;
  352. spin_lock_init(&sc->rx.rxbuflock);
  353. common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
  354. min(common->cachelsz, (u16)64));
  355. ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  356. common->cachelsz, common->rx_bufsize);
  357. /* Initialize rx descriptors */
  358. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  359. "rx", nbufs, 1);
  360. if (error != 0) {
  361. ath_print(common, ATH_DBG_FATAL,
  362. "failed to allocate rx descriptors: %d\n", error);
  363. goto err;
  364. }
  365. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  366. skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
  367. if (skb == NULL) {
  368. error = -ENOMEM;
  369. goto err;
  370. }
  371. bf->bf_mpdu = skb;
  372. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  373. common->rx_bufsize,
  374. DMA_FROM_DEVICE);
  375. if (unlikely(dma_mapping_error(sc->dev,
  376. bf->bf_buf_addr))) {
  377. dev_kfree_skb_any(skb);
  378. bf->bf_mpdu = NULL;
  379. ath_print(common, ATH_DBG_FATAL,
  380. "dma_mapping_error() on RX init\n");
  381. error = -ENOMEM;
  382. goto err;
  383. }
  384. bf->bf_dmacontext = bf->bf_buf_addr;
  385. }
  386. sc->rx.rxlink = NULL;
  387. err:
  388. if (error)
  389. ath_rx_cleanup(sc);
  390. return error;
  391. }
  392. void ath_rx_cleanup(struct ath_softc *sc)
  393. {
  394. struct ath_hw *ah = sc->sc_ah;
  395. struct ath_common *common = ath9k_hw_common(ah);
  396. struct sk_buff *skb;
  397. struct ath_buf *bf;
  398. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  399. skb = bf->bf_mpdu;
  400. if (skb) {
  401. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  402. common->rx_bufsize, DMA_FROM_DEVICE);
  403. dev_kfree_skb(skb);
  404. }
  405. }
  406. if (sc->rx.rxdma.dd_desc_len != 0)
  407. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  408. }
  409. /*
  410. * Calculate the receive filter according to the
  411. * operating mode and state:
  412. *
  413. * o always accept unicast, broadcast, and multicast traffic
  414. * o maintain current state of phy error reception (the hal
  415. * may enable phy error frames for noise immunity work)
  416. * o probe request frames are accepted only when operating in
  417. * hostap, adhoc, or monitor modes
  418. * o enable promiscuous mode according to the interface state
  419. * o accept beacons:
  420. * - when operating in adhoc mode so the 802.11 layer creates
  421. * node table entries for peers,
  422. * - when operating in station mode for collecting rssi data when
  423. * the station is otherwise quiet, or
  424. * - when operating as a repeater so we see repeater-sta beacons
  425. * - when scanning
  426. */
  427. u32 ath_calcrxfilter(struct ath_softc *sc)
  428. {
  429. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  430. u32 rfilt;
  431. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  432. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  433. | ATH9K_RX_FILTER_MCAST;
  434. /* If not a STA, enable processing of Probe Requests */
  435. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  436. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  437. /*
  438. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  439. * mode interface or when in monitor mode. AP mode does not need this
  440. * since it receives all in-BSS frames anyway.
  441. */
  442. if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
  443. (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
  444. (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
  445. rfilt |= ATH9K_RX_FILTER_PROM;
  446. if (sc->rx.rxfilter & FIF_CONTROL)
  447. rfilt |= ATH9K_RX_FILTER_CONTROL;
  448. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  449. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  450. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  451. else
  452. rfilt |= ATH9K_RX_FILTER_BEACON;
  453. if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
  454. AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
  455. (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
  456. (sc->rx.rxfilter & FIF_PSPOLL))
  457. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  458. if (conf_is_ht(&sc->hw->conf))
  459. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  460. if (sc->sec_wiphy || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  461. /* TODO: only needed if more than one BSSID is in use in
  462. * station/adhoc mode */
  463. /* The following may also be needed for other older chips */
  464. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  465. rfilt |= ATH9K_RX_FILTER_PROM;
  466. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  467. }
  468. return rfilt;
  469. #undef RX_FILTER_PRESERVE
  470. }
  471. int ath_startrecv(struct ath_softc *sc)
  472. {
  473. struct ath_hw *ah = sc->sc_ah;
  474. struct ath_buf *bf, *tbf;
  475. spin_lock_bh(&sc->rx.rxbuflock);
  476. if (list_empty(&sc->rx.rxbuf))
  477. goto start_recv;
  478. sc->rx.rxlink = NULL;
  479. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  480. ath_rx_buf_link(sc, bf);
  481. }
  482. /* We could have deleted elements so the list may be empty now */
  483. if (list_empty(&sc->rx.rxbuf))
  484. goto start_recv;
  485. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  486. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  487. ath9k_hw_rxena(ah);
  488. start_recv:
  489. spin_unlock_bh(&sc->rx.rxbuflock);
  490. ath_opmode_init(sc);
  491. ath9k_hw_startpcureceive(ah);
  492. return 0;
  493. }
  494. bool ath_stoprecv(struct ath_softc *sc)
  495. {
  496. struct ath_hw *ah = sc->sc_ah;
  497. bool stopped;
  498. ath9k_hw_stoppcurecv(ah);
  499. ath9k_hw_setrxfilter(ah, 0);
  500. stopped = ath9k_hw_stopdmarecv(ah);
  501. sc->rx.rxlink = NULL;
  502. return stopped;
  503. }
  504. void ath_flushrecv(struct ath_softc *sc)
  505. {
  506. spin_lock_bh(&sc->rx.rxflushlock);
  507. sc->sc_flags |= SC_OP_RXFLUSH;
  508. ath_rx_tasklet(sc, 1);
  509. sc->sc_flags &= ~SC_OP_RXFLUSH;
  510. spin_unlock_bh(&sc->rx.rxflushlock);
  511. }
  512. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  513. {
  514. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  515. struct ieee80211_mgmt *mgmt;
  516. u8 *pos, *end, id, elen;
  517. struct ieee80211_tim_ie *tim;
  518. mgmt = (struct ieee80211_mgmt *)skb->data;
  519. pos = mgmt->u.beacon.variable;
  520. end = skb->data + skb->len;
  521. while (pos + 2 < end) {
  522. id = *pos++;
  523. elen = *pos++;
  524. if (pos + elen > end)
  525. break;
  526. if (id == WLAN_EID_TIM) {
  527. if (elen < sizeof(*tim))
  528. break;
  529. tim = (struct ieee80211_tim_ie *) pos;
  530. if (tim->dtim_count != 0)
  531. break;
  532. return tim->bitmap_ctrl & 0x01;
  533. }
  534. pos += elen;
  535. }
  536. return false;
  537. }
  538. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  539. {
  540. struct ieee80211_mgmt *mgmt;
  541. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  542. if (skb->len < 24 + 8 + 2 + 2)
  543. return;
  544. mgmt = (struct ieee80211_mgmt *)skb->data;
  545. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
  546. return; /* not from our current AP */
  547. sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
  548. if (sc->sc_flags & SC_OP_BEACON_SYNC) {
  549. sc->sc_flags &= ~SC_OP_BEACON_SYNC;
  550. ath_print(common, ATH_DBG_PS,
  551. "Reconfigure Beacon timers based on "
  552. "timestamp from the AP\n");
  553. ath_beacon_config(sc, NULL);
  554. }
  555. if (ath_beacon_dtim_pending_cab(skb)) {
  556. /*
  557. * Remain awake waiting for buffered broadcast/multicast
  558. * frames. If the last broadcast/multicast frame is not
  559. * received properly, the next beacon frame will work as
  560. * a backup trigger for returning into NETWORK SLEEP state,
  561. * so we are waiting for it as well.
  562. */
  563. ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
  564. "buffered broadcast/multicast frame(s)\n");
  565. sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
  566. return;
  567. }
  568. if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
  569. /*
  570. * This can happen if a broadcast frame is dropped or the AP
  571. * fails to send a frame indicating that all CAB frames have
  572. * been delivered.
  573. */
  574. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  575. ath_print(common, ATH_DBG_PS,
  576. "PS wait for CAB frames timed out\n");
  577. }
  578. }
  579. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  580. {
  581. struct ieee80211_hdr *hdr;
  582. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  583. hdr = (struct ieee80211_hdr *)skb->data;
  584. /* Process Beacon and CAB receive in PS state */
  585. if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
  586. ieee80211_is_beacon(hdr->frame_control))
  587. ath_rx_ps_beacon(sc, skb);
  588. else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
  589. (ieee80211_is_data(hdr->frame_control) ||
  590. ieee80211_is_action(hdr->frame_control)) &&
  591. is_multicast_ether_addr(hdr->addr1) &&
  592. !ieee80211_has_moredata(hdr->frame_control)) {
  593. /*
  594. * No more broadcast/multicast frames to be received at this
  595. * point.
  596. */
  597. sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
  598. ath_print(common, ATH_DBG_PS,
  599. "All PS CAB frames received, back to sleep\n");
  600. } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
  601. !is_multicast_ether_addr(hdr->addr1) &&
  602. !ieee80211_has_morefrags(hdr->frame_control)) {
  603. sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
  604. ath_print(common, ATH_DBG_PS,
  605. "Going back to sleep after having received "
  606. "PS-Poll data (0x%x)\n",
  607. sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  608. SC_OP_WAIT_FOR_CAB |
  609. SC_OP_WAIT_FOR_PSPOLL_DATA |
  610. SC_OP_WAIT_FOR_TX_ACK));
  611. }
  612. }
  613. static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
  614. struct ath_softc *sc, struct sk_buff *skb,
  615. struct ieee80211_rx_status *rxs)
  616. {
  617. struct ieee80211_hdr *hdr;
  618. hdr = (struct ieee80211_hdr *)skb->data;
  619. /* Send the frame to mac80211 */
  620. if (is_multicast_ether_addr(hdr->addr1)) {
  621. int i;
  622. /*
  623. * Deliver broadcast/multicast frames to all suitable
  624. * virtual wiphys.
  625. */
  626. /* TODO: filter based on channel configuration */
  627. for (i = 0; i < sc->num_sec_wiphy; i++) {
  628. struct ath_wiphy *aphy = sc->sec_wiphy[i];
  629. struct sk_buff *nskb;
  630. if (aphy == NULL)
  631. continue;
  632. nskb = skb_copy(skb, GFP_ATOMIC);
  633. if (!nskb)
  634. continue;
  635. ieee80211_rx(aphy->hw, nskb);
  636. }
  637. ieee80211_rx(sc->hw, skb);
  638. } else
  639. /* Deliver unicast frames based on receiver address */
  640. ieee80211_rx(hw, skb);
  641. }
  642. int ath_rx_tasklet(struct ath_softc *sc, int flush)
  643. {
  644. #define PA2DESC(_sc, _pa) \
  645. ((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
  646. ((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
  647. struct ath_buf *bf;
  648. struct ath_desc *ds;
  649. struct ath_rx_status *rx_stats;
  650. struct sk_buff *skb = NULL, *requeue_skb;
  651. struct ieee80211_rx_status *rxs;
  652. struct ath_hw *ah = sc->sc_ah;
  653. struct ath_common *common = ath9k_hw_common(ah);
  654. /*
  655. * The hw can techncically differ from common->hw when using ath9k
  656. * virtual wiphy so to account for that we iterate over the active
  657. * wiphys and find the appropriate wiphy and therefore hw.
  658. */
  659. struct ieee80211_hw *hw = NULL;
  660. struct ieee80211_hdr *hdr;
  661. int retval;
  662. bool decrypt_error = false;
  663. spin_lock_bh(&sc->rx.rxbuflock);
  664. do {
  665. /* If handling rx interrupt and flush is in progress => exit */
  666. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  667. break;
  668. if (list_empty(&sc->rx.rxbuf)) {
  669. sc->rx.rxlink = NULL;
  670. break;
  671. }
  672. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  673. ds = bf->bf_desc;
  674. /*
  675. * Must provide the virtual address of the current
  676. * descriptor, the physical address, and the virtual
  677. * address of the next descriptor in the h/w chain.
  678. * This allows the HAL to look ahead to see if the
  679. * hardware is done with a descriptor by checking the
  680. * done bit in the following descriptor and the address
  681. * of the current descriptor the DMA engine is working
  682. * on. All this is necessary because of our use of
  683. * a self-linked list to avoid rx overruns.
  684. */
  685. retval = ath9k_hw_rxprocdesc(ah, ds,
  686. bf->bf_daddr,
  687. PA2DESC(sc, ds->ds_link),
  688. 0);
  689. if (retval == -EINPROGRESS) {
  690. struct ath_buf *tbf;
  691. struct ath_desc *tds;
  692. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  693. sc->rx.rxlink = NULL;
  694. break;
  695. }
  696. tbf = list_entry(bf->list.next, struct ath_buf, list);
  697. /*
  698. * On some hardware the descriptor status words could
  699. * get corrupted, including the done bit. Because of
  700. * this, check if the next descriptor's done bit is
  701. * set or not.
  702. *
  703. * If the next descriptor's done bit is set, the current
  704. * descriptor has been corrupted. Force s/w to discard
  705. * this descriptor and continue...
  706. */
  707. tds = tbf->bf_desc;
  708. retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
  709. PA2DESC(sc, tds->ds_link), 0);
  710. if (retval == -EINPROGRESS) {
  711. break;
  712. }
  713. }
  714. skb = bf->bf_mpdu;
  715. if (!skb)
  716. continue;
  717. /*
  718. * Synchronize the DMA transfer with CPU before
  719. * 1. accessing the frame
  720. * 2. requeueing the same buffer to h/w
  721. */
  722. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  723. common->rx_bufsize,
  724. DMA_FROM_DEVICE);
  725. hdr = (struct ieee80211_hdr *) skb->data;
  726. rxs = IEEE80211_SKB_RXCB(skb);
  727. hw = ath_get_virt_hw(sc, hdr);
  728. rx_stats = &ds->ds_rxstat;
  729. /*
  730. * If we're asked to flush receive queue, directly
  731. * chain it back at the queue without processing it.
  732. */
  733. if (flush)
  734. goto requeue;
  735. retval = ath9k_rx_skb_preprocess(common, hw, skb, rx_stats,
  736. rxs, &decrypt_error);
  737. if (retval)
  738. goto requeue;
  739. /* Ensure we always have an skb to requeue once we are done
  740. * processing the current buffer's skb */
  741. requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
  742. /* If there is no memory we ignore the current RX'd frame,
  743. * tell hardware it can give us a new frame using the old
  744. * skb and put it at the tail of the sc->rx.rxbuf list for
  745. * processing. */
  746. if (!requeue_skb)
  747. goto requeue;
  748. /* Unmap the frame */
  749. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  750. common->rx_bufsize,
  751. DMA_FROM_DEVICE);
  752. skb_put(skb, rx_stats->rs_datalen);
  753. ath9k_rx_skb_postprocess(common, skb, rx_stats,
  754. rxs, decrypt_error);
  755. /* We will now give hardware our shiny new allocated skb */
  756. bf->bf_mpdu = requeue_skb;
  757. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  758. common->rx_bufsize,
  759. DMA_FROM_DEVICE);
  760. if (unlikely(dma_mapping_error(sc->dev,
  761. bf->bf_buf_addr))) {
  762. dev_kfree_skb_any(requeue_skb);
  763. bf->bf_mpdu = NULL;
  764. ath_print(common, ATH_DBG_FATAL,
  765. "dma_mapping_error() on RX\n");
  766. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  767. break;
  768. }
  769. bf->bf_dmacontext = bf->bf_buf_addr;
  770. /*
  771. * change the default rx antenna if rx diversity chooses the
  772. * other antenna 3 times in a row.
  773. */
  774. if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
  775. if (++sc->rx.rxotherant >= 3)
  776. ath_setdefantenna(sc, rx_stats->rs_antenna);
  777. } else {
  778. sc->rx.rxotherant = 0;
  779. }
  780. if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
  781. SC_OP_WAIT_FOR_CAB |
  782. SC_OP_WAIT_FOR_PSPOLL_DATA)))
  783. ath_rx_ps(sc, skb);
  784. ath_rx_send_to_mac80211(hw, sc, skb, rxs);
  785. requeue:
  786. list_move_tail(&bf->list, &sc->rx.rxbuf);
  787. ath_rx_buf_link(sc, bf);
  788. } while (1);
  789. spin_unlock_bh(&sc->rx.rxbuflock);
  790. return 0;
  791. #undef PA2DESC
  792. }