mthca_mr.c 24 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. #include "mthca_memfree.h"
  40. struct mthca_mtt {
  41. struct mthca_buddy *buddy;
  42. int order;
  43. u32 first_seg;
  44. };
  45. /*
  46. * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  47. */
  48. struct mthca_mpt_entry {
  49. __be32 flags;
  50. __be32 page_size;
  51. __be32 key;
  52. __be32 pd;
  53. __be64 start;
  54. __be64 length;
  55. __be32 lkey;
  56. __be32 window_count;
  57. __be32 window_count_limit;
  58. __be64 mtt_seg;
  59. __be32 mtt_sz; /* Arbel only */
  60. u32 reserved[2];
  61. } __attribute__((packed));
  62. #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
  63. #define MTHCA_MPT_FLAG_MIO (1 << 17)
  64. #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
  65. #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
  66. #define MTHCA_MPT_FLAG_REGION (1 << 8)
  67. #define MTHCA_MTT_FLAG_PRESENT 1
  68. #define MTHCA_MPT_STATUS_SW 0xF0
  69. #define MTHCA_MPT_STATUS_HW 0x00
  70. #define SINAI_FMR_KEY_INC 0x1000000
  71. /*
  72. * Buddy allocator for MTT segments (currently not very efficient
  73. * since it doesn't keep a free list and just searches linearly
  74. * through the bitmaps)
  75. */
  76. static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
  77. {
  78. int o;
  79. int m;
  80. u32 seg;
  81. spin_lock(&buddy->lock);
  82. for (o = order; o <= buddy->max_order; ++o) {
  83. m = 1 << (buddy->max_order - o);
  84. seg = find_first_bit(buddy->bits[o], m);
  85. if (seg < m)
  86. goto found;
  87. }
  88. spin_unlock(&buddy->lock);
  89. return -1;
  90. found:
  91. clear_bit(seg, buddy->bits[o]);
  92. while (o > order) {
  93. --o;
  94. seg <<= 1;
  95. set_bit(seg ^ 1, buddy->bits[o]);
  96. }
  97. spin_unlock(&buddy->lock);
  98. seg <<= order;
  99. return seg;
  100. }
  101. static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
  102. {
  103. seg >>= order;
  104. spin_lock(&buddy->lock);
  105. while (test_bit(seg ^ 1, buddy->bits[order])) {
  106. clear_bit(seg ^ 1, buddy->bits[order]);
  107. seg >>= 1;
  108. ++order;
  109. }
  110. set_bit(seg, buddy->bits[order]);
  111. spin_unlock(&buddy->lock);
  112. }
  113. static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
  114. {
  115. int i, s;
  116. buddy->max_order = max_order;
  117. spin_lock_init(&buddy->lock);
  118. buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
  119. GFP_KERNEL);
  120. if (!buddy->bits)
  121. goto err_out;
  122. for (i = 0; i <= buddy->max_order; ++i) {
  123. s = BITS_TO_LONGS(1 << (buddy->max_order - i));
  124. buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
  125. if (!buddy->bits[i])
  126. goto err_out_free;
  127. bitmap_zero(buddy->bits[i],
  128. 1 << (buddy->max_order - i));
  129. }
  130. set_bit(0, buddy->bits[buddy->max_order]);
  131. return 0;
  132. err_out_free:
  133. for (i = 0; i <= buddy->max_order; ++i)
  134. kfree(buddy->bits[i]);
  135. kfree(buddy->bits);
  136. err_out:
  137. return -ENOMEM;
  138. }
  139. static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
  140. {
  141. int i;
  142. for (i = 0; i <= buddy->max_order; ++i)
  143. kfree(buddy->bits[i]);
  144. kfree(buddy->bits);
  145. }
  146. static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
  147. struct mthca_buddy *buddy)
  148. {
  149. u32 seg = mthca_buddy_alloc(buddy, order);
  150. if (seg == -1)
  151. return -1;
  152. if (mthca_is_memfree(dev))
  153. if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
  154. seg + (1 << order) - 1)) {
  155. mthca_buddy_free(buddy, seg, order);
  156. seg = -1;
  157. }
  158. return seg;
  159. }
  160. static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
  161. struct mthca_buddy *buddy)
  162. {
  163. struct mthca_mtt *mtt;
  164. int i;
  165. if (size <= 0)
  166. return ERR_PTR(-EINVAL);
  167. mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
  168. if (!mtt)
  169. return ERR_PTR(-ENOMEM);
  170. mtt->buddy = buddy;
  171. mtt->order = 0;
  172. for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
  173. ++mtt->order;
  174. mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
  175. if (mtt->first_seg == -1) {
  176. kfree(mtt);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. return mtt;
  180. }
  181. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
  182. {
  183. return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
  184. }
  185. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
  186. {
  187. if (!mtt)
  188. return;
  189. mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
  190. mthca_table_put_range(dev, dev->mr_table.mtt_table,
  191. mtt->first_seg,
  192. mtt->first_seg + (1 << mtt->order) - 1);
  193. kfree(mtt);
  194. }
  195. static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  196. int start_index, u64 *buffer_list, int list_len)
  197. {
  198. struct mthca_mailbox *mailbox;
  199. __be64 *mtt_entry;
  200. int err = 0;
  201. u8 status;
  202. int i;
  203. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  204. if (IS_ERR(mailbox))
  205. return PTR_ERR(mailbox);
  206. mtt_entry = mailbox->buf;
  207. while (list_len > 0) {
  208. mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
  209. mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  210. start_index * 8);
  211. mtt_entry[1] = 0;
  212. for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
  213. mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
  214. MTHCA_MTT_FLAG_PRESENT);
  215. /*
  216. * If we have an odd number of entries to write, add
  217. * one more dummy entry for firmware efficiency.
  218. */
  219. if (i & 1)
  220. mtt_entry[i + 2] = 0;
  221. err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
  222. if (err) {
  223. mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
  224. goto out;
  225. }
  226. if (status) {
  227. mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
  228. status);
  229. err = -EINVAL;
  230. goto out;
  231. }
  232. list_len -= i;
  233. start_index += i;
  234. buffer_list += i;
  235. }
  236. out:
  237. mthca_free_mailbox(dev, mailbox);
  238. return err;
  239. }
  240. int mthca_write_mtt_size(struct mthca_dev *dev)
  241. {
  242. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy)
  243. /*
  244. * Be friendly to WRITE_MTT command
  245. * and leave two empty slots for the
  246. * index and reserved fields of the
  247. * mailbox.
  248. */
  249. return PAGE_SIZE / sizeof (u64) - 2;
  250. /* For Arbel, all MTTs must fit in the same page. */
  251. return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
  252. }
  253. static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev,
  254. struct mthca_mtt *mtt, int start_index,
  255. u64 *buffer_list, int list_len)
  256. {
  257. u64 __iomem *mtts;
  258. int i;
  259. mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  260. start_index * sizeof (u64);
  261. for (i = 0; i < list_len; ++i)
  262. mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
  263. mtts + i);
  264. }
  265. static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev,
  266. struct mthca_mtt *mtt, int start_index,
  267. u64 *buffer_list, int list_len)
  268. {
  269. __be64 *mtts;
  270. dma_addr_t dma_handle;
  271. int i;
  272. int s = start_index * sizeof (u64);
  273. /* For Arbel, all MTTs must fit in the same page. */
  274. BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
  275. /* Require full segments */
  276. BUG_ON(s % MTHCA_MTT_SEG_SIZE);
  277. mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
  278. s / MTHCA_MTT_SEG_SIZE, &dma_handle);
  279. BUG_ON(!mtts);
  280. for (i = 0; i < list_len; ++i)
  281. mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
  282. dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE);
  283. }
  284. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  285. int start_index, u64 *buffer_list, int list_len)
  286. {
  287. int size = mthca_write_mtt_size(dev);
  288. int chunk;
  289. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy)
  290. return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
  291. while (list_len > 0) {
  292. chunk = min(size, list_len);
  293. if (mthca_is_memfree(dev))
  294. mthca_arbel_write_mtt_seg(dev, mtt, start_index,
  295. buffer_list, chunk);
  296. else
  297. mthca_tavor_write_mtt_seg(dev, mtt, start_index,
  298. buffer_list, chunk);
  299. list_len -= chunk;
  300. start_index += chunk;
  301. buffer_list += chunk;
  302. }
  303. return 0;
  304. }
  305. static inline u32 tavor_hw_index_to_key(u32 ind)
  306. {
  307. return ind;
  308. }
  309. static inline u32 tavor_key_to_hw_index(u32 key)
  310. {
  311. return key;
  312. }
  313. static inline u32 arbel_hw_index_to_key(u32 ind)
  314. {
  315. return (ind >> 24) | (ind << 8);
  316. }
  317. static inline u32 arbel_key_to_hw_index(u32 key)
  318. {
  319. return (key << 24) | (key >> 8);
  320. }
  321. static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
  322. {
  323. if (mthca_is_memfree(dev))
  324. return arbel_hw_index_to_key(ind);
  325. else
  326. return tavor_hw_index_to_key(ind);
  327. }
  328. static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
  329. {
  330. if (mthca_is_memfree(dev))
  331. return arbel_key_to_hw_index(key);
  332. else
  333. return tavor_key_to_hw_index(key);
  334. }
  335. static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
  336. {
  337. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  338. return ((key << 20) & 0x800000) | (key & 0x7fffff);
  339. else
  340. return key;
  341. }
  342. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  343. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
  344. {
  345. struct mthca_mailbox *mailbox;
  346. struct mthca_mpt_entry *mpt_entry;
  347. u32 key;
  348. int i;
  349. int err;
  350. u8 status;
  351. WARN_ON(buffer_size_shift >= 32);
  352. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  353. if (key == -1)
  354. return -ENOMEM;
  355. key = adjust_key(dev, key);
  356. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  357. if (mthca_is_memfree(dev)) {
  358. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  359. if (err)
  360. goto err_out_mpt_free;
  361. }
  362. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  363. if (IS_ERR(mailbox)) {
  364. err = PTR_ERR(mailbox);
  365. goto err_out_table;
  366. }
  367. mpt_entry = mailbox->buf;
  368. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  369. MTHCA_MPT_FLAG_MIO |
  370. MTHCA_MPT_FLAG_REGION |
  371. access);
  372. if (!mr->mtt)
  373. mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
  374. mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
  375. mpt_entry->key = cpu_to_be32(key);
  376. mpt_entry->pd = cpu_to_be32(pd);
  377. mpt_entry->start = cpu_to_be64(iova);
  378. mpt_entry->length = cpu_to_be64(total_size);
  379. memset(&mpt_entry->lkey, 0,
  380. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
  381. if (mr->mtt)
  382. mpt_entry->mtt_seg =
  383. cpu_to_be64(dev->mr_table.mtt_base +
  384. mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
  385. if (0) {
  386. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  387. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  388. if (i % 4 == 0)
  389. printk("[%02x] ", i * 4);
  390. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  391. if ((i + 1) % 4 == 0)
  392. printk("\n");
  393. }
  394. }
  395. err = mthca_SW2HW_MPT(dev, mailbox,
  396. key & (dev->limits.num_mpts - 1),
  397. &status);
  398. if (err) {
  399. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  400. goto err_out_mailbox;
  401. } else if (status) {
  402. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  403. status);
  404. err = -EINVAL;
  405. goto err_out_mailbox;
  406. }
  407. mthca_free_mailbox(dev, mailbox);
  408. return err;
  409. err_out_mailbox:
  410. mthca_free_mailbox(dev, mailbox);
  411. err_out_table:
  412. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  413. err_out_mpt_free:
  414. mthca_free(&dev->mr_table.mpt_alloc, key);
  415. return err;
  416. }
  417. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  418. u32 access, struct mthca_mr *mr)
  419. {
  420. mr->mtt = NULL;
  421. return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
  422. }
  423. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  424. u64 *buffer_list, int buffer_size_shift,
  425. int list_len, u64 iova, u64 total_size,
  426. u32 access, struct mthca_mr *mr)
  427. {
  428. int err;
  429. mr->mtt = mthca_alloc_mtt(dev, list_len);
  430. if (IS_ERR(mr->mtt))
  431. return PTR_ERR(mr->mtt);
  432. err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
  433. if (err) {
  434. mthca_free_mtt(dev, mr->mtt);
  435. return err;
  436. }
  437. err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
  438. total_size, access, mr);
  439. if (err)
  440. mthca_free_mtt(dev, mr->mtt);
  441. return err;
  442. }
  443. /* Free mr or fmr */
  444. static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
  445. {
  446. mthca_table_put(dev, dev->mr_table.mpt_table,
  447. key_to_hw_index(dev, lkey));
  448. mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
  449. }
  450. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
  451. {
  452. int err;
  453. u8 status;
  454. err = mthca_HW2SW_MPT(dev, NULL,
  455. key_to_hw_index(dev, mr->ibmr.lkey) &
  456. (dev->limits.num_mpts - 1),
  457. &status);
  458. if (err)
  459. mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
  460. else if (status)
  461. mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
  462. status);
  463. mthca_free_region(dev, mr->ibmr.lkey);
  464. mthca_free_mtt(dev, mr->mtt);
  465. }
  466. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  467. u32 access, struct mthca_fmr *mr)
  468. {
  469. struct mthca_mpt_entry *mpt_entry;
  470. struct mthca_mailbox *mailbox;
  471. u64 mtt_seg;
  472. u32 key, idx;
  473. u8 status;
  474. int list_len = mr->attr.max_pages;
  475. int err = -ENOMEM;
  476. int i;
  477. if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
  478. return -EINVAL;
  479. /* For Arbel, all MTTs must fit in the same page. */
  480. if (mthca_is_memfree(dev) &&
  481. mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
  482. return -EINVAL;
  483. mr->maps = 0;
  484. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  485. if (key == -1)
  486. return -ENOMEM;
  487. key = adjust_key(dev, key);
  488. idx = key & (dev->limits.num_mpts - 1);
  489. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  490. if (mthca_is_memfree(dev)) {
  491. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  492. if (err)
  493. goto err_out_mpt_free;
  494. mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
  495. BUG_ON(!mr->mem.arbel.mpt);
  496. } else
  497. mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
  498. sizeof *(mr->mem.tavor.mpt) * idx;
  499. mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
  500. if (IS_ERR(mr->mtt))
  501. goto err_out_table;
  502. mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
  503. if (mthca_is_memfree(dev)) {
  504. mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
  505. mr->mtt->first_seg,
  506. &mr->mem.arbel.dma_handle);
  507. BUG_ON(!mr->mem.arbel.mtts);
  508. } else
  509. mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
  510. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  511. if (IS_ERR(mailbox))
  512. goto err_out_free_mtt;
  513. mpt_entry = mailbox->buf;
  514. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  515. MTHCA_MPT_FLAG_MIO |
  516. MTHCA_MPT_FLAG_REGION |
  517. access);
  518. mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
  519. mpt_entry->key = cpu_to_be32(key);
  520. mpt_entry->pd = cpu_to_be32(pd);
  521. memset(&mpt_entry->start, 0,
  522. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
  523. mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
  524. if (0) {
  525. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  526. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  527. if (i % 4 == 0)
  528. printk("[%02x] ", i * 4);
  529. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  530. if ((i + 1) % 4 == 0)
  531. printk("\n");
  532. }
  533. }
  534. err = mthca_SW2HW_MPT(dev, mailbox,
  535. key & (dev->limits.num_mpts - 1),
  536. &status);
  537. if (err) {
  538. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  539. goto err_out_mailbox_free;
  540. }
  541. if (status) {
  542. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  543. status);
  544. err = -EINVAL;
  545. goto err_out_mailbox_free;
  546. }
  547. mthca_free_mailbox(dev, mailbox);
  548. return 0;
  549. err_out_mailbox_free:
  550. mthca_free_mailbox(dev, mailbox);
  551. err_out_free_mtt:
  552. mthca_free_mtt(dev, mr->mtt);
  553. err_out_table:
  554. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  555. err_out_mpt_free:
  556. mthca_free(&dev->mr_table.mpt_alloc, mr->ibmr.lkey);
  557. return err;
  558. }
  559. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
  560. {
  561. if (fmr->maps)
  562. return -EBUSY;
  563. mthca_free_region(dev, fmr->ibmr.lkey);
  564. mthca_free_mtt(dev, fmr->mtt);
  565. return 0;
  566. }
  567. static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
  568. int list_len, u64 iova)
  569. {
  570. int i, page_mask;
  571. if (list_len > fmr->attr.max_pages)
  572. return -EINVAL;
  573. page_mask = (1 << fmr->attr.page_shift) - 1;
  574. /* We are getting page lists, so va must be page aligned. */
  575. if (iova & page_mask)
  576. return -EINVAL;
  577. /* Trust the user not to pass misaligned data in page_list */
  578. if (0)
  579. for (i = 0; i < list_len; ++i) {
  580. if (page_list[i] & ~page_mask)
  581. return -EINVAL;
  582. }
  583. if (fmr->maps >= fmr->attr.max_maps)
  584. return -EINVAL;
  585. return 0;
  586. }
  587. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  588. int list_len, u64 iova)
  589. {
  590. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  591. struct mthca_dev *dev = to_mdev(ibfmr->device);
  592. struct mthca_mpt_entry mpt_entry;
  593. u32 key;
  594. int i, err;
  595. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  596. if (err)
  597. return err;
  598. ++fmr->maps;
  599. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  600. key += dev->limits.num_mpts;
  601. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  602. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  603. for (i = 0; i < list_len; ++i) {
  604. __be64 mtt_entry = cpu_to_be64(page_list[i] |
  605. MTHCA_MTT_FLAG_PRESENT);
  606. mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
  607. }
  608. mpt_entry.lkey = cpu_to_be32(key);
  609. mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  610. mpt_entry.start = cpu_to_be64(iova);
  611. __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
  612. memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
  613. offsetof(struct mthca_mpt_entry, window_count) -
  614. offsetof(struct mthca_mpt_entry, start));
  615. writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
  616. return 0;
  617. }
  618. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  619. int list_len, u64 iova)
  620. {
  621. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  622. struct mthca_dev *dev = to_mdev(ibfmr->device);
  623. u32 key;
  624. int i, err;
  625. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  626. if (err)
  627. return err;
  628. ++fmr->maps;
  629. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  630. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  631. key += SINAI_FMR_KEY_INC;
  632. else
  633. key += dev->limits.num_mpts;
  634. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  635. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  636. wmb();
  637. for (i = 0; i < list_len; ++i)
  638. fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
  639. MTHCA_MTT_FLAG_PRESENT);
  640. dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  641. list_len * sizeof(u64), DMA_TO_DEVICE);
  642. fmr->mem.arbel.mpt->key = cpu_to_be32(key);
  643. fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
  644. fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  645. fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
  646. wmb();
  647. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
  648. wmb();
  649. return 0;
  650. }
  651. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  652. {
  653. u32 key;
  654. if (!fmr->maps)
  655. return;
  656. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  657. key &= dev->limits.num_mpts - 1;
  658. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  659. fmr->maps = 0;
  660. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  661. }
  662. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  663. {
  664. u32 key;
  665. if (!fmr->maps)
  666. return;
  667. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  668. key &= dev->limits.num_mpts - 1;
  669. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  670. fmr->maps = 0;
  671. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  672. }
  673. int mthca_init_mr_table(struct mthca_dev *dev)
  674. {
  675. unsigned long addr;
  676. int mpts, mtts, err, i;
  677. err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
  678. dev->limits.num_mpts,
  679. ~0, dev->limits.reserved_mrws);
  680. if (err)
  681. return err;
  682. if (!mthca_is_memfree(dev) &&
  683. (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
  684. dev->limits.fmr_reserved_mtts = 0;
  685. else
  686. dev->mthca_flags |= MTHCA_FLAG_FMR;
  687. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  688. mthca_dbg(dev, "Memory key throughput optimization activated.\n");
  689. err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
  690. fls(dev->limits.num_mtt_segs - 1));
  691. if (err)
  692. goto err_mtt_buddy;
  693. dev->mr_table.tavor_fmr.mpt_base = NULL;
  694. dev->mr_table.tavor_fmr.mtt_base = NULL;
  695. if (dev->limits.fmr_reserved_mtts) {
  696. i = fls(dev->limits.fmr_reserved_mtts - 1);
  697. if (i >= 31) {
  698. mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
  699. err = -EINVAL;
  700. goto err_fmr_mpt;
  701. }
  702. mpts = mtts = 1 << i;
  703. } else {
  704. mpts = dev->limits.num_mtt_segs;
  705. mtts = dev->limits.num_mpts;
  706. }
  707. if (!mthca_is_memfree(dev) &&
  708. (dev->mthca_flags & MTHCA_FLAG_FMR)) {
  709. addr = pci_resource_start(dev->pdev, 4) +
  710. ((pci_resource_len(dev->pdev, 4) - 1) &
  711. dev->mr_table.mpt_base);
  712. dev->mr_table.tavor_fmr.mpt_base =
  713. ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
  714. if (!dev->mr_table.tavor_fmr.mpt_base) {
  715. mthca_warn(dev, "MPT ioremap for FMR failed.\n");
  716. err = -ENOMEM;
  717. goto err_fmr_mpt;
  718. }
  719. addr = pci_resource_start(dev->pdev, 4) +
  720. ((pci_resource_len(dev->pdev, 4) - 1) &
  721. dev->mr_table.mtt_base);
  722. dev->mr_table.tavor_fmr.mtt_base =
  723. ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE);
  724. if (!dev->mr_table.tavor_fmr.mtt_base) {
  725. mthca_warn(dev, "MTT ioremap for FMR failed.\n");
  726. err = -ENOMEM;
  727. goto err_fmr_mtt;
  728. }
  729. }
  730. if (dev->limits.fmr_reserved_mtts) {
  731. err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
  732. if (err)
  733. goto err_fmr_mtt_buddy;
  734. /* Prevent regular MRs from using FMR keys */
  735. err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
  736. if (err)
  737. goto err_reserve_fmr;
  738. dev->mr_table.fmr_mtt_buddy =
  739. &dev->mr_table.tavor_fmr.mtt_buddy;
  740. } else
  741. dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
  742. /* FMR table is always the first, take reserved MTTs out of there */
  743. if (dev->limits.reserved_mtts) {
  744. i = fls(dev->limits.reserved_mtts - 1);
  745. if (mthca_alloc_mtt_range(dev, i,
  746. dev->mr_table.fmr_mtt_buddy) == -1) {
  747. mthca_warn(dev, "MTT table of order %d is too small.\n",
  748. dev->mr_table.fmr_mtt_buddy->max_order);
  749. err = -ENOMEM;
  750. goto err_reserve_mtts;
  751. }
  752. }
  753. return 0;
  754. err_reserve_mtts:
  755. err_reserve_fmr:
  756. if (dev->limits.fmr_reserved_mtts)
  757. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  758. err_fmr_mtt_buddy:
  759. if (dev->mr_table.tavor_fmr.mtt_base)
  760. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  761. err_fmr_mtt:
  762. if (dev->mr_table.tavor_fmr.mpt_base)
  763. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  764. err_fmr_mpt:
  765. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  766. err_mtt_buddy:
  767. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  768. return err;
  769. }
  770. void mthca_cleanup_mr_table(struct mthca_dev *dev)
  771. {
  772. /* XXX check if any MRs are still allocated? */
  773. if (dev->limits.fmr_reserved_mtts)
  774. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  775. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  776. if (dev->mr_table.tavor_fmr.mtt_base)
  777. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  778. if (dev->mr_table.tavor_fmr.mpt_base)
  779. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  780. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  781. }