omap_hwmod.c 81 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include "common.h"
  140. #include <plat/cpu.h>
  141. #include "clockdomain.h"
  142. #include "powerdomain.h"
  143. #include <plat/clock.h>
  144. #include <plat/omap_hwmod.h>
  145. #include <plat/prcm.h>
  146. #include "cm2xxx_3xxx.h"
  147. #include "cminst44xx.h"
  148. #include "prm2xxx_3xxx.h"
  149. #include "prm44xx.h"
  150. #include "prminst44xx.h"
  151. #include "mux.h"
  152. /* Maximum microseconds to wait for OMAP module to softreset */
  153. #define MAX_MODULE_SOFTRESET_WAIT 10000
  154. /* Name of the OMAP hwmod for the MPU */
  155. #define MPU_INITIATOR_NAME "mpu"
  156. /* omap_hwmod_list contains all registered struct omap_hwmods */
  157. static LIST_HEAD(omap_hwmod_list);
  158. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  159. static struct omap_hwmod *mpu_oh;
  160. /* Private functions */
  161. /**
  162. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  163. * @oh: struct omap_hwmod *
  164. *
  165. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  166. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  167. * OCP_SYSCONFIG register or 0 upon success.
  168. */
  169. static int _update_sysc_cache(struct omap_hwmod *oh)
  170. {
  171. if (!oh->class->sysc) {
  172. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  173. return -EINVAL;
  174. }
  175. /* XXX ensure module interface clock is up */
  176. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  177. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  178. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  179. return 0;
  180. }
  181. /**
  182. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  183. * @v: OCP_SYSCONFIG value to write
  184. * @oh: struct omap_hwmod *
  185. *
  186. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  187. * one. No return value.
  188. */
  189. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. /* Module might have lost context, always update cache and register */
  197. oh->_sysc_cache = v;
  198. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  199. }
  200. /**
  201. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  202. * @oh: struct omap_hwmod *
  203. * @standbymode: MIDLEMODE field bits
  204. * @v: pointer to register contents to modify
  205. *
  206. * Update the master standby mode bits in @v to be @standbymode for
  207. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  208. * upon error or 0 upon success.
  209. */
  210. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  211. u32 *v)
  212. {
  213. u32 mstandby_mask;
  214. u8 mstandby_shift;
  215. if (!oh->class->sysc ||
  216. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  217. return -EINVAL;
  218. if (!oh->class->sysc->sysc_fields) {
  219. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  223. mstandby_mask = (0x3 << mstandby_shift);
  224. *v &= ~mstandby_mask;
  225. *v |= __ffs(standbymode) << mstandby_shift;
  226. return 0;
  227. }
  228. /**
  229. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  230. * @oh: struct omap_hwmod *
  231. * @idlemode: SIDLEMODE field bits
  232. * @v: pointer to register contents to modify
  233. *
  234. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  235. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  236. * or 0 upon success.
  237. */
  238. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  239. {
  240. u32 sidle_mask;
  241. u8 sidle_shift;
  242. if (!oh->class->sysc ||
  243. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  244. return -EINVAL;
  245. if (!oh->class->sysc->sysc_fields) {
  246. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  247. return -EINVAL;
  248. }
  249. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  250. sidle_mask = (0x3 << sidle_shift);
  251. *v &= ~sidle_mask;
  252. *v |= __ffs(idlemode) << sidle_shift;
  253. return 0;
  254. }
  255. /**
  256. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  257. * @oh: struct omap_hwmod *
  258. * @clockact: CLOCKACTIVITY field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the clockactivity mode bits in @v to be @clockact for the
  262. * @oh hwmod. Used for additional powersaving on some modules. Does
  263. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  264. * success.
  265. */
  266. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  267. {
  268. u32 clkact_mask;
  269. u8 clkact_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  278. clkact_mask = (0x3 << clkact_shift);
  279. *v &= ~clkact_mask;
  280. *v |= clockact << clkact_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  285. * @oh: struct omap_hwmod *
  286. * @v: pointer to register contents to modify
  287. *
  288. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  289. * error or 0 upon success.
  290. */
  291. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  292. {
  293. u32 softrst_mask;
  294. if (!oh->class->sysc ||
  295. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  296. return -EINVAL;
  297. if (!oh->class->sysc->sysc_fields) {
  298. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  299. return -EINVAL;
  300. }
  301. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  302. *v |= softrst_mask;
  303. return 0;
  304. }
  305. /**
  306. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  307. * @oh: struct omap_hwmod *
  308. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  309. * @v: pointer to register contents to modify
  310. *
  311. * Update the module autoidle bit in @v to be @autoidle for the @oh
  312. * hwmod. The autoidle bit controls whether the module can gate
  313. * internal clocks automatically when it isn't doing anything; the
  314. * exact function of this bit varies on a per-module basis. This
  315. * function does not write to the hardware. Returns -EINVAL upon
  316. * error or 0 upon success.
  317. */
  318. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  319. u32 *v)
  320. {
  321. u32 autoidle_mask;
  322. u8 autoidle_shift;
  323. if (!oh->class->sysc ||
  324. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  325. return -EINVAL;
  326. if (!oh->class->sysc->sysc_fields) {
  327. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  328. return -EINVAL;
  329. }
  330. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  331. autoidle_mask = (0x1 << autoidle_shift);
  332. *v &= ~autoidle_mask;
  333. *v |= autoidle << autoidle_shift;
  334. return 0;
  335. }
  336. /**
  337. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  338. * @oh: struct omap_hwmod *
  339. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  340. *
  341. * Set or clear the I/O pad wakeup flag in the mux entries for the
  342. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  343. * in memory. If the hwmod is currently idled, and the new idle
  344. * values don't match the previous ones, this function will also
  345. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  346. * currently idled, this function won't touch the hardware: the new
  347. * mux settings are written to the SCM PADCTRL registers when the
  348. * hwmod is idled. No return value.
  349. */
  350. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  351. {
  352. struct omap_device_pad *pad;
  353. bool change = false;
  354. u16 prev_idle;
  355. int j;
  356. if (!oh->mux || !oh->mux->enabled)
  357. return;
  358. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  359. pad = oh->mux->pads_dynamic[j];
  360. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  361. continue;
  362. prev_idle = pad->idle;
  363. if (set_wake)
  364. pad->idle |= OMAP_WAKEUP_EN;
  365. else
  366. pad->idle &= ~OMAP_WAKEUP_EN;
  367. if (prev_idle != pad->idle)
  368. change = true;
  369. }
  370. if (change && oh->_state == _HWMOD_STATE_IDLE)
  371. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  372. }
  373. /**
  374. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  375. * @oh: struct omap_hwmod *
  376. *
  377. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  378. * upon error or 0 upon success.
  379. */
  380. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  381. {
  382. if (!oh->class->sysc ||
  383. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  384. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  385. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  386. return -EINVAL;
  387. if (!oh->class->sysc->sysc_fields) {
  388. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  389. return -EINVAL;
  390. }
  391. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  392. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  393. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  394. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  395. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  396. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  397. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  398. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  399. return 0;
  400. }
  401. /**
  402. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  403. * @oh: struct omap_hwmod *
  404. *
  405. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  406. * upon error or 0 upon success.
  407. */
  408. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  409. {
  410. if (!oh->class->sysc ||
  411. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  412. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  413. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  414. return -EINVAL;
  415. if (!oh->class->sysc->sysc_fields) {
  416. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  417. return -EINVAL;
  418. }
  419. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  420. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  421. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  422. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  423. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  424. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  425. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  426. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  427. return 0;
  428. }
  429. /**
  430. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  431. * @oh: struct omap_hwmod *
  432. *
  433. * Prevent the hardware module @oh from entering idle while the
  434. * hardare module initiator @init_oh is active. Useful when a module
  435. * will be accessed by a particular initiator (e.g., if a module will
  436. * be accessed by the IVA, there should be a sleepdep between the IVA
  437. * initiator and the module). Only applies to modules in smart-idle
  438. * mode. If the clockdomain is marked as not needing autodeps, return
  439. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  440. * passes along clkdm_add_sleepdep() value upon success.
  441. */
  442. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  443. {
  444. if (!oh->_clk)
  445. return -EINVAL;
  446. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  447. return 0;
  448. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  449. }
  450. /**
  451. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  452. * @oh: struct omap_hwmod *
  453. *
  454. * Allow the hardware module @oh to enter idle while the hardare
  455. * module initiator @init_oh is active. Useful when a module will not
  456. * be accessed by a particular initiator (e.g., if a module will not
  457. * be accessed by the IVA, there should be no sleepdep between the IVA
  458. * initiator and the module). Only applies to modules in smart-idle
  459. * mode. If the clockdomain is marked as not needing autodeps, return
  460. * 0 without doing anything. Returns -EINVAL upon error or passes
  461. * along clkdm_del_sleepdep() value upon success.
  462. */
  463. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  464. {
  465. if (!oh->_clk)
  466. return -EINVAL;
  467. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  468. return 0;
  469. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  470. }
  471. /**
  472. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  473. * @oh: struct omap_hwmod *
  474. *
  475. * Called from _init_clocks(). Populates the @oh _clk (main
  476. * functional clock pointer) if a main_clk is present. Returns 0 on
  477. * success or -EINVAL on error.
  478. */
  479. static int _init_main_clk(struct omap_hwmod *oh)
  480. {
  481. int ret = 0;
  482. if (!oh->main_clk)
  483. return 0;
  484. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  485. if (!oh->_clk) {
  486. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  487. oh->name, oh->main_clk);
  488. return -EINVAL;
  489. }
  490. if (!oh->_clk->clkdm)
  491. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  492. oh->main_clk, oh->_clk->name);
  493. return ret;
  494. }
  495. /**
  496. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  497. * @oh: struct omap_hwmod *
  498. *
  499. * Called from _init_clocks(). Populates the @oh OCP slave interface
  500. * clock pointers. Returns 0 on success or -EINVAL on error.
  501. */
  502. static int _init_interface_clks(struct omap_hwmod *oh)
  503. {
  504. struct clk *c;
  505. int i;
  506. int ret = 0;
  507. if (oh->slaves_cnt == 0)
  508. return 0;
  509. for (i = 0; i < oh->slaves_cnt; i++) {
  510. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  511. if (!os->clk)
  512. continue;
  513. c = omap_clk_get_by_name(os->clk);
  514. if (!c) {
  515. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  516. oh->name, os->clk);
  517. ret = -EINVAL;
  518. }
  519. os->_clk = c;
  520. }
  521. return ret;
  522. }
  523. /**
  524. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  528. * clock pointers. Returns 0 on success or -EINVAL on error.
  529. */
  530. static int _init_opt_clks(struct omap_hwmod *oh)
  531. {
  532. struct omap_hwmod_opt_clk *oc;
  533. struct clk *c;
  534. int i;
  535. int ret = 0;
  536. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  537. c = omap_clk_get_by_name(oc->clk);
  538. if (!c) {
  539. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  540. oh->name, oc->clk);
  541. ret = -EINVAL;
  542. }
  543. oc->_clk = c;
  544. }
  545. return ret;
  546. }
  547. /**
  548. * _enable_clocks - enable hwmod main clock and interface clocks
  549. * @oh: struct omap_hwmod *
  550. *
  551. * Enables all clocks necessary for register reads and writes to succeed
  552. * on the hwmod @oh. Returns 0.
  553. */
  554. static int _enable_clocks(struct omap_hwmod *oh)
  555. {
  556. int i;
  557. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  558. if (oh->_clk)
  559. clk_enable(oh->_clk);
  560. if (oh->slaves_cnt > 0) {
  561. for (i = 0; i < oh->slaves_cnt; i++) {
  562. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  563. struct clk *c = os->_clk;
  564. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  565. clk_enable(c);
  566. }
  567. }
  568. /* The opt clocks are controlled by the device driver. */
  569. return 0;
  570. }
  571. /**
  572. * _disable_clocks - disable hwmod main clock and interface clocks
  573. * @oh: struct omap_hwmod *
  574. *
  575. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  576. */
  577. static int _disable_clocks(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  581. if (oh->_clk)
  582. clk_disable(oh->_clk);
  583. if (oh->slaves_cnt > 0) {
  584. for (i = 0; i < oh->slaves_cnt; i++) {
  585. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  586. struct clk *c = os->_clk;
  587. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  588. clk_disable(c);
  589. }
  590. }
  591. /* The opt clocks are controlled by the device driver. */
  592. return 0;
  593. }
  594. static void _enable_optional_clocks(struct omap_hwmod *oh)
  595. {
  596. struct omap_hwmod_opt_clk *oc;
  597. int i;
  598. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  599. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  600. if (oc->_clk) {
  601. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  602. oc->_clk->name);
  603. clk_enable(oc->_clk);
  604. }
  605. }
  606. static void _disable_optional_clocks(struct omap_hwmod *oh)
  607. {
  608. struct omap_hwmod_opt_clk *oc;
  609. int i;
  610. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  611. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  612. if (oc->_clk) {
  613. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  614. oc->_clk->name);
  615. clk_disable(oc->_clk);
  616. }
  617. }
  618. /**
  619. * _enable_module - enable CLKCTRL modulemode on OMAP4
  620. * @oh: struct omap_hwmod *
  621. *
  622. * Enables the PRCM module mode related to the hwmod @oh.
  623. * No return value.
  624. */
  625. static void _enable_module(struct omap_hwmod *oh)
  626. {
  627. /* The module mode does not exist prior OMAP4 */
  628. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  629. return;
  630. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  631. return;
  632. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  633. oh->name, oh->prcm.omap4.modulemode);
  634. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  635. oh->clkdm->prcm_partition,
  636. oh->clkdm->cm_inst,
  637. oh->clkdm->clkdm_offs,
  638. oh->prcm.omap4.clkctrl_offs);
  639. }
  640. /**
  641. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  642. * @oh: struct omap_hwmod *
  643. *
  644. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  645. * does not have an IDLEST bit or if the module successfully enters
  646. * slave idle; otherwise, pass along the return value of the
  647. * appropriate *_cm*_wait_module_idle() function.
  648. */
  649. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  650. {
  651. if (!cpu_is_omap44xx())
  652. return 0;
  653. if (!oh)
  654. return -EINVAL;
  655. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  656. return 0;
  657. if (oh->flags & HWMOD_NO_IDLEST)
  658. return 0;
  659. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  660. oh->clkdm->cm_inst,
  661. oh->clkdm->clkdm_offs,
  662. oh->prcm.omap4.clkctrl_offs);
  663. }
  664. /**
  665. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  666. * @oh: struct omap_hwmod *oh
  667. *
  668. * Count and return the number of MPU IRQs associated with the hwmod
  669. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  670. * NULL.
  671. */
  672. static int _count_mpu_irqs(struct omap_hwmod *oh)
  673. {
  674. struct omap_hwmod_irq_info *ohii;
  675. int i = 0;
  676. if (!oh || !oh->mpu_irqs)
  677. return 0;
  678. do {
  679. ohii = &oh->mpu_irqs[i++];
  680. } while (ohii->irq != -1);
  681. return i-1;
  682. }
  683. /**
  684. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  685. * @oh: struct omap_hwmod *oh
  686. *
  687. * Count and return the number of SDMA request lines associated with
  688. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  689. * if @oh is NULL.
  690. */
  691. static int _count_sdma_reqs(struct omap_hwmod *oh)
  692. {
  693. struct omap_hwmod_dma_info *ohdi;
  694. int i = 0;
  695. if (!oh || !oh->sdma_reqs)
  696. return 0;
  697. do {
  698. ohdi = &oh->sdma_reqs[i++];
  699. } while (ohdi->dma_req != -1);
  700. return i-1;
  701. }
  702. /**
  703. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  704. * @oh: struct omap_hwmod *oh
  705. *
  706. * Count and return the number of address space ranges associated with
  707. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  708. * if @oh is NULL.
  709. */
  710. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  711. {
  712. struct omap_hwmod_addr_space *mem;
  713. int i = 0;
  714. if (!os || !os->addr)
  715. return 0;
  716. do {
  717. mem = &os->addr[i++];
  718. } while (mem->pa_start != mem->pa_end);
  719. return i-1;
  720. }
  721. /**
  722. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  723. * @oh: struct omap_hwmod *
  724. *
  725. * Returns the array index of the OCP slave port that the MPU
  726. * addresses the device on, or -EINVAL upon error or not found.
  727. */
  728. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  729. {
  730. int i;
  731. int found = 0;
  732. if (!oh || oh->slaves_cnt == 0)
  733. return -EINVAL;
  734. for (i = 0; i < oh->slaves_cnt; i++) {
  735. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  736. if (os->user & OCP_USER_MPU) {
  737. found = 1;
  738. break;
  739. }
  740. }
  741. if (found)
  742. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  743. oh->name, i);
  744. else
  745. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  746. oh->name);
  747. return (found) ? i : -EINVAL;
  748. }
  749. /**
  750. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  751. * @oh: struct omap_hwmod *
  752. *
  753. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  754. * the register target MPU address space; or returns NULL upon error.
  755. */
  756. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  757. {
  758. struct omap_hwmod_ocp_if *os;
  759. struct omap_hwmod_addr_space *mem;
  760. int found = 0, i = 0;
  761. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  762. return NULL;
  763. os = oh->slaves[oh->_mpu_port_index];
  764. if (!os->addr)
  765. return NULL;
  766. do {
  767. mem = &os->addr[i++];
  768. if (mem->flags & ADDR_TYPE_RT)
  769. found = 1;
  770. } while (!found && mem->pa_start != mem->pa_end);
  771. return (found) ? mem : NULL;
  772. }
  773. /**
  774. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  775. * @oh: struct omap_hwmod *
  776. *
  777. * If module is marked as SWSUP_SIDLE, force the module out of slave
  778. * idle; otherwise, configure it for smart-idle. If module is marked
  779. * as SWSUP_MSUSPEND, force the module out of master standby;
  780. * otherwise, configure it for smart-standby. No return value.
  781. */
  782. static void _enable_sysc(struct omap_hwmod *oh)
  783. {
  784. u8 idlemode, sf;
  785. u32 v;
  786. if (!oh->class->sysc)
  787. return;
  788. v = oh->_sysc_cache;
  789. sf = oh->class->sysc->sysc_flags;
  790. if (sf & SYSC_HAS_SIDLEMODE) {
  791. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  792. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  793. _set_slave_idlemode(oh, idlemode, &v);
  794. }
  795. if (sf & SYSC_HAS_MIDLEMODE) {
  796. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  797. idlemode = HWMOD_IDLEMODE_NO;
  798. } else {
  799. if (sf & SYSC_HAS_ENAWAKEUP)
  800. _enable_wakeup(oh, &v);
  801. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  802. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  803. else
  804. idlemode = HWMOD_IDLEMODE_SMART;
  805. }
  806. _set_master_standbymode(oh, idlemode, &v);
  807. }
  808. /*
  809. * XXX The clock framework should handle this, by
  810. * calling into this code. But this must wait until the
  811. * clock structures are tagged with omap_hwmod entries
  812. */
  813. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  814. (sf & SYSC_HAS_CLOCKACTIVITY))
  815. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  816. /* If slave is in SMARTIDLE, also enable wakeup */
  817. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  818. _enable_wakeup(oh, &v);
  819. _write_sysconfig(v, oh);
  820. /*
  821. * Set the autoidle bit only after setting the smartidle bit
  822. * Setting this will not have any impact on the other modules.
  823. */
  824. if (sf & SYSC_HAS_AUTOIDLE) {
  825. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  826. 0 : 1;
  827. _set_module_autoidle(oh, idlemode, &v);
  828. _write_sysconfig(v, oh);
  829. }
  830. }
  831. /**
  832. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  833. * @oh: struct omap_hwmod *
  834. *
  835. * If module is marked as SWSUP_SIDLE, force the module into slave
  836. * idle; otherwise, configure it for smart-idle. If module is marked
  837. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  838. * configure it for smart-standby. No return value.
  839. */
  840. static void _idle_sysc(struct omap_hwmod *oh)
  841. {
  842. u8 idlemode, sf;
  843. u32 v;
  844. if (!oh->class->sysc)
  845. return;
  846. v = oh->_sysc_cache;
  847. sf = oh->class->sysc->sysc_flags;
  848. if (sf & SYSC_HAS_SIDLEMODE) {
  849. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  850. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  851. _set_slave_idlemode(oh, idlemode, &v);
  852. }
  853. if (sf & SYSC_HAS_MIDLEMODE) {
  854. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  855. idlemode = HWMOD_IDLEMODE_FORCE;
  856. } else {
  857. if (sf & SYSC_HAS_ENAWAKEUP)
  858. _enable_wakeup(oh, &v);
  859. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  860. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  861. else
  862. idlemode = HWMOD_IDLEMODE_SMART;
  863. }
  864. _set_master_standbymode(oh, idlemode, &v);
  865. }
  866. /* If slave is in SMARTIDLE, also enable wakeup */
  867. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  868. _enable_wakeup(oh, &v);
  869. _write_sysconfig(v, oh);
  870. }
  871. /**
  872. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  873. * @oh: struct omap_hwmod *
  874. *
  875. * Force the module into slave idle and master suspend. No return
  876. * value.
  877. */
  878. static void _shutdown_sysc(struct omap_hwmod *oh)
  879. {
  880. u32 v;
  881. u8 sf;
  882. if (!oh->class->sysc)
  883. return;
  884. v = oh->_sysc_cache;
  885. sf = oh->class->sysc->sysc_flags;
  886. if (sf & SYSC_HAS_SIDLEMODE)
  887. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  888. if (sf & SYSC_HAS_MIDLEMODE)
  889. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  890. if (sf & SYSC_HAS_AUTOIDLE)
  891. _set_module_autoidle(oh, 1, &v);
  892. _write_sysconfig(v, oh);
  893. }
  894. /**
  895. * _lookup - find an omap_hwmod by name
  896. * @name: find an omap_hwmod by name
  897. *
  898. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  899. */
  900. static struct omap_hwmod *_lookup(const char *name)
  901. {
  902. struct omap_hwmod *oh, *temp_oh;
  903. oh = NULL;
  904. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  905. if (!strcmp(name, temp_oh->name)) {
  906. oh = temp_oh;
  907. break;
  908. }
  909. }
  910. return oh;
  911. }
  912. /**
  913. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  914. * @oh: struct omap_hwmod *
  915. *
  916. * Convert a clockdomain name stored in a struct omap_hwmod into a
  917. * clockdomain pointer, and save it into the struct omap_hwmod.
  918. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  919. */
  920. static int _init_clkdm(struct omap_hwmod *oh)
  921. {
  922. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  923. return 0;
  924. if (!oh->clkdm_name) {
  925. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  926. return -EINVAL;
  927. }
  928. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  929. if (!oh->clkdm) {
  930. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  931. oh->name, oh->clkdm_name);
  932. return -EINVAL;
  933. }
  934. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  935. oh->name, oh->clkdm_name);
  936. return 0;
  937. }
  938. /**
  939. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  940. * well the clockdomain.
  941. * @oh: struct omap_hwmod *
  942. * @data: not used; pass NULL
  943. *
  944. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  945. * Resolves all clock names embedded in the hwmod. Returns 0 on
  946. * success, or a negative error code on failure.
  947. */
  948. static int _init_clocks(struct omap_hwmod *oh, void *data)
  949. {
  950. int ret = 0;
  951. if (oh->_state != _HWMOD_STATE_REGISTERED)
  952. return 0;
  953. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  954. ret |= _init_main_clk(oh);
  955. ret |= _init_interface_clks(oh);
  956. ret |= _init_opt_clks(oh);
  957. ret |= _init_clkdm(oh);
  958. if (!ret)
  959. oh->_state = _HWMOD_STATE_CLKS_INITED;
  960. else
  961. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  962. return ret;
  963. }
  964. /**
  965. * _wait_target_ready - wait for a module to leave slave idle
  966. * @oh: struct omap_hwmod *
  967. *
  968. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  969. * does not have an IDLEST bit or if the module successfully leaves
  970. * slave idle; otherwise, pass along the return value of the
  971. * appropriate *_cm*_wait_module_ready() function.
  972. */
  973. static int _wait_target_ready(struct omap_hwmod *oh)
  974. {
  975. struct omap_hwmod_ocp_if *os;
  976. int ret;
  977. if (!oh)
  978. return -EINVAL;
  979. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  980. return 0;
  981. os = oh->slaves[oh->_mpu_port_index];
  982. if (oh->flags & HWMOD_NO_IDLEST)
  983. return 0;
  984. /* XXX check module SIDLEMODE */
  985. /* XXX check clock enable states */
  986. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  987. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  988. oh->prcm.omap2.idlest_reg_id,
  989. oh->prcm.omap2.idlest_idle_bit);
  990. } else if (cpu_is_omap44xx()) {
  991. if (!oh->clkdm)
  992. return -EINVAL;
  993. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  994. oh->clkdm->cm_inst,
  995. oh->clkdm->clkdm_offs,
  996. oh->prcm.omap4.clkctrl_offs);
  997. } else {
  998. BUG();
  999. };
  1000. return ret;
  1001. }
  1002. /**
  1003. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1004. * @oh: struct omap_hwmod *
  1005. * @name: name of the reset line in the context of this hwmod
  1006. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1007. *
  1008. * Return the bit position of the reset line that match the
  1009. * input name. Return -ENOENT if not found.
  1010. */
  1011. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1012. struct omap_hwmod_rst_info *ohri)
  1013. {
  1014. int i;
  1015. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1016. const char *rst_line = oh->rst_lines[i].name;
  1017. if (!strcmp(rst_line, name)) {
  1018. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1019. ohri->st_shift = oh->rst_lines[i].st_shift;
  1020. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1021. oh->name, __func__, rst_line, ohri->rst_shift,
  1022. ohri->st_shift);
  1023. return 0;
  1024. }
  1025. }
  1026. return -ENOENT;
  1027. }
  1028. /**
  1029. * _assert_hardreset - assert the HW reset line of submodules
  1030. * contained in the hwmod module.
  1031. * @oh: struct omap_hwmod *
  1032. * @name: name of the reset line to lookup and assert
  1033. *
  1034. * Some IP like dsp, ipu or iva contain processor that require
  1035. * an HW reset line to be assert / deassert in order to enable fully
  1036. * the IP.
  1037. */
  1038. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1039. {
  1040. struct omap_hwmod_rst_info ohri;
  1041. u8 ret;
  1042. if (!oh)
  1043. return -EINVAL;
  1044. ret = _lookup_hardreset(oh, name, &ohri);
  1045. if (IS_ERR_VALUE(ret))
  1046. return ret;
  1047. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1048. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1049. ohri.rst_shift);
  1050. else if (cpu_is_omap44xx())
  1051. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1052. oh->clkdm->pwrdm.ptr->prcm_partition,
  1053. oh->clkdm->pwrdm.ptr->prcm_offs,
  1054. oh->prcm.omap4.rstctrl_offs);
  1055. else
  1056. return -EINVAL;
  1057. }
  1058. /**
  1059. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1060. * in the hwmod module.
  1061. * @oh: struct omap_hwmod *
  1062. * @name: name of the reset line to look up and deassert
  1063. *
  1064. * Some IP like dsp, ipu or iva contain processor that require
  1065. * an HW reset line to be assert / deassert in order to enable fully
  1066. * the IP.
  1067. */
  1068. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1069. {
  1070. struct omap_hwmod_rst_info ohri;
  1071. int ret;
  1072. if (!oh)
  1073. return -EINVAL;
  1074. ret = _lookup_hardreset(oh, name, &ohri);
  1075. if (IS_ERR_VALUE(ret))
  1076. return ret;
  1077. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1078. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1079. ohri.rst_shift,
  1080. ohri.st_shift);
  1081. } else if (cpu_is_omap44xx()) {
  1082. if (ohri.st_shift)
  1083. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1084. oh->name, name);
  1085. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1086. oh->clkdm->pwrdm.ptr->prcm_partition,
  1087. oh->clkdm->pwrdm.ptr->prcm_offs,
  1088. oh->prcm.omap4.rstctrl_offs);
  1089. } else {
  1090. return -EINVAL;
  1091. }
  1092. if (ret == -EBUSY)
  1093. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1094. return ret;
  1095. }
  1096. /**
  1097. * _read_hardreset - read the HW reset line state of submodules
  1098. * contained in the hwmod module
  1099. * @oh: struct omap_hwmod *
  1100. * @name: name of the reset line to look up and read
  1101. *
  1102. * Return the state of the reset line.
  1103. */
  1104. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1105. {
  1106. struct omap_hwmod_rst_info ohri;
  1107. u8 ret;
  1108. if (!oh)
  1109. return -EINVAL;
  1110. ret = _lookup_hardreset(oh, name, &ohri);
  1111. if (IS_ERR_VALUE(ret))
  1112. return ret;
  1113. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1114. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1115. ohri.st_shift);
  1116. } else if (cpu_is_omap44xx()) {
  1117. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1118. oh->clkdm->pwrdm.ptr->prcm_partition,
  1119. oh->clkdm->pwrdm.ptr->prcm_offs,
  1120. oh->prcm.omap4.rstctrl_offs);
  1121. } else {
  1122. return -EINVAL;
  1123. }
  1124. }
  1125. /**
  1126. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1127. * @oh: struct omap_hwmod *
  1128. *
  1129. * If any hardreset line associated with @oh is asserted, then return true.
  1130. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1131. * no hardreset lines associated with @oh are asserted, then return false.
  1132. * This function is used to avoid executing some parts of the IP block
  1133. * enable/disable sequence if a hardreset line is set.
  1134. */
  1135. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1136. {
  1137. int i;
  1138. if (oh->rst_lines_cnt == 0)
  1139. return false;
  1140. for (i = 0; i < oh->rst_lines_cnt; i++)
  1141. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1142. return true;
  1143. return false;
  1144. }
  1145. /**
  1146. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1147. * @oh: struct omap_hwmod *
  1148. *
  1149. * Disable the PRCM module mode related to the hwmod @oh.
  1150. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1151. */
  1152. static int _omap4_disable_module(struct omap_hwmod *oh)
  1153. {
  1154. int v;
  1155. /* The module mode does not exist prior OMAP4 */
  1156. if (!cpu_is_omap44xx())
  1157. return -EINVAL;
  1158. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1159. return -EINVAL;
  1160. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1161. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1162. oh->clkdm->cm_inst,
  1163. oh->clkdm->clkdm_offs,
  1164. oh->prcm.omap4.clkctrl_offs);
  1165. if (_are_any_hardreset_lines_asserted(oh))
  1166. return 0;
  1167. v = _omap4_wait_target_disable(oh);
  1168. if (v)
  1169. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1170. oh->name);
  1171. return 0;
  1172. }
  1173. /**
  1174. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1175. * @oh: struct omap_hwmod *
  1176. *
  1177. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1178. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1179. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1180. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1181. *
  1182. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1183. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1184. * use the SYSCONFIG softreset bit to provide the status.
  1185. *
  1186. * Note that some IP like McBSP do have reset control but don't have
  1187. * reset status.
  1188. */
  1189. static int _ocp_softreset(struct omap_hwmod *oh)
  1190. {
  1191. u32 v, softrst_mask;
  1192. int c = 0;
  1193. int ret = 0;
  1194. if (!oh->class->sysc ||
  1195. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1196. return -ENOENT;
  1197. /* clocks must be on for this operation */
  1198. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1199. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1200. "enabled state\n", oh->name);
  1201. return -EINVAL;
  1202. }
  1203. /* For some modules, all optionnal clocks need to be enabled as well */
  1204. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1205. _enable_optional_clocks(oh);
  1206. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1207. v = oh->_sysc_cache;
  1208. ret = _set_softreset(oh, &v);
  1209. if (ret)
  1210. goto dis_opt_clks;
  1211. _write_sysconfig(v, oh);
  1212. if (oh->class->sysc->srst_udelay)
  1213. udelay(oh->class->sysc->srst_udelay);
  1214. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1215. omap_test_timeout((omap_hwmod_read(oh,
  1216. oh->class->sysc->syss_offs)
  1217. & SYSS_RESETDONE_MASK),
  1218. MAX_MODULE_SOFTRESET_WAIT, c);
  1219. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1220. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1221. omap_test_timeout(!(omap_hwmod_read(oh,
  1222. oh->class->sysc->sysc_offs)
  1223. & softrst_mask),
  1224. MAX_MODULE_SOFTRESET_WAIT, c);
  1225. }
  1226. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1227. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1228. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1229. else
  1230. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1231. /*
  1232. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1233. * _wait_target_ready() or _reset()
  1234. */
  1235. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1236. dis_opt_clks:
  1237. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1238. _disable_optional_clocks(oh);
  1239. return ret;
  1240. }
  1241. /**
  1242. * _reset - reset an omap_hwmod
  1243. * @oh: struct omap_hwmod *
  1244. *
  1245. * Resets an omap_hwmod @oh. If the module has a custom reset
  1246. * function pointer defined, then call it to reset the IP block, and
  1247. * pass along its return value to the caller. Otherwise, if the IP
  1248. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1249. * associated with it, call a function to reset the IP block via that
  1250. * method, and pass along the return value to the caller. Finally, if
  1251. * the IP block has some hardreset lines associated with it, assert
  1252. * all of those, but do _not_ deassert them. (This is because driver
  1253. * authors have expressed an apparent requirement to control the
  1254. * deassertion of the hardreset lines themselves.)
  1255. *
  1256. * The default software reset mechanism for most OMAP IP blocks is
  1257. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1258. * hwmods cannot be reset via this method. Some are not targets and
  1259. * therefore have no OCP header registers to access. Others (like the
  1260. * IVA) have idiosyncratic reset sequences. So for these relatively
  1261. * rare cases, custom reset code can be supplied in the struct
  1262. * omap_hwmod_class .reset function pointer. Passes along the return
  1263. * value from either _ocp_softreset() or the custom reset function -
  1264. * these must return -EINVAL if the hwmod cannot be reset this way or
  1265. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1266. * not reset in time, or 0 upon success.
  1267. */
  1268. static int _reset(struct omap_hwmod *oh)
  1269. {
  1270. int i, r;
  1271. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1272. if (oh->class->reset) {
  1273. r = oh->class->reset(oh);
  1274. } else {
  1275. if (oh->rst_lines_cnt > 0) {
  1276. for (i = 0; i < oh->rst_lines_cnt; i++)
  1277. _assert_hardreset(oh, oh->rst_lines[i].name);
  1278. return 0;
  1279. } else {
  1280. r = _ocp_softreset(oh);
  1281. if (r == -ENOENT)
  1282. r = 0;
  1283. }
  1284. }
  1285. /*
  1286. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1287. * softreset. The _enable() function should be split to avoid
  1288. * the rewrite of the OCP_SYSCONFIG register.
  1289. */
  1290. if (oh->class->sysc) {
  1291. _update_sysc_cache(oh);
  1292. _enable_sysc(oh);
  1293. }
  1294. return r;
  1295. }
  1296. /**
  1297. * _enable - enable an omap_hwmod
  1298. * @oh: struct omap_hwmod *
  1299. *
  1300. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1301. * register target. Returns -EINVAL if the hwmod is in the wrong
  1302. * state or passes along the return value of _wait_target_ready().
  1303. */
  1304. static int _enable(struct omap_hwmod *oh)
  1305. {
  1306. int r;
  1307. int hwsup = 0;
  1308. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1309. /*
  1310. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1311. * state at init. Now that someone is really trying to enable
  1312. * them, just ensure that the hwmod mux is set.
  1313. */
  1314. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1315. /*
  1316. * If the caller has mux data populated, do the mux'ing
  1317. * which wouldn't have been done as part of the _enable()
  1318. * done during setup.
  1319. */
  1320. if (oh->mux)
  1321. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1322. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1323. return 0;
  1324. }
  1325. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1326. oh->_state != _HWMOD_STATE_IDLE &&
  1327. oh->_state != _HWMOD_STATE_DISABLED) {
  1328. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1329. oh->name);
  1330. return -EINVAL;
  1331. }
  1332. /*
  1333. * If an IP block contains HW reset lines and any of them are
  1334. * asserted, we let integration code associated with that
  1335. * block handle the enable. We've received very little
  1336. * information on what those driver authors need, and until
  1337. * detailed information is provided and the driver code is
  1338. * posted to the public lists, this is probably the best we
  1339. * can do.
  1340. */
  1341. if (_are_any_hardreset_lines_asserted(oh))
  1342. return 0;
  1343. /* Mux pins for device runtime if populated */
  1344. if (oh->mux && (!oh->mux->enabled ||
  1345. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1346. oh->mux->pads_dynamic)))
  1347. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1348. _add_initiator_dep(oh, mpu_oh);
  1349. if (oh->clkdm) {
  1350. /*
  1351. * A clockdomain must be in SW_SUP before enabling
  1352. * completely the module. The clockdomain can be set
  1353. * in HW_AUTO only when the module become ready.
  1354. */
  1355. hwsup = clkdm_in_hwsup(oh->clkdm);
  1356. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1357. if (r) {
  1358. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1359. oh->name, oh->clkdm->name, r);
  1360. return r;
  1361. }
  1362. }
  1363. _enable_clocks(oh);
  1364. _enable_module(oh);
  1365. r = _wait_target_ready(oh);
  1366. if (!r) {
  1367. /*
  1368. * Set the clockdomain to HW_AUTO only if the target is ready,
  1369. * assuming that the previous state was HW_AUTO
  1370. */
  1371. if (oh->clkdm && hwsup)
  1372. clkdm_allow_idle(oh->clkdm);
  1373. oh->_state = _HWMOD_STATE_ENABLED;
  1374. /* Access the sysconfig only if the target is ready */
  1375. if (oh->class->sysc) {
  1376. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1377. _update_sysc_cache(oh);
  1378. _enable_sysc(oh);
  1379. }
  1380. } else {
  1381. _disable_clocks(oh);
  1382. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1383. oh->name, r);
  1384. if (oh->clkdm)
  1385. clkdm_hwmod_disable(oh->clkdm, oh);
  1386. }
  1387. return r;
  1388. }
  1389. /**
  1390. * _idle - idle an omap_hwmod
  1391. * @oh: struct omap_hwmod *
  1392. *
  1393. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1394. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1395. * state or returns 0.
  1396. */
  1397. static int _idle(struct omap_hwmod *oh)
  1398. {
  1399. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1400. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1401. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1402. oh->name);
  1403. return -EINVAL;
  1404. }
  1405. if (_are_any_hardreset_lines_asserted(oh))
  1406. return 0;
  1407. if (oh->class->sysc)
  1408. _idle_sysc(oh);
  1409. _del_initiator_dep(oh, mpu_oh);
  1410. _omap4_disable_module(oh);
  1411. /*
  1412. * The module must be in idle mode before disabling any parents
  1413. * clocks. Otherwise, the parent clock might be disabled before
  1414. * the module transition is done, and thus will prevent the
  1415. * transition to complete properly.
  1416. */
  1417. _disable_clocks(oh);
  1418. if (oh->clkdm)
  1419. clkdm_hwmod_disable(oh->clkdm, oh);
  1420. /* Mux pins for device idle if populated */
  1421. if (oh->mux && oh->mux->pads_dynamic)
  1422. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1423. oh->_state = _HWMOD_STATE_IDLE;
  1424. return 0;
  1425. }
  1426. /**
  1427. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1428. * @oh: struct omap_hwmod *
  1429. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1430. *
  1431. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1432. * local copy. Intended to be used by drivers that require
  1433. * direct manipulation of the AUTOIDLE bits.
  1434. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1435. * along the return value from _set_module_autoidle().
  1436. *
  1437. * Any users of this function should be scrutinized carefully.
  1438. */
  1439. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1440. {
  1441. u32 v;
  1442. int retval = 0;
  1443. unsigned long flags;
  1444. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1445. return -EINVAL;
  1446. spin_lock_irqsave(&oh->_lock, flags);
  1447. v = oh->_sysc_cache;
  1448. retval = _set_module_autoidle(oh, autoidle, &v);
  1449. if (!retval)
  1450. _write_sysconfig(v, oh);
  1451. spin_unlock_irqrestore(&oh->_lock, flags);
  1452. return retval;
  1453. }
  1454. /**
  1455. * _shutdown - shutdown an omap_hwmod
  1456. * @oh: struct omap_hwmod *
  1457. *
  1458. * Shut down an omap_hwmod @oh. This should be called when the driver
  1459. * used for the hwmod is removed or unloaded or if the driver is not
  1460. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1461. * state or returns 0.
  1462. */
  1463. static int _shutdown(struct omap_hwmod *oh)
  1464. {
  1465. int ret, i;
  1466. u8 prev_state;
  1467. if (oh->_state != _HWMOD_STATE_IDLE &&
  1468. oh->_state != _HWMOD_STATE_ENABLED) {
  1469. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1470. oh->name);
  1471. return -EINVAL;
  1472. }
  1473. if (_are_any_hardreset_lines_asserted(oh))
  1474. return 0;
  1475. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1476. if (oh->class->pre_shutdown) {
  1477. prev_state = oh->_state;
  1478. if (oh->_state == _HWMOD_STATE_IDLE)
  1479. _enable(oh);
  1480. ret = oh->class->pre_shutdown(oh);
  1481. if (ret) {
  1482. if (prev_state == _HWMOD_STATE_IDLE)
  1483. _idle(oh);
  1484. return ret;
  1485. }
  1486. }
  1487. if (oh->class->sysc) {
  1488. if (oh->_state == _HWMOD_STATE_IDLE)
  1489. _enable(oh);
  1490. _shutdown_sysc(oh);
  1491. }
  1492. /* clocks and deps are already disabled in idle */
  1493. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1494. _del_initiator_dep(oh, mpu_oh);
  1495. /* XXX what about the other system initiators here? dma, dsp */
  1496. _omap4_disable_module(oh);
  1497. _disable_clocks(oh);
  1498. if (oh->clkdm)
  1499. clkdm_hwmod_disable(oh->clkdm, oh);
  1500. }
  1501. /* XXX Should this code also force-disable the optional clocks? */
  1502. for (i = 0; i < oh->rst_lines_cnt; i++)
  1503. _assert_hardreset(oh, oh->rst_lines[i].name);
  1504. /* Mux pins to safe mode or use populated off mode values */
  1505. if (oh->mux)
  1506. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1507. oh->_state = _HWMOD_STATE_DISABLED;
  1508. return 0;
  1509. }
  1510. /**
  1511. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1512. * @oh: struct omap_hwmod * to locate the virtual address
  1513. *
  1514. * Cache the virtual address used by the MPU to access this IP block's
  1515. * registers. This address is needed early so the OCP registers that
  1516. * are part of the device's address space can be ioremapped properly.
  1517. * No return value.
  1518. */
  1519. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1520. {
  1521. struct omap_hwmod_addr_space *mem;
  1522. void __iomem *va_start;
  1523. if (!oh)
  1524. return;
  1525. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1526. return;
  1527. mem = _find_mpu_rt_addr_space(oh);
  1528. if (!mem) {
  1529. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1530. oh->name);
  1531. return;
  1532. }
  1533. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1534. if (!va_start) {
  1535. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1536. return;
  1537. }
  1538. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1539. oh->name, va_start);
  1540. oh->_mpu_rt_va = va_start;
  1541. }
  1542. /**
  1543. * _init - initialize internal data for the hwmod @oh
  1544. * @oh: struct omap_hwmod *
  1545. * @n: (unused)
  1546. *
  1547. * Look up the clocks and the address space used by the MPU to access
  1548. * registers belonging to the hwmod @oh. @oh must already be
  1549. * registered at this point. This is the first of two phases for
  1550. * hwmod initialization. Code called here does not touch any hardware
  1551. * registers, it simply prepares internal data structures. Returns 0
  1552. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1553. * failure.
  1554. */
  1555. static int __init _init(struct omap_hwmod *oh, void *data)
  1556. {
  1557. int r;
  1558. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1559. return 0;
  1560. _init_mpu_rt_base(oh, NULL);
  1561. r = _init_clocks(oh, NULL);
  1562. if (IS_ERR_VALUE(r)) {
  1563. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1564. return -EINVAL;
  1565. }
  1566. oh->_state = _HWMOD_STATE_INITIALIZED;
  1567. return 0;
  1568. }
  1569. /**
  1570. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1571. * @oh: struct omap_hwmod *
  1572. *
  1573. * Set up the module's interface clocks. XXX This function is still mostly
  1574. * a stub; implementing this properly requires iclk autoidle usecounting in
  1575. * the clock code. No return value.
  1576. */
  1577. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1578. {
  1579. int i;
  1580. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1581. return;
  1582. for (i = 0; i < oh->slaves_cnt; i++) {
  1583. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1584. struct clk *c = os->_clk;
  1585. if (!c)
  1586. continue;
  1587. if (os->flags & OCPIF_SWSUP_IDLE) {
  1588. /* XXX omap_iclk_deny_idle(c); */
  1589. } else {
  1590. /* XXX omap_iclk_allow_idle(c); */
  1591. clk_enable(c);
  1592. }
  1593. }
  1594. return;
  1595. }
  1596. /**
  1597. * _setup_reset - reset an IP block during the setup process
  1598. * @oh: struct omap_hwmod *
  1599. *
  1600. * Reset the IP block corresponding to the hwmod @oh during the setup
  1601. * process. The IP block is first enabled so it can be successfully
  1602. * reset. Returns 0 upon success or a negative error code upon
  1603. * failure.
  1604. */
  1605. static int __init _setup_reset(struct omap_hwmod *oh)
  1606. {
  1607. int r;
  1608. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1609. return -EINVAL;
  1610. if (oh->rst_lines_cnt == 0) {
  1611. r = _enable(oh);
  1612. if (r) {
  1613. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1614. oh->name, oh->_state);
  1615. return -EINVAL;
  1616. }
  1617. }
  1618. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1619. r = _reset(oh);
  1620. return r;
  1621. }
  1622. /**
  1623. * _setup_postsetup - transition to the appropriate state after _setup
  1624. * @oh: struct omap_hwmod *
  1625. *
  1626. * Place an IP block represented by @oh into a "post-setup" state --
  1627. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1628. * this function is called at the end of _setup().) The postsetup
  1629. * state for an IP block can be changed by calling
  1630. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1631. * before one of the omap_hwmod_setup*() functions are called for the
  1632. * IP block.
  1633. *
  1634. * The IP block stays in this state until a PM runtime-based driver is
  1635. * loaded for that IP block. A post-setup state of IDLE is
  1636. * appropriate for almost all IP blocks with runtime PM-enabled
  1637. * drivers, since those drivers are able to enable the IP block. A
  1638. * post-setup state of ENABLED is appropriate for kernels with PM
  1639. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1640. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1641. * included, since the WDTIMER starts running on reset and will reset
  1642. * the MPU if left active.
  1643. *
  1644. * This post-setup mechanism is deprecated. Once all of the OMAP
  1645. * drivers have been converted to use PM runtime, and all of the IP
  1646. * block data and interconnect data is available to the hwmod code, it
  1647. * should be possible to replace this mechanism with a "lazy reset"
  1648. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1649. * when the driver first probes, then all remaining IP blocks without
  1650. * drivers are either shut down or enabled after the drivers have
  1651. * loaded. However, this cannot take place until the above
  1652. * preconditions have been met, since otherwise the late reset code
  1653. * has no way of knowing which IP blocks are in use by drivers, and
  1654. * which ones are unused.
  1655. *
  1656. * No return value.
  1657. */
  1658. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1659. {
  1660. u8 postsetup_state;
  1661. if (oh->rst_lines_cnt > 0)
  1662. return;
  1663. postsetup_state = oh->_postsetup_state;
  1664. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1665. postsetup_state = _HWMOD_STATE_ENABLED;
  1666. /*
  1667. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1668. * it should be set by the core code as a runtime flag during startup
  1669. */
  1670. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1671. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1672. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1673. postsetup_state = _HWMOD_STATE_ENABLED;
  1674. }
  1675. if (postsetup_state == _HWMOD_STATE_IDLE)
  1676. _idle(oh);
  1677. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1678. _shutdown(oh);
  1679. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1680. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1681. oh->name, postsetup_state);
  1682. return;
  1683. }
  1684. /**
  1685. * _setup - prepare IP block hardware for use
  1686. * @oh: struct omap_hwmod *
  1687. * @n: (unused, pass NULL)
  1688. *
  1689. * Configure the IP block represented by @oh. This may include
  1690. * enabling the IP block, resetting it, and placing it into a
  1691. * post-setup state, depending on the type of IP block and applicable
  1692. * flags. IP blocks are reset to prevent any previous configuration
  1693. * by the bootloader or previous operating system from interfering
  1694. * with power management or other parts of the system. The reset can
  1695. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1696. * two phases for hwmod initialization. Code called here generally
  1697. * affects the IP block hardware, or system integration hardware
  1698. * associated with the IP block. Returns 0.
  1699. */
  1700. static int __init _setup(struct omap_hwmod *oh, void *data)
  1701. {
  1702. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1703. return 0;
  1704. _setup_iclk_autoidle(oh);
  1705. if (!_setup_reset(oh))
  1706. _setup_postsetup(oh);
  1707. return 0;
  1708. }
  1709. /**
  1710. * _register - register a struct omap_hwmod
  1711. * @oh: struct omap_hwmod *
  1712. *
  1713. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1714. * already has been registered by the same name; -EINVAL if the
  1715. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1716. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1717. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1718. * success.
  1719. *
  1720. * XXX The data should be copied into bootmem, so the original data
  1721. * should be marked __initdata and freed after init. This would allow
  1722. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1723. * that the copy process would be relatively complex due to the large number
  1724. * of substructures.
  1725. */
  1726. static int __init _register(struct omap_hwmod *oh)
  1727. {
  1728. int ms_id;
  1729. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1730. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1731. return -EINVAL;
  1732. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1733. if (_lookup(oh->name))
  1734. return -EEXIST;
  1735. ms_id = _find_mpu_port_index(oh);
  1736. if (!IS_ERR_VALUE(ms_id))
  1737. oh->_mpu_port_index = ms_id;
  1738. else
  1739. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1740. list_add_tail(&oh->node, &omap_hwmod_list);
  1741. spin_lock_init(&oh->_lock);
  1742. oh->_state = _HWMOD_STATE_REGISTERED;
  1743. /*
  1744. * XXX Rather than doing a strcmp(), this should test a flag
  1745. * set in the hwmod data, inserted by the autogenerator code.
  1746. */
  1747. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1748. mpu_oh = oh;
  1749. return 0;
  1750. }
  1751. /* Public functions */
  1752. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1753. {
  1754. if (oh->flags & HWMOD_16BIT_REG)
  1755. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1756. else
  1757. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1758. }
  1759. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1760. {
  1761. if (oh->flags & HWMOD_16BIT_REG)
  1762. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1763. else
  1764. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1765. }
  1766. /**
  1767. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1768. * @oh: struct omap_hwmod *
  1769. *
  1770. * This is a public function exposed to drivers. Some drivers may need to do
  1771. * some settings before and after resetting the device. Those drivers after
  1772. * doing the necessary settings could use this function to start a reset by
  1773. * setting the SYSCONFIG.SOFTRESET bit.
  1774. */
  1775. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1776. {
  1777. u32 v;
  1778. int ret;
  1779. if (!oh || !(oh->_sysc_cache))
  1780. return -EINVAL;
  1781. v = oh->_sysc_cache;
  1782. ret = _set_softreset(oh, &v);
  1783. if (ret)
  1784. goto error;
  1785. _write_sysconfig(v, oh);
  1786. error:
  1787. return ret;
  1788. }
  1789. /**
  1790. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1791. * @oh: struct omap_hwmod *
  1792. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1793. *
  1794. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1795. * local copy. Intended to be used by drivers that have some erratum
  1796. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1797. * -EINVAL if @oh is null, or passes along the return value from
  1798. * _set_slave_idlemode().
  1799. *
  1800. * XXX Does this function have any current users? If not, we should
  1801. * remove it; it is better to let the rest of the hwmod code handle this.
  1802. * Any users of this function should be scrutinized carefully.
  1803. */
  1804. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1805. {
  1806. u32 v;
  1807. int retval = 0;
  1808. if (!oh)
  1809. return -EINVAL;
  1810. v = oh->_sysc_cache;
  1811. retval = _set_slave_idlemode(oh, idlemode, &v);
  1812. if (!retval)
  1813. _write_sysconfig(v, oh);
  1814. return retval;
  1815. }
  1816. /**
  1817. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1818. * @name: name of the omap_hwmod to look up
  1819. *
  1820. * Given a @name of an omap_hwmod, return a pointer to the registered
  1821. * struct omap_hwmod *, or NULL upon error.
  1822. */
  1823. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1824. {
  1825. struct omap_hwmod *oh;
  1826. if (!name)
  1827. return NULL;
  1828. oh = _lookup(name);
  1829. return oh;
  1830. }
  1831. /**
  1832. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1833. * @fn: pointer to a callback function
  1834. * @data: void * data to pass to callback function
  1835. *
  1836. * Call @fn for each registered omap_hwmod, passing @data to each
  1837. * function. @fn must return 0 for success or any other value for
  1838. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1839. * will stop and the non-zero return value will be passed to the
  1840. * caller of omap_hwmod_for_each(). @fn is called with
  1841. * omap_hwmod_for_each() held.
  1842. */
  1843. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1844. void *data)
  1845. {
  1846. struct omap_hwmod *temp_oh;
  1847. int ret = 0;
  1848. if (!fn)
  1849. return -EINVAL;
  1850. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1851. ret = (*fn)(temp_oh, data);
  1852. if (ret)
  1853. break;
  1854. }
  1855. return ret;
  1856. }
  1857. /**
  1858. * omap_hwmod_register - register an array of hwmods
  1859. * @ohs: pointer to an array of omap_hwmods to register
  1860. *
  1861. * Intended to be called early in boot before the clock framework is
  1862. * initialized. If @ohs is not null, will register all omap_hwmods
  1863. * listed in @ohs that are valid for this chip. Returns 0.
  1864. */
  1865. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1866. {
  1867. int r, i;
  1868. if (!ohs)
  1869. return 0;
  1870. i = 0;
  1871. do {
  1872. r = _register(ohs[i]);
  1873. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1874. r);
  1875. } while (ohs[++i]);
  1876. return 0;
  1877. }
  1878. /**
  1879. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  1880. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  1881. *
  1882. * If the hwmod data corresponding to the MPU subsystem IP block
  1883. * hasn't been initialized and set up yet, do so now. This must be
  1884. * done first since sleep dependencies may be added from other hwmods
  1885. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  1886. * return value.
  1887. */
  1888. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  1889. {
  1890. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  1891. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1892. __func__, MPU_INITIATOR_NAME);
  1893. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1894. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1895. }
  1896. /**
  1897. * omap_hwmod_setup_one - set up a single hwmod
  1898. * @oh_name: const char * name of the already-registered hwmod to set up
  1899. *
  1900. * Initialize and set up a single hwmod. Intended to be used for a
  1901. * small number of early devices, such as the timer IP blocks used for
  1902. * the scheduler clock. Must be called after omap2_clk_init().
  1903. * Resolves the struct clk names to struct clk pointers for each
  1904. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  1905. * -EINVAL upon error or 0 upon success.
  1906. */
  1907. int __init omap_hwmod_setup_one(const char *oh_name)
  1908. {
  1909. struct omap_hwmod *oh;
  1910. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1911. oh = _lookup(oh_name);
  1912. if (!oh) {
  1913. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1914. return -EINVAL;
  1915. }
  1916. _ensure_mpu_hwmod_is_setup(oh);
  1917. _init(oh, NULL);
  1918. _setup(oh, NULL);
  1919. return 0;
  1920. }
  1921. /**
  1922. * omap_hwmod_setup_all - set up all registered IP blocks
  1923. *
  1924. * Initialize and set up all IP blocks registered with the hwmod code.
  1925. * Must be called after omap2_clk_init(). Resolves the struct clk
  1926. * names to struct clk pointers for each registered omap_hwmod. Also
  1927. * calls _setup() on each hwmod. Returns 0 upon success.
  1928. */
  1929. static int __init omap_hwmod_setup_all(void)
  1930. {
  1931. _ensure_mpu_hwmod_is_setup(NULL);
  1932. omap_hwmod_for_each(_init, NULL);
  1933. omap_hwmod_for_each(_setup, NULL);
  1934. return 0;
  1935. }
  1936. core_initcall(omap_hwmod_setup_all);
  1937. /**
  1938. * omap_hwmod_enable - enable an omap_hwmod
  1939. * @oh: struct omap_hwmod *
  1940. *
  1941. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1942. * Returns -EINVAL on error or passes along the return value from _enable().
  1943. */
  1944. int omap_hwmod_enable(struct omap_hwmod *oh)
  1945. {
  1946. int r;
  1947. unsigned long flags;
  1948. if (!oh)
  1949. return -EINVAL;
  1950. spin_lock_irqsave(&oh->_lock, flags);
  1951. r = _enable(oh);
  1952. spin_unlock_irqrestore(&oh->_lock, flags);
  1953. return r;
  1954. }
  1955. /**
  1956. * omap_hwmod_idle - idle an omap_hwmod
  1957. * @oh: struct omap_hwmod *
  1958. *
  1959. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1960. * Returns -EINVAL on error or passes along the return value from _idle().
  1961. */
  1962. int omap_hwmod_idle(struct omap_hwmod *oh)
  1963. {
  1964. unsigned long flags;
  1965. if (!oh)
  1966. return -EINVAL;
  1967. spin_lock_irqsave(&oh->_lock, flags);
  1968. _idle(oh);
  1969. spin_unlock_irqrestore(&oh->_lock, flags);
  1970. return 0;
  1971. }
  1972. /**
  1973. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1974. * @oh: struct omap_hwmod *
  1975. *
  1976. * Shutdown an omap_hwmod @oh. Intended to be called by
  1977. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1978. * the return value from _shutdown().
  1979. */
  1980. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1981. {
  1982. unsigned long flags;
  1983. if (!oh)
  1984. return -EINVAL;
  1985. spin_lock_irqsave(&oh->_lock, flags);
  1986. _shutdown(oh);
  1987. spin_unlock_irqrestore(&oh->_lock, flags);
  1988. return 0;
  1989. }
  1990. /**
  1991. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1992. * @oh: struct omap_hwmod *oh
  1993. *
  1994. * Intended to be called by the omap_device code.
  1995. */
  1996. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1997. {
  1998. unsigned long flags;
  1999. spin_lock_irqsave(&oh->_lock, flags);
  2000. _enable_clocks(oh);
  2001. spin_unlock_irqrestore(&oh->_lock, flags);
  2002. return 0;
  2003. }
  2004. /**
  2005. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2006. * @oh: struct omap_hwmod *oh
  2007. *
  2008. * Intended to be called by the omap_device code.
  2009. */
  2010. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2011. {
  2012. unsigned long flags;
  2013. spin_lock_irqsave(&oh->_lock, flags);
  2014. _disable_clocks(oh);
  2015. spin_unlock_irqrestore(&oh->_lock, flags);
  2016. return 0;
  2017. }
  2018. /**
  2019. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2020. * @oh: struct omap_hwmod *oh
  2021. *
  2022. * Intended to be called by drivers and core code when all posted
  2023. * writes to a device must complete before continuing further
  2024. * execution (for example, after clearing some device IRQSTATUS
  2025. * register bits)
  2026. *
  2027. * XXX what about targets with multiple OCP threads?
  2028. */
  2029. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2030. {
  2031. BUG_ON(!oh);
  2032. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2033. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2034. oh->name);
  2035. return;
  2036. }
  2037. /*
  2038. * Forces posted writes to complete on the OCP thread handling
  2039. * register writes
  2040. */
  2041. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2042. }
  2043. /**
  2044. * omap_hwmod_reset - reset the hwmod
  2045. * @oh: struct omap_hwmod *
  2046. *
  2047. * Under some conditions, a driver may wish to reset the entire device.
  2048. * Called from omap_device code. Returns -EINVAL on error or passes along
  2049. * the return value from _reset().
  2050. */
  2051. int omap_hwmod_reset(struct omap_hwmod *oh)
  2052. {
  2053. int r;
  2054. unsigned long flags;
  2055. if (!oh)
  2056. return -EINVAL;
  2057. spin_lock_irqsave(&oh->_lock, flags);
  2058. r = _reset(oh);
  2059. spin_unlock_irqrestore(&oh->_lock, flags);
  2060. return r;
  2061. }
  2062. /**
  2063. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2064. * @oh: struct omap_hwmod *
  2065. * @res: pointer to the first element of an array of struct resource to fill
  2066. *
  2067. * Count the number of struct resource array elements necessary to
  2068. * contain omap_hwmod @oh resources. Intended to be called by code
  2069. * that registers omap_devices. Intended to be used to determine the
  2070. * size of a dynamically-allocated struct resource array, before
  2071. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2072. * resource array elements needed.
  2073. *
  2074. * XXX This code is not optimized. It could attempt to merge adjacent
  2075. * resource IDs.
  2076. *
  2077. */
  2078. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2079. {
  2080. int ret, i;
  2081. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2082. for (i = 0; i < oh->slaves_cnt; i++)
  2083. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  2084. return ret;
  2085. }
  2086. /**
  2087. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2088. * @oh: struct omap_hwmod *
  2089. * @res: pointer to the first element of an array of struct resource to fill
  2090. *
  2091. * Fill the struct resource array @res with resource data from the
  2092. * omap_hwmod @oh. Intended to be called by code that registers
  2093. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2094. * number of array elements filled.
  2095. */
  2096. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2097. {
  2098. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  2099. int r = 0;
  2100. /* For each IRQ, DMA, memory area, fill in array.*/
  2101. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2102. for (i = 0; i < mpu_irqs_cnt; i++) {
  2103. (res + r)->name = (oh->mpu_irqs + i)->name;
  2104. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2105. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2106. (res + r)->flags = IORESOURCE_IRQ;
  2107. r++;
  2108. }
  2109. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2110. for (i = 0; i < sdma_reqs_cnt; i++) {
  2111. (res + r)->name = (oh->sdma_reqs + i)->name;
  2112. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2113. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2114. (res + r)->flags = IORESOURCE_DMA;
  2115. r++;
  2116. }
  2117. for (i = 0; i < oh->slaves_cnt; i++) {
  2118. struct omap_hwmod_ocp_if *os;
  2119. int addr_cnt;
  2120. os = oh->slaves[i];
  2121. addr_cnt = _count_ocp_if_addr_spaces(os);
  2122. for (j = 0; j < addr_cnt; j++) {
  2123. (res + r)->name = (os->addr + j)->name;
  2124. (res + r)->start = (os->addr + j)->pa_start;
  2125. (res + r)->end = (os->addr + j)->pa_end;
  2126. (res + r)->flags = IORESOURCE_MEM;
  2127. r++;
  2128. }
  2129. }
  2130. return r;
  2131. }
  2132. /**
  2133. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2134. * @oh: struct omap_hwmod *
  2135. *
  2136. * Return the powerdomain pointer associated with the OMAP module
  2137. * @oh's main clock. If @oh does not have a main clk, return the
  2138. * powerdomain associated with the interface clock associated with the
  2139. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2140. * instead?) Returns NULL on error, or a struct powerdomain * on
  2141. * success.
  2142. */
  2143. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2144. {
  2145. struct clk *c;
  2146. if (!oh)
  2147. return NULL;
  2148. if (oh->_clk) {
  2149. c = oh->_clk;
  2150. } else {
  2151. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2152. return NULL;
  2153. c = oh->slaves[oh->_mpu_port_index]->_clk;
  2154. }
  2155. if (!c->clkdm)
  2156. return NULL;
  2157. return c->clkdm->pwrdm.ptr;
  2158. }
  2159. /**
  2160. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2161. * @oh: struct omap_hwmod *
  2162. *
  2163. * Returns the virtual address corresponding to the beginning of the
  2164. * module's register target, in the address range that is intended to
  2165. * be used by the MPU. Returns the virtual address upon success or NULL
  2166. * upon error.
  2167. */
  2168. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2169. {
  2170. if (!oh)
  2171. return NULL;
  2172. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2173. return NULL;
  2174. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2175. return NULL;
  2176. return oh->_mpu_rt_va;
  2177. }
  2178. /**
  2179. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2180. * @oh: struct omap_hwmod *
  2181. * @init_oh: struct omap_hwmod * (initiator)
  2182. *
  2183. * Add a sleep dependency between the initiator @init_oh and @oh.
  2184. * Intended to be called by DSP/Bridge code via platform_data for the
  2185. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2186. * code needs to add/del initiator dependencies dynamically
  2187. * before/after accessing a device. Returns the return value from
  2188. * _add_initiator_dep().
  2189. *
  2190. * XXX Keep a usecount in the clockdomain code
  2191. */
  2192. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2193. struct omap_hwmod *init_oh)
  2194. {
  2195. return _add_initiator_dep(oh, init_oh);
  2196. }
  2197. /*
  2198. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2199. * for context save/restore operations?
  2200. */
  2201. /**
  2202. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2203. * @oh: struct omap_hwmod *
  2204. * @init_oh: struct omap_hwmod * (initiator)
  2205. *
  2206. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2207. * Intended to be called by DSP/Bridge code via platform_data for the
  2208. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2209. * code needs to add/del initiator dependencies dynamically
  2210. * before/after accessing a device. Returns the return value from
  2211. * _del_initiator_dep().
  2212. *
  2213. * XXX Keep a usecount in the clockdomain code
  2214. */
  2215. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2216. struct omap_hwmod *init_oh)
  2217. {
  2218. return _del_initiator_dep(oh, init_oh);
  2219. }
  2220. /**
  2221. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2222. * @oh: struct omap_hwmod *
  2223. *
  2224. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2225. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2226. * this IP block if it has dynamic mux entries. Eventually this
  2227. * should set PRCM wakeup registers to cause the PRCM to receive
  2228. * wakeup events from the module. Does not set any wakeup routing
  2229. * registers beyond this point - if the module is to wake up any other
  2230. * module or subsystem, that must be set separately. Called by
  2231. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2232. */
  2233. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2234. {
  2235. unsigned long flags;
  2236. u32 v;
  2237. spin_lock_irqsave(&oh->_lock, flags);
  2238. if (oh->class->sysc &&
  2239. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2240. v = oh->_sysc_cache;
  2241. _enable_wakeup(oh, &v);
  2242. _write_sysconfig(v, oh);
  2243. }
  2244. _set_idle_ioring_wakeup(oh, true);
  2245. spin_unlock_irqrestore(&oh->_lock, flags);
  2246. return 0;
  2247. }
  2248. /**
  2249. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2250. * @oh: struct omap_hwmod *
  2251. *
  2252. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2253. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2254. * events for this IP block if it has dynamic mux entries. Eventually
  2255. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2256. * wakeup events from the module. Does not set any wakeup routing
  2257. * registers beyond this point - if the module is to wake up any other
  2258. * module or subsystem, that must be set separately. Called by
  2259. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2260. */
  2261. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2262. {
  2263. unsigned long flags;
  2264. u32 v;
  2265. spin_lock_irqsave(&oh->_lock, flags);
  2266. if (oh->class->sysc &&
  2267. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2268. v = oh->_sysc_cache;
  2269. _disable_wakeup(oh, &v);
  2270. _write_sysconfig(v, oh);
  2271. }
  2272. _set_idle_ioring_wakeup(oh, false);
  2273. spin_unlock_irqrestore(&oh->_lock, flags);
  2274. return 0;
  2275. }
  2276. /**
  2277. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2278. * contained in the hwmod module.
  2279. * @oh: struct omap_hwmod *
  2280. * @name: name of the reset line to lookup and assert
  2281. *
  2282. * Some IP like dsp, ipu or iva contain processor that require
  2283. * an HW reset line to be assert / deassert in order to enable fully
  2284. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2285. * yet supported on this OMAP; otherwise, passes along the return value
  2286. * from _assert_hardreset().
  2287. */
  2288. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2289. {
  2290. int ret;
  2291. unsigned long flags;
  2292. if (!oh)
  2293. return -EINVAL;
  2294. spin_lock_irqsave(&oh->_lock, flags);
  2295. ret = _assert_hardreset(oh, name);
  2296. spin_unlock_irqrestore(&oh->_lock, flags);
  2297. return ret;
  2298. }
  2299. /**
  2300. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2301. * contained in the hwmod module.
  2302. * @oh: struct omap_hwmod *
  2303. * @name: name of the reset line to look up and deassert
  2304. *
  2305. * Some IP like dsp, ipu or iva contain processor that require
  2306. * an HW reset line to be assert / deassert in order to enable fully
  2307. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2308. * yet supported on this OMAP; otherwise, passes along the return value
  2309. * from _deassert_hardreset().
  2310. */
  2311. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2312. {
  2313. int ret;
  2314. unsigned long flags;
  2315. if (!oh)
  2316. return -EINVAL;
  2317. spin_lock_irqsave(&oh->_lock, flags);
  2318. ret = _deassert_hardreset(oh, name);
  2319. spin_unlock_irqrestore(&oh->_lock, flags);
  2320. return ret;
  2321. }
  2322. /**
  2323. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2324. * contained in the hwmod module
  2325. * @oh: struct omap_hwmod *
  2326. * @name: name of the reset line to look up and read
  2327. *
  2328. * Return the current state of the hwmod @oh's reset line named @name:
  2329. * returns -EINVAL upon parameter error or if this operation
  2330. * is unsupported on the current OMAP; otherwise, passes along the return
  2331. * value from _read_hardreset().
  2332. */
  2333. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2334. {
  2335. int ret;
  2336. unsigned long flags;
  2337. if (!oh)
  2338. return -EINVAL;
  2339. spin_lock_irqsave(&oh->_lock, flags);
  2340. ret = _read_hardreset(oh, name);
  2341. spin_unlock_irqrestore(&oh->_lock, flags);
  2342. return ret;
  2343. }
  2344. /**
  2345. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2346. * @classname: struct omap_hwmod_class name to search for
  2347. * @fn: callback function pointer to call for each hwmod in class @classname
  2348. * @user: arbitrary context data to pass to the callback function
  2349. *
  2350. * For each omap_hwmod of class @classname, call @fn.
  2351. * If the callback function returns something other than
  2352. * zero, the iterator is terminated, and the callback function's return
  2353. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2354. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2355. */
  2356. int omap_hwmod_for_each_by_class(const char *classname,
  2357. int (*fn)(struct omap_hwmod *oh,
  2358. void *user),
  2359. void *user)
  2360. {
  2361. struct omap_hwmod *temp_oh;
  2362. int ret = 0;
  2363. if (!classname || !fn)
  2364. return -EINVAL;
  2365. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2366. __func__, classname);
  2367. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2368. if (!strcmp(temp_oh->class->name, classname)) {
  2369. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2370. __func__, temp_oh->name);
  2371. ret = (*fn)(temp_oh, user);
  2372. if (ret)
  2373. break;
  2374. }
  2375. }
  2376. if (ret)
  2377. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2378. __func__, ret);
  2379. return ret;
  2380. }
  2381. /**
  2382. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2383. * @oh: struct omap_hwmod *
  2384. * @state: state that _setup() should leave the hwmod in
  2385. *
  2386. * Sets the hwmod state that @oh will enter at the end of _setup()
  2387. * (called by omap_hwmod_setup_*()). See also the documentation
  2388. * for _setup_postsetup(), above. Returns 0 upon success or
  2389. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2390. * in the wrong state.
  2391. */
  2392. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2393. {
  2394. int ret;
  2395. unsigned long flags;
  2396. if (!oh)
  2397. return -EINVAL;
  2398. if (state != _HWMOD_STATE_DISABLED &&
  2399. state != _HWMOD_STATE_ENABLED &&
  2400. state != _HWMOD_STATE_IDLE)
  2401. return -EINVAL;
  2402. spin_lock_irqsave(&oh->_lock, flags);
  2403. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2404. ret = -EINVAL;
  2405. goto ohsps_unlock;
  2406. }
  2407. oh->_postsetup_state = state;
  2408. ret = 0;
  2409. ohsps_unlock:
  2410. spin_unlock_irqrestore(&oh->_lock, flags);
  2411. return ret;
  2412. }
  2413. /**
  2414. * omap_hwmod_get_context_loss_count - get lost context count
  2415. * @oh: struct omap_hwmod *
  2416. *
  2417. * Query the powerdomain of of @oh to get the context loss
  2418. * count for this device.
  2419. *
  2420. * Returns the context loss count of the powerdomain assocated with @oh
  2421. * upon success, or zero if no powerdomain exists for @oh.
  2422. */
  2423. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2424. {
  2425. struct powerdomain *pwrdm;
  2426. int ret = 0;
  2427. pwrdm = omap_hwmod_get_pwrdm(oh);
  2428. if (pwrdm)
  2429. ret = pwrdm_get_context_loss_count(pwrdm);
  2430. return ret;
  2431. }
  2432. /**
  2433. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2434. * @oh: struct omap_hwmod *
  2435. *
  2436. * Prevent the hwmod @oh from being reset during the setup process.
  2437. * Intended for use by board-*.c files on boards with devices that
  2438. * cannot tolerate being reset. Must be called before the hwmod has
  2439. * been set up. Returns 0 upon success or negative error code upon
  2440. * failure.
  2441. */
  2442. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2443. {
  2444. if (!oh)
  2445. return -EINVAL;
  2446. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2447. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2448. oh->name);
  2449. return -EINVAL;
  2450. }
  2451. oh->flags |= HWMOD_INIT_NO_RESET;
  2452. return 0;
  2453. }
  2454. /**
  2455. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2456. * @oh: struct omap_hwmod * containing hwmod mux entries
  2457. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2458. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2459. *
  2460. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2461. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2462. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2463. * this function is not called for a given pad_idx, then the ISR
  2464. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2465. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2466. * the _dynamic or wakeup_ entry: if there are other entries not
  2467. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2468. * entries are NOT COUNTED in the dynamic pad index. This function
  2469. * must be called separately for each pad that requires its interrupt
  2470. * to be re-routed this way. Returns -EINVAL if there is an argument
  2471. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2472. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2473. *
  2474. * XXX This function interface is fragile. Rather than using array
  2475. * indexes, which are subject to unpredictable change, it should be
  2476. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2477. * pad records.
  2478. */
  2479. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2480. {
  2481. int nr_irqs;
  2482. might_sleep();
  2483. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2484. pad_idx >= oh->mux->nr_pads_dynamic)
  2485. return -EINVAL;
  2486. /* Check the number of available mpu_irqs */
  2487. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2488. ;
  2489. if (irq_idx >= nr_irqs)
  2490. return -EINVAL;
  2491. if (!oh->mux->irqs) {
  2492. /* XXX What frees this? */
  2493. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2494. GFP_KERNEL);
  2495. if (!oh->mux->irqs)
  2496. return -ENOMEM;
  2497. }
  2498. oh->mux->irqs[pad_idx] = irq_idx;
  2499. return 0;
  2500. }