orion5x_wdt.c 5.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246
  1. /*
  2. * drivers/watchdog/orion5x_wdt.c
  3. *
  4. * Watchdog driver for Orion5x processors
  5. *
  6. * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/types.h>
  15. #include <linux/kernel.h>
  16. #include <linux/fs.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/watchdog.h>
  19. #include <linux/init.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/io.h>
  22. #include <linux/spinlock.h>
  23. /*
  24. * Watchdog timer block registers.
  25. */
  26. #define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
  27. #define WDT_EN 0x0010
  28. #define WDT_VAL (TIMER_VIRT_BASE + 0x0024)
  29. #define ORION5X_TCLK 166666667
  30. #define WDT_MAX_DURATION (0xffffffff / ORION5X_TCLK)
  31. #define WDT_IN_USE 0
  32. #define WDT_OK_TO_CLOSE 1
  33. static int nowayout = WATCHDOG_NOWAYOUT;
  34. static int heartbeat = WDT_MAX_DURATION; /* (seconds) */
  35. static unsigned long wdt_status;
  36. static spinlock_t wdt_lock;
  37. static void wdt_enable(void)
  38. {
  39. u32 reg;
  40. spin_lock(&wdt_lock);
  41. /* Set watchdog duration */
  42. writel(ORION5X_TCLK * heartbeat, WDT_VAL);
  43. /* Clear watchdog timer interrupt */
  44. reg = readl(BRIDGE_CAUSE);
  45. reg &= ~WDT_INT_REQ;
  46. writel(reg, BRIDGE_CAUSE);
  47. /* Enable watchdog timer */
  48. reg = readl(TIMER_CTRL);
  49. reg |= WDT_EN;
  50. writel(reg, TIMER_CTRL);
  51. /* Enable reset on watchdog */
  52. reg = readl(CPU_RESET_MASK);
  53. reg |= WDT_RESET;
  54. writel(reg, CPU_RESET_MASK);
  55. spin_unlock(&wdt_lock);
  56. }
  57. static void wdt_disable(void)
  58. {
  59. u32 reg;
  60. spin_lock(&wdt_lock);
  61. /* Disable reset on watchdog */
  62. reg = readl(CPU_RESET_MASK);
  63. reg &= ~WDT_RESET;
  64. writel(reg, CPU_RESET_MASK);
  65. /* Disable watchdog timer */
  66. reg = readl(TIMER_CTRL);
  67. reg &= ~WDT_EN;
  68. writel(reg, TIMER_CTRL);
  69. spin_unlock(&wdt_lock);
  70. }
  71. static int orion5x_wdt_get_timeleft(int *time_left)
  72. {
  73. spin_lock(&wdt_lock);
  74. *time_left = readl(WDT_VAL) / ORION5X_TCLK;
  75. spin_unlock(&wdt_lock);
  76. return 0;
  77. }
  78. static int orion5x_wdt_open(struct inode *inode, struct file *file)
  79. {
  80. if (test_and_set_bit(WDT_IN_USE, &wdt_status))
  81. return -EBUSY;
  82. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  83. wdt_enable();
  84. return nonseekable_open(inode, file);
  85. }
  86. static ssize_t orion5x_wdt_write(struct file *file, const char *data,
  87. size_t len, loff_t *ppos)
  88. {
  89. if (len) {
  90. if (!nowayout) {
  91. size_t i;
  92. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  93. for (i = 0; i != len; i++) {
  94. char c;
  95. if (get_user(c, data + i))
  96. return -EFAULT;
  97. if (c == 'V')
  98. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  99. }
  100. }
  101. wdt_enable();
  102. }
  103. return len;
  104. }
  105. static struct watchdog_info ident = {
  106. .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
  107. WDIOF_KEEPALIVEPING,
  108. .identity = "Orion5x Watchdog",
  109. };
  110. static long orion5x_wdt_ioctl(struct file *file, unsigned int cmd,
  111. unsigned long arg)
  112. {
  113. int ret = -ENOTTY;
  114. int time;
  115. switch (cmd) {
  116. case WDIOC_GETSUPPORT:
  117. ret = copy_to_user((struct watchdog_info *)arg, &ident,
  118. sizeof(ident)) ? -EFAULT : 0;
  119. break;
  120. case WDIOC_GETSTATUS:
  121. case WDIOC_GETBOOTSTATUS:
  122. ret = put_user(0, (int *)arg);
  123. break;
  124. case WDIOC_KEEPALIVE:
  125. wdt_enable();
  126. ret = 0;
  127. break;
  128. case WDIOC_SETTIMEOUT:
  129. ret = get_user(time, (int *)arg);
  130. if (ret)
  131. break;
  132. if (time <= 0 || time > WDT_MAX_DURATION) {
  133. ret = -EINVAL;
  134. break;
  135. }
  136. heartbeat = time;
  137. wdt_enable();
  138. /* Fall through */
  139. case WDIOC_GETTIMEOUT:
  140. ret = put_user(heartbeat, (int *)arg);
  141. break;
  142. case WDIOC_GETTIMELEFT:
  143. if (orion5x_wdt_get_timeleft(&time)) {
  144. ret = -EINVAL;
  145. break;
  146. }
  147. ret = put_user(time, (int *)arg);
  148. break;
  149. }
  150. return ret;
  151. }
  152. static int orion5x_wdt_release(struct inode *inode, struct file *file)
  153. {
  154. if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
  155. wdt_disable();
  156. else
  157. printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
  158. "timer will not stop\n");
  159. clear_bit(WDT_IN_USE, &wdt_status);
  160. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  161. return 0;
  162. }
  163. static const struct file_operations orion5x_wdt_fops = {
  164. .owner = THIS_MODULE,
  165. .llseek = no_llseek,
  166. .write = orion5x_wdt_write,
  167. .unlocked_ioctl = orion5x_wdt_ioctl,
  168. .open = orion5x_wdt_open,
  169. .release = orion5x_wdt_release,
  170. };
  171. static struct miscdevice orion5x_wdt_miscdev = {
  172. .minor = WATCHDOG_MINOR,
  173. .name = "watchdog",
  174. .fops = &orion5x_wdt_fops,
  175. };
  176. static int __init orion5x_wdt_init(void)
  177. {
  178. int ret;
  179. spin_lock_init(&wdt_lock);
  180. ret = misc_register(&orion5x_wdt_miscdev);
  181. if (ret == 0)
  182. printk("Orion5x Watchdog Timer: heartbeat %d sec\n",
  183. heartbeat);
  184. return ret;
  185. }
  186. static void __exit orion5x_wdt_exit(void)
  187. {
  188. misc_deregister(&orion5x_wdt_miscdev);
  189. }
  190. module_init(orion5x_wdt_init);
  191. module_exit(orion5x_wdt_exit);
  192. MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
  193. MODULE_DESCRIPTION("Orion5x Processor Watchdog");
  194. module_param(heartbeat, int, 0);
  195. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds (default is "
  196. __MODULE_STRING(WDT_MAX_DURATION) ")");
  197. module_param(nowayout, int, 0);
  198. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
  199. MODULE_LICENSE("GPL");
  200. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);