mpt2sas_base.c 118 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. static int missing_delay[2] = {-1, -1};
  72. module_param_array(missing_delay, int, NULL, 0);
  73. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  74. /* diag_buffer_enable is bitwise
  75. * bit 0 set = TRACE
  76. * bit 1 set = SNAPSHOT
  77. * bit 2 set = EXTENDED
  78. *
  79. * Either bit can be set, or both
  80. */
  81. static int diag_buffer_enable;
  82. module_param(diag_buffer_enable, int, 0);
  83. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  84. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  85. static int mpt2sas_fwfault_debug;
  86. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  87. "and halt firmware - (default=0)");
  88. static int disable_discovery = -1;
  89. module_param(disable_discovery, int, 0);
  90. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  91. /**
  92. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  93. *
  94. */
  95. static int
  96. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  97. {
  98. int ret = param_set_int(val, kp);
  99. struct MPT2SAS_ADAPTER *ioc;
  100. if (ret)
  101. return ret;
  102. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  103. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  104. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  105. return 0;
  106. }
  107. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  108. param_get_int, &mpt2sas_fwfault_debug, 0644);
  109. /**
  110. * _base_fault_reset_work - workq handling ioc fault conditions
  111. * @work: input argument, used to derive ioc
  112. * Context: sleep.
  113. *
  114. * Return nothing.
  115. */
  116. static void
  117. _base_fault_reset_work(struct work_struct *work)
  118. {
  119. struct MPT2SAS_ADAPTER *ioc =
  120. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  121. unsigned long flags;
  122. u32 doorbell;
  123. int rc;
  124. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  125. if (ioc->shost_recovery)
  126. goto rearm_timer;
  127. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  128. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  129. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  130. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  131. FORCE_BIG_HAMMER);
  132. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  133. __func__, (rc == 0) ? "success" : "failed");
  134. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  135. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  136. mpt2sas_base_fault_info(ioc, doorbell &
  137. MPI2_DOORBELL_DATA_MASK);
  138. }
  139. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  140. rearm_timer:
  141. if (ioc->fault_reset_work_q)
  142. queue_delayed_work(ioc->fault_reset_work_q,
  143. &ioc->fault_reset_work,
  144. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  145. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  146. }
  147. /**
  148. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  149. * @ioc: per adapter object
  150. * Context: sleep.
  151. *
  152. * Return nothing.
  153. */
  154. void
  155. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  156. {
  157. unsigned long flags;
  158. if (ioc->fault_reset_work_q)
  159. return;
  160. /* initialize fault polling */
  161. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  162. snprintf(ioc->fault_reset_work_q_name,
  163. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  164. ioc->fault_reset_work_q =
  165. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  166. if (!ioc->fault_reset_work_q) {
  167. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  168. ioc->name, __func__, __LINE__);
  169. return;
  170. }
  171. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  172. if (ioc->fault_reset_work_q)
  173. queue_delayed_work(ioc->fault_reset_work_q,
  174. &ioc->fault_reset_work,
  175. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  176. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  177. }
  178. /**
  179. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  180. * @ioc: per adapter object
  181. * Context: sleep.
  182. *
  183. * Return nothing.
  184. */
  185. void
  186. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  187. {
  188. unsigned long flags;
  189. struct workqueue_struct *wq;
  190. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  191. wq = ioc->fault_reset_work_q;
  192. ioc->fault_reset_work_q = NULL;
  193. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  194. if (wq) {
  195. if (!cancel_delayed_work(&ioc->fault_reset_work))
  196. flush_workqueue(wq);
  197. destroy_workqueue(wq);
  198. }
  199. }
  200. /**
  201. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  202. * @ioc: per adapter object
  203. * @fault_code: fault code
  204. *
  205. * Return nothing.
  206. */
  207. void
  208. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  209. {
  210. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  211. ioc->name, fault_code);
  212. }
  213. /**
  214. * mpt2sas_halt_firmware - halt's mpt controller firmware
  215. * @ioc: per adapter object
  216. *
  217. * For debugging timeout related issues. Writing 0xCOFFEE00
  218. * to the doorbell register will halt controller firmware. With
  219. * the purpose to stop both driver and firmware, the enduser can
  220. * obtain a ring buffer from controller UART.
  221. */
  222. void
  223. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  224. {
  225. u32 doorbell;
  226. if (!ioc->fwfault_debug)
  227. return;
  228. dump_stack();
  229. doorbell = readl(&ioc->chip->Doorbell);
  230. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  231. mpt2sas_base_fault_info(ioc , doorbell);
  232. else {
  233. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  234. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  235. "timeout\n", ioc->name);
  236. }
  237. panic("panic in %s\n", __func__);
  238. }
  239. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  240. /**
  241. * _base_sas_ioc_info - verbose translation of the ioc status
  242. * @ioc: per adapter object
  243. * @mpi_reply: reply mf payload returned from firmware
  244. * @request_hdr: request mf
  245. *
  246. * Return nothing.
  247. */
  248. static void
  249. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  250. MPI2RequestHeader_t *request_hdr)
  251. {
  252. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  253. MPI2_IOCSTATUS_MASK;
  254. char *desc = NULL;
  255. u16 frame_sz;
  256. char *func_str = NULL;
  257. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  258. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  259. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  260. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  261. return;
  262. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  263. return;
  264. switch (ioc_status) {
  265. /****************************************************************************
  266. * Common IOCStatus values for all replies
  267. ****************************************************************************/
  268. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  269. desc = "invalid function";
  270. break;
  271. case MPI2_IOCSTATUS_BUSY:
  272. desc = "busy";
  273. break;
  274. case MPI2_IOCSTATUS_INVALID_SGL:
  275. desc = "invalid sgl";
  276. break;
  277. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  278. desc = "internal error";
  279. break;
  280. case MPI2_IOCSTATUS_INVALID_VPID:
  281. desc = "invalid vpid";
  282. break;
  283. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  284. desc = "insufficient resources";
  285. break;
  286. case MPI2_IOCSTATUS_INVALID_FIELD:
  287. desc = "invalid field";
  288. break;
  289. case MPI2_IOCSTATUS_INVALID_STATE:
  290. desc = "invalid state";
  291. break;
  292. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  293. desc = "op state not supported";
  294. break;
  295. /****************************************************************************
  296. * Config IOCStatus values
  297. ****************************************************************************/
  298. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  299. desc = "config invalid action";
  300. break;
  301. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  302. desc = "config invalid type";
  303. break;
  304. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  305. desc = "config invalid page";
  306. break;
  307. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  308. desc = "config invalid data";
  309. break;
  310. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  311. desc = "config no defaults";
  312. break;
  313. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  314. desc = "config cant commit";
  315. break;
  316. /****************************************************************************
  317. * SCSI IO Reply
  318. ****************************************************************************/
  319. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  320. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  321. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  322. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  323. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  324. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  325. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  326. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  327. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  328. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  329. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  330. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  331. break;
  332. /****************************************************************************
  333. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  334. ****************************************************************************/
  335. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  336. desc = "eedp guard error";
  337. break;
  338. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  339. desc = "eedp ref tag error";
  340. break;
  341. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  342. desc = "eedp app tag error";
  343. break;
  344. /****************************************************************************
  345. * SCSI Target values
  346. ****************************************************************************/
  347. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  348. desc = "target invalid io index";
  349. break;
  350. case MPI2_IOCSTATUS_TARGET_ABORTED:
  351. desc = "target aborted";
  352. break;
  353. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  354. desc = "target no conn retryable";
  355. break;
  356. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  357. desc = "target no connection";
  358. break;
  359. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  360. desc = "target xfer count mismatch";
  361. break;
  362. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  363. desc = "target data offset error";
  364. break;
  365. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  366. desc = "target too much write data";
  367. break;
  368. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  369. desc = "target iu too short";
  370. break;
  371. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  372. desc = "target ack nak timeout";
  373. break;
  374. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  375. desc = "target nak received";
  376. break;
  377. /****************************************************************************
  378. * Serial Attached SCSI values
  379. ****************************************************************************/
  380. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  381. desc = "smp request failed";
  382. break;
  383. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  384. desc = "smp data overrun";
  385. break;
  386. /****************************************************************************
  387. * Diagnostic Buffer Post / Diagnostic Release values
  388. ****************************************************************************/
  389. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  390. desc = "diagnostic released";
  391. break;
  392. default:
  393. break;
  394. }
  395. if (!desc)
  396. return;
  397. switch (request_hdr->Function) {
  398. case MPI2_FUNCTION_CONFIG:
  399. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  400. func_str = "config_page";
  401. break;
  402. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  403. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  404. func_str = "task_mgmt";
  405. break;
  406. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  407. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  408. func_str = "sas_iounit_ctl";
  409. break;
  410. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  411. frame_sz = sizeof(Mpi2SepRequest_t);
  412. func_str = "enclosure";
  413. break;
  414. case MPI2_FUNCTION_IOC_INIT:
  415. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  416. func_str = "ioc_init";
  417. break;
  418. case MPI2_FUNCTION_PORT_ENABLE:
  419. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  420. func_str = "port_enable";
  421. break;
  422. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  423. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  424. func_str = "smp_passthru";
  425. break;
  426. default:
  427. frame_sz = 32;
  428. func_str = "unknown";
  429. break;
  430. }
  431. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  432. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  433. _debug_dump_mf(request_hdr, frame_sz/4);
  434. }
  435. /**
  436. * _base_display_event_data - verbose translation of firmware asyn events
  437. * @ioc: per adapter object
  438. * @mpi_reply: reply mf payload returned from firmware
  439. *
  440. * Return nothing.
  441. */
  442. static void
  443. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  444. Mpi2EventNotificationReply_t *mpi_reply)
  445. {
  446. char *desc = NULL;
  447. u16 event;
  448. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  449. return;
  450. event = le16_to_cpu(mpi_reply->Event);
  451. switch (event) {
  452. case MPI2_EVENT_LOG_DATA:
  453. desc = "Log Data";
  454. break;
  455. case MPI2_EVENT_STATE_CHANGE:
  456. desc = "Status Change";
  457. break;
  458. case MPI2_EVENT_HARD_RESET_RECEIVED:
  459. desc = "Hard Reset Received";
  460. break;
  461. case MPI2_EVENT_EVENT_CHANGE:
  462. desc = "Event Change";
  463. break;
  464. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  465. desc = "Device Status Change";
  466. break;
  467. case MPI2_EVENT_IR_OPERATION_STATUS:
  468. if (!ioc->hide_ir_msg)
  469. desc = "IR Operation Status";
  470. break;
  471. case MPI2_EVENT_SAS_DISCOVERY:
  472. {
  473. Mpi2EventDataSasDiscovery_t *event_data =
  474. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  475. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  476. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  477. "start" : "stop");
  478. if (event_data->DiscoveryStatus)
  479. printk("discovery_status(0x%08x)",
  480. le32_to_cpu(event_data->DiscoveryStatus));
  481. printk("\n");
  482. return;
  483. }
  484. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  485. desc = "SAS Broadcast Primitive";
  486. break;
  487. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  488. desc = "SAS Init Device Status Change";
  489. break;
  490. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  491. desc = "SAS Init Table Overflow";
  492. break;
  493. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  494. desc = "SAS Topology Change List";
  495. break;
  496. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  497. desc = "SAS Enclosure Device Status Change";
  498. break;
  499. case MPI2_EVENT_IR_VOLUME:
  500. if (!ioc->hide_ir_msg)
  501. desc = "IR Volume";
  502. break;
  503. case MPI2_EVENT_IR_PHYSICAL_DISK:
  504. if (!ioc->hide_ir_msg)
  505. desc = "IR Physical Disk";
  506. break;
  507. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  508. if (!ioc->hide_ir_msg)
  509. desc = "IR Configuration Change List";
  510. break;
  511. case MPI2_EVENT_LOG_ENTRY_ADDED:
  512. if (!ioc->hide_ir_msg)
  513. desc = "Log Entry Added";
  514. break;
  515. }
  516. if (!desc)
  517. return;
  518. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  519. }
  520. #endif
  521. /**
  522. * _base_sas_log_info - verbose translation of firmware log info
  523. * @ioc: per adapter object
  524. * @log_info: log info
  525. *
  526. * Return nothing.
  527. */
  528. static void
  529. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  530. {
  531. union loginfo_type {
  532. u32 loginfo;
  533. struct {
  534. u32 subcode:16;
  535. u32 code:8;
  536. u32 originator:4;
  537. u32 bus_type:4;
  538. } dw;
  539. };
  540. union loginfo_type sas_loginfo;
  541. char *originator_str = NULL;
  542. sas_loginfo.loginfo = log_info;
  543. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  544. return;
  545. /* each nexus loss loginfo */
  546. if (log_info == 0x31170000)
  547. return;
  548. /* eat the loginfos associated with task aborts */
  549. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  550. 0x31140000 || log_info == 0x31130000))
  551. return;
  552. switch (sas_loginfo.dw.originator) {
  553. case 0:
  554. originator_str = "IOP";
  555. break;
  556. case 1:
  557. originator_str = "PL";
  558. break;
  559. case 2:
  560. if (!ioc->hide_ir_msg)
  561. originator_str = "IR";
  562. else
  563. originator_str = "WarpDrive";
  564. break;
  565. }
  566. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  567. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  568. originator_str, sas_loginfo.dw.code,
  569. sas_loginfo.dw.subcode);
  570. }
  571. /**
  572. * _base_display_reply_info -
  573. * @ioc: per adapter object
  574. * @smid: system request message index
  575. * @msix_index: MSIX table index supplied by the OS
  576. * @reply: reply message frame(lower 32bit addr)
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  582. u32 reply)
  583. {
  584. MPI2DefaultReply_t *mpi_reply;
  585. u16 ioc_status;
  586. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  587. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  588. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  589. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  590. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  591. _base_sas_ioc_info(ioc , mpi_reply,
  592. mpt2sas_base_get_msg_frame(ioc, smid));
  593. }
  594. #endif
  595. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  596. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  597. }
  598. /**
  599. * mpt2sas_base_done - base internal command completion routine
  600. * @ioc: per adapter object
  601. * @smid: system request message index
  602. * @msix_index: MSIX table index supplied by the OS
  603. * @reply: reply message frame(lower 32bit addr)
  604. *
  605. * Return 1 meaning mf should be freed from _base_interrupt
  606. * 0 means the mf is freed from this function.
  607. */
  608. u8
  609. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  610. u32 reply)
  611. {
  612. MPI2DefaultReply_t *mpi_reply;
  613. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  614. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  615. return 1;
  616. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  617. return 1;
  618. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  619. if (mpi_reply) {
  620. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  621. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  622. }
  623. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  624. complete(&ioc->base_cmds.done);
  625. return 1;
  626. }
  627. /**
  628. * _base_async_event - main callback handler for firmware asyn events
  629. * @ioc: per adapter object
  630. * @msix_index: MSIX table index supplied by the OS
  631. * @reply: reply message frame(lower 32bit addr)
  632. *
  633. * Return 1 meaning mf should be freed from _base_interrupt
  634. * 0 means the mf is freed from this function.
  635. */
  636. static u8
  637. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  638. {
  639. Mpi2EventNotificationReply_t *mpi_reply;
  640. Mpi2EventAckRequest_t *ack_request;
  641. u16 smid;
  642. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  643. if (!mpi_reply)
  644. return 1;
  645. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  646. return 1;
  647. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  648. _base_display_event_data(ioc, mpi_reply);
  649. #endif
  650. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  651. goto out;
  652. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  653. if (!smid) {
  654. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  655. ioc->name, __func__);
  656. goto out;
  657. }
  658. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  659. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  660. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  661. ack_request->Event = mpi_reply->Event;
  662. ack_request->EventContext = mpi_reply->EventContext;
  663. ack_request->VF_ID = 0; /* TODO */
  664. ack_request->VP_ID = 0;
  665. mpt2sas_base_put_smid_default(ioc, smid);
  666. out:
  667. /* scsih callback handler */
  668. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  669. /* ctl callback handler */
  670. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  671. return 1;
  672. }
  673. /**
  674. * _base_get_cb_idx - obtain the callback index
  675. * @ioc: per adapter object
  676. * @smid: system request message index
  677. *
  678. * Return callback index.
  679. */
  680. static u8
  681. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  682. {
  683. int i;
  684. u8 cb_idx;
  685. if (smid < ioc->hi_priority_smid) {
  686. i = smid - 1;
  687. cb_idx = ioc->scsi_lookup[i].cb_idx;
  688. } else if (smid < ioc->internal_smid) {
  689. i = smid - ioc->hi_priority_smid;
  690. cb_idx = ioc->hpr_lookup[i].cb_idx;
  691. } else if (smid <= ioc->hba_queue_depth) {
  692. i = smid - ioc->internal_smid;
  693. cb_idx = ioc->internal_lookup[i].cb_idx;
  694. } else
  695. cb_idx = 0xFF;
  696. return cb_idx;
  697. }
  698. /**
  699. * _base_mask_interrupts - disable interrupts
  700. * @ioc: per adapter object
  701. *
  702. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  703. *
  704. * Return nothing.
  705. */
  706. static void
  707. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  708. {
  709. u32 him_register;
  710. ioc->mask_interrupts = 1;
  711. him_register = readl(&ioc->chip->HostInterruptMask);
  712. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  713. writel(him_register, &ioc->chip->HostInterruptMask);
  714. readl(&ioc->chip->HostInterruptMask);
  715. }
  716. /**
  717. * _base_unmask_interrupts - enable interrupts
  718. * @ioc: per adapter object
  719. *
  720. * Enabling only Reply Interrupts
  721. *
  722. * Return nothing.
  723. */
  724. static void
  725. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  726. {
  727. u32 him_register;
  728. him_register = readl(&ioc->chip->HostInterruptMask);
  729. him_register &= ~MPI2_HIM_RIM;
  730. writel(him_register, &ioc->chip->HostInterruptMask);
  731. ioc->mask_interrupts = 0;
  732. }
  733. union reply_descriptor {
  734. u64 word;
  735. struct {
  736. u32 low;
  737. u32 high;
  738. } u;
  739. };
  740. /**
  741. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  742. * @irq: irq number (not used)
  743. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  744. * @r: pt_regs pointer (not used)
  745. *
  746. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  747. */
  748. static irqreturn_t
  749. _base_interrupt(int irq, void *bus_id)
  750. {
  751. union reply_descriptor rd;
  752. u32 completed_cmds;
  753. u8 request_desript_type;
  754. u16 smid;
  755. u8 cb_idx;
  756. u32 reply;
  757. u8 msix_index;
  758. struct MPT2SAS_ADAPTER *ioc = bus_id;
  759. Mpi2ReplyDescriptorsUnion_t *rpf;
  760. u8 rc;
  761. if (ioc->mask_interrupts)
  762. return IRQ_NONE;
  763. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  764. request_desript_type = rpf->Default.ReplyFlags
  765. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  766. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  767. return IRQ_NONE;
  768. completed_cmds = 0;
  769. cb_idx = 0xFF;
  770. do {
  771. rd.word = le64_to_cpu(rpf->Words);
  772. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  773. goto out;
  774. reply = 0;
  775. cb_idx = 0xFF;
  776. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  777. msix_index = rpf->Default.MSIxIndex;
  778. if (request_desript_type ==
  779. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  780. reply = le32_to_cpu
  781. (rpf->AddressReply.ReplyFrameAddress);
  782. if (reply > ioc->reply_dma_max_address ||
  783. reply < ioc->reply_dma_min_address)
  784. reply = 0;
  785. } else if (request_desript_type ==
  786. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  787. goto next;
  788. else if (request_desript_type ==
  789. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  790. goto next;
  791. if (smid)
  792. cb_idx = _base_get_cb_idx(ioc, smid);
  793. if (smid && cb_idx != 0xFF) {
  794. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  795. reply);
  796. if (reply)
  797. _base_display_reply_info(ioc, smid, msix_index,
  798. reply);
  799. if (rc)
  800. mpt2sas_base_free_smid(ioc, smid);
  801. }
  802. if (!smid)
  803. _base_async_event(ioc, msix_index, reply);
  804. /* reply free queue handling */
  805. if (reply) {
  806. ioc->reply_free_host_index =
  807. (ioc->reply_free_host_index ==
  808. (ioc->reply_free_queue_depth - 1)) ?
  809. 0 : ioc->reply_free_host_index + 1;
  810. ioc->reply_free[ioc->reply_free_host_index] =
  811. cpu_to_le32(reply);
  812. wmb();
  813. writel(ioc->reply_free_host_index,
  814. &ioc->chip->ReplyFreeHostIndex);
  815. }
  816. next:
  817. rpf->Words = cpu_to_le64(ULLONG_MAX);
  818. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  819. (ioc->reply_post_queue_depth - 1)) ? 0 :
  820. ioc->reply_post_host_index + 1;
  821. request_desript_type =
  822. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  823. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  824. completed_cmds++;
  825. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  826. goto out;
  827. if (!ioc->reply_post_host_index)
  828. rpf = ioc->reply_post_free;
  829. else
  830. rpf++;
  831. } while (1);
  832. out:
  833. if (!completed_cmds)
  834. return IRQ_NONE;
  835. wmb();
  836. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  837. return IRQ_HANDLED;
  838. }
  839. /**
  840. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  841. * @cb_idx: callback index
  842. *
  843. * Return nothing.
  844. */
  845. void
  846. mpt2sas_base_release_callback_handler(u8 cb_idx)
  847. {
  848. mpt_callbacks[cb_idx] = NULL;
  849. }
  850. /**
  851. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  852. * @cb_func: callback function
  853. *
  854. * Returns cb_func.
  855. */
  856. u8
  857. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  858. {
  859. u8 cb_idx;
  860. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  861. if (mpt_callbacks[cb_idx] == NULL)
  862. break;
  863. mpt_callbacks[cb_idx] = cb_func;
  864. return cb_idx;
  865. }
  866. /**
  867. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  868. *
  869. * Return nothing.
  870. */
  871. void
  872. mpt2sas_base_initialize_callback_handler(void)
  873. {
  874. u8 cb_idx;
  875. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  876. mpt2sas_base_release_callback_handler(cb_idx);
  877. }
  878. /**
  879. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  880. * @ioc: per adapter object
  881. * @paddr: virtual address for SGE
  882. *
  883. * Create a zero length scatter gather entry to insure the IOCs hardware has
  884. * something to use if the target device goes brain dead and tries
  885. * to send data even when none is asked for.
  886. *
  887. * Return nothing.
  888. */
  889. void
  890. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  891. {
  892. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  893. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  894. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  895. MPI2_SGE_FLAGS_SHIFT);
  896. ioc->base_add_sg_single(paddr, flags_length, -1);
  897. }
  898. /**
  899. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  900. * @paddr: virtual address for SGE
  901. * @flags_length: SGE flags and data transfer length
  902. * @dma_addr: Physical address
  903. *
  904. * Return nothing.
  905. */
  906. static void
  907. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  908. {
  909. Mpi2SGESimple32_t *sgel = paddr;
  910. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  911. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  912. sgel->FlagsLength = cpu_to_le32(flags_length);
  913. sgel->Address = cpu_to_le32(dma_addr);
  914. }
  915. /**
  916. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  917. * @paddr: virtual address for SGE
  918. * @flags_length: SGE flags and data transfer length
  919. * @dma_addr: Physical address
  920. *
  921. * Return nothing.
  922. */
  923. static void
  924. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  925. {
  926. Mpi2SGESimple64_t *sgel = paddr;
  927. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  928. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  929. sgel->FlagsLength = cpu_to_le32(flags_length);
  930. sgel->Address = cpu_to_le64(dma_addr);
  931. }
  932. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  933. /**
  934. * _base_config_dma_addressing - set dma addressing
  935. * @ioc: per adapter object
  936. * @pdev: PCI device struct
  937. *
  938. * Returns 0 for success, non-zero for failure.
  939. */
  940. static int
  941. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  942. {
  943. struct sysinfo s;
  944. char *desc = NULL;
  945. if (sizeof(dma_addr_t) > 4) {
  946. const uint64_t required_mask =
  947. dma_get_required_mask(&pdev->dev);
  948. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  949. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  950. DMA_BIT_MASK(64))) {
  951. ioc->base_add_sg_single = &_base_add_sg_single_64;
  952. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  953. desc = "64";
  954. goto out;
  955. }
  956. }
  957. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  958. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  959. ioc->base_add_sg_single = &_base_add_sg_single_32;
  960. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  961. desc = "32";
  962. } else
  963. return -ENODEV;
  964. out:
  965. si_meminfo(&s);
  966. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  967. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  968. return 0;
  969. }
  970. /**
  971. * _base_save_msix_table - backup msix vector table
  972. * @ioc: per adapter object
  973. *
  974. * This address an errata where diag reset clears out the table
  975. */
  976. static void
  977. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  978. {
  979. int i;
  980. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  981. return;
  982. for (i = 0; i < ioc->msix_vector_count; i++)
  983. ioc->msix_table_backup[i] = ioc->msix_table[i];
  984. }
  985. /**
  986. * _base_restore_msix_table - this restores the msix vector table
  987. * @ioc: per adapter object
  988. *
  989. */
  990. static void
  991. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  992. {
  993. int i;
  994. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  995. return;
  996. for (i = 0; i < ioc->msix_vector_count; i++)
  997. ioc->msix_table[i] = ioc->msix_table_backup[i];
  998. }
  999. /**
  1000. * _base_check_enable_msix - checks MSIX capabable.
  1001. * @ioc: per adapter object
  1002. *
  1003. * Check to see if card is capable of MSIX, and set number
  1004. * of available msix vectors
  1005. */
  1006. static int
  1007. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1008. {
  1009. int base;
  1010. u16 message_control;
  1011. u32 msix_table_offset;
  1012. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1013. if (!base) {
  1014. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1015. "supported\n", ioc->name));
  1016. return -EINVAL;
  1017. }
  1018. /* get msix vector count */
  1019. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1020. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1021. /* get msix table */
  1022. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1023. msix_table_offset &= 0xFFFFFFF8;
  1024. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1025. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1026. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1027. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1028. return 0;
  1029. }
  1030. /**
  1031. * _base_disable_msix - disables msix
  1032. * @ioc: per adapter object
  1033. *
  1034. */
  1035. static void
  1036. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1037. {
  1038. if (ioc->msix_enable) {
  1039. pci_disable_msix(ioc->pdev);
  1040. kfree(ioc->msix_table_backup);
  1041. ioc->msix_table_backup = NULL;
  1042. ioc->msix_enable = 0;
  1043. }
  1044. }
  1045. /**
  1046. * _base_enable_msix - enables msix, failback to io_apic
  1047. * @ioc: per adapter object
  1048. *
  1049. */
  1050. static int
  1051. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1052. {
  1053. struct msix_entry entries;
  1054. int r;
  1055. u8 try_msix = 0;
  1056. if (msix_disable == -1 || msix_disable == 0)
  1057. try_msix = 1;
  1058. if (!try_msix)
  1059. goto try_ioapic;
  1060. if (_base_check_enable_msix(ioc) != 0)
  1061. goto try_ioapic;
  1062. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1063. sizeof(u32), GFP_KERNEL);
  1064. if (!ioc->msix_table_backup) {
  1065. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1066. "msix_table_backup failed!!!\n", ioc->name));
  1067. goto try_ioapic;
  1068. }
  1069. memset(&entries, 0, sizeof(struct msix_entry));
  1070. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1071. if (r) {
  1072. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1073. "failed (r=%d) !!!\n", ioc->name, r));
  1074. goto try_ioapic;
  1075. }
  1076. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1077. ioc->name, ioc);
  1078. if (r) {
  1079. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1080. "interrupt %d !!!\n", ioc->name, entries.vector));
  1081. pci_disable_msix(ioc->pdev);
  1082. goto try_ioapic;
  1083. }
  1084. ioc->pci_irq = entries.vector;
  1085. ioc->msix_enable = 1;
  1086. return 0;
  1087. /* failback to io_apic interrupt routing */
  1088. try_ioapic:
  1089. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1090. ioc->name, ioc);
  1091. if (r) {
  1092. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1093. ioc->name, ioc->pdev->irq);
  1094. r = -EBUSY;
  1095. goto out_fail;
  1096. }
  1097. ioc->pci_irq = ioc->pdev->irq;
  1098. return 0;
  1099. out_fail:
  1100. return r;
  1101. }
  1102. /**
  1103. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1104. * @ioc: per adapter object
  1105. *
  1106. * Returns 0 for success, non-zero for failure.
  1107. */
  1108. int
  1109. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1110. {
  1111. struct pci_dev *pdev = ioc->pdev;
  1112. u32 memap_sz;
  1113. u32 pio_sz;
  1114. int i, r = 0;
  1115. u64 pio_chip = 0;
  1116. u64 chip_phys = 0;
  1117. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1118. ioc->name, __func__));
  1119. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1120. if (pci_enable_device_mem(pdev)) {
  1121. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1122. "failed\n", ioc->name);
  1123. return -ENODEV;
  1124. }
  1125. if (pci_request_selected_regions(pdev, ioc->bars,
  1126. MPT2SAS_DRIVER_NAME)) {
  1127. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1128. "failed\n", ioc->name);
  1129. r = -ENODEV;
  1130. goto out_fail;
  1131. }
  1132. /* AER (Advanced Error Reporting) hooks */
  1133. pci_enable_pcie_error_reporting(pdev);
  1134. pci_set_master(pdev);
  1135. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1136. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1137. ioc->name, pci_name(pdev));
  1138. r = -ENODEV;
  1139. goto out_fail;
  1140. }
  1141. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1142. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1143. if (pio_sz)
  1144. continue;
  1145. pio_chip = (u64)pci_resource_start(pdev, i);
  1146. pio_sz = pci_resource_len(pdev, i);
  1147. } else {
  1148. if (memap_sz)
  1149. continue;
  1150. /* verify memory resource is valid before using */
  1151. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1152. ioc->chip_phys = pci_resource_start(pdev, i);
  1153. chip_phys = (u64)ioc->chip_phys;
  1154. memap_sz = pci_resource_len(pdev, i);
  1155. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1156. if (ioc->chip == NULL) {
  1157. printk(MPT2SAS_ERR_FMT "unable to map "
  1158. "adapter memory!\n", ioc->name);
  1159. r = -EINVAL;
  1160. goto out_fail;
  1161. }
  1162. }
  1163. }
  1164. }
  1165. _base_mask_interrupts(ioc);
  1166. r = _base_enable_msix(ioc);
  1167. if (r)
  1168. goto out_fail;
  1169. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1170. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1171. "IO-APIC enabled"), ioc->pci_irq);
  1172. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1173. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1174. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1175. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1176. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1177. pci_save_state(pdev);
  1178. return 0;
  1179. out_fail:
  1180. if (ioc->chip_phys)
  1181. iounmap(ioc->chip);
  1182. ioc->chip_phys = 0;
  1183. ioc->pci_irq = -1;
  1184. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1185. pci_disable_pcie_error_reporting(pdev);
  1186. pci_disable_device(pdev);
  1187. return r;
  1188. }
  1189. /**
  1190. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1191. * @ioc: per adapter object
  1192. * @smid: system request message index(smid zero is invalid)
  1193. *
  1194. * Returns virt pointer to message frame.
  1195. */
  1196. void *
  1197. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1198. {
  1199. return (void *)(ioc->request + (smid * ioc->request_sz));
  1200. }
  1201. /**
  1202. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1203. * @ioc: per adapter object
  1204. * @smid: system request message index
  1205. *
  1206. * Returns virt pointer to sense buffer.
  1207. */
  1208. void *
  1209. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1210. {
  1211. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1212. }
  1213. /**
  1214. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1215. * @ioc: per adapter object
  1216. * @smid: system request message index
  1217. *
  1218. * Returns phys pointer to the low 32bit address of the sense buffer.
  1219. */
  1220. __le32
  1221. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1222. {
  1223. return cpu_to_le32(ioc->sense_dma +
  1224. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1225. }
  1226. /**
  1227. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1228. * @ioc: per adapter object
  1229. * @phys_addr: lower 32 physical addr of the reply
  1230. *
  1231. * Converts 32bit lower physical addr into a virt address.
  1232. */
  1233. void *
  1234. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1235. {
  1236. if (!phys_addr)
  1237. return NULL;
  1238. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1239. }
  1240. /**
  1241. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1242. * @ioc: per adapter object
  1243. * @cb_idx: callback index
  1244. *
  1245. * Returns smid (zero is invalid)
  1246. */
  1247. u16
  1248. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1249. {
  1250. unsigned long flags;
  1251. struct request_tracker *request;
  1252. u16 smid;
  1253. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1254. if (list_empty(&ioc->internal_free_list)) {
  1255. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1256. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1257. ioc->name, __func__);
  1258. return 0;
  1259. }
  1260. request = list_entry(ioc->internal_free_list.next,
  1261. struct request_tracker, tracker_list);
  1262. request->cb_idx = cb_idx;
  1263. smid = request->smid;
  1264. list_del(&request->tracker_list);
  1265. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1266. return smid;
  1267. }
  1268. /**
  1269. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1270. * @ioc: per adapter object
  1271. * @cb_idx: callback index
  1272. * @scmd: pointer to scsi command object
  1273. *
  1274. * Returns smid (zero is invalid)
  1275. */
  1276. u16
  1277. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1278. struct scsi_cmnd *scmd)
  1279. {
  1280. unsigned long flags;
  1281. struct scsiio_tracker *request;
  1282. u16 smid;
  1283. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1284. if (list_empty(&ioc->free_list)) {
  1285. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1286. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1287. ioc->name, __func__);
  1288. return 0;
  1289. }
  1290. request = list_entry(ioc->free_list.next,
  1291. struct scsiio_tracker, tracker_list);
  1292. request->scmd = scmd;
  1293. request->cb_idx = cb_idx;
  1294. smid = request->smid;
  1295. list_del(&request->tracker_list);
  1296. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1297. return smid;
  1298. }
  1299. /**
  1300. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1301. * @ioc: per adapter object
  1302. * @cb_idx: callback index
  1303. *
  1304. * Returns smid (zero is invalid)
  1305. */
  1306. u16
  1307. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1308. {
  1309. unsigned long flags;
  1310. struct request_tracker *request;
  1311. u16 smid;
  1312. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1313. if (list_empty(&ioc->hpr_free_list)) {
  1314. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1315. return 0;
  1316. }
  1317. request = list_entry(ioc->hpr_free_list.next,
  1318. struct request_tracker, tracker_list);
  1319. request->cb_idx = cb_idx;
  1320. smid = request->smid;
  1321. list_del(&request->tracker_list);
  1322. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1323. return smid;
  1324. }
  1325. /**
  1326. * mpt2sas_base_free_smid - put smid back on free_list
  1327. * @ioc: per adapter object
  1328. * @smid: system request message index
  1329. *
  1330. * Return nothing.
  1331. */
  1332. void
  1333. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1334. {
  1335. unsigned long flags;
  1336. int i;
  1337. struct chain_tracker *chain_req, *next;
  1338. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1339. if (smid < ioc->hi_priority_smid) {
  1340. /* scsiio queue */
  1341. i = smid - 1;
  1342. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1343. list_for_each_entry_safe(chain_req, next,
  1344. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1345. list_del_init(&chain_req->tracker_list);
  1346. list_add_tail(&chain_req->tracker_list,
  1347. &ioc->free_chain_list);
  1348. }
  1349. }
  1350. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1351. ioc->scsi_lookup[i].scmd = NULL;
  1352. ioc->scsi_lookup[i].direct_io = 0;
  1353. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1354. &ioc->free_list);
  1355. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1356. /*
  1357. * See _wait_for_commands_to_complete() call with regards
  1358. * to this code.
  1359. */
  1360. if (ioc->shost_recovery && ioc->pending_io_count) {
  1361. if (ioc->pending_io_count == 1)
  1362. wake_up(&ioc->reset_wq);
  1363. ioc->pending_io_count--;
  1364. }
  1365. return;
  1366. } else if (smid < ioc->internal_smid) {
  1367. /* hi-priority */
  1368. i = smid - ioc->hi_priority_smid;
  1369. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1370. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1371. &ioc->hpr_free_list);
  1372. } else if (smid <= ioc->hba_queue_depth) {
  1373. /* internal queue */
  1374. i = smid - ioc->internal_smid;
  1375. ioc->internal_lookup[i].cb_idx = 0xFF;
  1376. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1377. &ioc->internal_free_list);
  1378. }
  1379. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1380. }
  1381. /**
  1382. * _base_writeq - 64 bit write to MMIO
  1383. * @ioc: per adapter object
  1384. * @b: data payload
  1385. * @addr: address in MMIO space
  1386. * @writeq_lock: spin lock
  1387. *
  1388. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1389. * care of 32 bit environment where its not quarenteed to send the entire word
  1390. * in one transfer.
  1391. */
  1392. #ifndef writeq
  1393. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1394. spinlock_t *writeq_lock)
  1395. {
  1396. unsigned long flags;
  1397. __u64 data_out = cpu_to_le64(b);
  1398. spin_lock_irqsave(writeq_lock, flags);
  1399. writel((u32)(data_out), addr);
  1400. writel((u32)(data_out >> 32), (addr + 4));
  1401. spin_unlock_irqrestore(writeq_lock, flags);
  1402. }
  1403. #else
  1404. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1405. spinlock_t *writeq_lock)
  1406. {
  1407. writeq(cpu_to_le64(b), addr);
  1408. }
  1409. #endif
  1410. /**
  1411. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1412. * @ioc: per adapter object
  1413. * @smid: system request message index
  1414. * @handle: device handle
  1415. *
  1416. * Return nothing.
  1417. */
  1418. void
  1419. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1420. {
  1421. Mpi2RequestDescriptorUnion_t descriptor;
  1422. u64 *request = (u64 *)&descriptor;
  1423. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1424. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1425. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1426. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1427. descriptor.SCSIIO.LMID = 0;
  1428. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1429. &ioc->scsi_lookup_lock);
  1430. }
  1431. /**
  1432. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1433. * @ioc: per adapter object
  1434. * @smid: system request message index
  1435. *
  1436. * Return nothing.
  1437. */
  1438. void
  1439. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1440. {
  1441. Mpi2RequestDescriptorUnion_t descriptor;
  1442. u64 *request = (u64 *)&descriptor;
  1443. descriptor.HighPriority.RequestFlags =
  1444. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1445. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1446. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1447. descriptor.HighPriority.LMID = 0;
  1448. descriptor.HighPriority.Reserved1 = 0;
  1449. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1450. &ioc->scsi_lookup_lock);
  1451. }
  1452. /**
  1453. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1454. * @ioc: per adapter object
  1455. * @smid: system request message index
  1456. *
  1457. * Return nothing.
  1458. */
  1459. void
  1460. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1461. {
  1462. Mpi2RequestDescriptorUnion_t descriptor;
  1463. u64 *request = (u64 *)&descriptor;
  1464. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1465. descriptor.Default.MSIxIndex = 0; /* TODO */
  1466. descriptor.Default.SMID = cpu_to_le16(smid);
  1467. descriptor.Default.LMID = 0;
  1468. descriptor.Default.DescriptorTypeDependent = 0;
  1469. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1470. &ioc->scsi_lookup_lock);
  1471. }
  1472. /**
  1473. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1474. * @ioc: per adapter object
  1475. * @smid: system request message index
  1476. * @io_index: value used to track the IO
  1477. *
  1478. * Return nothing.
  1479. */
  1480. void
  1481. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1482. u16 io_index)
  1483. {
  1484. Mpi2RequestDescriptorUnion_t descriptor;
  1485. u64 *request = (u64 *)&descriptor;
  1486. descriptor.SCSITarget.RequestFlags =
  1487. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1488. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1489. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1490. descriptor.SCSITarget.LMID = 0;
  1491. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1492. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1493. &ioc->scsi_lookup_lock);
  1494. }
  1495. /**
  1496. * _base_display_dell_branding - Disply branding string
  1497. * @ioc: per adapter object
  1498. *
  1499. * Return nothing.
  1500. */
  1501. static void
  1502. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1503. {
  1504. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1505. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1506. return;
  1507. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1508. switch (ioc->pdev->subsystem_device) {
  1509. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1510. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1511. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1512. break;
  1513. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1514. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1515. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1516. break;
  1517. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1518. strncpy(dell_branding,
  1519. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1520. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1521. break;
  1522. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1523. strncpy(dell_branding,
  1524. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1525. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1526. break;
  1527. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1528. strncpy(dell_branding,
  1529. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1530. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1531. break;
  1532. case MPT2SAS_DELL_PERC_H200_SSDID:
  1533. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1534. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1535. break;
  1536. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1537. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1538. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1539. break;
  1540. default:
  1541. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1542. break;
  1543. }
  1544. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1545. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1546. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1547. ioc->pdev->subsystem_device);
  1548. }
  1549. /**
  1550. * _base_display_intel_branding - Display branding string
  1551. * @ioc: per adapter object
  1552. *
  1553. * Return nothing.
  1554. */
  1555. static void
  1556. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1557. {
  1558. if (ioc->pdev->subsystem_vendor == PCI_VENDOR_ID_INTEL &&
  1559. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008) {
  1560. switch (ioc->pdev->subsystem_device) {
  1561. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1562. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1563. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1564. break;
  1565. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1566. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1567. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1568. break;
  1569. }
  1570. }
  1571. }
  1572. /**
  1573. * _base_display_hp_branding - Display branding string
  1574. * @ioc: per adapter object
  1575. *
  1576. * Return nothing.
  1577. */
  1578. static void
  1579. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1580. {
  1581. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1582. return;
  1583. switch (ioc->pdev->device) {
  1584. case MPI2_MFGPAGE_DEVID_SAS2004:
  1585. switch (ioc->pdev->subsystem_device) {
  1586. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1587. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1588. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1589. break;
  1590. default:
  1591. break;
  1592. }
  1593. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1594. switch (ioc->pdev->subsystem_device) {
  1595. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1596. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1597. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1598. break;
  1599. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1600. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1601. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1602. break;
  1603. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1604. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1605. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1606. break;
  1607. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1608. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1609. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1610. break;
  1611. default:
  1612. break;
  1613. }
  1614. default:
  1615. break;
  1616. }
  1617. }
  1618. /**
  1619. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1620. * @ioc: per adapter object
  1621. *
  1622. * Return nothing.
  1623. */
  1624. static void
  1625. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1626. {
  1627. int i = 0;
  1628. char desc[16];
  1629. u8 revision;
  1630. u32 iounit_pg1_flags;
  1631. u32 bios_version;
  1632. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1633. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1634. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1635. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1636. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1637. ioc->name, desc,
  1638. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1639. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1640. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1641. ioc->facts.FWVersion.Word & 0x000000FF,
  1642. revision,
  1643. (bios_version & 0xFF000000) >> 24,
  1644. (bios_version & 0x00FF0000) >> 16,
  1645. (bios_version & 0x0000FF00) >> 8,
  1646. bios_version & 0x000000FF);
  1647. _base_display_dell_branding(ioc);
  1648. _base_display_intel_branding(ioc);
  1649. _base_display_hp_branding(ioc);
  1650. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1651. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1652. printk("Initiator");
  1653. i++;
  1654. }
  1655. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1656. printk("%sTarget", i ? "," : "");
  1657. i++;
  1658. }
  1659. i = 0;
  1660. printk("), ");
  1661. printk("Capabilities=(");
  1662. if (!ioc->hide_ir_msg) {
  1663. if (ioc->facts.IOCCapabilities &
  1664. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1665. printk("Raid");
  1666. i++;
  1667. }
  1668. }
  1669. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1670. printk("%sTLR", i ? "," : "");
  1671. i++;
  1672. }
  1673. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1674. printk("%sMulticast", i ? "," : "");
  1675. i++;
  1676. }
  1677. if (ioc->facts.IOCCapabilities &
  1678. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1679. printk("%sBIDI Target", i ? "," : "");
  1680. i++;
  1681. }
  1682. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1683. printk("%sEEDP", i ? "," : "");
  1684. i++;
  1685. }
  1686. if (ioc->facts.IOCCapabilities &
  1687. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1688. printk("%sSnapshot Buffer", i ? "," : "");
  1689. i++;
  1690. }
  1691. if (ioc->facts.IOCCapabilities &
  1692. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1693. printk("%sDiag Trace Buffer", i ? "," : "");
  1694. i++;
  1695. }
  1696. if (ioc->facts.IOCCapabilities &
  1697. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1698. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1699. i++;
  1700. }
  1701. if (ioc->facts.IOCCapabilities &
  1702. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1703. printk("%sTask Set Full", i ? "," : "");
  1704. i++;
  1705. }
  1706. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1707. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1708. printk("%sNCQ", i ? "," : "");
  1709. i++;
  1710. }
  1711. printk(")\n");
  1712. }
  1713. /**
  1714. * _base_update_missing_delay - change the missing delay timers
  1715. * @ioc: per adapter object
  1716. * @device_missing_delay: amount of time till device is reported missing
  1717. * @io_missing_delay: interval IO is returned when there is a missing device
  1718. *
  1719. * Return nothing.
  1720. *
  1721. * Passed on the command line, this function will modify the device missing
  1722. * delay, as well as the io missing delay. This should be called at driver
  1723. * load time.
  1724. */
  1725. static void
  1726. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1727. u16 device_missing_delay, u8 io_missing_delay)
  1728. {
  1729. u16 dmd, dmd_new, dmd_orignal;
  1730. u8 io_missing_delay_original;
  1731. u16 sz;
  1732. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1733. Mpi2ConfigReply_t mpi_reply;
  1734. u8 num_phys = 0;
  1735. u16 ioc_status;
  1736. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1737. if (!num_phys)
  1738. return;
  1739. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1740. sizeof(Mpi2SasIOUnit1PhyData_t));
  1741. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1742. if (!sas_iounit_pg1) {
  1743. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1744. ioc->name, __FILE__, __LINE__, __func__);
  1745. goto out;
  1746. }
  1747. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1748. sas_iounit_pg1, sz))) {
  1749. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1750. ioc->name, __FILE__, __LINE__, __func__);
  1751. goto out;
  1752. }
  1753. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1754. MPI2_IOCSTATUS_MASK;
  1755. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1756. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1757. ioc->name, __FILE__, __LINE__, __func__);
  1758. goto out;
  1759. }
  1760. /* device missing delay */
  1761. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1762. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1763. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1764. else
  1765. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1766. dmd_orignal = dmd;
  1767. if (device_missing_delay > 0x7F) {
  1768. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1769. device_missing_delay;
  1770. dmd = dmd / 16;
  1771. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1772. } else
  1773. dmd = device_missing_delay;
  1774. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1775. /* io missing delay */
  1776. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1777. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1778. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1779. sz)) {
  1780. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1781. dmd_new = (dmd &
  1782. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1783. else
  1784. dmd_new =
  1785. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1786. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1787. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1788. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1789. "new(%d)\n", ioc->name, io_missing_delay_original,
  1790. io_missing_delay);
  1791. ioc->device_missing_delay = dmd_new;
  1792. ioc->io_missing_delay = io_missing_delay;
  1793. }
  1794. out:
  1795. kfree(sas_iounit_pg1);
  1796. }
  1797. /**
  1798. * _base_static_config_pages - static start of day config pages
  1799. * @ioc: per adapter object
  1800. *
  1801. * Return nothing.
  1802. */
  1803. static void
  1804. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1805. {
  1806. Mpi2ConfigReply_t mpi_reply;
  1807. u32 iounit_pg1_flags;
  1808. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1809. if (ioc->ir_firmware)
  1810. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1811. &ioc->manu_pg10);
  1812. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1813. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1814. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1815. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1816. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1817. _base_display_ioc_capabilities(ioc);
  1818. /*
  1819. * Enable task_set_full handling in iounit_pg1 when the
  1820. * facts capabilities indicate that its supported.
  1821. */
  1822. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1823. if ((ioc->facts.IOCCapabilities &
  1824. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1825. iounit_pg1_flags &=
  1826. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1827. else
  1828. iounit_pg1_flags |=
  1829. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1830. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1831. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1832. }
  1833. /**
  1834. * _base_release_memory_pools - release memory
  1835. * @ioc: per adapter object
  1836. *
  1837. * Free memory allocated from _base_allocate_memory_pools.
  1838. *
  1839. * Return nothing.
  1840. */
  1841. static void
  1842. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1843. {
  1844. int i;
  1845. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1846. __func__));
  1847. if (ioc->request) {
  1848. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1849. ioc->request, ioc->request_dma);
  1850. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1851. ": free\n", ioc->name, ioc->request));
  1852. ioc->request = NULL;
  1853. }
  1854. if (ioc->sense) {
  1855. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1856. if (ioc->sense_dma_pool)
  1857. pci_pool_destroy(ioc->sense_dma_pool);
  1858. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1859. ": free\n", ioc->name, ioc->sense));
  1860. ioc->sense = NULL;
  1861. }
  1862. if (ioc->reply) {
  1863. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1864. if (ioc->reply_dma_pool)
  1865. pci_pool_destroy(ioc->reply_dma_pool);
  1866. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1867. ": free\n", ioc->name, ioc->reply));
  1868. ioc->reply = NULL;
  1869. }
  1870. if (ioc->reply_free) {
  1871. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1872. ioc->reply_free_dma);
  1873. if (ioc->reply_free_dma_pool)
  1874. pci_pool_destroy(ioc->reply_free_dma_pool);
  1875. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1876. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1877. ioc->reply_free = NULL;
  1878. }
  1879. if (ioc->reply_post_free) {
  1880. pci_pool_free(ioc->reply_post_free_dma_pool,
  1881. ioc->reply_post_free, ioc->reply_post_free_dma);
  1882. if (ioc->reply_post_free_dma_pool)
  1883. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1884. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1885. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1886. ioc->reply_post_free));
  1887. ioc->reply_post_free = NULL;
  1888. }
  1889. if (ioc->config_page) {
  1890. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1891. "config_page(0x%p): free\n", ioc->name,
  1892. ioc->config_page));
  1893. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1894. ioc->config_page, ioc->config_page_dma);
  1895. }
  1896. if (ioc->scsi_lookup) {
  1897. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1898. ioc->scsi_lookup = NULL;
  1899. }
  1900. kfree(ioc->hpr_lookup);
  1901. kfree(ioc->internal_lookup);
  1902. if (ioc->chain_lookup) {
  1903. for (i = 0; i < ioc->chain_depth; i++) {
  1904. if (ioc->chain_lookup[i].chain_buffer)
  1905. pci_pool_free(ioc->chain_dma_pool,
  1906. ioc->chain_lookup[i].chain_buffer,
  1907. ioc->chain_lookup[i].chain_buffer_dma);
  1908. }
  1909. if (ioc->chain_dma_pool)
  1910. pci_pool_destroy(ioc->chain_dma_pool);
  1911. }
  1912. if (ioc->chain_lookup) {
  1913. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  1914. ioc->chain_lookup = NULL;
  1915. }
  1916. }
  1917. /**
  1918. * _base_allocate_memory_pools - allocate start of day memory pools
  1919. * @ioc: per adapter object
  1920. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1921. *
  1922. * Returns 0 success, anything else error
  1923. */
  1924. static int
  1925. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1926. {
  1927. struct mpt2sas_facts *facts;
  1928. u32 queue_size, queue_diff;
  1929. u16 max_sge_elements;
  1930. u16 num_of_reply_frames;
  1931. u16 chains_needed_per_io;
  1932. u32 sz, total_sz;
  1933. u32 retry_sz;
  1934. u16 max_request_credit;
  1935. int i;
  1936. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1937. __func__));
  1938. retry_sz = 0;
  1939. facts = &ioc->facts;
  1940. /* command line tunables for max sgl entries */
  1941. if (max_sgl_entries != -1) {
  1942. ioc->shost->sg_tablesize = (max_sgl_entries <
  1943. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1944. MPT2SAS_SG_DEPTH;
  1945. } else {
  1946. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1947. }
  1948. /* command line tunables for max controller queue depth */
  1949. if (max_queue_depth != -1)
  1950. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1951. ? max_queue_depth : facts->RequestCredit;
  1952. else
  1953. max_request_credit = facts->RequestCredit;
  1954. ioc->hba_queue_depth = max_request_credit;
  1955. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1956. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1957. /* request frame size */
  1958. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1959. /* reply frame size */
  1960. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1961. retry_allocation:
  1962. total_sz = 0;
  1963. /* calculate number of sg elements left over in the 1st frame */
  1964. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1965. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1966. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1967. /* now do the same for a chain buffer */
  1968. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1969. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1970. ioc->chain_offset_value_for_main_message =
  1971. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1972. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1973. /*
  1974. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1975. */
  1976. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1977. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1978. + 1;
  1979. if (chains_needed_per_io > facts->MaxChainDepth) {
  1980. chains_needed_per_io = facts->MaxChainDepth;
  1981. ioc->shost->sg_tablesize = min_t(u16,
  1982. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1983. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1984. }
  1985. ioc->chains_needed_per_io = chains_needed_per_io;
  1986. /* reply free queue sizing - taking into account for events */
  1987. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1988. /* number of replies frames can't be a multiple of 16 */
  1989. /* decrease number of reply frames by 1 */
  1990. if (!(num_of_reply_frames % 16))
  1991. num_of_reply_frames--;
  1992. /* calculate number of reply free queue entries
  1993. * (must be multiple of 16)
  1994. */
  1995. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1996. queue_size = num_of_reply_frames;
  1997. queue_size += 16 - (queue_size % 16);
  1998. ioc->reply_free_queue_depth = queue_size;
  1999. /* reply descriptor post queue sizing */
  2000. /* this size should be the number of request frames + number of reply
  2001. * frames
  2002. */
  2003. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  2004. /* round up to 16 byte boundary */
  2005. if (queue_size % 16)
  2006. queue_size += 16 - (queue_size % 16);
  2007. /* check against IOC maximum reply post queue depth */
  2008. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  2009. queue_diff = queue_size -
  2010. facts->MaxReplyDescriptorPostQueueDepth;
  2011. /* round queue_diff up to multiple of 16 */
  2012. if (queue_diff % 16)
  2013. queue_diff += 16 - (queue_diff % 16);
  2014. /* adjust hba_queue_depth, reply_free_queue_depth,
  2015. * and queue_size
  2016. */
  2017. ioc->hba_queue_depth -= (queue_diff / 2);
  2018. ioc->reply_free_queue_depth -= (queue_diff / 2);
  2019. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  2020. }
  2021. ioc->reply_post_queue_depth = queue_size;
  2022. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2023. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2024. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2025. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2026. ioc->chains_needed_per_io));
  2027. ioc->scsiio_depth = ioc->hba_queue_depth -
  2028. ioc->hi_priority_depth - ioc->internal_depth;
  2029. /* set the scsi host can_queue depth
  2030. * with some internal commands that could be outstanding
  2031. */
  2032. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2033. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2034. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2035. /* contiguous pool for request and chains, 16 byte align, one extra "
  2036. * "frame for smid=0
  2037. */
  2038. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2039. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2040. /* hi-priority queue */
  2041. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2042. /* internal queue */
  2043. sz += (ioc->internal_depth * ioc->request_sz);
  2044. ioc->request_dma_sz = sz;
  2045. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2046. if (!ioc->request) {
  2047. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2048. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2049. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2050. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2051. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2052. goto out;
  2053. retry_sz += 64;
  2054. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2055. goto retry_allocation;
  2056. }
  2057. if (retry_sz)
  2058. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2059. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2060. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2061. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2062. /* hi-priority queue */
  2063. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2064. ioc->request_sz);
  2065. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2066. ioc->request_sz);
  2067. /* internal queue */
  2068. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2069. ioc->request_sz);
  2070. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2071. ioc->request_sz);
  2072. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2073. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2074. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2075. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2076. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2077. ioc->name, (unsigned long long) ioc->request_dma));
  2078. total_sz += sz;
  2079. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2080. ioc->scsi_lookup_pages = get_order(sz);
  2081. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2082. GFP_KERNEL, ioc->scsi_lookup_pages);
  2083. if (!ioc->scsi_lookup) {
  2084. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2085. "sz(%d)\n", ioc->name, (int)sz);
  2086. goto out;
  2087. }
  2088. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2089. "depth(%d)\n", ioc->name, ioc->request,
  2090. ioc->scsiio_depth));
  2091. /* loop till the allocation succeeds */
  2092. do {
  2093. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2094. ioc->chain_pages = get_order(sz);
  2095. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2096. GFP_KERNEL, ioc->chain_pages);
  2097. if (ioc->chain_lookup == NULL)
  2098. ioc->chain_depth -= 100;
  2099. } while (ioc->chain_lookup == NULL);
  2100. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2101. ioc->request_sz, 16, 0);
  2102. if (!ioc->chain_dma_pool) {
  2103. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2104. "failed\n", ioc->name);
  2105. goto out;
  2106. }
  2107. for (i = 0; i < ioc->chain_depth; i++) {
  2108. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2109. ioc->chain_dma_pool , GFP_KERNEL,
  2110. &ioc->chain_lookup[i].chain_buffer_dma);
  2111. if (!ioc->chain_lookup[i].chain_buffer) {
  2112. ioc->chain_depth = i;
  2113. goto chain_done;
  2114. }
  2115. total_sz += ioc->request_sz;
  2116. }
  2117. chain_done:
  2118. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2119. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2120. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2121. ioc->request_sz))/1024));
  2122. /* initialize hi-priority queue smid's */
  2123. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2124. sizeof(struct request_tracker), GFP_KERNEL);
  2125. if (!ioc->hpr_lookup) {
  2126. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2127. ioc->name);
  2128. goto out;
  2129. }
  2130. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2131. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2132. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2133. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2134. /* initialize internal queue smid's */
  2135. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2136. sizeof(struct request_tracker), GFP_KERNEL);
  2137. if (!ioc->internal_lookup) {
  2138. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2139. ioc->name);
  2140. goto out;
  2141. }
  2142. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2143. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2144. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2145. ioc->internal_depth, ioc->internal_smid));
  2146. /* sense buffers, 4 byte align */
  2147. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2148. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2149. 0);
  2150. if (!ioc->sense_dma_pool) {
  2151. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2152. ioc->name);
  2153. goto out;
  2154. }
  2155. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2156. &ioc->sense_dma);
  2157. if (!ioc->sense) {
  2158. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2159. ioc->name);
  2160. goto out;
  2161. }
  2162. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2163. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2164. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2165. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2166. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2167. ioc->name, (unsigned long long)ioc->sense_dma));
  2168. total_sz += sz;
  2169. /* reply pool, 4 byte align */
  2170. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2171. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2172. 0);
  2173. if (!ioc->reply_dma_pool) {
  2174. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2175. ioc->name);
  2176. goto out;
  2177. }
  2178. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2179. &ioc->reply_dma);
  2180. if (!ioc->reply) {
  2181. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2182. ioc->name);
  2183. goto out;
  2184. }
  2185. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2186. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2187. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2188. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2189. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2190. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2191. ioc->name, (unsigned long long)ioc->reply_dma));
  2192. total_sz += sz;
  2193. /* reply free queue, 16 byte align */
  2194. sz = ioc->reply_free_queue_depth * 4;
  2195. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2196. ioc->pdev, sz, 16, 0);
  2197. if (!ioc->reply_free_dma_pool) {
  2198. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2199. "failed\n", ioc->name);
  2200. goto out;
  2201. }
  2202. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2203. &ioc->reply_free_dma);
  2204. if (!ioc->reply_free) {
  2205. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2206. "failed\n", ioc->name);
  2207. goto out;
  2208. }
  2209. memset(ioc->reply_free, 0, sz);
  2210. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2211. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2212. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2213. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2214. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2215. total_sz += sz;
  2216. /* reply post queue, 16 byte align */
  2217. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2218. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2219. ioc->pdev, sz, 16, 0);
  2220. if (!ioc->reply_post_free_dma_pool) {
  2221. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2222. "failed\n", ioc->name);
  2223. goto out;
  2224. }
  2225. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2226. GFP_KERNEL, &ioc->reply_post_free_dma);
  2227. if (!ioc->reply_post_free) {
  2228. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2229. "failed\n", ioc->name);
  2230. goto out;
  2231. }
  2232. memset(ioc->reply_post_free, 0, sz);
  2233. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2234. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2235. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2236. sz/1024));
  2237. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2238. "(0x%llx)\n", ioc->name, (unsigned long long)
  2239. ioc->reply_post_free_dma));
  2240. total_sz += sz;
  2241. ioc->config_page_sz = 512;
  2242. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2243. ioc->config_page_sz, &ioc->config_page_dma);
  2244. if (!ioc->config_page) {
  2245. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2246. "failed\n", ioc->name);
  2247. goto out;
  2248. }
  2249. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2250. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2251. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2252. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2253. total_sz += ioc->config_page_sz;
  2254. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2255. ioc->name, total_sz/1024);
  2256. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2257. "Max Controller Queue Depth(%d)\n",
  2258. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2259. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2260. ioc->name, ioc->shost->sg_tablesize);
  2261. return 0;
  2262. out:
  2263. return -ENOMEM;
  2264. }
  2265. /**
  2266. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2267. * @ioc: Pointer to MPT_ADAPTER structure
  2268. * @cooked: Request raw or cooked IOC state
  2269. *
  2270. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2271. * Doorbell bits in MPI_IOC_STATE_MASK.
  2272. */
  2273. u32
  2274. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2275. {
  2276. u32 s, sc;
  2277. s = readl(&ioc->chip->Doorbell);
  2278. sc = s & MPI2_IOC_STATE_MASK;
  2279. return cooked ? sc : s;
  2280. }
  2281. /**
  2282. * _base_wait_on_iocstate - waiting on a particular ioc state
  2283. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2284. * @timeout: timeout in second
  2285. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2286. *
  2287. * Returns 0 for success, non-zero for failure.
  2288. */
  2289. static int
  2290. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2291. int sleep_flag)
  2292. {
  2293. u32 count, cntdn;
  2294. u32 current_state;
  2295. count = 0;
  2296. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2297. do {
  2298. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2299. if (current_state == ioc_state)
  2300. return 0;
  2301. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2302. break;
  2303. if (sleep_flag == CAN_SLEEP)
  2304. msleep(1);
  2305. else
  2306. udelay(500);
  2307. count++;
  2308. } while (--cntdn);
  2309. return current_state;
  2310. }
  2311. /**
  2312. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2313. * a write to the doorbell)
  2314. * @ioc: per adapter object
  2315. * @timeout: timeout in second
  2316. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2317. *
  2318. * Returns 0 for success, non-zero for failure.
  2319. *
  2320. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2321. */
  2322. static int
  2323. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2324. int sleep_flag)
  2325. {
  2326. u32 cntdn, count;
  2327. u32 int_status;
  2328. count = 0;
  2329. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2330. do {
  2331. int_status = readl(&ioc->chip->HostInterruptStatus);
  2332. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2333. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2334. "successful count(%d), timeout(%d)\n", ioc->name,
  2335. __func__, count, timeout));
  2336. return 0;
  2337. }
  2338. if (sleep_flag == CAN_SLEEP)
  2339. msleep(1);
  2340. else
  2341. udelay(500);
  2342. count++;
  2343. } while (--cntdn);
  2344. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2345. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2346. return -EFAULT;
  2347. }
  2348. /**
  2349. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2350. * @ioc: per adapter object
  2351. * @timeout: timeout in second
  2352. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2353. *
  2354. * Returns 0 for success, non-zero for failure.
  2355. *
  2356. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2357. * doorbell.
  2358. */
  2359. static int
  2360. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2361. int sleep_flag)
  2362. {
  2363. u32 cntdn, count;
  2364. u32 int_status;
  2365. u32 doorbell;
  2366. count = 0;
  2367. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2368. do {
  2369. int_status = readl(&ioc->chip->HostInterruptStatus);
  2370. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2371. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2372. "successful count(%d), timeout(%d)\n", ioc->name,
  2373. __func__, count, timeout));
  2374. return 0;
  2375. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2376. doorbell = readl(&ioc->chip->Doorbell);
  2377. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2378. MPI2_IOC_STATE_FAULT) {
  2379. mpt2sas_base_fault_info(ioc , doorbell);
  2380. return -EFAULT;
  2381. }
  2382. } else if (int_status == 0xFFFFFFFF)
  2383. goto out;
  2384. if (sleep_flag == CAN_SLEEP)
  2385. msleep(1);
  2386. else
  2387. udelay(500);
  2388. count++;
  2389. } while (--cntdn);
  2390. out:
  2391. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2392. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2393. return -EFAULT;
  2394. }
  2395. /**
  2396. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2397. * @ioc: per adapter object
  2398. * @timeout: timeout in second
  2399. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2400. *
  2401. * Returns 0 for success, non-zero for failure.
  2402. *
  2403. */
  2404. static int
  2405. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2406. int sleep_flag)
  2407. {
  2408. u32 cntdn, count;
  2409. u32 doorbell_reg;
  2410. count = 0;
  2411. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2412. do {
  2413. doorbell_reg = readl(&ioc->chip->Doorbell);
  2414. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2415. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2416. "successful count(%d), timeout(%d)\n", ioc->name,
  2417. __func__, count, timeout));
  2418. return 0;
  2419. }
  2420. if (sleep_flag == CAN_SLEEP)
  2421. msleep(1);
  2422. else
  2423. udelay(500);
  2424. count++;
  2425. } while (--cntdn);
  2426. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2427. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2428. return -EFAULT;
  2429. }
  2430. /**
  2431. * _base_send_ioc_reset - send doorbell reset
  2432. * @ioc: per adapter object
  2433. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2434. * @timeout: timeout in second
  2435. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2436. *
  2437. * Returns 0 for success, non-zero for failure.
  2438. */
  2439. static int
  2440. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2441. int sleep_flag)
  2442. {
  2443. u32 ioc_state;
  2444. int r = 0;
  2445. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2446. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2447. ioc->name, __func__);
  2448. return -EFAULT;
  2449. }
  2450. if (!(ioc->facts.IOCCapabilities &
  2451. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2452. return -EFAULT;
  2453. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2454. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2455. &ioc->chip->Doorbell);
  2456. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2457. r = -EFAULT;
  2458. goto out;
  2459. }
  2460. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2461. timeout, sleep_flag);
  2462. if (ioc_state) {
  2463. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2464. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2465. r = -EFAULT;
  2466. goto out;
  2467. }
  2468. out:
  2469. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2470. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2471. return r;
  2472. }
  2473. /**
  2474. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2475. * @ioc: per adapter object
  2476. * @request_bytes: request length
  2477. * @request: pointer having request payload
  2478. * @reply_bytes: reply length
  2479. * @reply: pointer to reply payload
  2480. * @timeout: timeout in second
  2481. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2482. *
  2483. * Returns 0 for success, non-zero for failure.
  2484. */
  2485. static int
  2486. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2487. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2488. {
  2489. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2490. int i;
  2491. u8 failed;
  2492. u16 dummy;
  2493. __le32 *mfp;
  2494. /* make sure doorbell is not in use */
  2495. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2496. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2497. " (line=%d)\n", ioc->name, __LINE__);
  2498. return -EFAULT;
  2499. }
  2500. /* clear pending doorbell interrupts from previous state changes */
  2501. if (readl(&ioc->chip->HostInterruptStatus) &
  2502. MPI2_HIS_IOC2SYS_DB_STATUS)
  2503. writel(0, &ioc->chip->HostInterruptStatus);
  2504. /* send message to ioc */
  2505. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2506. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2507. &ioc->chip->Doorbell);
  2508. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2509. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2510. "int failed (line=%d)\n", ioc->name, __LINE__);
  2511. return -EFAULT;
  2512. }
  2513. writel(0, &ioc->chip->HostInterruptStatus);
  2514. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2515. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2516. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2517. return -EFAULT;
  2518. }
  2519. /* send message 32-bits at a time */
  2520. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2521. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2522. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2523. failed = 1;
  2524. }
  2525. if (failed) {
  2526. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2527. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2528. return -EFAULT;
  2529. }
  2530. /* now wait for the reply */
  2531. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2532. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2533. "int failed (line=%d)\n", ioc->name, __LINE__);
  2534. return -EFAULT;
  2535. }
  2536. /* read the first two 16-bits, it gives the total length of the reply */
  2537. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2538. & MPI2_DOORBELL_DATA_MASK);
  2539. writel(0, &ioc->chip->HostInterruptStatus);
  2540. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2541. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2542. "int failed (line=%d)\n", ioc->name, __LINE__);
  2543. return -EFAULT;
  2544. }
  2545. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2546. & MPI2_DOORBELL_DATA_MASK);
  2547. writel(0, &ioc->chip->HostInterruptStatus);
  2548. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2549. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2550. printk(MPT2SAS_ERR_FMT "doorbell "
  2551. "handshake int failed (line=%d)\n", ioc->name,
  2552. __LINE__);
  2553. return -EFAULT;
  2554. }
  2555. if (i >= reply_bytes/2) /* overflow case */
  2556. dummy = readl(&ioc->chip->Doorbell);
  2557. else
  2558. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2559. & MPI2_DOORBELL_DATA_MASK);
  2560. writel(0, &ioc->chip->HostInterruptStatus);
  2561. }
  2562. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2563. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2564. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2565. " (line=%d)\n", ioc->name, __LINE__));
  2566. }
  2567. writel(0, &ioc->chip->HostInterruptStatus);
  2568. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2569. mfp = (__le32 *)reply;
  2570. printk(KERN_INFO "\toffset:data\n");
  2571. for (i = 0; i < reply_bytes/4; i++)
  2572. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2573. le32_to_cpu(mfp[i]));
  2574. }
  2575. return 0;
  2576. }
  2577. /**
  2578. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2579. * @ioc: per adapter object
  2580. * @mpi_reply: the reply payload from FW
  2581. * @mpi_request: the request payload sent to FW
  2582. *
  2583. * The SAS IO Unit Control Request message allows the host to perform low-level
  2584. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2585. * to obtain the IOC assigned device handles for a device if it has other
  2586. * identifying information about the device, in addition allows the host to
  2587. * remove IOC resources associated with the device.
  2588. *
  2589. * Returns 0 for success, non-zero for failure.
  2590. */
  2591. int
  2592. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2593. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2594. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2595. {
  2596. u16 smid;
  2597. u32 ioc_state;
  2598. unsigned long timeleft;
  2599. u8 issue_reset;
  2600. int rc;
  2601. void *request;
  2602. u16 wait_state_count;
  2603. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2604. __func__));
  2605. mutex_lock(&ioc->base_cmds.mutex);
  2606. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2607. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2608. ioc->name, __func__);
  2609. rc = -EAGAIN;
  2610. goto out;
  2611. }
  2612. wait_state_count = 0;
  2613. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2614. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2615. if (wait_state_count++ == 10) {
  2616. printk(MPT2SAS_ERR_FMT
  2617. "%s: failed due to ioc not operational\n",
  2618. ioc->name, __func__);
  2619. rc = -EFAULT;
  2620. goto out;
  2621. }
  2622. ssleep(1);
  2623. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2624. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2625. "operational state(count=%d)\n", ioc->name,
  2626. __func__, wait_state_count);
  2627. }
  2628. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2629. if (!smid) {
  2630. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2631. ioc->name, __func__);
  2632. rc = -EAGAIN;
  2633. goto out;
  2634. }
  2635. rc = 0;
  2636. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2637. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2638. ioc->base_cmds.smid = smid;
  2639. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2640. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2641. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2642. ioc->ioc_link_reset_in_progress = 1;
  2643. mpt2sas_base_put_smid_default(ioc, smid);
  2644. init_completion(&ioc->base_cmds.done);
  2645. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2646. msecs_to_jiffies(10000));
  2647. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2648. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2649. ioc->ioc_link_reset_in_progress)
  2650. ioc->ioc_link_reset_in_progress = 0;
  2651. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2652. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2653. ioc->name, __func__);
  2654. _debug_dump_mf(mpi_request,
  2655. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2656. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2657. issue_reset = 1;
  2658. goto issue_host_reset;
  2659. }
  2660. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2661. memcpy(mpi_reply, ioc->base_cmds.reply,
  2662. sizeof(Mpi2SasIoUnitControlReply_t));
  2663. else
  2664. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2665. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2666. goto out;
  2667. issue_host_reset:
  2668. if (issue_reset)
  2669. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2670. FORCE_BIG_HAMMER);
  2671. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2672. rc = -EFAULT;
  2673. out:
  2674. mutex_unlock(&ioc->base_cmds.mutex);
  2675. return rc;
  2676. }
  2677. /**
  2678. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2679. * @ioc: per adapter object
  2680. * @mpi_reply: the reply payload from FW
  2681. * @mpi_request: the request payload sent to FW
  2682. *
  2683. * The SCSI Enclosure Processor request message causes the IOC to
  2684. * communicate with SES devices to control LED status signals.
  2685. *
  2686. * Returns 0 for success, non-zero for failure.
  2687. */
  2688. int
  2689. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2690. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2691. {
  2692. u16 smid;
  2693. u32 ioc_state;
  2694. unsigned long timeleft;
  2695. u8 issue_reset;
  2696. int rc;
  2697. void *request;
  2698. u16 wait_state_count;
  2699. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2700. __func__));
  2701. mutex_lock(&ioc->base_cmds.mutex);
  2702. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2703. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2704. ioc->name, __func__);
  2705. rc = -EAGAIN;
  2706. goto out;
  2707. }
  2708. wait_state_count = 0;
  2709. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2710. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2711. if (wait_state_count++ == 10) {
  2712. printk(MPT2SAS_ERR_FMT
  2713. "%s: failed due to ioc not operational\n",
  2714. ioc->name, __func__);
  2715. rc = -EFAULT;
  2716. goto out;
  2717. }
  2718. ssleep(1);
  2719. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2720. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2721. "operational state(count=%d)\n", ioc->name,
  2722. __func__, wait_state_count);
  2723. }
  2724. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2725. if (!smid) {
  2726. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2727. ioc->name, __func__);
  2728. rc = -EAGAIN;
  2729. goto out;
  2730. }
  2731. rc = 0;
  2732. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2733. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2734. ioc->base_cmds.smid = smid;
  2735. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2736. mpt2sas_base_put_smid_default(ioc, smid);
  2737. init_completion(&ioc->base_cmds.done);
  2738. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2739. msecs_to_jiffies(10000));
  2740. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2741. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2742. ioc->name, __func__);
  2743. _debug_dump_mf(mpi_request,
  2744. sizeof(Mpi2SepRequest_t)/4);
  2745. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2746. issue_reset = 1;
  2747. goto issue_host_reset;
  2748. }
  2749. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2750. memcpy(mpi_reply, ioc->base_cmds.reply,
  2751. sizeof(Mpi2SepReply_t));
  2752. else
  2753. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2754. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2755. goto out;
  2756. issue_host_reset:
  2757. if (issue_reset)
  2758. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2759. FORCE_BIG_HAMMER);
  2760. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2761. rc = -EFAULT;
  2762. out:
  2763. mutex_unlock(&ioc->base_cmds.mutex);
  2764. return rc;
  2765. }
  2766. /**
  2767. * _base_get_port_facts - obtain port facts reply and save in ioc
  2768. * @ioc: per adapter object
  2769. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2770. *
  2771. * Returns 0 for success, non-zero for failure.
  2772. */
  2773. static int
  2774. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2775. {
  2776. Mpi2PortFactsRequest_t mpi_request;
  2777. Mpi2PortFactsReply_t mpi_reply;
  2778. struct mpt2sas_port_facts *pfacts;
  2779. int mpi_reply_sz, mpi_request_sz, r;
  2780. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2781. __func__));
  2782. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2783. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2784. memset(&mpi_request, 0, mpi_request_sz);
  2785. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2786. mpi_request.PortNumber = port;
  2787. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2788. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2789. if (r != 0) {
  2790. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2791. ioc->name, __func__, r);
  2792. return r;
  2793. }
  2794. pfacts = &ioc->pfacts[port];
  2795. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2796. pfacts->PortNumber = mpi_reply.PortNumber;
  2797. pfacts->VP_ID = mpi_reply.VP_ID;
  2798. pfacts->VF_ID = mpi_reply.VF_ID;
  2799. pfacts->MaxPostedCmdBuffers =
  2800. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2801. return 0;
  2802. }
  2803. /**
  2804. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2805. * @ioc: per adapter object
  2806. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2807. *
  2808. * Returns 0 for success, non-zero for failure.
  2809. */
  2810. static int
  2811. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2812. {
  2813. Mpi2IOCFactsRequest_t mpi_request;
  2814. Mpi2IOCFactsReply_t mpi_reply;
  2815. struct mpt2sas_facts *facts;
  2816. int mpi_reply_sz, mpi_request_sz, r;
  2817. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2818. __func__));
  2819. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2820. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2821. memset(&mpi_request, 0, mpi_request_sz);
  2822. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2823. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2824. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2825. if (r != 0) {
  2826. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2827. ioc->name, __func__, r);
  2828. return r;
  2829. }
  2830. facts = &ioc->facts;
  2831. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2832. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2833. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2834. facts->VP_ID = mpi_reply.VP_ID;
  2835. facts->VF_ID = mpi_reply.VF_ID;
  2836. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2837. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2838. facts->WhoInit = mpi_reply.WhoInit;
  2839. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2840. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2841. facts->MaxReplyDescriptorPostQueueDepth =
  2842. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2843. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2844. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2845. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2846. ioc->ir_firmware = 1;
  2847. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2848. facts->IOCRequestFrameSize =
  2849. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2850. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2851. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2852. ioc->shost->max_id = -1;
  2853. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2854. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2855. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2856. facts->HighPriorityCredit =
  2857. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2858. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2859. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2860. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2861. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2862. facts->MaxChainDepth));
  2863. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2864. "reply frame size(%d)\n", ioc->name,
  2865. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2866. return 0;
  2867. }
  2868. /**
  2869. * _base_send_ioc_init - send ioc_init to firmware
  2870. * @ioc: per adapter object
  2871. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2872. *
  2873. * Returns 0 for success, non-zero for failure.
  2874. */
  2875. static int
  2876. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2877. {
  2878. Mpi2IOCInitRequest_t mpi_request;
  2879. Mpi2IOCInitReply_t mpi_reply;
  2880. int r;
  2881. struct timeval current_time;
  2882. u16 ioc_status;
  2883. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2884. __func__));
  2885. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2886. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2887. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2888. mpi_request.VF_ID = 0; /* TODO */
  2889. mpi_request.VP_ID = 0;
  2890. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2891. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2892. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2893. mpi_request.ReplyDescriptorPostQueueDepth =
  2894. cpu_to_le16(ioc->reply_post_queue_depth);
  2895. mpi_request.ReplyFreeQueueDepth =
  2896. cpu_to_le16(ioc->reply_free_queue_depth);
  2897. mpi_request.SenseBufferAddressHigh =
  2898. cpu_to_le32((u64)ioc->sense_dma >> 32);
  2899. mpi_request.SystemReplyAddressHigh =
  2900. cpu_to_le32((u64)ioc->reply_dma >> 32);
  2901. mpi_request.SystemRequestFrameBaseAddress =
  2902. cpu_to_le64((u64)ioc->request_dma);
  2903. mpi_request.ReplyFreeQueueAddress =
  2904. cpu_to_le64((u64)ioc->reply_free_dma);
  2905. mpi_request.ReplyDescriptorPostQueueAddress =
  2906. cpu_to_le64((u64)ioc->reply_post_free_dma);
  2907. /* This time stamp specifies number of milliseconds
  2908. * since epoch ~ midnight January 1, 1970.
  2909. */
  2910. do_gettimeofday(&current_time);
  2911. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2912. (current_time.tv_usec / 1000));
  2913. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2914. __le32 *mfp;
  2915. int i;
  2916. mfp = (__le32 *)&mpi_request;
  2917. printk(KERN_INFO "\toffset:data\n");
  2918. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2919. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2920. le32_to_cpu(mfp[i]));
  2921. }
  2922. r = _base_handshake_req_reply_wait(ioc,
  2923. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2924. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2925. sleep_flag);
  2926. if (r != 0) {
  2927. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2928. ioc->name, __func__, r);
  2929. return r;
  2930. }
  2931. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2932. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2933. mpi_reply.IOCLogInfo) {
  2934. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2935. r = -EIO;
  2936. }
  2937. return 0;
  2938. }
  2939. /**
  2940. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2941. * @ioc: per adapter object
  2942. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2943. *
  2944. * Returns 0 for success, non-zero for failure.
  2945. */
  2946. static int
  2947. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2948. {
  2949. Mpi2PortEnableRequest_t *mpi_request;
  2950. u32 ioc_state;
  2951. unsigned long timeleft;
  2952. int r = 0;
  2953. u16 smid;
  2954. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2955. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2956. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2957. ioc->name, __func__);
  2958. return -EAGAIN;
  2959. }
  2960. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2961. if (!smid) {
  2962. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2963. ioc->name, __func__);
  2964. return -EAGAIN;
  2965. }
  2966. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2967. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2968. ioc->base_cmds.smid = smid;
  2969. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2970. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2971. mpi_request->VF_ID = 0; /* TODO */
  2972. mpi_request->VP_ID = 0;
  2973. mpt2sas_base_put_smid_default(ioc, smid);
  2974. init_completion(&ioc->base_cmds.done);
  2975. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2976. 300*HZ);
  2977. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2978. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2979. ioc->name, __func__);
  2980. _debug_dump_mf(mpi_request,
  2981. sizeof(Mpi2PortEnableRequest_t)/4);
  2982. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2983. r = -EFAULT;
  2984. else
  2985. r = -ETIME;
  2986. goto out;
  2987. } else
  2988. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2989. ioc->name, __func__));
  2990. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2991. 60, sleep_flag);
  2992. if (ioc_state) {
  2993. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2994. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2995. r = -EFAULT;
  2996. }
  2997. out:
  2998. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2999. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  3000. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  3001. return r;
  3002. }
  3003. /**
  3004. * _base_unmask_events - turn on notification for this event
  3005. * @ioc: per adapter object
  3006. * @event: firmware event
  3007. *
  3008. * The mask is stored in ioc->event_masks.
  3009. */
  3010. static void
  3011. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3012. {
  3013. u32 desired_event;
  3014. if (event >= 128)
  3015. return;
  3016. desired_event = (1 << (event % 32));
  3017. if (event < 32)
  3018. ioc->event_masks[0] &= ~desired_event;
  3019. else if (event < 64)
  3020. ioc->event_masks[1] &= ~desired_event;
  3021. else if (event < 96)
  3022. ioc->event_masks[2] &= ~desired_event;
  3023. else if (event < 128)
  3024. ioc->event_masks[3] &= ~desired_event;
  3025. }
  3026. /**
  3027. * _base_event_notification - send event notification
  3028. * @ioc: per adapter object
  3029. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3030. *
  3031. * Returns 0 for success, non-zero for failure.
  3032. */
  3033. static int
  3034. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3035. {
  3036. Mpi2EventNotificationRequest_t *mpi_request;
  3037. unsigned long timeleft;
  3038. u16 smid;
  3039. int r = 0;
  3040. int i;
  3041. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3042. __func__));
  3043. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3044. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3045. ioc->name, __func__);
  3046. return -EAGAIN;
  3047. }
  3048. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3049. if (!smid) {
  3050. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3051. ioc->name, __func__);
  3052. return -EAGAIN;
  3053. }
  3054. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3055. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3056. ioc->base_cmds.smid = smid;
  3057. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3058. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3059. mpi_request->VF_ID = 0; /* TODO */
  3060. mpi_request->VP_ID = 0;
  3061. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3062. mpi_request->EventMasks[i] =
  3063. cpu_to_le32(ioc->event_masks[i]);
  3064. mpt2sas_base_put_smid_default(ioc, smid);
  3065. init_completion(&ioc->base_cmds.done);
  3066. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3067. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3068. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3069. ioc->name, __func__);
  3070. _debug_dump_mf(mpi_request,
  3071. sizeof(Mpi2EventNotificationRequest_t)/4);
  3072. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3073. r = -EFAULT;
  3074. else
  3075. r = -ETIME;
  3076. } else
  3077. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3078. ioc->name, __func__));
  3079. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3080. return r;
  3081. }
  3082. /**
  3083. * mpt2sas_base_validate_event_type - validating event types
  3084. * @ioc: per adapter object
  3085. * @event: firmware event
  3086. *
  3087. * This will turn on firmware event notification when application
  3088. * ask for that event. We don't mask events that are already enabled.
  3089. */
  3090. void
  3091. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3092. {
  3093. int i, j;
  3094. u32 event_mask, desired_event;
  3095. u8 send_update_to_fw;
  3096. for (i = 0, send_update_to_fw = 0; i <
  3097. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3098. event_mask = ~event_type[i];
  3099. desired_event = 1;
  3100. for (j = 0; j < 32; j++) {
  3101. if (!(event_mask & desired_event) &&
  3102. (ioc->event_masks[i] & desired_event)) {
  3103. ioc->event_masks[i] &= ~desired_event;
  3104. send_update_to_fw = 1;
  3105. }
  3106. desired_event = (desired_event << 1);
  3107. }
  3108. }
  3109. if (!send_update_to_fw)
  3110. return;
  3111. mutex_lock(&ioc->base_cmds.mutex);
  3112. _base_event_notification(ioc, CAN_SLEEP);
  3113. mutex_unlock(&ioc->base_cmds.mutex);
  3114. }
  3115. /**
  3116. * _base_diag_reset - the "big hammer" start of day reset
  3117. * @ioc: per adapter object
  3118. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3119. *
  3120. * Returns 0 for success, non-zero for failure.
  3121. */
  3122. static int
  3123. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3124. {
  3125. u32 host_diagnostic;
  3126. u32 ioc_state;
  3127. u32 count;
  3128. u32 hcb_size;
  3129. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3130. _base_save_msix_table(ioc);
  3131. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3132. ioc->name));
  3133. count = 0;
  3134. do {
  3135. /* Write magic sequence to WriteSequence register
  3136. * Loop until in diagnostic mode
  3137. */
  3138. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3139. "sequence\n", ioc->name));
  3140. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3141. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3142. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3143. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3144. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3145. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3146. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3147. /* wait 100 msec */
  3148. if (sleep_flag == CAN_SLEEP)
  3149. msleep(100);
  3150. else
  3151. mdelay(100);
  3152. if (count++ > 20)
  3153. goto out;
  3154. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3155. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3156. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3157. ioc->name, count, host_diagnostic));
  3158. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3159. hcb_size = readl(&ioc->chip->HCBSize);
  3160. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3161. ioc->name));
  3162. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3163. &ioc->chip->HostDiagnostic);
  3164. /* don't access any registers for 50 milliseconds */
  3165. msleep(50);
  3166. /* 300 second max wait */
  3167. for (count = 0; count < 3000000 ; count++) {
  3168. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3169. if (host_diagnostic == 0xFFFFFFFF)
  3170. goto out;
  3171. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3172. break;
  3173. /* wait 100 msec */
  3174. if (sleep_flag == CAN_SLEEP)
  3175. msleep(1);
  3176. else
  3177. mdelay(1);
  3178. }
  3179. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3180. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3181. "assuming the HCB Address points to good F/W\n",
  3182. ioc->name));
  3183. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3184. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3185. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3186. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3187. "re-enable the HCDW\n", ioc->name));
  3188. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3189. &ioc->chip->HCBSize);
  3190. }
  3191. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3192. ioc->name));
  3193. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3194. &ioc->chip->HostDiagnostic);
  3195. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3196. "diagnostic register\n", ioc->name));
  3197. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3198. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3199. "READY state\n", ioc->name));
  3200. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3201. sleep_flag);
  3202. if (ioc_state) {
  3203. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3204. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3205. goto out;
  3206. }
  3207. _base_restore_msix_table(ioc);
  3208. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3209. return 0;
  3210. out:
  3211. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3212. return -EFAULT;
  3213. }
  3214. /**
  3215. * _base_make_ioc_ready - put controller in READY state
  3216. * @ioc: per adapter object
  3217. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3218. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3219. *
  3220. * Returns 0 for success, non-zero for failure.
  3221. */
  3222. static int
  3223. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3224. enum reset_type type)
  3225. {
  3226. u32 ioc_state;
  3227. int rc;
  3228. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3229. __func__));
  3230. if (ioc->pci_error_recovery)
  3231. return 0;
  3232. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3233. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3234. ioc->name, __func__, ioc_state));
  3235. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3236. return 0;
  3237. if (ioc_state & MPI2_DOORBELL_USED) {
  3238. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3239. "active!\n", ioc->name));
  3240. goto issue_diag_reset;
  3241. }
  3242. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3243. mpt2sas_base_fault_info(ioc, ioc_state &
  3244. MPI2_DOORBELL_DATA_MASK);
  3245. goto issue_diag_reset;
  3246. }
  3247. if (type == FORCE_BIG_HAMMER)
  3248. goto issue_diag_reset;
  3249. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3250. if (!(_base_send_ioc_reset(ioc,
  3251. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3252. ioc->ioc_reset_count++;
  3253. return 0;
  3254. }
  3255. issue_diag_reset:
  3256. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3257. ioc->ioc_reset_count++;
  3258. return rc;
  3259. }
  3260. /**
  3261. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3262. * @ioc: per adapter object
  3263. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3264. *
  3265. * Returns 0 for success, non-zero for failure.
  3266. */
  3267. static int
  3268. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3269. {
  3270. int r, i;
  3271. unsigned long flags;
  3272. u32 reply_address;
  3273. u16 smid;
  3274. struct _tr_list *delayed_tr, *delayed_tr_next;
  3275. u8 hide_flag;
  3276. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3277. __func__));
  3278. /* clean the delayed target reset list */
  3279. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3280. &ioc->delayed_tr_list, list) {
  3281. list_del(&delayed_tr->list);
  3282. kfree(delayed_tr);
  3283. }
  3284. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3285. &ioc->delayed_tr_volume_list, list) {
  3286. list_del(&delayed_tr->list);
  3287. kfree(delayed_tr);
  3288. }
  3289. /* initialize the scsi lookup free list */
  3290. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3291. INIT_LIST_HEAD(&ioc->free_list);
  3292. smid = 1;
  3293. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3294. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3295. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3296. ioc->scsi_lookup[i].smid = smid;
  3297. ioc->scsi_lookup[i].scmd = NULL;
  3298. ioc->scsi_lookup[i].direct_io = 0;
  3299. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3300. &ioc->free_list);
  3301. }
  3302. /* hi-priority queue */
  3303. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3304. smid = ioc->hi_priority_smid;
  3305. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3306. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3307. ioc->hpr_lookup[i].smid = smid;
  3308. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3309. &ioc->hpr_free_list);
  3310. }
  3311. /* internal queue */
  3312. INIT_LIST_HEAD(&ioc->internal_free_list);
  3313. smid = ioc->internal_smid;
  3314. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3315. ioc->internal_lookup[i].cb_idx = 0xFF;
  3316. ioc->internal_lookup[i].smid = smid;
  3317. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3318. &ioc->internal_free_list);
  3319. }
  3320. /* chain pool */
  3321. INIT_LIST_HEAD(&ioc->free_chain_list);
  3322. for (i = 0; i < ioc->chain_depth; i++)
  3323. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3324. &ioc->free_chain_list);
  3325. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3326. /* initialize Reply Free Queue */
  3327. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3328. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3329. ioc->reply_sz)
  3330. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3331. /* initialize Reply Post Free Queue */
  3332. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3333. ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
  3334. r = _base_send_ioc_init(ioc, sleep_flag);
  3335. if (r)
  3336. return r;
  3337. /* initialize the index's */
  3338. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3339. ioc->reply_post_host_index = 0;
  3340. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3341. writel(0, &ioc->chip->ReplyPostHostIndex);
  3342. _base_unmask_interrupts(ioc);
  3343. r = _base_event_notification(ioc, sleep_flag);
  3344. if (r)
  3345. return r;
  3346. if (sleep_flag == CAN_SLEEP)
  3347. _base_static_config_pages(ioc);
  3348. if (ioc->wait_for_port_enable_to_complete && ioc->is_warpdrive) {
  3349. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3350. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3351. MFG_PAGE10_HIDE_SSDS_MASK);
  3352. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3353. ioc->mfg_pg10_hide_flag = hide_flag;
  3354. }
  3355. }
  3356. if (ioc->wait_for_port_enable_to_complete) {
  3357. if (diag_buffer_enable != 0)
  3358. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3359. if (disable_discovery > 0)
  3360. return r;
  3361. }
  3362. r = _base_send_port_enable(ioc, sleep_flag);
  3363. if (r)
  3364. return r;
  3365. return r;
  3366. }
  3367. /**
  3368. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3369. * @ioc: per adapter object
  3370. *
  3371. * Return nothing.
  3372. */
  3373. void
  3374. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3375. {
  3376. struct pci_dev *pdev = ioc->pdev;
  3377. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3378. __func__));
  3379. _base_mask_interrupts(ioc);
  3380. ioc->shost_recovery = 1;
  3381. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3382. ioc->shost_recovery = 0;
  3383. if (ioc->pci_irq) {
  3384. synchronize_irq(pdev->irq);
  3385. free_irq(ioc->pci_irq, ioc);
  3386. }
  3387. _base_disable_msix(ioc);
  3388. if (ioc->chip_phys)
  3389. iounmap(ioc->chip);
  3390. ioc->pci_irq = -1;
  3391. ioc->chip_phys = 0;
  3392. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3393. pci_disable_pcie_error_reporting(pdev);
  3394. pci_disable_device(pdev);
  3395. return;
  3396. }
  3397. /**
  3398. * mpt2sas_base_attach - attach controller instance
  3399. * @ioc: per adapter object
  3400. *
  3401. * Returns 0 for success, non-zero for failure.
  3402. */
  3403. int
  3404. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3405. {
  3406. int r, i;
  3407. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3408. __func__));
  3409. r = mpt2sas_base_map_resources(ioc);
  3410. if (r)
  3411. return r;
  3412. pci_set_drvdata(ioc->pdev, ioc->shost);
  3413. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3414. if (r)
  3415. goto out_free_resources;
  3416. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3417. if (r)
  3418. goto out_free_resources;
  3419. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3420. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3421. if (!ioc->pfacts) {
  3422. r = -ENOMEM;
  3423. goto out_free_resources;
  3424. }
  3425. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3426. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3427. if (r)
  3428. goto out_free_resources;
  3429. }
  3430. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3431. if (r)
  3432. goto out_free_resources;
  3433. init_waitqueue_head(&ioc->reset_wq);
  3434. /* allocate memory pd handle bitmask list */
  3435. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3436. if (ioc->facts.MaxDevHandle % 8)
  3437. ioc->pd_handles_sz++;
  3438. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3439. GFP_KERNEL);
  3440. if (!ioc->pd_handles) {
  3441. r = -ENOMEM;
  3442. goto out_free_resources;
  3443. }
  3444. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3445. /* base internal command bits */
  3446. mutex_init(&ioc->base_cmds.mutex);
  3447. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3448. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3449. /* transport internal command bits */
  3450. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3451. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3452. mutex_init(&ioc->transport_cmds.mutex);
  3453. /* scsih internal command bits */
  3454. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3455. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3456. mutex_init(&ioc->scsih_cmds.mutex);
  3457. /* task management internal command bits */
  3458. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3459. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3460. mutex_init(&ioc->tm_cmds.mutex);
  3461. /* config page internal command bits */
  3462. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3463. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3464. mutex_init(&ioc->config_cmds.mutex);
  3465. /* ctl module internal command bits */
  3466. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3467. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3468. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3469. mutex_init(&ioc->ctl_cmds.mutex);
  3470. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3471. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3472. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3473. !ioc->ctl_cmds.sense) {
  3474. r = -ENOMEM;
  3475. goto out_free_resources;
  3476. }
  3477. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3478. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3479. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3480. r = -ENOMEM;
  3481. goto out_free_resources;
  3482. }
  3483. init_completion(&ioc->shost_recovery_done);
  3484. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3485. ioc->event_masks[i] = -1;
  3486. /* here we enable the events we care about */
  3487. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3488. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3489. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3490. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3491. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3492. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3493. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3494. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3495. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3496. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3497. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3498. if (r)
  3499. goto out_free_resources;
  3500. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3501. _base_update_missing_delay(ioc, missing_delay[0],
  3502. missing_delay[1]);
  3503. mpt2sas_base_start_watchdog(ioc);
  3504. return 0;
  3505. out_free_resources:
  3506. ioc->remove_host = 1;
  3507. mpt2sas_base_free_resources(ioc);
  3508. _base_release_memory_pools(ioc);
  3509. pci_set_drvdata(ioc->pdev, NULL);
  3510. kfree(ioc->pd_handles);
  3511. kfree(ioc->tm_cmds.reply);
  3512. kfree(ioc->transport_cmds.reply);
  3513. kfree(ioc->scsih_cmds.reply);
  3514. kfree(ioc->config_cmds.reply);
  3515. kfree(ioc->base_cmds.reply);
  3516. kfree(ioc->ctl_cmds.reply);
  3517. kfree(ioc->ctl_cmds.sense);
  3518. kfree(ioc->pfacts);
  3519. ioc->ctl_cmds.reply = NULL;
  3520. ioc->base_cmds.reply = NULL;
  3521. ioc->tm_cmds.reply = NULL;
  3522. ioc->scsih_cmds.reply = NULL;
  3523. ioc->transport_cmds.reply = NULL;
  3524. ioc->config_cmds.reply = NULL;
  3525. ioc->pfacts = NULL;
  3526. return r;
  3527. }
  3528. /**
  3529. * mpt2sas_base_detach - remove controller instance
  3530. * @ioc: per adapter object
  3531. *
  3532. * Return nothing.
  3533. */
  3534. void
  3535. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3536. {
  3537. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3538. __func__));
  3539. mpt2sas_base_stop_watchdog(ioc);
  3540. mpt2sas_base_free_resources(ioc);
  3541. _base_release_memory_pools(ioc);
  3542. pci_set_drvdata(ioc->pdev, NULL);
  3543. kfree(ioc->pd_handles);
  3544. kfree(ioc->pfacts);
  3545. kfree(ioc->ctl_cmds.reply);
  3546. kfree(ioc->ctl_cmds.sense);
  3547. kfree(ioc->base_cmds.reply);
  3548. kfree(ioc->tm_cmds.reply);
  3549. kfree(ioc->transport_cmds.reply);
  3550. kfree(ioc->scsih_cmds.reply);
  3551. kfree(ioc->config_cmds.reply);
  3552. }
  3553. /**
  3554. * _base_reset_handler - reset callback handler (for base)
  3555. * @ioc: per adapter object
  3556. * @reset_phase: phase
  3557. *
  3558. * The handler for doing any required cleanup or initialization.
  3559. *
  3560. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3561. * MPT2_IOC_DONE_RESET
  3562. *
  3563. * Return nothing.
  3564. */
  3565. static void
  3566. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3567. {
  3568. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3569. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3570. switch (reset_phase) {
  3571. case MPT2_IOC_PRE_RESET:
  3572. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3573. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3574. break;
  3575. case MPT2_IOC_AFTER_RESET:
  3576. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3577. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3578. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3579. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3580. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3581. complete(&ioc->transport_cmds.done);
  3582. }
  3583. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3584. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3585. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3586. complete(&ioc->base_cmds.done);
  3587. }
  3588. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3589. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3590. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3591. ioc->config_cmds.smid = USHRT_MAX;
  3592. complete(&ioc->config_cmds.done);
  3593. }
  3594. break;
  3595. case MPT2_IOC_DONE_RESET:
  3596. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3597. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3598. break;
  3599. }
  3600. }
  3601. /**
  3602. * _wait_for_commands_to_complete - reset controller
  3603. * @ioc: Pointer to MPT_ADAPTER structure
  3604. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3605. *
  3606. * This function waiting(3s) for all pending commands to complete
  3607. * prior to putting controller in reset.
  3608. */
  3609. static void
  3610. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3611. {
  3612. u32 ioc_state;
  3613. unsigned long flags;
  3614. u16 i;
  3615. ioc->pending_io_count = 0;
  3616. if (sleep_flag != CAN_SLEEP)
  3617. return;
  3618. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3619. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3620. return;
  3621. /* pending command count */
  3622. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3623. for (i = 0; i < ioc->scsiio_depth; i++)
  3624. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3625. ioc->pending_io_count++;
  3626. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3627. if (!ioc->pending_io_count)
  3628. return;
  3629. /* wait for pending commands to complete */
  3630. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3631. }
  3632. /**
  3633. * mpt2sas_base_hard_reset_handler - reset controller
  3634. * @ioc: Pointer to MPT_ADAPTER structure
  3635. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3636. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3637. *
  3638. * Returns 0 for success, non-zero for failure.
  3639. */
  3640. int
  3641. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3642. enum reset_type type)
  3643. {
  3644. int r;
  3645. unsigned long flags;
  3646. u8 pe_complete = ioc->wait_for_port_enable_to_complete;
  3647. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3648. __func__));
  3649. if (ioc->pci_error_recovery) {
  3650. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3651. ioc->name, __func__);
  3652. r = 0;
  3653. goto out;
  3654. }
  3655. if (mpt2sas_fwfault_debug)
  3656. mpt2sas_halt_firmware(ioc);
  3657. /* TODO - What we really should be doing is pulling
  3658. * out all the code associated with NO_SLEEP; its never used.
  3659. * That is legacy code from mpt fusion driver, ported over.
  3660. * I will leave this BUG_ON here for now till its been resolved.
  3661. */
  3662. BUG_ON(sleep_flag == NO_SLEEP);
  3663. /* wait for an active reset in progress to complete */
  3664. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3665. do {
  3666. ssleep(1);
  3667. } while (ioc->shost_recovery == 1);
  3668. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3669. __func__));
  3670. return ioc->ioc_reset_in_progress_status;
  3671. }
  3672. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3673. ioc->shost_recovery = 1;
  3674. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3675. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3676. _wait_for_commands_to_complete(ioc, sleep_flag);
  3677. _base_mask_interrupts(ioc);
  3678. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3679. if (r)
  3680. goto out;
  3681. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3682. /* If this hard reset is called while port enable is active, then
  3683. * there is no reason to call make_ioc_operational
  3684. */
  3685. if (pe_complete) {
  3686. r = -EFAULT;
  3687. goto out;
  3688. }
  3689. r = _base_make_ioc_operational(ioc, sleep_flag);
  3690. if (!r)
  3691. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3692. out:
  3693. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3694. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3695. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3696. ioc->ioc_reset_in_progress_status = r;
  3697. ioc->shost_recovery = 0;
  3698. complete(&ioc->shost_recovery_done);
  3699. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3700. mutex_unlock(&ioc->reset_in_progress_mutex);
  3701. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3702. __func__));
  3703. return r;
  3704. }