mwl8k.c 98 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Register definitions */
  30. #define MWL8K_HIU_GEN_PTR 0x00000c10
  31. #define MWL8K_MODE_STA 0x0000005a
  32. #define MWL8K_MODE_AP 0x000000a5
  33. #define MWL8K_HIU_INT_CODE 0x00000c14
  34. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  35. #define MWL8K_FWAP_READY 0xf1f2f4a5
  36. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  37. #define MWL8K_HIU_SCRATCH 0x00000c40
  38. /* Host->device communications */
  39. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  40. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  41. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  42. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  43. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  44. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  45. #define MWL8K_H2A_INT_RESET (1 << 15)
  46. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  47. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  48. /* Device->host communications */
  49. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  50. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  51. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  52. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  53. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  54. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  55. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  56. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  57. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  58. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  59. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  60. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  61. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  62. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  63. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  64. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  65. MWL8K_A2H_INT_CHNL_SWITCHED | \
  66. MWL8K_A2H_INT_QUEUE_EMPTY | \
  67. MWL8K_A2H_INT_RADAR_DETECT | \
  68. MWL8K_A2H_INT_RADIO_ON | \
  69. MWL8K_A2H_INT_RADIO_OFF | \
  70. MWL8K_A2H_INT_MAC_EVENT | \
  71. MWL8K_A2H_INT_OPC_DONE | \
  72. MWL8K_A2H_INT_RX_READY | \
  73. MWL8K_A2H_INT_TX_DONE)
  74. #define MWL8K_RX_QUEUES 1
  75. #define MWL8K_TX_QUEUES 4
  76. struct rxd_ops {
  77. int rxd_size;
  78. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  79. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  80. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  81. __le16 *qos);
  82. };
  83. struct mwl8k_device_info {
  84. char *part_name;
  85. char *helper_image;
  86. char *fw_image;
  87. struct rxd_ops *ap_rxd_ops;
  88. };
  89. struct mwl8k_rx_queue {
  90. int rxd_count;
  91. /* hw receives here */
  92. int head;
  93. /* refill descs here */
  94. int tail;
  95. void *rxd;
  96. dma_addr_t rxd_dma;
  97. struct {
  98. struct sk_buff *skb;
  99. DEFINE_DMA_UNMAP_ADDR(dma);
  100. } *buf;
  101. };
  102. struct mwl8k_tx_queue {
  103. /* hw transmits here */
  104. int head;
  105. /* sw appends here */
  106. int tail;
  107. unsigned int len;
  108. struct mwl8k_tx_desc *txd;
  109. dma_addr_t txd_dma;
  110. struct sk_buff **skb;
  111. };
  112. struct mwl8k_priv {
  113. struct ieee80211_hw *hw;
  114. struct pci_dev *pdev;
  115. struct mwl8k_device_info *device_info;
  116. void __iomem *sram;
  117. void __iomem *regs;
  118. /* firmware */
  119. struct firmware *fw_helper;
  120. struct firmware *fw_ucode;
  121. /* hardware/firmware parameters */
  122. bool ap_fw;
  123. struct rxd_ops *rxd_ops;
  124. struct ieee80211_supported_band band_24;
  125. struct ieee80211_channel channels_24[14];
  126. struct ieee80211_rate rates_24[14];
  127. struct ieee80211_supported_band band_50;
  128. struct ieee80211_channel channels_50[4];
  129. struct ieee80211_rate rates_50[9];
  130. u32 ap_macids_supported;
  131. u32 sta_macids_supported;
  132. /* firmware access */
  133. struct mutex fw_mutex;
  134. struct task_struct *fw_mutex_owner;
  135. int fw_mutex_depth;
  136. struct completion *hostcmd_wait;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  140. struct completion *tx_wait;
  141. /* List of interfaces. */
  142. u32 macids_used;
  143. struct list_head vif_list;
  144. /* power management status cookie from firmware */
  145. u32 *cookie;
  146. dma_addr_t cookie_dma;
  147. u16 num_mcaddrs;
  148. u8 hw_rev;
  149. u32 fw_rev;
  150. /*
  151. * Running count of TX packets in flight, to avoid
  152. * iterating over the transmit rings each time.
  153. */
  154. int pending_tx_pkts;
  155. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  156. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool sniffer_enabled;
  160. bool wmm_enabled;
  161. /* XXX need to convert this to handle multiple interfaces */
  162. bool capture_beacon;
  163. u8 capture_bssid[ETH_ALEN];
  164. struct sk_buff *beacon_skb;
  165. /*
  166. * This FJ worker has to be global as it is scheduled from the
  167. * RX handler. At this point we don't know which interface it
  168. * belongs to until the list of bssids waiting to complete join
  169. * is checked.
  170. */
  171. struct work_struct finalize_join_worker;
  172. /* Tasklet to perform TX reclaim. */
  173. struct tasklet_struct poll_tx_task;
  174. /* Tasklet to perform RX. */
  175. struct tasklet_struct poll_rx_task;
  176. };
  177. /* Per interface specific private data */
  178. struct mwl8k_vif {
  179. struct list_head list;
  180. struct ieee80211_vif *vif;
  181. /* Firmware macid for this vif. */
  182. int macid;
  183. /* Non AMPDU sequence number assigned by driver. */
  184. u16 seqno;
  185. };
  186. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  187. struct mwl8k_sta {
  188. /* Index into station database. Returned by UPDATE_STADB. */
  189. u8 peer_id;
  190. };
  191. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  192. static const struct ieee80211_channel mwl8k_channels_24[] = {
  193. { .center_freq = 2412, .hw_value = 1, },
  194. { .center_freq = 2417, .hw_value = 2, },
  195. { .center_freq = 2422, .hw_value = 3, },
  196. { .center_freq = 2427, .hw_value = 4, },
  197. { .center_freq = 2432, .hw_value = 5, },
  198. { .center_freq = 2437, .hw_value = 6, },
  199. { .center_freq = 2442, .hw_value = 7, },
  200. { .center_freq = 2447, .hw_value = 8, },
  201. { .center_freq = 2452, .hw_value = 9, },
  202. { .center_freq = 2457, .hw_value = 10, },
  203. { .center_freq = 2462, .hw_value = 11, },
  204. { .center_freq = 2467, .hw_value = 12, },
  205. { .center_freq = 2472, .hw_value = 13, },
  206. { .center_freq = 2484, .hw_value = 14, },
  207. };
  208. static const struct ieee80211_rate mwl8k_rates_24[] = {
  209. { .bitrate = 10, .hw_value = 2, },
  210. { .bitrate = 20, .hw_value = 4, },
  211. { .bitrate = 55, .hw_value = 11, },
  212. { .bitrate = 110, .hw_value = 22, },
  213. { .bitrate = 220, .hw_value = 44, },
  214. { .bitrate = 60, .hw_value = 12, },
  215. { .bitrate = 90, .hw_value = 18, },
  216. { .bitrate = 120, .hw_value = 24, },
  217. { .bitrate = 180, .hw_value = 36, },
  218. { .bitrate = 240, .hw_value = 48, },
  219. { .bitrate = 360, .hw_value = 72, },
  220. { .bitrate = 480, .hw_value = 96, },
  221. { .bitrate = 540, .hw_value = 108, },
  222. { .bitrate = 720, .hw_value = 144, },
  223. };
  224. static const struct ieee80211_channel mwl8k_channels_50[] = {
  225. { .center_freq = 5180, .hw_value = 36, },
  226. { .center_freq = 5200, .hw_value = 40, },
  227. { .center_freq = 5220, .hw_value = 44, },
  228. { .center_freq = 5240, .hw_value = 48, },
  229. };
  230. static const struct ieee80211_rate mwl8k_rates_50[] = {
  231. { .bitrate = 60, .hw_value = 12, },
  232. { .bitrate = 90, .hw_value = 18, },
  233. { .bitrate = 120, .hw_value = 24, },
  234. { .bitrate = 180, .hw_value = 36, },
  235. { .bitrate = 240, .hw_value = 48, },
  236. { .bitrate = 360, .hw_value = 72, },
  237. { .bitrate = 480, .hw_value = 96, },
  238. { .bitrate = 540, .hw_value = 108, },
  239. { .bitrate = 720, .hw_value = 144, },
  240. };
  241. /* Set or get info from Firmware */
  242. #define MWL8K_CMD_SET 0x0001
  243. #define MWL8K_CMD_GET 0x0000
  244. /* Firmware command codes */
  245. #define MWL8K_CMD_CODE_DNLD 0x0001
  246. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  247. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  248. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  249. #define MWL8K_CMD_GET_STAT 0x0014
  250. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  251. #define MWL8K_CMD_RF_TX_POWER 0x001e
  252. #define MWL8K_CMD_RF_ANTENNA 0x0020
  253. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  254. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  255. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  256. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  257. #define MWL8K_CMD_SET_AID 0x010d
  258. #define MWL8K_CMD_SET_RATE 0x0110
  259. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  260. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  261. #define MWL8K_CMD_SET_SLOT 0x0114
  262. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  263. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  264. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  265. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  266. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  267. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  268. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  269. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  270. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  271. #define MWL8K_CMD_UPDATE_STADB 0x1123
  272. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  273. {
  274. u16 command = le16_to_cpu(cmd);
  275. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  276. snprintf(buf, bufsize, "%s", #x);\
  277. return buf;\
  278. } while (0)
  279. switch (command & ~0x8000) {
  280. MWL8K_CMDNAME(CODE_DNLD);
  281. MWL8K_CMDNAME(GET_HW_SPEC);
  282. MWL8K_CMDNAME(SET_HW_SPEC);
  283. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  284. MWL8K_CMDNAME(GET_STAT);
  285. MWL8K_CMDNAME(RADIO_CONTROL);
  286. MWL8K_CMDNAME(RF_TX_POWER);
  287. MWL8K_CMDNAME(RF_ANTENNA);
  288. MWL8K_CMDNAME(SET_BEACON);
  289. MWL8K_CMDNAME(SET_PRE_SCAN);
  290. MWL8K_CMDNAME(SET_POST_SCAN);
  291. MWL8K_CMDNAME(SET_RF_CHANNEL);
  292. MWL8K_CMDNAME(SET_AID);
  293. MWL8K_CMDNAME(SET_RATE);
  294. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  295. MWL8K_CMDNAME(RTS_THRESHOLD);
  296. MWL8K_CMDNAME(SET_SLOT);
  297. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  298. MWL8K_CMDNAME(SET_WMM_MODE);
  299. MWL8K_CMDNAME(MIMO_CONFIG);
  300. MWL8K_CMDNAME(USE_FIXED_RATE);
  301. MWL8K_CMDNAME(ENABLE_SNIFFER);
  302. MWL8K_CMDNAME(SET_MAC_ADDR);
  303. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  304. MWL8K_CMDNAME(BSS_START);
  305. MWL8K_CMDNAME(SET_NEW_STN);
  306. MWL8K_CMDNAME(UPDATE_STADB);
  307. default:
  308. snprintf(buf, bufsize, "0x%x", cmd);
  309. }
  310. #undef MWL8K_CMDNAME
  311. return buf;
  312. }
  313. /* Hardware and firmware reset */
  314. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  315. {
  316. iowrite32(MWL8K_H2A_INT_RESET,
  317. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  318. iowrite32(MWL8K_H2A_INT_RESET,
  319. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  320. msleep(20);
  321. }
  322. /* Release fw image */
  323. static void mwl8k_release_fw(struct firmware **fw)
  324. {
  325. if (*fw == NULL)
  326. return;
  327. release_firmware(*fw);
  328. *fw = NULL;
  329. }
  330. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  331. {
  332. mwl8k_release_fw(&priv->fw_ucode);
  333. mwl8k_release_fw(&priv->fw_helper);
  334. }
  335. /* Request fw image */
  336. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  337. const char *fname, struct firmware **fw)
  338. {
  339. /* release current image */
  340. if (*fw != NULL)
  341. mwl8k_release_fw(fw);
  342. return request_firmware((const struct firmware **)fw,
  343. fname, &priv->pdev->dev);
  344. }
  345. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  346. {
  347. struct mwl8k_device_info *di = priv->device_info;
  348. int rc;
  349. if (di->helper_image != NULL) {
  350. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  351. if (rc) {
  352. printk(KERN_ERR "%s: Error requesting helper "
  353. "firmware file %s\n", pci_name(priv->pdev),
  354. di->helper_image);
  355. return rc;
  356. }
  357. }
  358. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  359. if (rc) {
  360. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  361. pci_name(priv->pdev), di->fw_image);
  362. mwl8k_release_fw(&priv->fw_helper);
  363. return rc;
  364. }
  365. return 0;
  366. }
  367. struct mwl8k_cmd_pkt {
  368. __le16 code;
  369. __le16 length;
  370. __u8 seq_num;
  371. __u8 macid;
  372. __le16 result;
  373. char payload[0];
  374. } __packed;
  375. /*
  376. * Firmware loading.
  377. */
  378. static int
  379. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  380. {
  381. void __iomem *regs = priv->regs;
  382. dma_addr_t dma_addr;
  383. int loops;
  384. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  385. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  386. return -ENOMEM;
  387. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  388. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  389. iowrite32(MWL8K_H2A_INT_DOORBELL,
  390. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  391. iowrite32(MWL8K_H2A_INT_DUMMY,
  392. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  393. loops = 1000;
  394. do {
  395. u32 int_code;
  396. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  397. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  398. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  399. break;
  400. }
  401. cond_resched();
  402. udelay(1);
  403. } while (--loops);
  404. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  405. return loops ? 0 : -ETIMEDOUT;
  406. }
  407. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  408. const u8 *data, size_t length)
  409. {
  410. struct mwl8k_cmd_pkt *cmd;
  411. int done;
  412. int rc = 0;
  413. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  414. if (cmd == NULL)
  415. return -ENOMEM;
  416. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  417. cmd->seq_num = 0;
  418. cmd->macid = 0;
  419. cmd->result = 0;
  420. done = 0;
  421. while (length) {
  422. int block_size = length > 256 ? 256 : length;
  423. memcpy(cmd->payload, data + done, block_size);
  424. cmd->length = cpu_to_le16(block_size);
  425. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  426. sizeof(*cmd) + block_size);
  427. if (rc)
  428. break;
  429. done += block_size;
  430. length -= block_size;
  431. }
  432. if (!rc) {
  433. cmd->length = 0;
  434. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  435. }
  436. kfree(cmd);
  437. return rc;
  438. }
  439. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  440. const u8 *data, size_t length)
  441. {
  442. unsigned char *buffer;
  443. int may_continue, rc = 0;
  444. u32 done, prev_block_size;
  445. buffer = kmalloc(1024, GFP_KERNEL);
  446. if (buffer == NULL)
  447. return -ENOMEM;
  448. done = 0;
  449. prev_block_size = 0;
  450. may_continue = 1000;
  451. while (may_continue > 0) {
  452. u32 block_size;
  453. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  454. if (block_size & 1) {
  455. block_size &= ~1;
  456. may_continue--;
  457. } else {
  458. done += prev_block_size;
  459. length -= prev_block_size;
  460. }
  461. if (block_size > 1024 || block_size > length) {
  462. rc = -EOVERFLOW;
  463. break;
  464. }
  465. if (length == 0) {
  466. rc = 0;
  467. break;
  468. }
  469. if (block_size == 0) {
  470. rc = -EPROTO;
  471. may_continue--;
  472. udelay(1);
  473. continue;
  474. }
  475. prev_block_size = block_size;
  476. memcpy(buffer, data + done, block_size);
  477. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  478. if (rc)
  479. break;
  480. }
  481. if (!rc && length != 0)
  482. rc = -EREMOTEIO;
  483. kfree(buffer);
  484. return rc;
  485. }
  486. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  487. {
  488. struct mwl8k_priv *priv = hw->priv;
  489. struct firmware *fw = priv->fw_ucode;
  490. int rc;
  491. int loops;
  492. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  493. struct firmware *helper = priv->fw_helper;
  494. if (helper == NULL) {
  495. printk(KERN_ERR "%s: helper image needed but none "
  496. "given\n", pci_name(priv->pdev));
  497. return -EINVAL;
  498. }
  499. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  500. if (rc) {
  501. printk(KERN_ERR "%s: unable to load firmware "
  502. "helper image\n", pci_name(priv->pdev));
  503. return rc;
  504. }
  505. msleep(5);
  506. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  507. } else {
  508. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  509. }
  510. if (rc) {
  511. printk(KERN_ERR "%s: unable to load firmware image\n",
  512. pci_name(priv->pdev));
  513. return rc;
  514. }
  515. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  516. loops = 500000;
  517. do {
  518. u32 ready_code;
  519. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  520. if (ready_code == MWL8K_FWAP_READY) {
  521. priv->ap_fw = 1;
  522. break;
  523. } else if (ready_code == MWL8K_FWSTA_READY) {
  524. priv->ap_fw = 0;
  525. break;
  526. }
  527. cond_resched();
  528. udelay(1);
  529. } while (--loops);
  530. return loops ? 0 : -ETIMEDOUT;
  531. }
  532. /* DMA header used by firmware and hardware. */
  533. struct mwl8k_dma_data {
  534. __le16 fwlen;
  535. struct ieee80211_hdr wh;
  536. char data[0];
  537. } __packed;
  538. /* Routines to add/remove DMA header from skb. */
  539. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  540. {
  541. struct mwl8k_dma_data *tr;
  542. int hdrlen;
  543. tr = (struct mwl8k_dma_data *)skb->data;
  544. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  545. if (hdrlen != sizeof(tr->wh)) {
  546. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  547. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  548. *((__le16 *)(tr->data - 2)) = qos;
  549. } else {
  550. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  551. }
  552. }
  553. if (hdrlen != sizeof(*tr))
  554. skb_pull(skb, sizeof(*tr) - hdrlen);
  555. }
  556. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  557. {
  558. struct ieee80211_hdr *wh;
  559. int hdrlen;
  560. struct mwl8k_dma_data *tr;
  561. /*
  562. * Add a firmware DMA header; the firmware requires that we
  563. * present a 2-byte payload length followed by a 4-address
  564. * header (without QoS field), followed (optionally) by any
  565. * WEP/ExtIV header (but only filled in for CCMP).
  566. */
  567. wh = (struct ieee80211_hdr *)skb->data;
  568. hdrlen = ieee80211_hdrlen(wh->frame_control);
  569. if (hdrlen != sizeof(*tr))
  570. skb_push(skb, sizeof(*tr) - hdrlen);
  571. if (ieee80211_is_data_qos(wh->frame_control))
  572. hdrlen -= 2;
  573. tr = (struct mwl8k_dma_data *)skb->data;
  574. if (wh != &tr->wh)
  575. memmove(&tr->wh, wh, hdrlen);
  576. if (hdrlen != sizeof(tr->wh))
  577. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  578. /*
  579. * Firmware length is the length of the fully formed "802.11
  580. * payload". That is, everything except for the 802.11 header.
  581. * This includes all crypto material including the MIC.
  582. */
  583. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  584. }
  585. /*
  586. * Packet reception for 88w8366 AP firmware.
  587. */
  588. struct mwl8k_rxd_8366_ap {
  589. __le16 pkt_len;
  590. __u8 sq2;
  591. __u8 rate;
  592. __le32 pkt_phys_addr;
  593. __le32 next_rxd_phys_addr;
  594. __le16 qos_control;
  595. __le16 htsig2;
  596. __le32 hw_rssi_info;
  597. __le32 hw_noise_floor_info;
  598. __u8 noise_floor;
  599. __u8 pad0[3];
  600. __u8 rssi;
  601. __u8 rx_status;
  602. __u8 channel;
  603. __u8 rx_ctrl;
  604. } __packed;
  605. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  606. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  607. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  608. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  609. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  610. {
  611. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  612. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  613. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  614. }
  615. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  616. {
  617. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  618. rxd->pkt_len = cpu_to_le16(len);
  619. rxd->pkt_phys_addr = cpu_to_le32(addr);
  620. wmb();
  621. rxd->rx_ctrl = 0;
  622. }
  623. static int
  624. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  625. __le16 *qos)
  626. {
  627. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  628. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  629. return -1;
  630. rmb();
  631. memset(status, 0, sizeof(*status));
  632. status->signal = -rxd->rssi;
  633. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  634. status->flag |= RX_FLAG_HT;
  635. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  636. status->flag |= RX_FLAG_40MHZ;
  637. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  638. } else {
  639. int i;
  640. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  641. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  642. status->rate_idx = i;
  643. break;
  644. }
  645. }
  646. }
  647. if (rxd->channel > 14) {
  648. status->band = IEEE80211_BAND_5GHZ;
  649. if (!(status->flag & RX_FLAG_HT))
  650. status->rate_idx -= 5;
  651. } else {
  652. status->band = IEEE80211_BAND_2GHZ;
  653. }
  654. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  655. *qos = rxd->qos_control;
  656. return le16_to_cpu(rxd->pkt_len);
  657. }
  658. static struct rxd_ops rxd_8366_ap_ops = {
  659. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  660. .rxd_init = mwl8k_rxd_8366_ap_init,
  661. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  662. .rxd_process = mwl8k_rxd_8366_ap_process,
  663. };
  664. /*
  665. * Packet reception for STA firmware.
  666. */
  667. struct mwl8k_rxd_sta {
  668. __le16 pkt_len;
  669. __u8 link_quality;
  670. __u8 noise_level;
  671. __le32 pkt_phys_addr;
  672. __le32 next_rxd_phys_addr;
  673. __le16 qos_control;
  674. __le16 rate_info;
  675. __le32 pad0[4];
  676. __u8 rssi;
  677. __u8 channel;
  678. __le16 pad1;
  679. __u8 rx_ctrl;
  680. __u8 rx_status;
  681. __u8 pad2[2];
  682. } __packed;
  683. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  684. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  685. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  686. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  687. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  688. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  689. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  690. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  691. {
  692. struct mwl8k_rxd_sta *rxd = _rxd;
  693. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  694. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  695. }
  696. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  697. {
  698. struct mwl8k_rxd_sta *rxd = _rxd;
  699. rxd->pkt_len = cpu_to_le16(len);
  700. rxd->pkt_phys_addr = cpu_to_le32(addr);
  701. wmb();
  702. rxd->rx_ctrl = 0;
  703. }
  704. static int
  705. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  706. __le16 *qos)
  707. {
  708. struct mwl8k_rxd_sta *rxd = _rxd;
  709. u16 rate_info;
  710. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  711. return -1;
  712. rmb();
  713. rate_info = le16_to_cpu(rxd->rate_info);
  714. memset(status, 0, sizeof(*status));
  715. status->signal = -rxd->rssi;
  716. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  717. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  718. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  719. status->flag |= RX_FLAG_SHORTPRE;
  720. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  721. status->flag |= RX_FLAG_40MHZ;
  722. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  723. status->flag |= RX_FLAG_SHORT_GI;
  724. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  725. status->flag |= RX_FLAG_HT;
  726. if (rxd->channel > 14) {
  727. status->band = IEEE80211_BAND_5GHZ;
  728. if (!(status->flag & RX_FLAG_HT))
  729. status->rate_idx -= 5;
  730. } else {
  731. status->band = IEEE80211_BAND_2GHZ;
  732. }
  733. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  734. *qos = rxd->qos_control;
  735. return le16_to_cpu(rxd->pkt_len);
  736. }
  737. static struct rxd_ops rxd_sta_ops = {
  738. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  739. .rxd_init = mwl8k_rxd_sta_init,
  740. .rxd_refill = mwl8k_rxd_sta_refill,
  741. .rxd_process = mwl8k_rxd_sta_process,
  742. };
  743. #define MWL8K_RX_DESCS 256
  744. #define MWL8K_RX_MAXSZ 3800
  745. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  746. {
  747. struct mwl8k_priv *priv = hw->priv;
  748. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  749. int size;
  750. int i;
  751. rxq->rxd_count = 0;
  752. rxq->head = 0;
  753. rxq->tail = 0;
  754. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  755. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  756. if (rxq->rxd == NULL) {
  757. wiphy_err(hw->wiphy, "failed to alloc rx descriptors\n");
  758. return -ENOMEM;
  759. }
  760. memset(rxq->rxd, 0, size);
  761. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  762. if (rxq->buf == NULL) {
  763. wiphy_err(hw->wiphy, "failed to alloc rx skbuff list\n");
  764. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  765. return -ENOMEM;
  766. }
  767. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  768. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  769. int desc_size;
  770. void *rxd;
  771. int nexti;
  772. dma_addr_t next_dma_addr;
  773. desc_size = priv->rxd_ops->rxd_size;
  774. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  775. nexti = i + 1;
  776. if (nexti == MWL8K_RX_DESCS)
  777. nexti = 0;
  778. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  779. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  780. }
  781. return 0;
  782. }
  783. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  784. {
  785. struct mwl8k_priv *priv = hw->priv;
  786. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  787. int refilled;
  788. refilled = 0;
  789. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  790. struct sk_buff *skb;
  791. dma_addr_t addr;
  792. int rx;
  793. void *rxd;
  794. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  795. if (skb == NULL)
  796. break;
  797. addr = pci_map_single(priv->pdev, skb->data,
  798. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  799. rxq->rxd_count++;
  800. rx = rxq->tail++;
  801. if (rxq->tail == MWL8K_RX_DESCS)
  802. rxq->tail = 0;
  803. rxq->buf[rx].skb = skb;
  804. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  805. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  806. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  807. refilled++;
  808. }
  809. return refilled;
  810. }
  811. /* Must be called only when the card's reception is completely halted */
  812. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  813. {
  814. struct mwl8k_priv *priv = hw->priv;
  815. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  816. int i;
  817. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  818. if (rxq->buf[i].skb != NULL) {
  819. pci_unmap_single(priv->pdev,
  820. dma_unmap_addr(&rxq->buf[i], dma),
  821. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  822. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  823. kfree_skb(rxq->buf[i].skb);
  824. rxq->buf[i].skb = NULL;
  825. }
  826. }
  827. kfree(rxq->buf);
  828. rxq->buf = NULL;
  829. pci_free_consistent(priv->pdev,
  830. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  831. rxq->rxd, rxq->rxd_dma);
  832. rxq->rxd = NULL;
  833. }
  834. /*
  835. * Scan a list of BSSIDs to process for finalize join.
  836. * Allows for extension to process multiple BSSIDs.
  837. */
  838. static inline int
  839. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  840. {
  841. return priv->capture_beacon &&
  842. ieee80211_is_beacon(wh->frame_control) &&
  843. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  844. }
  845. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  846. struct sk_buff *skb)
  847. {
  848. struct mwl8k_priv *priv = hw->priv;
  849. priv->capture_beacon = false;
  850. memset(priv->capture_bssid, 0, ETH_ALEN);
  851. /*
  852. * Use GFP_ATOMIC as rxq_process is called from
  853. * the primary interrupt handler, memory allocation call
  854. * must not sleep.
  855. */
  856. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  857. if (priv->beacon_skb != NULL)
  858. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  859. }
  860. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  861. {
  862. struct mwl8k_priv *priv = hw->priv;
  863. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  864. int processed;
  865. processed = 0;
  866. while (rxq->rxd_count && limit--) {
  867. struct sk_buff *skb;
  868. void *rxd;
  869. int pkt_len;
  870. struct ieee80211_rx_status status;
  871. __le16 qos;
  872. skb = rxq->buf[rxq->head].skb;
  873. if (skb == NULL)
  874. break;
  875. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  876. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  877. if (pkt_len < 0)
  878. break;
  879. rxq->buf[rxq->head].skb = NULL;
  880. pci_unmap_single(priv->pdev,
  881. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  882. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  883. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  884. rxq->head++;
  885. if (rxq->head == MWL8K_RX_DESCS)
  886. rxq->head = 0;
  887. rxq->rxd_count--;
  888. skb_put(skb, pkt_len);
  889. mwl8k_remove_dma_header(skb, qos);
  890. /*
  891. * Check for a pending join operation. Save a
  892. * copy of the beacon and schedule a tasklet to
  893. * send a FINALIZE_JOIN command to the firmware.
  894. */
  895. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  896. mwl8k_save_beacon(hw, skb);
  897. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  898. ieee80211_rx_irqsafe(hw, skb);
  899. processed++;
  900. }
  901. return processed;
  902. }
  903. /*
  904. * Packet transmission.
  905. */
  906. #define MWL8K_TXD_STATUS_OK 0x00000001
  907. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  908. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  909. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  910. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  911. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  912. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  913. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  914. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  915. #define MWL8K_QOS_EOSP 0x0010
  916. struct mwl8k_tx_desc {
  917. __le32 status;
  918. __u8 data_rate;
  919. __u8 tx_priority;
  920. __le16 qos_control;
  921. __le32 pkt_phys_addr;
  922. __le16 pkt_len;
  923. __u8 dest_MAC_addr[ETH_ALEN];
  924. __le32 next_txd_phys_addr;
  925. __le32 reserved;
  926. __le16 rate_info;
  927. __u8 peer_id;
  928. __u8 tx_frag_cnt;
  929. } __packed;
  930. #define MWL8K_TX_DESCS 128
  931. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  932. {
  933. struct mwl8k_priv *priv = hw->priv;
  934. struct mwl8k_tx_queue *txq = priv->txq + index;
  935. int size;
  936. int i;
  937. txq->len = 0;
  938. txq->head = 0;
  939. txq->tail = 0;
  940. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  941. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  942. if (txq->txd == NULL) {
  943. wiphy_err(hw->wiphy, "failed to alloc tx descriptors\n");
  944. return -ENOMEM;
  945. }
  946. memset(txq->txd, 0, size);
  947. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  948. if (txq->skb == NULL) {
  949. wiphy_err(hw->wiphy, "failed to alloc tx skbuff list\n");
  950. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  951. return -ENOMEM;
  952. }
  953. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  954. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  955. struct mwl8k_tx_desc *tx_desc;
  956. int nexti;
  957. tx_desc = txq->txd + i;
  958. nexti = (i + 1) % MWL8K_TX_DESCS;
  959. tx_desc->status = 0;
  960. tx_desc->next_txd_phys_addr =
  961. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  962. }
  963. return 0;
  964. }
  965. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  966. {
  967. iowrite32(MWL8K_H2A_INT_PPA_READY,
  968. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  969. iowrite32(MWL8K_H2A_INT_DUMMY,
  970. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  971. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  972. }
  973. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  974. {
  975. struct mwl8k_priv *priv = hw->priv;
  976. int i;
  977. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  978. struct mwl8k_tx_queue *txq = priv->txq + i;
  979. int fw_owned = 0;
  980. int drv_owned = 0;
  981. int unused = 0;
  982. int desc;
  983. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  984. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  985. u32 status;
  986. status = le32_to_cpu(tx_desc->status);
  987. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  988. fw_owned++;
  989. else
  990. drv_owned++;
  991. if (tx_desc->pkt_len == 0)
  992. unused++;
  993. }
  994. wiphy_err(hw->wiphy,
  995. "txq[%d] len=%d head=%d tail=%d "
  996. "fw_owned=%d drv_owned=%d unused=%d\n",
  997. i,
  998. txq->len, txq->head, txq->tail,
  999. fw_owned, drv_owned, unused);
  1000. }
  1001. }
  1002. /*
  1003. * Must be called with priv->fw_mutex held and tx queues stopped.
  1004. */
  1005. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1006. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1007. {
  1008. struct mwl8k_priv *priv = hw->priv;
  1009. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1010. int retry;
  1011. int rc;
  1012. might_sleep();
  1013. /*
  1014. * The TX queues are stopped at this point, so this test
  1015. * doesn't need to take ->tx_lock.
  1016. */
  1017. if (!priv->pending_tx_pkts)
  1018. return 0;
  1019. retry = 0;
  1020. rc = 0;
  1021. spin_lock_bh(&priv->tx_lock);
  1022. priv->tx_wait = &tx_wait;
  1023. while (!rc) {
  1024. int oldcount;
  1025. unsigned long timeout;
  1026. oldcount = priv->pending_tx_pkts;
  1027. spin_unlock_bh(&priv->tx_lock);
  1028. timeout = wait_for_completion_timeout(&tx_wait,
  1029. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1030. spin_lock_bh(&priv->tx_lock);
  1031. if (timeout) {
  1032. WARN_ON(priv->pending_tx_pkts);
  1033. if (retry) {
  1034. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1035. }
  1036. break;
  1037. }
  1038. if (priv->pending_tx_pkts < oldcount) {
  1039. wiphy_notice(hw->wiphy,
  1040. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1041. oldcount, priv->pending_tx_pkts);
  1042. retry = 1;
  1043. continue;
  1044. }
  1045. priv->tx_wait = NULL;
  1046. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1047. MWL8K_TX_WAIT_TIMEOUT_MS);
  1048. mwl8k_dump_tx_rings(hw);
  1049. rc = -ETIMEDOUT;
  1050. }
  1051. spin_unlock_bh(&priv->tx_lock);
  1052. return rc;
  1053. }
  1054. #define MWL8K_TXD_SUCCESS(status) \
  1055. ((status) & (MWL8K_TXD_STATUS_OK | \
  1056. MWL8K_TXD_STATUS_OK_RETRY | \
  1057. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1058. static int
  1059. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1060. {
  1061. struct mwl8k_priv *priv = hw->priv;
  1062. struct mwl8k_tx_queue *txq = priv->txq + index;
  1063. int processed;
  1064. processed = 0;
  1065. while (txq->len > 0 && limit--) {
  1066. int tx;
  1067. struct mwl8k_tx_desc *tx_desc;
  1068. unsigned long addr;
  1069. int size;
  1070. struct sk_buff *skb;
  1071. struct ieee80211_tx_info *info;
  1072. u32 status;
  1073. tx = txq->head;
  1074. tx_desc = txq->txd + tx;
  1075. status = le32_to_cpu(tx_desc->status);
  1076. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1077. if (!force)
  1078. break;
  1079. tx_desc->status &=
  1080. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1081. }
  1082. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1083. BUG_ON(txq->len == 0);
  1084. txq->len--;
  1085. priv->pending_tx_pkts--;
  1086. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1087. size = le16_to_cpu(tx_desc->pkt_len);
  1088. skb = txq->skb[tx];
  1089. txq->skb[tx] = NULL;
  1090. BUG_ON(skb == NULL);
  1091. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1092. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1093. /* Mark descriptor as unused */
  1094. tx_desc->pkt_phys_addr = 0;
  1095. tx_desc->pkt_len = 0;
  1096. info = IEEE80211_SKB_CB(skb);
  1097. ieee80211_tx_info_clear_status(info);
  1098. if (MWL8K_TXD_SUCCESS(status))
  1099. info->flags |= IEEE80211_TX_STAT_ACK;
  1100. ieee80211_tx_status_irqsafe(hw, skb);
  1101. processed++;
  1102. }
  1103. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1104. ieee80211_wake_queue(hw, index);
  1105. return processed;
  1106. }
  1107. /* must be called only when the card's transmit is completely halted */
  1108. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1109. {
  1110. struct mwl8k_priv *priv = hw->priv;
  1111. struct mwl8k_tx_queue *txq = priv->txq + index;
  1112. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1113. kfree(txq->skb);
  1114. txq->skb = NULL;
  1115. pci_free_consistent(priv->pdev,
  1116. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1117. txq->txd, txq->txd_dma);
  1118. txq->txd = NULL;
  1119. }
  1120. static int
  1121. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1122. {
  1123. struct mwl8k_priv *priv = hw->priv;
  1124. struct ieee80211_tx_info *tx_info;
  1125. struct mwl8k_vif *mwl8k_vif;
  1126. struct ieee80211_hdr *wh;
  1127. struct mwl8k_tx_queue *txq;
  1128. struct mwl8k_tx_desc *tx;
  1129. dma_addr_t dma;
  1130. u32 txstatus;
  1131. u8 txdatarate;
  1132. u16 qos;
  1133. wh = (struct ieee80211_hdr *)skb->data;
  1134. if (ieee80211_is_data_qos(wh->frame_control))
  1135. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1136. else
  1137. qos = 0;
  1138. mwl8k_add_dma_header(skb);
  1139. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1140. tx_info = IEEE80211_SKB_CB(skb);
  1141. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1142. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1143. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1144. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1145. mwl8k_vif->seqno += 0x10;
  1146. }
  1147. /* Setup firmware control bit fields for each frame type. */
  1148. txstatus = 0;
  1149. txdatarate = 0;
  1150. if (ieee80211_is_mgmt(wh->frame_control) ||
  1151. ieee80211_is_ctl(wh->frame_control)) {
  1152. txdatarate = 0;
  1153. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1154. } else if (ieee80211_is_data(wh->frame_control)) {
  1155. txdatarate = 1;
  1156. if (is_multicast_ether_addr(wh->addr1))
  1157. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1158. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1159. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1160. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1161. else
  1162. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1163. }
  1164. dma = pci_map_single(priv->pdev, skb->data,
  1165. skb->len, PCI_DMA_TODEVICE);
  1166. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1167. wiphy_debug(hw->wiphy,
  1168. "failed to dma map skb, dropping TX frame.\n");
  1169. dev_kfree_skb(skb);
  1170. return NETDEV_TX_OK;
  1171. }
  1172. spin_lock_bh(&priv->tx_lock);
  1173. txq = priv->txq + index;
  1174. BUG_ON(txq->skb[txq->tail] != NULL);
  1175. txq->skb[txq->tail] = skb;
  1176. tx = txq->txd + txq->tail;
  1177. tx->data_rate = txdatarate;
  1178. tx->tx_priority = index;
  1179. tx->qos_control = cpu_to_le16(qos);
  1180. tx->pkt_phys_addr = cpu_to_le32(dma);
  1181. tx->pkt_len = cpu_to_le16(skb->len);
  1182. tx->rate_info = 0;
  1183. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1184. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1185. else
  1186. tx->peer_id = 0;
  1187. wmb();
  1188. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1189. txq->len++;
  1190. priv->pending_tx_pkts++;
  1191. txq->tail++;
  1192. if (txq->tail == MWL8K_TX_DESCS)
  1193. txq->tail = 0;
  1194. if (txq->head == txq->tail)
  1195. ieee80211_stop_queue(hw, index);
  1196. mwl8k_tx_start(priv);
  1197. spin_unlock_bh(&priv->tx_lock);
  1198. return NETDEV_TX_OK;
  1199. }
  1200. /*
  1201. * Firmware access.
  1202. *
  1203. * We have the following requirements for issuing firmware commands:
  1204. * - Some commands require that the packet transmit path is idle when
  1205. * the command is issued. (For simplicity, we'll just quiesce the
  1206. * transmit path for every command.)
  1207. * - There are certain sequences of commands that need to be issued to
  1208. * the hardware sequentially, with no other intervening commands.
  1209. *
  1210. * This leads to an implementation of a "firmware lock" as a mutex that
  1211. * can be taken recursively, and which is taken by both the low-level
  1212. * command submission function (mwl8k_post_cmd) as well as any users of
  1213. * that function that require issuing of an atomic sequence of commands,
  1214. * and quiesces the transmit path whenever it's taken.
  1215. */
  1216. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1217. {
  1218. struct mwl8k_priv *priv = hw->priv;
  1219. if (priv->fw_mutex_owner != current) {
  1220. int rc;
  1221. mutex_lock(&priv->fw_mutex);
  1222. ieee80211_stop_queues(hw);
  1223. rc = mwl8k_tx_wait_empty(hw);
  1224. if (rc) {
  1225. ieee80211_wake_queues(hw);
  1226. mutex_unlock(&priv->fw_mutex);
  1227. return rc;
  1228. }
  1229. priv->fw_mutex_owner = current;
  1230. }
  1231. priv->fw_mutex_depth++;
  1232. return 0;
  1233. }
  1234. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1235. {
  1236. struct mwl8k_priv *priv = hw->priv;
  1237. if (!--priv->fw_mutex_depth) {
  1238. ieee80211_wake_queues(hw);
  1239. priv->fw_mutex_owner = NULL;
  1240. mutex_unlock(&priv->fw_mutex);
  1241. }
  1242. }
  1243. /*
  1244. * Command processing.
  1245. */
  1246. /* Timeout firmware commands after 10s */
  1247. #define MWL8K_CMD_TIMEOUT_MS 10000
  1248. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1249. {
  1250. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1251. struct mwl8k_priv *priv = hw->priv;
  1252. void __iomem *regs = priv->regs;
  1253. dma_addr_t dma_addr;
  1254. unsigned int dma_size;
  1255. int rc;
  1256. unsigned long timeout = 0;
  1257. u8 buf[32];
  1258. cmd->result = (__force __le16) 0xffff;
  1259. dma_size = le16_to_cpu(cmd->length);
  1260. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1261. PCI_DMA_BIDIRECTIONAL);
  1262. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1263. return -ENOMEM;
  1264. rc = mwl8k_fw_lock(hw);
  1265. if (rc) {
  1266. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1267. PCI_DMA_BIDIRECTIONAL);
  1268. return rc;
  1269. }
  1270. priv->hostcmd_wait = &cmd_wait;
  1271. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1272. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1273. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1274. iowrite32(MWL8K_H2A_INT_DUMMY,
  1275. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1276. timeout = wait_for_completion_timeout(&cmd_wait,
  1277. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1278. priv->hostcmd_wait = NULL;
  1279. mwl8k_fw_unlock(hw);
  1280. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1281. PCI_DMA_BIDIRECTIONAL);
  1282. if (!timeout) {
  1283. wiphy_err(hw->wiphy, "command %s timeout after %u ms\n",
  1284. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1285. MWL8K_CMD_TIMEOUT_MS);
  1286. rc = -ETIMEDOUT;
  1287. } else {
  1288. int ms;
  1289. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1290. rc = cmd->result ? -EINVAL : 0;
  1291. if (rc)
  1292. wiphy_err(hw->wiphy, "command %s error 0x%x\n",
  1293. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1294. le16_to_cpu(cmd->result));
  1295. else if (ms > 2000)
  1296. wiphy_notice(hw->wiphy, "command %s took %d ms\n",
  1297. mwl8k_cmd_name(cmd->code,
  1298. buf, sizeof(buf)),
  1299. ms);
  1300. }
  1301. return rc;
  1302. }
  1303. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1304. struct ieee80211_vif *vif,
  1305. struct mwl8k_cmd_pkt *cmd)
  1306. {
  1307. if (vif != NULL)
  1308. cmd->macid = MWL8K_VIF(vif)->macid;
  1309. return mwl8k_post_cmd(hw, cmd);
  1310. }
  1311. /*
  1312. * Setup code shared between STA and AP firmware images.
  1313. */
  1314. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1315. {
  1316. struct mwl8k_priv *priv = hw->priv;
  1317. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1318. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1319. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1320. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1321. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1322. priv->band_24.channels = priv->channels_24;
  1323. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1324. priv->band_24.bitrates = priv->rates_24;
  1325. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1326. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1327. }
  1328. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1329. {
  1330. struct mwl8k_priv *priv = hw->priv;
  1331. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1332. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1333. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1334. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1335. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1336. priv->band_50.channels = priv->channels_50;
  1337. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1338. priv->band_50.bitrates = priv->rates_50;
  1339. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1340. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1341. }
  1342. /*
  1343. * CMD_GET_HW_SPEC (STA version).
  1344. */
  1345. struct mwl8k_cmd_get_hw_spec_sta {
  1346. struct mwl8k_cmd_pkt header;
  1347. __u8 hw_rev;
  1348. __u8 host_interface;
  1349. __le16 num_mcaddrs;
  1350. __u8 perm_addr[ETH_ALEN];
  1351. __le16 region_code;
  1352. __le32 fw_rev;
  1353. __le32 ps_cookie;
  1354. __le32 caps;
  1355. __u8 mcs_bitmap[16];
  1356. __le32 rx_queue_ptr;
  1357. __le32 num_tx_queues;
  1358. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1359. __le32 caps2;
  1360. __le32 num_tx_desc_per_queue;
  1361. __le32 total_rxd;
  1362. } __packed;
  1363. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1364. #define MWL8K_CAP_GREENFIELD 0x08000000
  1365. #define MWL8K_CAP_AMPDU 0x04000000
  1366. #define MWL8K_CAP_RX_STBC 0x01000000
  1367. #define MWL8K_CAP_TX_STBC 0x00800000
  1368. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1369. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1370. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1371. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1372. #define MWL8K_CAP_DELAY_BA 0x00003000
  1373. #define MWL8K_CAP_MIMO 0x00000200
  1374. #define MWL8K_CAP_40MHZ 0x00000100
  1375. #define MWL8K_CAP_BAND_MASK 0x00000007
  1376. #define MWL8K_CAP_5GHZ 0x00000004
  1377. #define MWL8K_CAP_2GHZ4 0x00000001
  1378. static void
  1379. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1380. struct ieee80211_supported_band *band, u32 cap)
  1381. {
  1382. int rx_streams;
  1383. int tx_streams;
  1384. band->ht_cap.ht_supported = 1;
  1385. if (cap & MWL8K_CAP_MAX_AMSDU)
  1386. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1387. if (cap & MWL8K_CAP_GREENFIELD)
  1388. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1389. if (cap & MWL8K_CAP_AMPDU) {
  1390. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1391. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1392. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1393. }
  1394. if (cap & MWL8K_CAP_RX_STBC)
  1395. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1396. if (cap & MWL8K_CAP_TX_STBC)
  1397. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1398. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1399. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1400. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1401. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1402. if (cap & MWL8K_CAP_DELAY_BA)
  1403. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1404. if (cap & MWL8K_CAP_40MHZ)
  1405. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1406. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1407. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1408. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1409. if (rx_streams >= 2)
  1410. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1411. if (rx_streams >= 3)
  1412. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1413. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1414. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1415. if (rx_streams != tx_streams) {
  1416. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1417. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1418. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1419. }
  1420. }
  1421. static void
  1422. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1423. {
  1424. struct mwl8k_priv *priv = hw->priv;
  1425. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1426. mwl8k_setup_2ghz_band(hw);
  1427. if (caps & MWL8K_CAP_MIMO)
  1428. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1429. }
  1430. if (caps & MWL8K_CAP_5GHZ) {
  1431. mwl8k_setup_5ghz_band(hw);
  1432. if (caps & MWL8K_CAP_MIMO)
  1433. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1434. }
  1435. }
  1436. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1437. {
  1438. struct mwl8k_priv *priv = hw->priv;
  1439. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1440. int rc;
  1441. int i;
  1442. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1443. if (cmd == NULL)
  1444. return -ENOMEM;
  1445. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1446. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1447. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1448. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1449. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1450. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1451. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1452. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1453. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1454. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1455. rc = mwl8k_post_cmd(hw, &cmd->header);
  1456. if (!rc) {
  1457. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1458. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1459. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1460. priv->hw_rev = cmd->hw_rev;
  1461. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1462. priv->ap_macids_supported = 0x00000000;
  1463. priv->sta_macids_supported = 0x00000001;
  1464. }
  1465. kfree(cmd);
  1466. return rc;
  1467. }
  1468. /*
  1469. * CMD_GET_HW_SPEC (AP version).
  1470. */
  1471. struct mwl8k_cmd_get_hw_spec_ap {
  1472. struct mwl8k_cmd_pkt header;
  1473. __u8 hw_rev;
  1474. __u8 host_interface;
  1475. __le16 num_wcb;
  1476. __le16 num_mcaddrs;
  1477. __u8 perm_addr[ETH_ALEN];
  1478. __le16 region_code;
  1479. __le16 num_antenna;
  1480. __le32 fw_rev;
  1481. __le32 wcbbase0;
  1482. __le32 rxwrptr;
  1483. __le32 rxrdptr;
  1484. __le32 ps_cookie;
  1485. __le32 wcbbase1;
  1486. __le32 wcbbase2;
  1487. __le32 wcbbase3;
  1488. } __packed;
  1489. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1490. {
  1491. struct mwl8k_priv *priv = hw->priv;
  1492. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1493. int rc;
  1494. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1495. if (cmd == NULL)
  1496. return -ENOMEM;
  1497. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1498. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1499. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1500. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1501. rc = mwl8k_post_cmd(hw, &cmd->header);
  1502. if (!rc) {
  1503. int off;
  1504. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1505. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1506. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1507. priv->hw_rev = cmd->hw_rev;
  1508. mwl8k_setup_2ghz_band(hw);
  1509. priv->ap_macids_supported = 0x000000ff;
  1510. priv->sta_macids_supported = 0x00000000;
  1511. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1512. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1513. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1514. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1515. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1516. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1517. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1518. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1519. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1520. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1521. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1522. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1523. }
  1524. kfree(cmd);
  1525. return rc;
  1526. }
  1527. /*
  1528. * CMD_SET_HW_SPEC.
  1529. */
  1530. struct mwl8k_cmd_set_hw_spec {
  1531. struct mwl8k_cmd_pkt header;
  1532. __u8 hw_rev;
  1533. __u8 host_interface;
  1534. __le16 num_mcaddrs;
  1535. __u8 perm_addr[ETH_ALEN];
  1536. __le16 region_code;
  1537. __le32 fw_rev;
  1538. __le32 ps_cookie;
  1539. __le32 caps;
  1540. __le32 rx_queue_ptr;
  1541. __le32 num_tx_queues;
  1542. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1543. __le32 flags;
  1544. __le32 num_tx_desc_per_queue;
  1545. __le32 total_rxd;
  1546. } __packed;
  1547. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1548. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1549. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1550. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1551. {
  1552. struct mwl8k_priv *priv = hw->priv;
  1553. struct mwl8k_cmd_set_hw_spec *cmd;
  1554. int rc;
  1555. int i;
  1556. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1557. if (cmd == NULL)
  1558. return -ENOMEM;
  1559. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1560. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1561. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1562. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1563. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1564. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1565. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1566. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1567. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1568. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1569. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1570. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1571. rc = mwl8k_post_cmd(hw, &cmd->header);
  1572. kfree(cmd);
  1573. return rc;
  1574. }
  1575. /*
  1576. * CMD_MAC_MULTICAST_ADR.
  1577. */
  1578. struct mwl8k_cmd_mac_multicast_adr {
  1579. struct mwl8k_cmd_pkt header;
  1580. __le16 action;
  1581. __le16 numaddr;
  1582. __u8 addr[0][ETH_ALEN];
  1583. };
  1584. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1585. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1586. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1587. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1588. static struct mwl8k_cmd_pkt *
  1589. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1590. struct netdev_hw_addr_list *mc_list)
  1591. {
  1592. struct mwl8k_priv *priv = hw->priv;
  1593. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1594. int size;
  1595. int mc_count = 0;
  1596. if (mc_list)
  1597. mc_count = netdev_hw_addr_list_count(mc_list);
  1598. if (allmulti || mc_count > priv->num_mcaddrs) {
  1599. allmulti = 1;
  1600. mc_count = 0;
  1601. }
  1602. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1603. cmd = kzalloc(size, GFP_ATOMIC);
  1604. if (cmd == NULL)
  1605. return NULL;
  1606. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1607. cmd->header.length = cpu_to_le16(size);
  1608. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1609. MWL8K_ENABLE_RX_BROADCAST);
  1610. if (allmulti) {
  1611. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1612. } else if (mc_count) {
  1613. struct netdev_hw_addr *ha;
  1614. int i = 0;
  1615. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1616. cmd->numaddr = cpu_to_le16(mc_count);
  1617. netdev_hw_addr_list_for_each(ha, mc_list) {
  1618. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1619. }
  1620. }
  1621. return &cmd->header;
  1622. }
  1623. /*
  1624. * CMD_GET_STAT.
  1625. */
  1626. struct mwl8k_cmd_get_stat {
  1627. struct mwl8k_cmd_pkt header;
  1628. __le32 stats[64];
  1629. } __packed;
  1630. #define MWL8K_STAT_ACK_FAILURE 9
  1631. #define MWL8K_STAT_RTS_FAILURE 12
  1632. #define MWL8K_STAT_FCS_ERROR 24
  1633. #define MWL8K_STAT_RTS_SUCCESS 11
  1634. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1635. struct ieee80211_low_level_stats *stats)
  1636. {
  1637. struct mwl8k_cmd_get_stat *cmd;
  1638. int rc;
  1639. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1640. if (cmd == NULL)
  1641. return -ENOMEM;
  1642. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1643. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1644. rc = mwl8k_post_cmd(hw, &cmd->header);
  1645. if (!rc) {
  1646. stats->dot11ACKFailureCount =
  1647. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1648. stats->dot11RTSFailureCount =
  1649. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1650. stats->dot11FCSErrorCount =
  1651. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1652. stats->dot11RTSSuccessCount =
  1653. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1654. }
  1655. kfree(cmd);
  1656. return rc;
  1657. }
  1658. /*
  1659. * CMD_RADIO_CONTROL.
  1660. */
  1661. struct mwl8k_cmd_radio_control {
  1662. struct mwl8k_cmd_pkt header;
  1663. __le16 action;
  1664. __le16 control;
  1665. __le16 radio_on;
  1666. } __packed;
  1667. static int
  1668. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1669. {
  1670. struct mwl8k_priv *priv = hw->priv;
  1671. struct mwl8k_cmd_radio_control *cmd;
  1672. int rc;
  1673. if (enable == priv->radio_on && !force)
  1674. return 0;
  1675. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1676. if (cmd == NULL)
  1677. return -ENOMEM;
  1678. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1679. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1680. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1681. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1682. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1683. rc = mwl8k_post_cmd(hw, &cmd->header);
  1684. kfree(cmd);
  1685. if (!rc)
  1686. priv->radio_on = enable;
  1687. return rc;
  1688. }
  1689. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1690. {
  1691. return mwl8k_cmd_radio_control(hw, 0, 0);
  1692. }
  1693. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1694. {
  1695. return mwl8k_cmd_radio_control(hw, 1, 0);
  1696. }
  1697. static int
  1698. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1699. {
  1700. struct mwl8k_priv *priv = hw->priv;
  1701. priv->radio_short_preamble = short_preamble;
  1702. return mwl8k_cmd_radio_control(hw, 1, 1);
  1703. }
  1704. /*
  1705. * CMD_RF_TX_POWER.
  1706. */
  1707. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1708. struct mwl8k_cmd_rf_tx_power {
  1709. struct mwl8k_cmd_pkt header;
  1710. __le16 action;
  1711. __le16 support_level;
  1712. __le16 current_level;
  1713. __le16 reserved;
  1714. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1715. } __packed;
  1716. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1717. {
  1718. struct mwl8k_cmd_rf_tx_power *cmd;
  1719. int rc;
  1720. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1721. if (cmd == NULL)
  1722. return -ENOMEM;
  1723. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1724. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1725. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1726. cmd->support_level = cpu_to_le16(dBm);
  1727. rc = mwl8k_post_cmd(hw, &cmd->header);
  1728. kfree(cmd);
  1729. return rc;
  1730. }
  1731. /*
  1732. * CMD_RF_ANTENNA.
  1733. */
  1734. struct mwl8k_cmd_rf_antenna {
  1735. struct mwl8k_cmd_pkt header;
  1736. __le16 antenna;
  1737. __le16 mode;
  1738. } __packed;
  1739. #define MWL8K_RF_ANTENNA_RX 1
  1740. #define MWL8K_RF_ANTENNA_TX 2
  1741. static int
  1742. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1743. {
  1744. struct mwl8k_cmd_rf_antenna *cmd;
  1745. int rc;
  1746. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1747. if (cmd == NULL)
  1748. return -ENOMEM;
  1749. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1750. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1751. cmd->antenna = cpu_to_le16(antenna);
  1752. cmd->mode = cpu_to_le16(mask);
  1753. rc = mwl8k_post_cmd(hw, &cmd->header);
  1754. kfree(cmd);
  1755. return rc;
  1756. }
  1757. /*
  1758. * CMD_SET_BEACON.
  1759. */
  1760. struct mwl8k_cmd_set_beacon {
  1761. struct mwl8k_cmd_pkt header;
  1762. __le16 beacon_len;
  1763. __u8 beacon[0];
  1764. };
  1765. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1766. struct ieee80211_vif *vif, u8 *beacon, int len)
  1767. {
  1768. struct mwl8k_cmd_set_beacon *cmd;
  1769. int rc;
  1770. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1771. if (cmd == NULL)
  1772. return -ENOMEM;
  1773. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1774. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1775. cmd->beacon_len = cpu_to_le16(len);
  1776. memcpy(cmd->beacon, beacon, len);
  1777. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1778. kfree(cmd);
  1779. return rc;
  1780. }
  1781. /*
  1782. * CMD_SET_PRE_SCAN.
  1783. */
  1784. struct mwl8k_cmd_set_pre_scan {
  1785. struct mwl8k_cmd_pkt header;
  1786. } __packed;
  1787. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1788. {
  1789. struct mwl8k_cmd_set_pre_scan *cmd;
  1790. int rc;
  1791. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1792. if (cmd == NULL)
  1793. return -ENOMEM;
  1794. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1795. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1796. rc = mwl8k_post_cmd(hw, &cmd->header);
  1797. kfree(cmd);
  1798. return rc;
  1799. }
  1800. /*
  1801. * CMD_SET_POST_SCAN.
  1802. */
  1803. struct mwl8k_cmd_set_post_scan {
  1804. struct mwl8k_cmd_pkt header;
  1805. __le32 isibss;
  1806. __u8 bssid[ETH_ALEN];
  1807. } __packed;
  1808. static int
  1809. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1810. {
  1811. struct mwl8k_cmd_set_post_scan *cmd;
  1812. int rc;
  1813. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1814. if (cmd == NULL)
  1815. return -ENOMEM;
  1816. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1817. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1818. cmd->isibss = 0;
  1819. memcpy(cmd->bssid, mac, ETH_ALEN);
  1820. rc = mwl8k_post_cmd(hw, &cmd->header);
  1821. kfree(cmd);
  1822. return rc;
  1823. }
  1824. /*
  1825. * CMD_SET_RF_CHANNEL.
  1826. */
  1827. struct mwl8k_cmd_set_rf_channel {
  1828. struct mwl8k_cmd_pkt header;
  1829. __le16 action;
  1830. __u8 current_channel;
  1831. __le32 channel_flags;
  1832. } __packed;
  1833. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1834. struct ieee80211_conf *conf)
  1835. {
  1836. struct ieee80211_channel *channel = conf->channel;
  1837. struct mwl8k_cmd_set_rf_channel *cmd;
  1838. int rc;
  1839. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1840. if (cmd == NULL)
  1841. return -ENOMEM;
  1842. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1843. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1844. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1845. cmd->current_channel = channel->hw_value;
  1846. if (channel->band == IEEE80211_BAND_2GHZ)
  1847. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1848. else if (channel->band == IEEE80211_BAND_5GHZ)
  1849. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1850. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1851. conf->channel_type == NL80211_CHAN_HT20)
  1852. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1853. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1854. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1855. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1856. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1857. rc = mwl8k_post_cmd(hw, &cmd->header);
  1858. kfree(cmd);
  1859. return rc;
  1860. }
  1861. /*
  1862. * CMD_SET_AID.
  1863. */
  1864. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1865. #define MWL8K_FRAME_PROT_11G 0x07
  1866. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1867. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1868. struct mwl8k_cmd_update_set_aid {
  1869. struct mwl8k_cmd_pkt header;
  1870. __le16 aid;
  1871. /* AP's MAC address (BSSID) */
  1872. __u8 bssid[ETH_ALEN];
  1873. __le16 protection_mode;
  1874. __u8 supp_rates[14];
  1875. } __packed;
  1876. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1877. {
  1878. int i;
  1879. int j;
  1880. /*
  1881. * Clear nonstandard rates 4 and 13.
  1882. */
  1883. mask &= 0x1fef;
  1884. for (i = 0, j = 0; i < 14; i++) {
  1885. if (mask & (1 << i))
  1886. rates[j++] = mwl8k_rates_24[i].hw_value;
  1887. }
  1888. }
  1889. static int
  1890. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1891. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1892. {
  1893. struct mwl8k_cmd_update_set_aid *cmd;
  1894. u16 prot_mode;
  1895. int rc;
  1896. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1897. if (cmd == NULL)
  1898. return -ENOMEM;
  1899. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1900. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1901. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1902. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1903. if (vif->bss_conf.use_cts_prot) {
  1904. prot_mode = MWL8K_FRAME_PROT_11G;
  1905. } else {
  1906. switch (vif->bss_conf.ht_operation_mode &
  1907. IEEE80211_HT_OP_MODE_PROTECTION) {
  1908. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1909. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1910. break;
  1911. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1912. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1913. break;
  1914. default:
  1915. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1916. break;
  1917. }
  1918. }
  1919. cmd->protection_mode = cpu_to_le16(prot_mode);
  1920. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1921. rc = mwl8k_post_cmd(hw, &cmd->header);
  1922. kfree(cmd);
  1923. return rc;
  1924. }
  1925. /*
  1926. * CMD_SET_RATE.
  1927. */
  1928. struct mwl8k_cmd_set_rate {
  1929. struct mwl8k_cmd_pkt header;
  1930. __u8 legacy_rates[14];
  1931. /* Bitmap for supported MCS codes. */
  1932. __u8 mcs_set[16];
  1933. __u8 reserved[16];
  1934. } __packed;
  1935. static int
  1936. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1937. u32 legacy_rate_mask, u8 *mcs_rates)
  1938. {
  1939. struct mwl8k_cmd_set_rate *cmd;
  1940. int rc;
  1941. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1942. if (cmd == NULL)
  1943. return -ENOMEM;
  1944. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1945. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1946. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1947. memcpy(cmd->mcs_set, mcs_rates, 16);
  1948. rc = mwl8k_post_cmd(hw, &cmd->header);
  1949. kfree(cmd);
  1950. return rc;
  1951. }
  1952. /*
  1953. * CMD_FINALIZE_JOIN.
  1954. */
  1955. #define MWL8K_FJ_BEACON_MAXLEN 128
  1956. struct mwl8k_cmd_finalize_join {
  1957. struct mwl8k_cmd_pkt header;
  1958. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1959. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1960. } __packed;
  1961. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1962. int framelen, int dtim)
  1963. {
  1964. struct mwl8k_cmd_finalize_join *cmd;
  1965. struct ieee80211_mgmt *payload = frame;
  1966. int payload_len;
  1967. int rc;
  1968. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1969. if (cmd == NULL)
  1970. return -ENOMEM;
  1971. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1972. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1973. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1974. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1975. if (payload_len < 0)
  1976. payload_len = 0;
  1977. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1978. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1979. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1980. rc = mwl8k_post_cmd(hw, &cmd->header);
  1981. kfree(cmd);
  1982. return rc;
  1983. }
  1984. /*
  1985. * CMD_SET_RTS_THRESHOLD.
  1986. */
  1987. struct mwl8k_cmd_set_rts_threshold {
  1988. struct mwl8k_cmd_pkt header;
  1989. __le16 action;
  1990. __le16 threshold;
  1991. } __packed;
  1992. static int
  1993. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  1994. {
  1995. struct mwl8k_cmd_set_rts_threshold *cmd;
  1996. int rc;
  1997. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1998. if (cmd == NULL)
  1999. return -ENOMEM;
  2000. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2001. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2002. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2003. cmd->threshold = cpu_to_le16(rts_thresh);
  2004. rc = mwl8k_post_cmd(hw, &cmd->header);
  2005. kfree(cmd);
  2006. return rc;
  2007. }
  2008. /*
  2009. * CMD_SET_SLOT.
  2010. */
  2011. struct mwl8k_cmd_set_slot {
  2012. struct mwl8k_cmd_pkt header;
  2013. __le16 action;
  2014. __u8 short_slot;
  2015. } __packed;
  2016. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2017. {
  2018. struct mwl8k_cmd_set_slot *cmd;
  2019. int rc;
  2020. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2021. if (cmd == NULL)
  2022. return -ENOMEM;
  2023. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2024. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2025. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2026. cmd->short_slot = short_slot_time;
  2027. rc = mwl8k_post_cmd(hw, &cmd->header);
  2028. kfree(cmd);
  2029. return rc;
  2030. }
  2031. /*
  2032. * CMD_SET_EDCA_PARAMS.
  2033. */
  2034. struct mwl8k_cmd_set_edca_params {
  2035. struct mwl8k_cmd_pkt header;
  2036. /* See MWL8K_SET_EDCA_XXX below */
  2037. __le16 action;
  2038. /* TX opportunity in units of 32 us */
  2039. __le16 txop;
  2040. union {
  2041. struct {
  2042. /* Log exponent of max contention period: 0...15 */
  2043. __le32 log_cw_max;
  2044. /* Log exponent of min contention period: 0...15 */
  2045. __le32 log_cw_min;
  2046. /* Adaptive interframe spacing in units of 32us */
  2047. __u8 aifs;
  2048. /* TX queue to configure */
  2049. __u8 txq;
  2050. } ap;
  2051. struct {
  2052. /* Log exponent of max contention period: 0...15 */
  2053. __u8 log_cw_max;
  2054. /* Log exponent of min contention period: 0...15 */
  2055. __u8 log_cw_min;
  2056. /* Adaptive interframe spacing in units of 32us */
  2057. __u8 aifs;
  2058. /* TX queue to configure */
  2059. __u8 txq;
  2060. } sta;
  2061. };
  2062. } __packed;
  2063. #define MWL8K_SET_EDCA_CW 0x01
  2064. #define MWL8K_SET_EDCA_TXOP 0x02
  2065. #define MWL8K_SET_EDCA_AIFS 0x04
  2066. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2067. MWL8K_SET_EDCA_TXOP | \
  2068. MWL8K_SET_EDCA_AIFS)
  2069. static int
  2070. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2071. __u16 cw_min, __u16 cw_max,
  2072. __u8 aifs, __u16 txop)
  2073. {
  2074. struct mwl8k_priv *priv = hw->priv;
  2075. struct mwl8k_cmd_set_edca_params *cmd;
  2076. int rc;
  2077. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2078. if (cmd == NULL)
  2079. return -ENOMEM;
  2080. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2081. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2082. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2083. cmd->txop = cpu_to_le16(txop);
  2084. if (priv->ap_fw) {
  2085. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2086. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2087. cmd->ap.aifs = aifs;
  2088. cmd->ap.txq = qnum;
  2089. } else {
  2090. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2091. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2092. cmd->sta.aifs = aifs;
  2093. cmd->sta.txq = qnum;
  2094. }
  2095. rc = mwl8k_post_cmd(hw, &cmd->header);
  2096. kfree(cmd);
  2097. return rc;
  2098. }
  2099. /*
  2100. * CMD_SET_WMM_MODE.
  2101. */
  2102. struct mwl8k_cmd_set_wmm_mode {
  2103. struct mwl8k_cmd_pkt header;
  2104. __le16 action;
  2105. } __packed;
  2106. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2107. {
  2108. struct mwl8k_priv *priv = hw->priv;
  2109. struct mwl8k_cmd_set_wmm_mode *cmd;
  2110. int rc;
  2111. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2112. if (cmd == NULL)
  2113. return -ENOMEM;
  2114. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2115. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2116. cmd->action = cpu_to_le16(!!enable);
  2117. rc = mwl8k_post_cmd(hw, &cmd->header);
  2118. kfree(cmd);
  2119. if (!rc)
  2120. priv->wmm_enabled = enable;
  2121. return rc;
  2122. }
  2123. /*
  2124. * CMD_MIMO_CONFIG.
  2125. */
  2126. struct mwl8k_cmd_mimo_config {
  2127. struct mwl8k_cmd_pkt header;
  2128. __le32 action;
  2129. __u8 rx_antenna_map;
  2130. __u8 tx_antenna_map;
  2131. } __packed;
  2132. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2133. {
  2134. struct mwl8k_cmd_mimo_config *cmd;
  2135. int rc;
  2136. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2137. if (cmd == NULL)
  2138. return -ENOMEM;
  2139. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2140. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2141. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2142. cmd->rx_antenna_map = rx;
  2143. cmd->tx_antenna_map = tx;
  2144. rc = mwl8k_post_cmd(hw, &cmd->header);
  2145. kfree(cmd);
  2146. return rc;
  2147. }
  2148. /*
  2149. * CMD_USE_FIXED_RATE (STA version).
  2150. */
  2151. struct mwl8k_cmd_use_fixed_rate_sta {
  2152. struct mwl8k_cmd_pkt header;
  2153. __le32 action;
  2154. __le32 allow_rate_drop;
  2155. __le32 num_rates;
  2156. struct {
  2157. __le32 is_ht_rate;
  2158. __le32 enable_retry;
  2159. __le32 rate;
  2160. __le32 retry_count;
  2161. } rate_entry[8];
  2162. __le32 rate_type;
  2163. __le32 reserved1;
  2164. __le32 reserved2;
  2165. } __packed;
  2166. #define MWL8K_USE_AUTO_RATE 0x0002
  2167. #define MWL8K_UCAST_RATE 0
  2168. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2169. {
  2170. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2171. int rc;
  2172. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2173. if (cmd == NULL)
  2174. return -ENOMEM;
  2175. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2176. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2177. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2178. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2179. rc = mwl8k_post_cmd(hw, &cmd->header);
  2180. kfree(cmd);
  2181. return rc;
  2182. }
  2183. /*
  2184. * CMD_USE_FIXED_RATE (AP version).
  2185. */
  2186. struct mwl8k_cmd_use_fixed_rate_ap {
  2187. struct mwl8k_cmd_pkt header;
  2188. __le32 action;
  2189. __le32 allow_rate_drop;
  2190. __le32 num_rates;
  2191. struct mwl8k_rate_entry_ap {
  2192. __le32 is_ht_rate;
  2193. __le32 enable_retry;
  2194. __le32 rate;
  2195. __le32 retry_count;
  2196. } rate_entry[4];
  2197. u8 multicast_rate;
  2198. u8 multicast_rate_type;
  2199. u8 management_rate;
  2200. } __packed;
  2201. static int
  2202. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2203. {
  2204. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2205. int rc;
  2206. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2207. if (cmd == NULL)
  2208. return -ENOMEM;
  2209. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2210. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2211. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2212. cmd->multicast_rate = mcast;
  2213. cmd->management_rate = mgmt;
  2214. rc = mwl8k_post_cmd(hw, &cmd->header);
  2215. kfree(cmd);
  2216. return rc;
  2217. }
  2218. /*
  2219. * CMD_ENABLE_SNIFFER.
  2220. */
  2221. struct mwl8k_cmd_enable_sniffer {
  2222. struct mwl8k_cmd_pkt header;
  2223. __le32 action;
  2224. } __packed;
  2225. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2226. {
  2227. struct mwl8k_cmd_enable_sniffer *cmd;
  2228. int rc;
  2229. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2230. if (cmd == NULL)
  2231. return -ENOMEM;
  2232. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2233. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2234. cmd->action = cpu_to_le32(!!enable);
  2235. rc = mwl8k_post_cmd(hw, &cmd->header);
  2236. kfree(cmd);
  2237. return rc;
  2238. }
  2239. /*
  2240. * CMD_SET_MAC_ADDR.
  2241. */
  2242. struct mwl8k_cmd_set_mac_addr {
  2243. struct mwl8k_cmd_pkt header;
  2244. union {
  2245. struct {
  2246. __le16 mac_type;
  2247. __u8 mac_addr[ETH_ALEN];
  2248. } mbss;
  2249. __u8 mac_addr[ETH_ALEN];
  2250. };
  2251. } __packed;
  2252. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2253. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2254. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2255. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2256. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2257. struct ieee80211_vif *vif, u8 *mac)
  2258. {
  2259. struct mwl8k_priv *priv = hw->priv;
  2260. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2261. struct mwl8k_cmd_set_mac_addr *cmd;
  2262. int mac_type;
  2263. int rc;
  2264. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2265. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2266. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2267. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2268. else
  2269. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2270. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2271. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2272. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2273. else
  2274. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2275. }
  2276. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2277. if (cmd == NULL)
  2278. return -ENOMEM;
  2279. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2280. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2281. if (priv->ap_fw) {
  2282. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2283. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2284. } else {
  2285. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2286. }
  2287. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2288. kfree(cmd);
  2289. return rc;
  2290. }
  2291. /*
  2292. * CMD_SET_RATEADAPT_MODE.
  2293. */
  2294. struct mwl8k_cmd_set_rate_adapt_mode {
  2295. struct mwl8k_cmd_pkt header;
  2296. __le16 action;
  2297. __le16 mode;
  2298. } __packed;
  2299. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2300. {
  2301. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2302. int rc;
  2303. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2304. if (cmd == NULL)
  2305. return -ENOMEM;
  2306. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2307. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2308. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2309. cmd->mode = cpu_to_le16(mode);
  2310. rc = mwl8k_post_cmd(hw, &cmd->header);
  2311. kfree(cmd);
  2312. return rc;
  2313. }
  2314. /*
  2315. * CMD_BSS_START.
  2316. */
  2317. struct mwl8k_cmd_bss_start {
  2318. struct mwl8k_cmd_pkt header;
  2319. __le32 enable;
  2320. } __packed;
  2321. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2322. struct ieee80211_vif *vif, int enable)
  2323. {
  2324. struct mwl8k_cmd_bss_start *cmd;
  2325. int rc;
  2326. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2327. if (cmd == NULL)
  2328. return -ENOMEM;
  2329. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2330. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2331. cmd->enable = cpu_to_le32(enable);
  2332. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2333. kfree(cmd);
  2334. return rc;
  2335. }
  2336. /*
  2337. * CMD_SET_NEW_STN.
  2338. */
  2339. struct mwl8k_cmd_set_new_stn {
  2340. struct mwl8k_cmd_pkt header;
  2341. __le16 aid;
  2342. __u8 mac_addr[6];
  2343. __le16 stn_id;
  2344. __le16 action;
  2345. __le16 rsvd;
  2346. __le32 legacy_rates;
  2347. __u8 ht_rates[4];
  2348. __le16 cap_info;
  2349. __le16 ht_capabilities_info;
  2350. __u8 mac_ht_param_info;
  2351. __u8 rev;
  2352. __u8 control_channel;
  2353. __u8 add_channel;
  2354. __le16 op_mode;
  2355. __le16 stbc;
  2356. __u8 add_qos_info;
  2357. __u8 is_qos_sta;
  2358. __le32 fw_sta_ptr;
  2359. } __packed;
  2360. #define MWL8K_STA_ACTION_ADD 0
  2361. #define MWL8K_STA_ACTION_REMOVE 2
  2362. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2363. struct ieee80211_vif *vif,
  2364. struct ieee80211_sta *sta)
  2365. {
  2366. struct mwl8k_cmd_set_new_stn *cmd;
  2367. u32 rates;
  2368. int rc;
  2369. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2370. if (cmd == NULL)
  2371. return -ENOMEM;
  2372. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2373. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2374. cmd->aid = cpu_to_le16(sta->aid);
  2375. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2376. cmd->stn_id = cpu_to_le16(sta->aid);
  2377. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2378. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2379. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2380. else
  2381. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2382. cmd->legacy_rates = cpu_to_le32(rates);
  2383. if (sta->ht_cap.ht_supported) {
  2384. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2385. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2386. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2387. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2388. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2389. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2390. ((sta->ht_cap.ampdu_density & 7) << 2);
  2391. cmd->is_qos_sta = 1;
  2392. }
  2393. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2394. kfree(cmd);
  2395. return rc;
  2396. }
  2397. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2398. struct ieee80211_vif *vif)
  2399. {
  2400. struct mwl8k_cmd_set_new_stn *cmd;
  2401. int rc;
  2402. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2403. if (cmd == NULL)
  2404. return -ENOMEM;
  2405. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2406. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2407. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2408. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2409. kfree(cmd);
  2410. return rc;
  2411. }
  2412. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2413. struct ieee80211_vif *vif, u8 *addr)
  2414. {
  2415. struct mwl8k_cmd_set_new_stn *cmd;
  2416. int rc;
  2417. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2418. if (cmd == NULL)
  2419. return -ENOMEM;
  2420. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2421. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2422. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2423. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2424. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2425. kfree(cmd);
  2426. return rc;
  2427. }
  2428. /*
  2429. * CMD_UPDATE_STADB.
  2430. */
  2431. struct ewc_ht_info {
  2432. __le16 control1;
  2433. __le16 control2;
  2434. __le16 control3;
  2435. } __packed;
  2436. struct peer_capability_info {
  2437. /* Peer type - AP vs. STA. */
  2438. __u8 peer_type;
  2439. /* Basic 802.11 capabilities from assoc resp. */
  2440. __le16 basic_caps;
  2441. /* Set if peer supports 802.11n high throughput (HT). */
  2442. __u8 ht_support;
  2443. /* Valid if HT is supported. */
  2444. __le16 ht_caps;
  2445. __u8 extended_ht_caps;
  2446. struct ewc_ht_info ewc_info;
  2447. /* Legacy rate table. Intersection of our rates and peer rates. */
  2448. __u8 legacy_rates[12];
  2449. /* HT rate table. Intersection of our rates and peer rates. */
  2450. __u8 ht_rates[16];
  2451. __u8 pad[16];
  2452. /* If set, interoperability mode, no proprietary extensions. */
  2453. __u8 interop;
  2454. __u8 pad2;
  2455. __u8 station_id;
  2456. __le16 amsdu_enabled;
  2457. } __packed;
  2458. struct mwl8k_cmd_update_stadb {
  2459. struct mwl8k_cmd_pkt header;
  2460. /* See STADB_ACTION_TYPE */
  2461. __le32 action;
  2462. /* Peer MAC address */
  2463. __u8 peer_addr[ETH_ALEN];
  2464. __le32 reserved;
  2465. /* Peer info - valid during add/update. */
  2466. struct peer_capability_info peer_info;
  2467. } __packed;
  2468. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2469. #define MWL8K_STA_DB_DEL_ENTRY 2
  2470. /* Peer Entry flags - used to define the type of the peer node */
  2471. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2472. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2473. struct ieee80211_vif *vif,
  2474. struct ieee80211_sta *sta)
  2475. {
  2476. struct mwl8k_cmd_update_stadb *cmd;
  2477. struct peer_capability_info *p;
  2478. u32 rates;
  2479. int rc;
  2480. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2481. if (cmd == NULL)
  2482. return -ENOMEM;
  2483. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2484. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2485. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2486. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2487. p = &cmd->peer_info;
  2488. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2489. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2490. p->ht_support = sta->ht_cap.ht_supported;
  2491. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2492. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2493. ((sta->ht_cap.ampdu_density & 7) << 2);
  2494. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2495. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2496. else
  2497. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2498. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2499. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2500. p->interop = 1;
  2501. p->amsdu_enabled = 0;
  2502. rc = mwl8k_post_cmd(hw, &cmd->header);
  2503. kfree(cmd);
  2504. return rc ? rc : p->station_id;
  2505. }
  2506. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2507. struct ieee80211_vif *vif, u8 *addr)
  2508. {
  2509. struct mwl8k_cmd_update_stadb *cmd;
  2510. int rc;
  2511. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2512. if (cmd == NULL)
  2513. return -ENOMEM;
  2514. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2515. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2516. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2517. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2518. rc = mwl8k_post_cmd(hw, &cmd->header);
  2519. kfree(cmd);
  2520. return rc;
  2521. }
  2522. /*
  2523. * Interrupt handling.
  2524. */
  2525. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2526. {
  2527. struct ieee80211_hw *hw = dev_id;
  2528. struct mwl8k_priv *priv = hw->priv;
  2529. u32 status;
  2530. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2531. if (!status)
  2532. return IRQ_NONE;
  2533. if (status & MWL8K_A2H_INT_TX_DONE) {
  2534. status &= ~MWL8K_A2H_INT_TX_DONE;
  2535. tasklet_schedule(&priv->poll_tx_task);
  2536. }
  2537. if (status & MWL8K_A2H_INT_RX_READY) {
  2538. status &= ~MWL8K_A2H_INT_RX_READY;
  2539. tasklet_schedule(&priv->poll_rx_task);
  2540. }
  2541. if (status)
  2542. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2543. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2544. if (priv->hostcmd_wait != NULL)
  2545. complete(priv->hostcmd_wait);
  2546. }
  2547. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2548. if (!mutex_is_locked(&priv->fw_mutex) &&
  2549. priv->radio_on && priv->pending_tx_pkts)
  2550. mwl8k_tx_start(priv);
  2551. }
  2552. return IRQ_HANDLED;
  2553. }
  2554. static void mwl8k_tx_poll(unsigned long data)
  2555. {
  2556. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2557. struct mwl8k_priv *priv = hw->priv;
  2558. int limit;
  2559. int i;
  2560. limit = 32;
  2561. spin_lock_bh(&priv->tx_lock);
  2562. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2563. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2564. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2565. complete(priv->tx_wait);
  2566. priv->tx_wait = NULL;
  2567. }
  2568. spin_unlock_bh(&priv->tx_lock);
  2569. if (limit) {
  2570. writel(~MWL8K_A2H_INT_TX_DONE,
  2571. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2572. } else {
  2573. tasklet_schedule(&priv->poll_tx_task);
  2574. }
  2575. }
  2576. static void mwl8k_rx_poll(unsigned long data)
  2577. {
  2578. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2579. struct mwl8k_priv *priv = hw->priv;
  2580. int limit;
  2581. limit = 32;
  2582. limit -= rxq_process(hw, 0, limit);
  2583. limit -= rxq_refill(hw, 0, limit);
  2584. if (limit) {
  2585. writel(~MWL8K_A2H_INT_RX_READY,
  2586. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2587. } else {
  2588. tasklet_schedule(&priv->poll_rx_task);
  2589. }
  2590. }
  2591. /*
  2592. * Core driver operations.
  2593. */
  2594. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2595. {
  2596. struct mwl8k_priv *priv = hw->priv;
  2597. int index = skb_get_queue_mapping(skb);
  2598. int rc;
  2599. if (!priv->radio_on) {
  2600. wiphy_debug(hw->wiphy,
  2601. "dropped TX frame since radio disabled\n");
  2602. dev_kfree_skb(skb);
  2603. return NETDEV_TX_OK;
  2604. }
  2605. rc = mwl8k_txq_xmit(hw, index, skb);
  2606. return rc;
  2607. }
  2608. static int mwl8k_start(struct ieee80211_hw *hw)
  2609. {
  2610. struct mwl8k_priv *priv = hw->priv;
  2611. int rc;
  2612. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2613. IRQF_SHARED, MWL8K_NAME, hw);
  2614. if (rc) {
  2615. wiphy_err(hw->wiphy, "failed to register irq handler\n");
  2616. return -EIO;
  2617. }
  2618. /* Enable TX reclaim and RX tasklets. */
  2619. tasklet_enable(&priv->poll_tx_task);
  2620. tasklet_enable(&priv->poll_rx_task);
  2621. /* Enable interrupts */
  2622. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2623. rc = mwl8k_fw_lock(hw);
  2624. if (!rc) {
  2625. rc = mwl8k_cmd_radio_enable(hw);
  2626. if (!priv->ap_fw) {
  2627. if (!rc)
  2628. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2629. if (!rc)
  2630. rc = mwl8k_cmd_set_pre_scan(hw);
  2631. if (!rc)
  2632. rc = mwl8k_cmd_set_post_scan(hw,
  2633. "\x00\x00\x00\x00\x00\x00");
  2634. }
  2635. if (!rc)
  2636. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2637. if (!rc)
  2638. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2639. mwl8k_fw_unlock(hw);
  2640. }
  2641. if (rc) {
  2642. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2643. free_irq(priv->pdev->irq, hw);
  2644. tasklet_disable(&priv->poll_tx_task);
  2645. tasklet_disable(&priv->poll_rx_task);
  2646. }
  2647. return rc;
  2648. }
  2649. static void mwl8k_stop(struct ieee80211_hw *hw)
  2650. {
  2651. struct mwl8k_priv *priv = hw->priv;
  2652. int i;
  2653. mwl8k_cmd_radio_disable(hw);
  2654. ieee80211_stop_queues(hw);
  2655. /* Disable interrupts */
  2656. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2657. free_irq(priv->pdev->irq, hw);
  2658. /* Stop finalize join worker */
  2659. cancel_work_sync(&priv->finalize_join_worker);
  2660. if (priv->beacon_skb != NULL)
  2661. dev_kfree_skb(priv->beacon_skb);
  2662. /* Stop TX reclaim and RX tasklets. */
  2663. tasklet_disable(&priv->poll_tx_task);
  2664. tasklet_disable(&priv->poll_rx_task);
  2665. /* Return all skbs to mac80211 */
  2666. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2667. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2668. }
  2669. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2670. struct ieee80211_vif *vif)
  2671. {
  2672. struct mwl8k_priv *priv = hw->priv;
  2673. struct mwl8k_vif *mwl8k_vif;
  2674. u32 macids_supported;
  2675. int macid;
  2676. /*
  2677. * Reject interface creation if sniffer mode is active, as
  2678. * STA operation is mutually exclusive with hardware sniffer
  2679. * mode. (Sniffer mode is only used on STA firmware.)
  2680. */
  2681. if (priv->sniffer_enabled) {
  2682. wiphy_info(hw->wiphy,
  2683. "unable to create STA interface because sniffer mode is enabled\n");
  2684. return -EINVAL;
  2685. }
  2686. switch (vif->type) {
  2687. case NL80211_IFTYPE_AP:
  2688. macids_supported = priv->ap_macids_supported;
  2689. break;
  2690. case NL80211_IFTYPE_STATION:
  2691. macids_supported = priv->sta_macids_supported;
  2692. break;
  2693. default:
  2694. return -EINVAL;
  2695. }
  2696. macid = ffs(macids_supported & ~priv->macids_used);
  2697. if (!macid--)
  2698. return -EBUSY;
  2699. /* Setup driver private area. */
  2700. mwl8k_vif = MWL8K_VIF(vif);
  2701. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2702. mwl8k_vif->vif = vif;
  2703. mwl8k_vif->macid = macid;
  2704. mwl8k_vif->seqno = 0;
  2705. /* Set the mac address. */
  2706. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2707. if (priv->ap_fw)
  2708. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2709. priv->macids_used |= 1 << mwl8k_vif->macid;
  2710. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2711. return 0;
  2712. }
  2713. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2714. struct ieee80211_vif *vif)
  2715. {
  2716. struct mwl8k_priv *priv = hw->priv;
  2717. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2718. if (priv->ap_fw)
  2719. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2720. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2721. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2722. list_del(&mwl8k_vif->list);
  2723. }
  2724. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2725. {
  2726. struct ieee80211_conf *conf = &hw->conf;
  2727. struct mwl8k_priv *priv = hw->priv;
  2728. int rc;
  2729. if (conf->flags & IEEE80211_CONF_IDLE) {
  2730. mwl8k_cmd_radio_disable(hw);
  2731. return 0;
  2732. }
  2733. rc = mwl8k_fw_lock(hw);
  2734. if (rc)
  2735. return rc;
  2736. rc = mwl8k_cmd_radio_enable(hw);
  2737. if (rc)
  2738. goto out;
  2739. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2740. if (rc)
  2741. goto out;
  2742. if (conf->power_level > 18)
  2743. conf->power_level = 18;
  2744. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2745. if (rc)
  2746. goto out;
  2747. if (priv->ap_fw) {
  2748. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2749. if (!rc)
  2750. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2751. } else {
  2752. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2753. }
  2754. out:
  2755. mwl8k_fw_unlock(hw);
  2756. return rc;
  2757. }
  2758. static void
  2759. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2760. struct ieee80211_bss_conf *info, u32 changed)
  2761. {
  2762. struct mwl8k_priv *priv = hw->priv;
  2763. u32 ap_legacy_rates;
  2764. u8 ap_mcs_rates[16];
  2765. int rc;
  2766. if (mwl8k_fw_lock(hw))
  2767. return;
  2768. /*
  2769. * No need to capture a beacon if we're no longer associated.
  2770. */
  2771. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2772. priv->capture_beacon = false;
  2773. /*
  2774. * Get the AP's legacy and MCS rates.
  2775. */
  2776. if (vif->bss_conf.assoc) {
  2777. struct ieee80211_sta *ap;
  2778. rcu_read_lock();
  2779. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2780. if (ap == NULL) {
  2781. rcu_read_unlock();
  2782. goto out;
  2783. }
  2784. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2785. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2786. } else {
  2787. ap_legacy_rates =
  2788. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2789. }
  2790. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2791. rcu_read_unlock();
  2792. }
  2793. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2794. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2795. if (rc)
  2796. goto out;
  2797. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2798. if (rc)
  2799. goto out;
  2800. }
  2801. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2802. rc = mwl8k_set_radio_preamble(hw,
  2803. vif->bss_conf.use_short_preamble);
  2804. if (rc)
  2805. goto out;
  2806. }
  2807. if (changed & BSS_CHANGED_ERP_SLOT) {
  2808. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2809. if (rc)
  2810. goto out;
  2811. }
  2812. if (vif->bss_conf.assoc &&
  2813. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2814. BSS_CHANGED_HT))) {
  2815. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2816. if (rc)
  2817. goto out;
  2818. }
  2819. if (vif->bss_conf.assoc &&
  2820. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2821. /*
  2822. * Finalize the join. Tell rx handler to process
  2823. * next beacon from our BSSID.
  2824. */
  2825. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2826. priv->capture_beacon = true;
  2827. }
  2828. out:
  2829. mwl8k_fw_unlock(hw);
  2830. }
  2831. static void
  2832. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2833. struct ieee80211_bss_conf *info, u32 changed)
  2834. {
  2835. int rc;
  2836. if (mwl8k_fw_lock(hw))
  2837. return;
  2838. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2839. rc = mwl8k_set_radio_preamble(hw,
  2840. vif->bss_conf.use_short_preamble);
  2841. if (rc)
  2842. goto out;
  2843. }
  2844. if (changed & BSS_CHANGED_BASIC_RATES) {
  2845. int idx;
  2846. int rate;
  2847. /*
  2848. * Use lowest supported basic rate for multicasts
  2849. * and management frames (such as probe responses --
  2850. * beacons will always go out at 1 Mb/s).
  2851. */
  2852. idx = ffs(vif->bss_conf.basic_rates);
  2853. if (idx)
  2854. idx--;
  2855. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2856. rate = mwl8k_rates_24[idx].hw_value;
  2857. else
  2858. rate = mwl8k_rates_50[idx].hw_value;
  2859. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2860. }
  2861. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2862. struct sk_buff *skb;
  2863. skb = ieee80211_beacon_get(hw, vif);
  2864. if (skb != NULL) {
  2865. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2866. kfree_skb(skb);
  2867. }
  2868. }
  2869. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2870. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2871. out:
  2872. mwl8k_fw_unlock(hw);
  2873. }
  2874. static void
  2875. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2876. struct ieee80211_bss_conf *info, u32 changed)
  2877. {
  2878. struct mwl8k_priv *priv = hw->priv;
  2879. if (!priv->ap_fw)
  2880. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2881. else
  2882. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2883. }
  2884. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2885. struct netdev_hw_addr_list *mc_list)
  2886. {
  2887. struct mwl8k_cmd_pkt *cmd;
  2888. /*
  2889. * Synthesize and return a command packet that programs the
  2890. * hardware multicast address filter. At this point we don't
  2891. * know whether FIF_ALLMULTI is being requested, but if it is,
  2892. * we'll end up throwing this packet away and creating a new
  2893. * one in mwl8k_configure_filter().
  2894. */
  2895. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2896. return (unsigned long)cmd;
  2897. }
  2898. static int
  2899. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2900. unsigned int changed_flags,
  2901. unsigned int *total_flags)
  2902. {
  2903. struct mwl8k_priv *priv = hw->priv;
  2904. /*
  2905. * Hardware sniffer mode is mutually exclusive with STA
  2906. * operation, so refuse to enable sniffer mode if a STA
  2907. * interface is active.
  2908. */
  2909. if (!list_empty(&priv->vif_list)) {
  2910. if (net_ratelimit())
  2911. wiphy_info(hw->wiphy,
  2912. "not enabling sniffer mode because STA interface is active\n");
  2913. return 0;
  2914. }
  2915. if (!priv->sniffer_enabled) {
  2916. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2917. return 0;
  2918. priv->sniffer_enabled = true;
  2919. }
  2920. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2921. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2922. FIF_OTHER_BSS;
  2923. return 1;
  2924. }
  2925. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2926. {
  2927. if (!list_empty(&priv->vif_list))
  2928. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2929. return NULL;
  2930. }
  2931. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2932. unsigned int changed_flags,
  2933. unsigned int *total_flags,
  2934. u64 multicast)
  2935. {
  2936. struct mwl8k_priv *priv = hw->priv;
  2937. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2938. /*
  2939. * AP firmware doesn't allow fine-grained control over
  2940. * the receive filter.
  2941. */
  2942. if (priv->ap_fw) {
  2943. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2944. kfree(cmd);
  2945. return;
  2946. }
  2947. /*
  2948. * Enable hardware sniffer mode if FIF_CONTROL or
  2949. * FIF_OTHER_BSS is requested.
  2950. */
  2951. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2952. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2953. kfree(cmd);
  2954. return;
  2955. }
  2956. /* Clear unsupported feature flags */
  2957. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2958. if (mwl8k_fw_lock(hw)) {
  2959. kfree(cmd);
  2960. return;
  2961. }
  2962. if (priv->sniffer_enabled) {
  2963. mwl8k_cmd_enable_sniffer(hw, 0);
  2964. priv->sniffer_enabled = false;
  2965. }
  2966. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2967. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2968. /*
  2969. * Disable the BSS filter.
  2970. */
  2971. mwl8k_cmd_set_pre_scan(hw);
  2972. } else {
  2973. struct mwl8k_vif *mwl8k_vif;
  2974. const u8 *bssid;
  2975. /*
  2976. * Enable the BSS filter.
  2977. *
  2978. * If there is an active STA interface, use that
  2979. * interface's BSSID, otherwise use a dummy one
  2980. * (where the OUI part needs to be nonzero for
  2981. * the BSSID to be accepted by POST_SCAN).
  2982. */
  2983. mwl8k_vif = mwl8k_first_vif(priv);
  2984. if (mwl8k_vif != NULL)
  2985. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2986. else
  2987. bssid = "\x01\x00\x00\x00\x00\x00";
  2988. mwl8k_cmd_set_post_scan(hw, bssid);
  2989. }
  2990. }
  2991. /*
  2992. * If FIF_ALLMULTI is being requested, throw away the command
  2993. * packet that ->prepare_multicast() built and replace it with
  2994. * a command packet that enables reception of all multicast
  2995. * packets.
  2996. */
  2997. if (*total_flags & FIF_ALLMULTI) {
  2998. kfree(cmd);
  2999. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3000. }
  3001. if (cmd != NULL) {
  3002. mwl8k_post_cmd(hw, cmd);
  3003. kfree(cmd);
  3004. }
  3005. mwl8k_fw_unlock(hw);
  3006. }
  3007. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3008. {
  3009. return mwl8k_cmd_set_rts_threshold(hw, value);
  3010. }
  3011. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3012. struct ieee80211_vif *vif,
  3013. struct ieee80211_sta *sta)
  3014. {
  3015. struct mwl8k_priv *priv = hw->priv;
  3016. if (priv->ap_fw)
  3017. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3018. else
  3019. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3020. }
  3021. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3022. struct ieee80211_vif *vif,
  3023. struct ieee80211_sta *sta)
  3024. {
  3025. struct mwl8k_priv *priv = hw->priv;
  3026. int ret;
  3027. if (!priv->ap_fw) {
  3028. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3029. if (ret >= 0) {
  3030. MWL8K_STA(sta)->peer_id = ret;
  3031. return 0;
  3032. }
  3033. return ret;
  3034. }
  3035. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3036. }
  3037. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3038. const struct ieee80211_tx_queue_params *params)
  3039. {
  3040. struct mwl8k_priv *priv = hw->priv;
  3041. int rc;
  3042. rc = mwl8k_fw_lock(hw);
  3043. if (!rc) {
  3044. if (!priv->wmm_enabled)
  3045. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3046. if (!rc)
  3047. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3048. params->cw_min,
  3049. params->cw_max,
  3050. params->aifs,
  3051. params->txop);
  3052. mwl8k_fw_unlock(hw);
  3053. }
  3054. return rc;
  3055. }
  3056. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3057. struct ieee80211_low_level_stats *stats)
  3058. {
  3059. return mwl8k_cmd_get_stat(hw, stats);
  3060. }
  3061. static int
  3062. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3063. enum ieee80211_ampdu_mlme_action action,
  3064. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3065. {
  3066. switch (action) {
  3067. case IEEE80211_AMPDU_RX_START:
  3068. case IEEE80211_AMPDU_RX_STOP:
  3069. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3070. return -ENOTSUPP;
  3071. return 0;
  3072. default:
  3073. return -ENOTSUPP;
  3074. }
  3075. }
  3076. static const struct ieee80211_ops mwl8k_ops = {
  3077. .tx = mwl8k_tx,
  3078. .start = mwl8k_start,
  3079. .stop = mwl8k_stop,
  3080. .add_interface = mwl8k_add_interface,
  3081. .remove_interface = mwl8k_remove_interface,
  3082. .config = mwl8k_config,
  3083. .bss_info_changed = mwl8k_bss_info_changed,
  3084. .prepare_multicast = mwl8k_prepare_multicast,
  3085. .configure_filter = mwl8k_configure_filter,
  3086. .set_rts_threshold = mwl8k_set_rts_threshold,
  3087. .sta_add = mwl8k_sta_add,
  3088. .sta_remove = mwl8k_sta_remove,
  3089. .conf_tx = mwl8k_conf_tx,
  3090. .get_stats = mwl8k_get_stats,
  3091. .ampdu_action = mwl8k_ampdu_action,
  3092. };
  3093. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3094. {
  3095. struct mwl8k_priv *priv =
  3096. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3097. struct sk_buff *skb = priv->beacon_skb;
  3098. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3099. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3100. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3101. mgmt->u.beacon.variable, len);
  3102. int dtim_period = 1;
  3103. if (tim && tim[1] >= 2)
  3104. dtim_period = tim[3];
  3105. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3106. dev_kfree_skb(skb);
  3107. priv->beacon_skb = NULL;
  3108. }
  3109. enum {
  3110. MWL8363 = 0,
  3111. MWL8687,
  3112. MWL8366,
  3113. };
  3114. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3115. [MWL8363] = {
  3116. .part_name = "88w8363",
  3117. .helper_image = "mwl8k/helper_8363.fw",
  3118. .fw_image = "mwl8k/fmimage_8363.fw",
  3119. },
  3120. [MWL8687] = {
  3121. .part_name = "88w8687",
  3122. .helper_image = "mwl8k/helper_8687.fw",
  3123. .fw_image = "mwl8k/fmimage_8687.fw",
  3124. },
  3125. [MWL8366] = {
  3126. .part_name = "88w8366",
  3127. .helper_image = "mwl8k/helper_8366.fw",
  3128. .fw_image = "mwl8k/fmimage_8366.fw",
  3129. .ap_rxd_ops = &rxd_8366_ap_ops,
  3130. },
  3131. };
  3132. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3133. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3134. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3135. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3136. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3137. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3138. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3139. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3140. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3141. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3142. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3143. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3144. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3145. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3146. { },
  3147. };
  3148. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3149. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3150. const struct pci_device_id *id)
  3151. {
  3152. static int printed_version = 0;
  3153. struct ieee80211_hw *hw;
  3154. struct mwl8k_priv *priv;
  3155. int rc;
  3156. int i;
  3157. if (!printed_version) {
  3158. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3159. printed_version = 1;
  3160. }
  3161. rc = pci_enable_device(pdev);
  3162. if (rc) {
  3163. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3164. MWL8K_NAME);
  3165. return rc;
  3166. }
  3167. rc = pci_request_regions(pdev, MWL8K_NAME);
  3168. if (rc) {
  3169. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3170. MWL8K_NAME);
  3171. goto err_disable_device;
  3172. }
  3173. pci_set_master(pdev);
  3174. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3175. if (hw == NULL) {
  3176. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3177. rc = -ENOMEM;
  3178. goto err_free_reg;
  3179. }
  3180. SET_IEEE80211_DEV(hw, &pdev->dev);
  3181. pci_set_drvdata(pdev, hw);
  3182. priv = hw->priv;
  3183. priv->hw = hw;
  3184. priv->pdev = pdev;
  3185. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3186. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3187. if (priv->sram == NULL) {
  3188. wiphy_err(hw->wiphy, "cannot map device sram\n");
  3189. goto err_iounmap;
  3190. }
  3191. /*
  3192. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3193. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3194. */
  3195. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3196. if (priv->regs == NULL) {
  3197. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3198. if (priv->regs == NULL) {
  3199. wiphy_err(hw->wiphy, "cannot map device registers\n");
  3200. goto err_iounmap;
  3201. }
  3202. }
  3203. /* Reset firmware and hardware */
  3204. mwl8k_hw_reset(priv);
  3205. /* Ask userland hotplug daemon for the device firmware */
  3206. rc = mwl8k_request_firmware(priv);
  3207. if (rc) {
  3208. wiphy_err(hw->wiphy, "firmware files not found\n");
  3209. goto err_stop_firmware;
  3210. }
  3211. /* Load firmware into hardware */
  3212. rc = mwl8k_load_firmware(hw);
  3213. if (rc) {
  3214. wiphy_err(hw->wiphy, "cannot start firmware\n");
  3215. goto err_stop_firmware;
  3216. }
  3217. /* Reclaim memory once firmware is successfully loaded */
  3218. mwl8k_release_firmware(priv);
  3219. if (priv->ap_fw) {
  3220. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3221. if (priv->rxd_ops == NULL) {
  3222. wiphy_err(hw->wiphy,
  3223. "Driver does not have AP firmware image support for this hardware\n");
  3224. goto err_stop_firmware;
  3225. }
  3226. } else {
  3227. priv->rxd_ops = &rxd_sta_ops;
  3228. }
  3229. priv->sniffer_enabled = false;
  3230. priv->wmm_enabled = false;
  3231. priv->pending_tx_pkts = 0;
  3232. /*
  3233. * Extra headroom is the size of the required DMA header
  3234. * minus the size of the smallest 802.11 frame (CTS frame).
  3235. */
  3236. hw->extra_tx_headroom =
  3237. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3238. hw->channel_change_time = 10;
  3239. hw->queues = MWL8K_TX_QUEUES;
  3240. /* Set rssi values to dBm */
  3241. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3242. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3243. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3244. priv->macids_used = 0;
  3245. INIT_LIST_HEAD(&priv->vif_list);
  3246. /* Set default radio state and preamble */
  3247. priv->radio_on = 0;
  3248. priv->radio_short_preamble = 0;
  3249. /* Finalize join worker */
  3250. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3251. /* TX reclaim and RX tasklets. */
  3252. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3253. tasklet_disable(&priv->poll_tx_task);
  3254. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3255. tasklet_disable(&priv->poll_rx_task);
  3256. /* Power management cookie */
  3257. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3258. if (priv->cookie == NULL)
  3259. goto err_stop_firmware;
  3260. rc = mwl8k_rxq_init(hw, 0);
  3261. if (rc)
  3262. goto err_free_cookie;
  3263. rxq_refill(hw, 0, INT_MAX);
  3264. mutex_init(&priv->fw_mutex);
  3265. priv->fw_mutex_owner = NULL;
  3266. priv->fw_mutex_depth = 0;
  3267. priv->hostcmd_wait = NULL;
  3268. spin_lock_init(&priv->tx_lock);
  3269. priv->tx_wait = NULL;
  3270. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3271. rc = mwl8k_txq_init(hw, i);
  3272. if (rc)
  3273. goto err_free_queues;
  3274. }
  3275. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3276. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3277. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3278. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3279. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3280. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3281. IRQF_SHARED, MWL8K_NAME, hw);
  3282. if (rc) {
  3283. wiphy_err(hw->wiphy, "failed to register irq handler\n");
  3284. goto err_free_queues;
  3285. }
  3286. /*
  3287. * Temporarily enable interrupts. Initial firmware host
  3288. * commands use interrupts and avoid polling. Disable
  3289. * interrupts when done.
  3290. */
  3291. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3292. /* Get config data, mac addrs etc */
  3293. if (priv->ap_fw) {
  3294. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3295. if (!rc)
  3296. rc = mwl8k_cmd_set_hw_spec(hw);
  3297. } else {
  3298. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3299. }
  3300. if (rc) {
  3301. wiphy_err(hw->wiphy, "cannot initialise firmware\n");
  3302. goto err_free_irq;
  3303. }
  3304. hw->wiphy->interface_modes = 0;
  3305. if (priv->ap_macids_supported)
  3306. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3307. if (priv->sta_macids_supported)
  3308. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3309. /* Turn radio off */
  3310. rc = mwl8k_cmd_radio_disable(hw);
  3311. if (rc) {
  3312. wiphy_err(hw->wiphy, "cannot disable\n");
  3313. goto err_free_irq;
  3314. }
  3315. /* Clear MAC address */
  3316. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3317. if (rc) {
  3318. wiphy_err(hw->wiphy, "cannot clear mac address\n");
  3319. goto err_free_irq;
  3320. }
  3321. /* Disable interrupts */
  3322. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3323. free_irq(priv->pdev->irq, hw);
  3324. rc = ieee80211_register_hw(hw);
  3325. if (rc) {
  3326. wiphy_err(hw->wiphy, "cannot register device\n");
  3327. goto err_free_queues;
  3328. }
  3329. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3330. priv->device_info->part_name,
  3331. priv->hw_rev, hw->wiphy->perm_addr,
  3332. priv->ap_fw ? "AP" : "STA",
  3333. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3334. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3335. return 0;
  3336. err_free_irq:
  3337. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3338. free_irq(priv->pdev->irq, hw);
  3339. err_free_queues:
  3340. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3341. mwl8k_txq_deinit(hw, i);
  3342. mwl8k_rxq_deinit(hw, 0);
  3343. err_free_cookie:
  3344. if (priv->cookie != NULL)
  3345. pci_free_consistent(priv->pdev, 4,
  3346. priv->cookie, priv->cookie_dma);
  3347. err_stop_firmware:
  3348. mwl8k_hw_reset(priv);
  3349. mwl8k_release_firmware(priv);
  3350. err_iounmap:
  3351. if (priv->regs != NULL)
  3352. pci_iounmap(pdev, priv->regs);
  3353. if (priv->sram != NULL)
  3354. pci_iounmap(pdev, priv->sram);
  3355. pci_set_drvdata(pdev, NULL);
  3356. ieee80211_free_hw(hw);
  3357. err_free_reg:
  3358. pci_release_regions(pdev);
  3359. err_disable_device:
  3360. pci_disable_device(pdev);
  3361. return rc;
  3362. }
  3363. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3364. {
  3365. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3366. }
  3367. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3368. {
  3369. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3370. struct mwl8k_priv *priv;
  3371. int i;
  3372. if (hw == NULL)
  3373. return;
  3374. priv = hw->priv;
  3375. ieee80211_stop_queues(hw);
  3376. ieee80211_unregister_hw(hw);
  3377. /* Remove TX reclaim and RX tasklets. */
  3378. tasklet_kill(&priv->poll_tx_task);
  3379. tasklet_kill(&priv->poll_rx_task);
  3380. /* Stop hardware */
  3381. mwl8k_hw_reset(priv);
  3382. /* Return all skbs to mac80211 */
  3383. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3384. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3385. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3386. mwl8k_txq_deinit(hw, i);
  3387. mwl8k_rxq_deinit(hw, 0);
  3388. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3389. pci_iounmap(pdev, priv->regs);
  3390. pci_iounmap(pdev, priv->sram);
  3391. pci_set_drvdata(pdev, NULL);
  3392. ieee80211_free_hw(hw);
  3393. pci_release_regions(pdev);
  3394. pci_disable_device(pdev);
  3395. }
  3396. static struct pci_driver mwl8k_driver = {
  3397. .name = MWL8K_NAME,
  3398. .id_table = mwl8k_pci_id_table,
  3399. .probe = mwl8k_probe,
  3400. .remove = __devexit_p(mwl8k_remove),
  3401. .shutdown = __devexit_p(mwl8k_shutdown),
  3402. };
  3403. static int __init mwl8k_init(void)
  3404. {
  3405. return pci_register_driver(&mwl8k_driver);
  3406. }
  3407. static void __exit mwl8k_exit(void)
  3408. {
  3409. pci_unregister_driver(&mwl8k_driver);
  3410. }
  3411. module_init(mwl8k_init);
  3412. module_exit(mwl8k_exit);
  3413. MODULE_DESCRIPTION(MWL8K_DESC);
  3414. MODULE_VERSION(MWL8K_VERSION);
  3415. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3416. MODULE_LICENSE("GPL");