ice1724.c 67 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /* check whether the clock mode is spdif-in */
  96. static inline int is_spdif_master(struct snd_ice1712 *ice)
  97. {
  98. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  99. }
  100. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  101. {
  102. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  103. }
  104. /*
  105. * ac97 section
  106. */
  107. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  108. {
  109. unsigned char old_cmd;
  110. int tm;
  111. for (tm = 0; tm < 0x10000; tm++) {
  112. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  113. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  114. continue;
  115. if (!(old_cmd & VT1724_AC97_READY))
  116. continue;
  117. return old_cmd;
  118. }
  119. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  120. return old_cmd;
  121. }
  122. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  123. {
  124. int tm;
  125. for (tm = 0; tm < 0x10000; tm++)
  126. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  127. return 0;
  128. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  129. return -EIO;
  130. }
  131. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  132. unsigned short reg,
  133. unsigned short val)
  134. {
  135. struct snd_ice1712 *ice = ac97->private_data;
  136. unsigned char old_cmd;
  137. old_cmd = snd_vt1724_ac97_ready(ice);
  138. old_cmd &= ~VT1724_AC97_ID_MASK;
  139. old_cmd |= ac97->num;
  140. outb(reg, ICEMT1724(ice, AC97_INDEX));
  141. outw(val, ICEMT1724(ice, AC97_DATA));
  142. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  143. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  144. }
  145. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  146. {
  147. struct snd_ice1712 *ice = ac97->private_data;
  148. unsigned char old_cmd;
  149. old_cmd = snd_vt1724_ac97_ready(ice);
  150. old_cmd &= ~VT1724_AC97_ID_MASK;
  151. old_cmd |= ac97->num;
  152. outb(reg, ICEMT1724(ice, AC97_INDEX));
  153. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  154. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  155. return ~0;
  156. return inw(ICEMT1724(ice, AC97_DATA));
  157. }
  158. /*
  159. * GPIO operations
  160. */
  161. /* set gpio direction 0 = read, 1 = write */
  162. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  163. {
  164. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  165. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  166. }
  167. /* set the gpio mask (0 = writable) */
  168. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  169. {
  170. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  171. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  172. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  173. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  174. }
  175. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  176. {
  177. outw(data, ICEREG1724(ice, GPIO_DATA));
  178. if (! ice->vt1720)
  179. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  180. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  181. }
  182. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  183. {
  184. unsigned int data;
  185. if (! ice->vt1720)
  186. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  187. else
  188. data = 0;
  189. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  190. return data;
  191. }
  192. /*
  193. * Interrupt handler
  194. */
  195. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  196. {
  197. struct snd_ice1712 *ice = dev_id;
  198. unsigned char status;
  199. int handled = 0;
  200. while (1) {
  201. status = inb(ICEREG1724(ice, IRQSTAT));
  202. if (status == 0)
  203. break;
  204. handled = 1;
  205. /* these should probably be separated at some point,
  206. * but as we don't currently have MPU support on the board
  207. * I will leave it
  208. */
  209. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  210. if (ice->rmidi[0])
  211. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  212. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  213. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  214. }
  215. if (status & VT1724_IRQ_MTPCM) {
  216. /*
  217. * Multi-track PCM
  218. * PCM assignment are:
  219. * Playback DMA0 (M/C) = playback_pro_substream
  220. * Playback DMA1 = playback_con_substream_ds[0]
  221. * Playback DMA2 = playback_con_substream_ds[1]
  222. * Playback DMA3 = playback_con_substream_ds[2]
  223. * Playback DMA4 (SPDIF) = playback_con_substream
  224. * Record DMA0 = capture_pro_substream
  225. * Record DMA1 = capture_con_substream
  226. */
  227. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  228. if (mtstat & VT1724_MULTI_PDMA0) {
  229. if (ice->playback_pro_substream)
  230. snd_pcm_period_elapsed(ice->playback_pro_substream);
  231. }
  232. if (mtstat & VT1724_MULTI_RDMA0) {
  233. if (ice->capture_pro_substream)
  234. snd_pcm_period_elapsed(ice->capture_pro_substream);
  235. }
  236. if (mtstat & VT1724_MULTI_PDMA1) {
  237. if (ice->playback_con_substream_ds[0])
  238. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  239. }
  240. if (mtstat & VT1724_MULTI_PDMA2) {
  241. if (ice->playback_con_substream_ds[1])
  242. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  243. }
  244. if (mtstat & VT1724_MULTI_PDMA3) {
  245. if (ice->playback_con_substream_ds[2])
  246. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  247. }
  248. if (mtstat & VT1724_MULTI_PDMA4) {
  249. if (ice->playback_con_substream)
  250. snd_pcm_period_elapsed(ice->playback_con_substream);
  251. }
  252. if (mtstat & VT1724_MULTI_RDMA1) {
  253. if (ice->capture_con_substream)
  254. snd_pcm_period_elapsed(ice->capture_con_substream);
  255. }
  256. /* ack anyway to avoid freeze */
  257. outb(mtstat, ICEMT1724(ice, IRQ));
  258. /* ought to really handle this properly */
  259. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  260. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  261. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  262. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  263. /* If I don't do this, I get machine lockup due to continual interrupts */
  264. }
  265. }
  266. }
  267. return IRQ_RETVAL(handled);
  268. }
  269. /*
  270. * PCM code - professional part (multitrack)
  271. */
  272. static unsigned int rates[] = {
  273. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  274. 32000, 44100, 48000, 64000, 88200, 96000,
  275. 176400, 192000,
  276. };
  277. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  278. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  279. .list = rates,
  280. .mask = 0,
  281. };
  282. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  283. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  284. .list = rates,
  285. .mask = 0,
  286. };
  287. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  288. .count = ARRAY_SIZE(rates),
  289. .list = rates,
  290. .mask = 0,
  291. };
  292. struct vt1724_pcm_reg {
  293. unsigned int addr; /* ADDR register offset */
  294. unsigned int size; /* SIZE register offset */
  295. unsigned int count; /* COUNT register offset */
  296. unsigned int start; /* start & pause bit */
  297. };
  298. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  299. {
  300. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  301. unsigned char what;
  302. unsigned char old;
  303. struct snd_pcm_substream *s;
  304. what = 0;
  305. snd_pcm_group_for_each_entry(s, substream) {
  306. if (snd_pcm_substream_chip(s) == ice) {
  307. const struct vt1724_pcm_reg *reg;
  308. reg = s->runtime->private_data;
  309. what |= reg->start;
  310. snd_pcm_trigger_done(s, substream);
  311. }
  312. }
  313. switch (cmd) {
  314. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  315. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  316. spin_lock(&ice->reg_lock);
  317. old = inb(ICEMT1724(ice, DMA_PAUSE));
  318. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  319. old |= what;
  320. else
  321. old &= ~what;
  322. outb(old, ICEMT1724(ice, DMA_PAUSE));
  323. spin_unlock(&ice->reg_lock);
  324. break;
  325. case SNDRV_PCM_TRIGGER_START:
  326. case SNDRV_PCM_TRIGGER_STOP:
  327. spin_lock(&ice->reg_lock);
  328. old = inb(ICEMT1724(ice, DMA_CONTROL));
  329. if (cmd == SNDRV_PCM_TRIGGER_START)
  330. old |= what;
  331. else
  332. old &= ~what;
  333. outb(old, ICEMT1724(ice, DMA_CONTROL));
  334. spin_unlock(&ice->reg_lock);
  335. break;
  336. default:
  337. return -EINVAL;
  338. }
  339. return 0;
  340. }
  341. /*
  342. */
  343. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  344. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  345. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  346. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  347. static int get_max_rate(struct snd_ice1712 *ice)
  348. {
  349. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  350. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  351. return 192000;
  352. else
  353. return 96000;
  354. } else
  355. return 48000;
  356. }
  357. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  358. int force)
  359. {
  360. unsigned long flags;
  361. unsigned char val, old;
  362. unsigned int i, mclk_change;
  363. if (rate > get_max_rate(ice))
  364. return;
  365. switch (rate) {
  366. case 8000: val = 6; break;
  367. case 9600: val = 3; break;
  368. case 11025: val = 10; break;
  369. case 12000: val = 2; break;
  370. case 16000: val = 5; break;
  371. case 22050: val = 9; break;
  372. case 24000: val = 1; break;
  373. case 32000: val = 4; break;
  374. case 44100: val = 8; break;
  375. case 48000: val = 0; break;
  376. case 64000: val = 15; break;
  377. case 88200: val = 11; break;
  378. case 96000: val = 7; break;
  379. case 176400: val = 12; break;
  380. case 192000: val = 14; break;
  381. default:
  382. snd_BUG();
  383. val = 0;
  384. break;
  385. }
  386. spin_lock_irqsave(&ice->reg_lock, flags);
  387. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  388. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  389. /* running? we cannot change the rate now... */
  390. spin_unlock_irqrestore(&ice->reg_lock, flags);
  391. return;
  392. }
  393. if (!force && is_pro_rate_locked(ice)) {
  394. spin_unlock_irqrestore(&ice->reg_lock, flags);
  395. return;
  396. }
  397. old = inb(ICEMT1724(ice, RATE));
  398. if (force || old != val)
  399. outb(val, ICEMT1724(ice, RATE));
  400. else if (rate == ice->cur_rate) {
  401. spin_unlock_irqrestore(&ice->reg_lock, flags);
  402. return;
  403. }
  404. ice->cur_rate = rate;
  405. /* check MT02 */
  406. mclk_change = 0;
  407. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  408. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  409. if (rate > 96000)
  410. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  411. else
  412. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  413. if (val != old) {
  414. outb(val, ICEMT1724(ice, I2S_FORMAT));
  415. mclk_change = 1;
  416. }
  417. }
  418. spin_unlock_irqrestore(&ice->reg_lock, flags);
  419. if (mclk_change && ice->gpio.i2s_mclk_changed)
  420. ice->gpio.i2s_mclk_changed(ice);
  421. if (ice->gpio.set_pro_rate)
  422. ice->gpio.set_pro_rate(ice, rate);
  423. /* set up codecs */
  424. for (i = 0; i < ice->akm_codecs; i++) {
  425. if (ice->akm[i].ops.set_rate_val)
  426. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  427. }
  428. if (ice->spdif.ops.setup_rate)
  429. ice->spdif.ops.setup_rate(ice, rate);
  430. }
  431. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  432. struct snd_pcm_hw_params *hw_params)
  433. {
  434. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  435. int i, chs;
  436. chs = params_channels(hw_params);
  437. mutex_lock(&ice->open_mutex);
  438. /* mark surround channels */
  439. if (substream == ice->playback_pro_substream) {
  440. /* PDMA0 can be multi-channel up to 8 */
  441. chs = chs / 2 - 1;
  442. for (i = 0; i < chs; i++) {
  443. if (ice->pcm_reserved[i] &&
  444. ice->pcm_reserved[i] != substream) {
  445. mutex_unlock(&ice->open_mutex);
  446. return -EBUSY;
  447. }
  448. ice->pcm_reserved[i] = substream;
  449. }
  450. for (; i < 3; i++) {
  451. if (ice->pcm_reserved[i] == substream)
  452. ice->pcm_reserved[i] = NULL;
  453. }
  454. } else {
  455. for (i = 0; i < 3; i++) {
  456. /* check individual playback stream */
  457. if (ice->playback_con_substream_ds[i] == substream) {
  458. if (ice->pcm_reserved[i] &&
  459. ice->pcm_reserved[i] != substream) {
  460. mutex_unlock(&ice->open_mutex);
  461. return -EBUSY;
  462. }
  463. ice->pcm_reserved[i] = substream;
  464. break;
  465. }
  466. }
  467. }
  468. mutex_unlock(&ice->open_mutex);
  469. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  470. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  471. }
  472. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  473. {
  474. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  475. int i;
  476. mutex_lock(&ice->open_mutex);
  477. /* unmark surround channels */
  478. for (i = 0; i < 3; i++)
  479. if (ice->pcm_reserved[i] == substream)
  480. ice->pcm_reserved[i] = NULL;
  481. mutex_unlock(&ice->open_mutex);
  482. return snd_pcm_lib_free_pages(substream);
  483. }
  484. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  485. {
  486. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  487. unsigned char val;
  488. unsigned int size;
  489. spin_lock_irq(&ice->reg_lock);
  490. val = (8 - substream->runtime->channels) >> 1;
  491. outb(val, ICEMT1724(ice, BURST));
  492. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  493. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  494. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  495. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  496. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  497. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  498. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  499. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  500. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  501. spin_unlock_irq(&ice->reg_lock);
  502. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  503. return 0;
  504. }
  505. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  506. {
  507. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  508. size_t ptr;
  509. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  510. return 0;
  511. #if 0 /* read PLAYBACK_ADDR */
  512. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  513. if (ptr < substream->runtime->dma_addr) {
  514. snd_printd("ice1724: invalid negative ptr\n");
  515. return 0;
  516. }
  517. ptr -= substream->runtime->dma_addr;
  518. ptr = bytes_to_frames(substream->runtime, ptr);
  519. if (ptr >= substream->runtime->buffer_size) {
  520. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  521. (int)ptr, (int)substream->runtime->period_size);
  522. return 0;
  523. }
  524. #else /* read PLAYBACK_SIZE */
  525. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  526. ptr = (ptr + 1) << 2;
  527. ptr = bytes_to_frames(substream->runtime, ptr);
  528. if (! ptr)
  529. ;
  530. else if (ptr <= substream->runtime->buffer_size)
  531. ptr = substream->runtime->buffer_size - ptr;
  532. else {
  533. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  534. (int)ptr, (int)substream->runtime->buffer_size);
  535. ptr = 0;
  536. }
  537. #endif
  538. return ptr;
  539. }
  540. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  541. {
  542. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  543. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  544. spin_lock_irq(&ice->reg_lock);
  545. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  546. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  547. ice->profi_port + reg->size);
  548. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  549. ice->profi_port + reg->count);
  550. spin_unlock_irq(&ice->reg_lock);
  551. return 0;
  552. }
  553. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  554. {
  555. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  556. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  557. size_t ptr;
  558. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  559. return 0;
  560. #if 0 /* use ADDR register */
  561. ptr = inl(ice->profi_port + reg->addr);
  562. ptr -= substream->runtime->dma_addr;
  563. return bytes_to_frames(substream->runtime, ptr);
  564. #else /* use SIZE register */
  565. ptr = inw(ice->profi_port + reg->size);
  566. ptr = (ptr + 1) << 2;
  567. ptr = bytes_to_frames(substream->runtime, ptr);
  568. if (! ptr)
  569. ;
  570. else if (ptr <= substream->runtime->buffer_size)
  571. ptr = substream->runtime->buffer_size - ptr;
  572. else {
  573. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  574. (int)ptr, (int)substream->runtime->buffer_size);
  575. ptr = 0;
  576. }
  577. return ptr;
  578. #endif
  579. }
  580. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  581. .addr = VT1724_MT_PLAYBACK_ADDR,
  582. .size = VT1724_MT_PLAYBACK_SIZE,
  583. .count = VT1724_MT_PLAYBACK_COUNT,
  584. .start = VT1724_PDMA0_START,
  585. };
  586. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  587. .addr = VT1724_MT_CAPTURE_ADDR,
  588. .size = VT1724_MT_CAPTURE_SIZE,
  589. .count = VT1724_MT_CAPTURE_COUNT,
  590. .start = VT1724_RDMA0_START,
  591. };
  592. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  593. {
  594. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  595. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  596. SNDRV_PCM_INFO_MMAP_VALID |
  597. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  598. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  599. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  600. .rate_min = 8000,
  601. .rate_max = 192000,
  602. .channels_min = 2,
  603. .channels_max = 8,
  604. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  605. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  606. .period_bytes_max = (1UL << 21),
  607. .periods_min = 2,
  608. .periods_max = 1024,
  609. };
  610. static const struct snd_pcm_hardware snd_vt1724_spdif =
  611. {
  612. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  613. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  614. SNDRV_PCM_INFO_MMAP_VALID |
  615. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  616. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  617. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  618. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  619. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  620. SNDRV_PCM_RATE_192000),
  621. .rate_min = 32000,
  622. .rate_max = 192000,
  623. .channels_min = 2,
  624. .channels_max = 2,
  625. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  626. .period_bytes_min = 2 * 4 * 2,
  627. .period_bytes_max = (1UL << 18),
  628. .periods_min = 2,
  629. .periods_max = 1024,
  630. };
  631. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  632. {
  633. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  634. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  635. SNDRV_PCM_INFO_MMAP_VALID |
  636. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  637. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  638. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  639. .rate_min = 8000,
  640. .rate_max = 192000,
  641. .channels_min = 2,
  642. .channels_max = 2,
  643. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  644. .period_bytes_min = 2 * 4 * 2,
  645. .period_bytes_max = (1UL << 18),
  646. .periods_min = 2,
  647. .periods_max = 1024,
  648. };
  649. /*
  650. * set rate constraints
  651. */
  652. static int set_rate_constraints(struct snd_ice1712 *ice,
  653. struct snd_pcm_substream *substream)
  654. {
  655. struct snd_pcm_runtime *runtime = substream->runtime;
  656. if (ice->hw_rates) {
  657. /* hardware specific */
  658. runtime->hw.rate_min = ice->hw_rates->list[0];
  659. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  660. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  661. return snd_pcm_hw_constraint_list(runtime, 0,
  662. SNDRV_PCM_HW_PARAM_RATE,
  663. ice->hw_rates);
  664. }
  665. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  666. /* I2S */
  667. /* VT1720 doesn't support more than 96kHz */
  668. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  669. return snd_pcm_hw_constraint_list(runtime, 0,
  670. SNDRV_PCM_HW_PARAM_RATE,
  671. &hw_constraints_rates_192);
  672. else {
  673. runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
  674. SNDRV_PCM_RATE_8000_96000;
  675. runtime->hw.rate_max = 96000;
  676. return snd_pcm_hw_constraint_list(runtime, 0,
  677. SNDRV_PCM_HW_PARAM_RATE,
  678. &hw_constraints_rates_96);
  679. }
  680. } else if (ice->ac97) {
  681. /* ACLINK */
  682. runtime->hw.rate_max = 48000;
  683. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  684. return snd_pcm_hw_constraint_list(runtime, 0,
  685. SNDRV_PCM_HW_PARAM_RATE,
  686. &hw_constraints_rates_48);
  687. }
  688. return 0;
  689. }
  690. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  691. * actually used
  692. */
  693. #define VT1724_BUFFER_ALIGN 0x20
  694. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  695. {
  696. struct snd_pcm_runtime *runtime = substream->runtime;
  697. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  698. int chs;
  699. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  700. ice->playback_pro_substream = substream;
  701. runtime->hw = snd_vt1724_playback_pro;
  702. snd_pcm_set_sync(substream);
  703. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  704. set_rate_constraints(ice, substream);
  705. mutex_lock(&ice->open_mutex);
  706. /* calculate the currently available channels */
  707. for (chs = 0; chs < 3; chs++) {
  708. if (ice->pcm_reserved[chs])
  709. break;
  710. }
  711. chs = (chs + 1) * 2;
  712. runtime->hw.channels_max = chs;
  713. if (chs > 2) /* channels must be even */
  714. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  715. mutex_unlock(&ice->open_mutex);
  716. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  717. VT1724_BUFFER_ALIGN);
  718. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  719. VT1724_BUFFER_ALIGN);
  720. return 0;
  721. }
  722. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  723. {
  724. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  725. struct snd_pcm_runtime *runtime = substream->runtime;
  726. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  727. ice->capture_pro_substream = substream;
  728. runtime->hw = snd_vt1724_2ch_stereo;
  729. snd_pcm_set_sync(substream);
  730. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  731. set_rate_constraints(ice, substream);
  732. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  733. VT1724_BUFFER_ALIGN);
  734. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  735. VT1724_BUFFER_ALIGN);
  736. return 0;
  737. }
  738. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  739. {
  740. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  741. if (PRO_RATE_RESET)
  742. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  743. ice->playback_pro_substream = NULL;
  744. return 0;
  745. }
  746. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  747. {
  748. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  749. if (PRO_RATE_RESET)
  750. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  751. ice->capture_pro_substream = NULL;
  752. return 0;
  753. }
  754. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  755. .open = snd_vt1724_playback_pro_open,
  756. .close = snd_vt1724_playback_pro_close,
  757. .ioctl = snd_pcm_lib_ioctl,
  758. .hw_params = snd_vt1724_pcm_hw_params,
  759. .hw_free = snd_vt1724_pcm_hw_free,
  760. .prepare = snd_vt1724_playback_pro_prepare,
  761. .trigger = snd_vt1724_pcm_trigger,
  762. .pointer = snd_vt1724_playback_pro_pointer,
  763. };
  764. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  765. .open = snd_vt1724_capture_pro_open,
  766. .close = snd_vt1724_capture_pro_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_vt1724_pcm_hw_params,
  769. .hw_free = snd_vt1724_pcm_hw_free,
  770. .prepare = snd_vt1724_pcm_prepare,
  771. .trigger = snd_vt1724_pcm_trigger,
  772. .pointer = snd_vt1724_pcm_pointer,
  773. };
  774. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  775. {
  776. struct snd_pcm *pcm;
  777. int err;
  778. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  779. if (err < 0)
  780. return err;
  781. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  782. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  783. pcm->private_data = ice;
  784. pcm->info_flags = 0;
  785. strcpy(pcm->name, "ICE1724");
  786. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  787. snd_dma_pci_data(ice->pci),
  788. 256*1024, 256*1024);
  789. ice->pcm_pro = pcm;
  790. return 0;
  791. }
  792. /*
  793. * SPDIF PCM
  794. */
  795. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  796. .addr = VT1724_MT_PDMA4_ADDR,
  797. .size = VT1724_MT_PDMA4_SIZE,
  798. .count = VT1724_MT_PDMA4_COUNT,
  799. .start = VT1724_PDMA4_START,
  800. };
  801. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  802. .addr = VT1724_MT_RDMA1_ADDR,
  803. .size = VT1724_MT_RDMA1_SIZE,
  804. .count = VT1724_MT_RDMA1_COUNT,
  805. .start = VT1724_RDMA1_START,
  806. };
  807. /* update spdif control bits; call with reg_lock */
  808. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  809. {
  810. unsigned char cbit, disabled;
  811. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  812. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  813. if (cbit != disabled)
  814. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  815. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  816. if (cbit != disabled)
  817. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  818. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  819. }
  820. /* update SPDIF control bits according to the given rate */
  821. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  822. {
  823. unsigned int val, nval;
  824. unsigned long flags;
  825. spin_lock_irqsave(&ice->reg_lock, flags);
  826. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  827. nval &= ~(7 << 12);
  828. switch (rate) {
  829. case 44100: break;
  830. case 48000: nval |= 2 << 12; break;
  831. case 32000: nval |= 3 << 12; break;
  832. case 88200: nval |= 4 << 12; break;
  833. case 96000: nval |= 5 << 12; break;
  834. case 192000: nval |= 6 << 12; break;
  835. case 176400: nval |= 7 << 12; break;
  836. }
  837. if (val != nval)
  838. update_spdif_bits(ice, nval);
  839. spin_unlock_irqrestore(&ice->reg_lock, flags);
  840. }
  841. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  842. {
  843. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  844. if (! ice->force_pdma4)
  845. update_spdif_rate(ice, substream->runtime->rate);
  846. return snd_vt1724_pcm_prepare(substream);
  847. }
  848. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  849. {
  850. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  851. struct snd_pcm_runtime *runtime = substream->runtime;
  852. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  853. ice->playback_con_substream = substream;
  854. if (ice->force_pdma4) {
  855. runtime->hw = snd_vt1724_2ch_stereo;
  856. set_rate_constraints(ice, substream);
  857. } else
  858. runtime->hw = snd_vt1724_spdif;
  859. snd_pcm_set_sync(substream);
  860. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  861. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  862. VT1724_BUFFER_ALIGN);
  863. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  864. VT1724_BUFFER_ALIGN);
  865. if (ice->spdif.ops.open)
  866. ice->spdif.ops.open(ice, substream);
  867. return 0;
  868. }
  869. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  870. {
  871. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  872. if (PRO_RATE_RESET)
  873. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  874. ice->playback_con_substream = NULL;
  875. if (ice->spdif.ops.close)
  876. ice->spdif.ops.close(ice, substream);
  877. return 0;
  878. }
  879. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  880. {
  881. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  882. struct snd_pcm_runtime *runtime = substream->runtime;
  883. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  884. ice->capture_con_substream = substream;
  885. if (ice->force_rdma1) {
  886. runtime->hw = snd_vt1724_2ch_stereo;
  887. set_rate_constraints(ice, substream);
  888. } else
  889. runtime->hw = snd_vt1724_spdif;
  890. snd_pcm_set_sync(substream);
  891. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  892. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  893. VT1724_BUFFER_ALIGN);
  894. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  895. VT1724_BUFFER_ALIGN);
  896. if (ice->spdif.ops.open)
  897. ice->spdif.ops.open(ice, substream);
  898. return 0;
  899. }
  900. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  901. {
  902. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  903. if (PRO_RATE_RESET)
  904. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  905. ice->capture_con_substream = NULL;
  906. if (ice->spdif.ops.close)
  907. ice->spdif.ops.close(ice, substream);
  908. return 0;
  909. }
  910. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  911. .open = snd_vt1724_playback_spdif_open,
  912. .close = snd_vt1724_playback_spdif_close,
  913. .ioctl = snd_pcm_lib_ioctl,
  914. .hw_params = snd_vt1724_pcm_hw_params,
  915. .hw_free = snd_vt1724_pcm_hw_free,
  916. .prepare = snd_vt1724_playback_spdif_prepare,
  917. .trigger = snd_vt1724_pcm_trigger,
  918. .pointer = snd_vt1724_pcm_pointer,
  919. };
  920. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  921. .open = snd_vt1724_capture_spdif_open,
  922. .close = snd_vt1724_capture_spdif_close,
  923. .ioctl = snd_pcm_lib_ioctl,
  924. .hw_params = snd_vt1724_pcm_hw_params,
  925. .hw_free = snd_vt1724_pcm_hw_free,
  926. .prepare = snd_vt1724_pcm_prepare,
  927. .trigger = snd_vt1724_pcm_trigger,
  928. .pointer = snd_vt1724_pcm_pointer,
  929. };
  930. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  931. {
  932. char *name;
  933. struct snd_pcm *pcm;
  934. int play, capt;
  935. int err;
  936. if (ice->force_pdma4 ||
  937. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  938. play = 1;
  939. ice->has_spdif = 1;
  940. } else
  941. play = 0;
  942. if (ice->force_rdma1 ||
  943. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  944. capt = 1;
  945. ice->has_spdif = 1;
  946. } else
  947. capt = 0;
  948. if (! play && ! capt)
  949. return 0; /* no spdif device */
  950. if (ice->force_pdma4 || ice->force_rdma1)
  951. name = "ICE1724 Secondary";
  952. else
  953. name = "IEC1724 IEC958";
  954. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  955. if (err < 0)
  956. return err;
  957. if (play)
  958. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  959. &snd_vt1724_playback_spdif_ops);
  960. if (capt)
  961. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  962. &snd_vt1724_capture_spdif_ops);
  963. pcm->private_data = ice;
  964. pcm->info_flags = 0;
  965. strcpy(pcm->name, name);
  966. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  967. snd_dma_pci_data(ice->pci),
  968. 64*1024, 64*1024);
  969. ice->pcm = pcm;
  970. return 0;
  971. }
  972. /*
  973. * independent surround PCMs
  974. */
  975. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  976. {
  977. .addr = VT1724_MT_PDMA1_ADDR,
  978. .size = VT1724_MT_PDMA1_SIZE,
  979. .count = VT1724_MT_PDMA1_COUNT,
  980. .start = VT1724_PDMA1_START,
  981. },
  982. {
  983. .addr = VT1724_MT_PDMA2_ADDR,
  984. .size = VT1724_MT_PDMA2_SIZE,
  985. .count = VT1724_MT_PDMA2_COUNT,
  986. .start = VT1724_PDMA2_START,
  987. },
  988. {
  989. .addr = VT1724_MT_PDMA3_ADDR,
  990. .size = VT1724_MT_PDMA3_SIZE,
  991. .count = VT1724_MT_PDMA3_COUNT,
  992. .start = VT1724_PDMA3_START,
  993. },
  994. };
  995. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  996. {
  997. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  998. unsigned char val;
  999. spin_lock_irq(&ice->reg_lock);
  1000. val = 3 - substream->number;
  1001. if (inb(ICEMT1724(ice, BURST)) < val)
  1002. outb(val, ICEMT1724(ice, BURST));
  1003. spin_unlock_irq(&ice->reg_lock);
  1004. return snd_vt1724_pcm_prepare(substream);
  1005. }
  1006. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1007. {
  1008. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1009. struct snd_pcm_runtime *runtime = substream->runtime;
  1010. mutex_lock(&ice->open_mutex);
  1011. /* already used by PDMA0? */
  1012. if (ice->pcm_reserved[substream->number]) {
  1013. mutex_unlock(&ice->open_mutex);
  1014. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1015. }
  1016. mutex_unlock(&ice->open_mutex);
  1017. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1018. ice->playback_con_substream_ds[substream->number] = substream;
  1019. runtime->hw = snd_vt1724_2ch_stereo;
  1020. snd_pcm_set_sync(substream);
  1021. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1022. set_rate_constraints(ice, substream);
  1023. return 0;
  1024. }
  1025. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1026. {
  1027. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1028. if (PRO_RATE_RESET)
  1029. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1030. ice->playback_con_substream_ds[substream->number] = NULL;
  1031. ice->pcm_reserved[substream->number] = NULL;
  1032. return 0;
  1033. }
  1034. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1035. .open = snd_vt1724_playback_indep_open,
  1036. .close = snd_vt1724_playback_indep_close,
  1037. .ioctl = snd_pcm_lib_ioctl,
  1038. .hw_params = snd_vt1724_pcm_hw_params,
  1039. .hw_free = snd_vt1724_pcm_hw_free,
  1040. .prepare = snd_vt1724_playback_indep_prepare,
  1041. .trigger = snd_vt1724_pcm_trigger,
  1042. .pointer = snd_vt1724_pcm_pointer,
  1043. };
  1044. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1045. {
  1046. struct snd_pcm *pcm;
  1047. int play;
  1048. int err;
  1049. play = ice->num_total_dacs / 2 - 1;
  1050. if (play <= 0)
  1051. return 0;
  1052. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1053. if (err < 0)
  1054. return err;
  1055. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1056. &snd_vt1724_playback_indep_ops);
  1057. pcm->private_data = ice;
  1058. pcm->info_flags = 0;
  1059. strcpy(pcm->name, "ICE1724 Surround PCM");
  1060. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1061. snd_dma_pci_data(ice->pci),
  1062. 64*1024, 64*1024);
  1063. ice->pcm_ds = pcm;
  1064. return 0;
  1065. }
  1066. /*
  1067. * Mixer section
  1068. */
  1069. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1070. {
  1071. int err;
  1072. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1073. struct snd_ac97_bus *pbus;
  1074. struct snd_ac97_template ac97;
  1075. static struct snd_ac97_bus_ops ops = {
  1076. .write = snd_vt1724_ac97_write,
  1077. .read = snd_vt1724_ac97_read,
  1078. };
  1079. /* cold reset */
  1080. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1081. mdelay(5); /* FIXME */
  1082. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1083. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1084. return err;
  1085. memset(&ac97, 0, sizeof(ac97));
  1086. ac97.private_data = ice;
  1087. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1088. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1089. else
  1090. return 0;
  1091. }
  1092. /* I2S mixer only */
  1093. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1094. return 0;
  1095. }
  1096. /*
  1097. *
  1098. */
  1099. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1100. {
  1101. return (unsigned int)ice->eeprom.data[idx] | \
  1102. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1103. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1104. }
  1105. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1106. struct snd_info_buffer *buffer)
  1107. {
  1108. struct snd_ice1712 *ice = entry->private_data;
  1109. unsigned int idx;
  1110. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1111. snd_iprintf(buffer, "EEPROM:\n");
  1112. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1113. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1114. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1115. snd_iprintf(buffer, " System Config : 0x%x\n",
  1116. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1117. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1118. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1119. snd_iprintf(buffer, " I2S : 0x%x\n",
  1120. ice->eeprom.data[ICE_EEP2_I2S]);
  1121. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1122. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1123. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1124. ice->eeprom.gpiodir);
  1125. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1126. ice->eeprom.gpiomask);
  1127. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1128. ice->eeprom.gpiostate);
  1129. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1130. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1131. idx, ice->eeprom.data[idx]);
  1132. snd_iprintf(buffer, "\nRegisters:\n");
  1133. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1134. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1135. for (idx = 0x0; idx < 0x20 ; idx++)
  1136. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1137. idx, inb(ice->port+idx));
  1138. for (idx = 0x0; idx < 0x30 ; idx++)
  1139. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1140. idx, inb(ice->profi_port+idx));
  1141. }
  1142. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1143. {
  1144. struct snd_info_entry *entry;
  1145. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1146. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1147. }
  1148. /*
  1149. *
  1150. */
  1151. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1152. struct snd_ctl_elem_info *uinfo)
  1153. {
  1154. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1155. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1156. return 0;
  1157. }
  1158. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1159. struct snd_ctl_elem_value *ucontrol)
  1160. {
  1161. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1162. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1163. return 0;
  1164. }
  1165. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1166. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1167. .name = "ICE1724 EEPROM",
  1168. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1169. .info = snd_vt1724_eeprom_info,
  1170. .get = snd_vt1724_eeprom_get
  1171. };
  1172. /*
  1173. */
  1174. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1175. struct snd_ctl_elem_info *uinfo)
  1176. {
  1177. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1178. uinfo->count = 1;
  1179. return 0;
  1180. }
  1181. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1182. {
  1183. unsigned int val, rbits;
  1184. val = diga->status[0] & 0x03; /* professional, non-audio */
  1185. if (val & 0x01) {
  1186. /* professional */
  1187. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1188. IEC958_AES0_PRO_EMPHASIS_5015)
  1189. val |= 1U << 3;
  1190. rbits = (diga->status[4] >> 3) & 0x0f;
  1191. if (rbits) {
  1192. switch (rbits) {
  1193. case 2: val |= 5 << 12; break; /* 96k */
  1194. case 3: val |= 6 << 12; break; /* 192k */
  1195. case 10: val |= 4 << 12; break; /* 88.2k */
  1196. case 11: val |= 7 << 12; break; /* 176.4k */
  1197. }
  1198. } else {
  1199. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1200. case IEC958_AES0_PRO_FS_44100:
  1201. break;
  1202. case IEC958_AES0_PRO_FS_32000:
  1203. val |= 3U << 12;
  1204. break;
  1205. default:
  1206. val |= 2U << 12;
  1207. break;
  1208. }
  1209. }
  1210. } else {
  1211. /* consumer */
  1212. val |= diga->status[1] & 0x04; /* copyright */
  1213. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1214. IEC958_AES0_CON_EMPHASIS_5015)
  1215. val |= 1U << 3;
  1216. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1217. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1218. }
  1219. return val;
  1220. }
  1221. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1222. {
  1223. memset(diga->status, 0, sizeof(diga->status));
  1224. diga->status[0] = val & 0x03; /* professional, non-audio */
  1225. if (val & 0x01) {
  1226. /* professional */
  1227. if (val & (1U << 3))
  1228. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1229. switch ((val >> 12) & 0x7) {
  1230. case 0:
  1231. break;
  1232. case 2:
  1233. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1234. break;
  1235. default:
  1236. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1237. break;
  1238. }
  1239. } else {
  1240. /* consumer */
  1241. diga->status[0] |= val & (1U << 2); /* copyright */
  1242. if (val & (1U << 3))
  1243. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1244. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1245. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1246. }
  1247. }
  1248. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1249. struct snd_ctl_elem_value *ucontrol)
  1250. {
  1251. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1252. unsigned int val;
  1253. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1254. decode_spdif_bits(&ucontrol->value.iec958, val);
  1255. return 0;
  1256. }
  1257. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1258. struct snd_ctl_elem_value *ucontrol)
  1259. {
  1260. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1261. unsigned int val, old;
  1262. val = encode_spdif_bits(&ucontrol->value.iec958);
  1263. spin_lock_irq(&ice->reg_lock);
  1264. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1265. if (val != old)
  1266. update_spdif_bits(ice, val);
  1267. spin_unlock_irq(&ice->reg_lock);
  1268. return (val != old);
  1269. }
  1270. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1271. {
  1272. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1273. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1274. .info = snd_vt1724_spdif_info,
  1275. .get = snd_vt1724_spdif_default_get,
  1276. .put = snd_vt1724_spdif_default_put
  1277. };
  1278. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1279. struct snd_ctl_elem_value *ucontrol)
  1280. {
  1281. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1282. IEC958_AES0_PROFESSIONAL |
  1283. IEC958_AES0_CON_NOT_COPYRIGHT |
  1284. IEC958_AES0_CON_EMPHASIS;
  1285. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1286. IEC958_AES1_CON_CATEGORY;
  1287. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1288. return 0;
  1289. }
  1290. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1291. struct snd_ctl_elem_value *ucontrol)
  1292. {
  1293. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1294. IEC958_AES0_PROFESSIONAL |
  1295. IEC958_AES0_PRO_FS |
  1296. IEC958_AES0_PRO_EMPHASIS;
  1297. return 0;
  1298. }
  1299. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1300. {
  1301. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1302. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1303. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1304. .info = snd_vt1724_spdif_info,
  1305. .get = snd_vt1724_spdif_maskc_get,
  1306. };
  1307. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1308. {
  1309. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1310. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1311. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1312. .info = snd_vt1724_spdif_info,
  1313. .get = snd_vt1724_spdif_maskp_get,
  1314. };
  1315. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1316. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1317. struct snd_ctl_elem_value *ucontrol)
  1318. {
  1319. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1320. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1321. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1322. return 0;
  1323. }
  1324. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1325. struct snd_ctl_elem_value *ucontrol)
  1326. {
  1327. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1328. unsigned char old, val;
  1329. spin_lock_irq(&ice->reg_lock);
  1330. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1331. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1332. if (ucontrol->value.integer.value[0])
  1333. val |= VT1724_CFG_SPDIF_OUT_EN;
  1334. if (old != val)
  1335. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1336. spin_unlock_irq(&ice->reg_lock);
  1337. return old != val;
  1338. }
  1339. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1340. {
  1341. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1342. /* FIXME: the following conflict with IEC958 Playback Route */
  1343. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1344. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1345. .info = snd_vt1724_spdif_sw_info,
  1346. .get = snd_vt1724_spdif_sw_get,
  1347. .put = snd_vt1724_spdif_sw_put
  1348. };
  1349. #if 0 /* NOT USED YET */
  1350. /*
  1351. * GPIO access from extern
  1352. */
  1353. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1354. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1355. struct snd_ctl_elem_value *ucontrol)
  1356. {
  1357. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1358. int shift = kcontrol->private_value & 0xff;
  1359. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1360. snd_ice1712_save_gpio_status(ice);
  1361. ucontrol->value.integer.value[0] =
  1362. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1363. snd_ice1712_restore_gpio_status(ice);
  1364. return 0;
  1365. }
  1366. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1367. struct snd_ctl_elem_value *ucontrol)
  1368. {
  1369. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1370. int shift = kcontrol->private_value & 0xff;
  1371. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1372. unsigned int val, nval;
  1373. if (kcontrol->private_value & (1 << 31))
  1374. return -EPERM;
  1375. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1376. snd_ice1712_save_gpio_status(ice);
  1377. val = snd_ice1712_gpio_read(ice);
  1378. nval |= val & ~(1 << shift);
  1379. if (val != nval)
  1380. snd_ice1712_gpio_write(ice, nval);
  1381. snd_ice1712_restore_gpio_status(ice);
  1382. return val != nval;
  1383. }
  1384. #endif /* NOT USED YET */
  1385. /*
  1386. * rate
  1387. */
  1388. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1389. struct snd_ctl_elem_info *uinfo)
  1390. {
  1391. static const char * const texts_1724[] = {
  1392. "8000", /* 0: 6 */
  1393. "9600", /* 1: 3 */
  1394. "11025", /* 2: 10 */
  1395. "12000", /* 3: 2 */
  1396. "16000", /* 4: 5 */
  1397. "22050", /* 5: 9 */
  1398. "24000", /* 6: 1 */
  1399. "32000", /* 7: 4 */
  1400. "44100", /* 8: 8 */
  1401. "48000", /* 9: 0 */
  1402. "64000", /* 10: 15 */
  1403. "88200", /* 11: 11 */
  1404. "96000", /* 12: 7 */
  1405. "176400", /* 13: 12 */
  1406. "192000", /* 14: 14 */
  1407. "IEC958 Input", /* 15: -- */
  1408. };
  1409. static const char * const texts_1720[] = {
  1410. "8000", /* 0: 6 */
  1411. "9600", /* 1: 3 */
  1412. "11025", /* 2: 10 */
  1413. "12000", /* 3: 2 */
  1414. "16000", /* 4: 5 */
  1415. "22050", /* 5: 9 */
  1416. "24000", /* 6: 1 */
  1417. "32000", /* 7: 4 */
  1418. "44100", /* 8: 8 */
  1419. "48000", /* 9: 0 */
  1420. "64000", /* 10: 15 */
  1421. "88200", /* 11: 11 */
  1422. "96000", /* 12: 7 */
  1423. "IEC958 Input", /* 13: -- */
  1424. };
  1425. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1426. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1427. uinfo->count = 1;
  1428. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1429. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1430. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1431. strcpy(uinfo->value.enumerated.name,
  1432. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1433. texts_1724[uinfo->value.enumerated.item]);
  1434. return 0;
  1435. }
  1436. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1437. struct snd_ctl_elem_value *ucontrol)
  1438. {
  1439. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1440. static const unsigned char xlate[16] = {
  1441. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1442. };
  1443. unsigned char val;
  1444. spin_lock_irq(&ice->reg_lock);
  1445. if (is_spdif_master(ice)) {
  1446. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1447. } else {
  1448. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1449. if (val == 255) {
  1450. snd_BUG();
  1451. val = 0;
  1452. }
  1453. ucontrol->value.enumerated.item[0] = val;
  1454. }
  1455. spin_unlock_irq(&ice->reg_lock);
  1456. return 0;
  1457. }
  1458. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1462. unsigned char oval;
  1463. int rate;
  1464. int change = 0;
  1465. int spdif = ice->vt1720 ? 13 : 15;
  1466. spin_lock_irq(&ice->reg_lock);
  1467. oval = inb(ICEMT1724(ice, RATE));
  1468. if (ucontrol->value.enumerated.item[0] == spdif) {
  1469. unsigned char i2s_oval;
  1470. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1471. /* setting 256fs */
  1472. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1473. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X,
  1474. ICEMT1724(ice, I2S_FORMAT));
  1475. } else {
  1476. rate = rates[ucontrol->value.integer.value[0] % 15];
  1477. if (rate <= get_max_rate(ice)) {
  1478. PRO_RATE_DEFAULT = rate;
  1479. spin_unlock_irq(&ice->reg_lock);
  1480. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1481. spin_lock_irq(&ice->reg_lock);
  1482. }
  1483. }
  1484. change = inb(ICEMT1724(ice, RATE)) != oval;
  1485. spin_unlock_irq(&ice->reg_lock);
  1486. if ((oval & VT1724_SPDIF_MASTER) !=
  1487. (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1488. /* notify akm chips as well */
  1489. if (is_spdif_master(ice)) {
  1490. unsigned int i;
  1491. for (i = 0; i < ice->akm_codecs; i++) {
  1492. if (ice->akm[i].ops.set_rate_val)
  1493. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1494. }
  1495. }
  1496. }
  1497. return change;
  1498. }
  1499. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1500. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1501. .name = "Multi Track Internal Clock",
  1502. .info = snd_vt1724_pro_internal_clock_info,
  1503. .get = snd_vt1724_pro_internal_clock_get,
  1504. .put = snd_vt1724_pro_internal_clock_put
  1505. };
  1506. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1507. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1508. struct snd_ctl_elem_value *ucontrol)
  1509. {
  1510. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1511. return 0;
  1512. }
  1513. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1514. struct snd_ctl_elem_value *ucontrol)
  1515. {
  1516. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1517. int change = 0, nval;
  1518. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1519. spin_lock_irq(&ice->reg_lock);
  1520. change = PRO_RATE_LOCKED != nval;
  1521. PRO_RATE_LOCKED = nval;
  1522. spin_unlock_irq(&ice->reg_lock);
  1523. return change;
  1524. }
  1525. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1526. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1527. .name = "Multi Track Rate Locking",
  1528. .info = snd_vt1724_pro_rate_locking_info,
  1529. .get = snd_vt1724_pro_rate_locking_get,
  1530. .put = snd_vt1724_pro_rate_locking_put
  1531. };
  1532. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1533. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1537. return 0;
  1538. }
  1539. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1540. struct snd_ctl_elem_value *ucontrol)
  1541. {
  1542. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1543. int change = 0, nval;
  1544. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1545. spin_lock_irq(&ice->reg_lock);
  1546. change = PRO_RATE_RESET != nval;
  1547. PRO_RATE_RESET = nval;
  1548. spin_unlock_irq(&ice->reg_lock);
  1549. return change;
  1550. }
  1551. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1552. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1553. .name = "Multi Track Rate Reset",
  1554. .info = snd_vt1724_pro_rate_reset_info,
  1555. .get = snd_vt1724_pro_rate_reset_get,
  1556. .put = snd_vt1724_pro_rate_reset_put
  1557. };
  1558. /*
  1559. * routing
  1560. */
  1561. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1562. struct snd_ctl_elem_info *uinfo)
  1563. {
  1564. static char *texts[] = {
  1565. "PCM Out", /* 0 */
  1566. "H/W In 0", "H/W In 1", /* 1-2 */
  1567. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1568. };
  1569. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1570. uinfo->count = 1;
  1571. uinfo->value.enumerated.items = 5;
  1572. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1573. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1574. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1575. return 0;
  1576. }
  1577. static inline int analog_route_shift(int idx)
  1578. {
  1579. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1580. }
  1581. static inline int digital_route_shift(int idx)
  1582. {
  1583. return idx * 3;
  1584. }
  1585. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1586. {
  1587. unsigned long val;
  1588. unsigned char eitem;
  1589. static const unsigned char xlate[8] = {
  1590. 0, 255, 1, 2, 255, 255, 3, 4,
  1591. };
  1592. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1593. val >>= shift;
  1594. val &= 7; //we now have 3 bits per output
  1595. eitem = xlate[val];
  1596. if (eitem == 255) {
  1597. snd_BUG();
  1598. return 0;
  1599. }
  1600. return eitem;
  1601. }
  1602. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1603. {
  1604. unsigned int old_val, nval;
  1605. int change;
  1606. static const unsigned char xroute[8] = {
  1607. 0, /* PCM */
  1608. 2, /* PSDIN0 Left */
  1609. 3, /* PSDIN0 Right */
  1610. 6, /* SPDIN Left */
  1611. 7, /* SPDIN Right */
  1612. };
  1613. nval = xroute[val % 5];
  1614. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1615. val &= ~(0x07 << shift);
  1616. val |= nval << shift;
  1617. change = val != old_val;
  1618. if (change)
  1619. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1620. return change;
  1621. }
  1622. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1623. struct snd_ctl_elem_value *ucontrol)
  1624. {
  1625. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1626. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1627. ucontrol->value.enumerated.item[0] =
  1628. get_route_val(ice, analog_route_shift(idx));
  1629. return 0;
  1630. }
  1631. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1632. struct snd_ctl_elem_value *ucontrol)
  1633. {
  1634. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1635. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1636. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1637. analog_route_shift(idx));
  1638. }
  1639. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1640. struct snd_ctl_elem_value *ucontrol)
  1641. {
  1642. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1643. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1644. ucontrol->value.enumerated.item[0] =
  1645. get_route_val(ice, digital_route_shift(idx));
  1646. return 0;
  1647. }
  1648. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1652. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1653. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1654. digital_route_shift(idx));
  1655. }
  1656. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1657. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1658. .name = "H/W Playback Route",
  1659. .info = snd_vt1724_pro_route_info,
  1660. .get = snd_vt1724_pro_route_analog_get,
  1661. .put = snd_vt1724_pro_route_analog_put,
  1662. };
  1663. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1664. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1665. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1666. .info = snd_vt1724_pro_route_info,
  1667. .get = snd_vt1724_pro_route_spdif_get,
  1668. .put = snd_vt1724_pro_route_spdif_put,
  1669. .count = 2,
  1670. };
  1671. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1672. struct snd_ctl_elem_info *uinfo)
  1673. {
  1674. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1675. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1676. uinfo->value.integer.min = 0;
  1677. uinfo->value.integer.max = 255;
  1678. return 0;
  1679. }
  1680. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1681. struct snd_ctl_elem_value *ucontrol)
  1682. {
  1683. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1684. int idx;
  1685. spin_lock_irq(&ice->reg_lock);
  1686. for (idx = 0; idx < 22; idx++) {
  1687. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1688. ucontrol->value.integer.value[idx] =
  1689. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1690. }
  1691. spin_unlock_irq(&ice->reg_lock);
  1692. return 0;
  1693. }
  1694. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1695. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1696. .name = "Multi Track Peak",
  1697. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1698. .info = snd_vt1724_pro_peak_info,
  1699. .get = snd_vt1724_pro_peak_get
  1700. };
  1701. /*
  1702. *
  1703. */
  1704. static struct snd_ice1712_card_info no_matched __devinitdata;
  1705. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1706. snd_vt1724_revo_cards,
  1707. snd_vt1724_amp_cards,
  1708. snd_vt1724_aureon_cards,
  1709. snd_vt1720_mobo_cards,
  1710. snd_vt1720_pontis_cards,
  1711. snd_vt1724_prodigy_hifi_cards,
  1712. snd_vt1724_prodigy192_cards,
  1713. snd_vt1724_juli_cards,
  1714. snd_vt1724_phase_cards,
  1715. snd_vt1724_wtm_cards,
  1716. snd_vt1724_se_cards,
  1717. NULL,
  1718. };
  1719. /*
  1720. */
  1721. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1722. {
  1723. int t = 0x10000;
  1724. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1725. ;
  1726. if (t == -1)
  1727. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1728. }
  1729. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1730. unsigned char dev, unsigned char addr)
  1731. {
  1732. unsigned char val;
  1733. mutex_lock(&ice->i2c_mutex);
  1734. wait_i2c_busy(ice);
  1735. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1736. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1737. wait_i2c_busy(ice);
  1738. val = inb(ICEREG1724(ice, I2C_DATA));
  1739. mutex_unlock(&ice->i2c_mutex);
  1740. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1741. return val;
  1742. }
  1743. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1744. unsigned char dev, unsigned char addr, unsigned char data)
  1745. {
  1746. mutex_lock(&ice->i2c_mutex);
  1747. wait_i2c_busy(ice);
  1748. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1749. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1750. outb(data, ICEREG1724(ice, I2C_DATA));
  1751. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1752. wait_i2c_busy(ice);
  1753. mutex_unlock(&ice->i2c_mutex);
  1754. }
  1755. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1756. const char *modelname)
  1757. {
  1758. const int dev = 0xa0; /* EEPROM device address */
  1759. unsigned int i, size;
  1760. struct snd_ice1712_card_info * const *tbl, *c;
  1761. if (! modelname || ! *modelname) {
  1762. ice->eeprom.subvendor = 0;
  1763. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1764. ice->eeprom.subvendor =
  1765. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1766. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1767. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1768. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1769. if (ice->eeprom.subvendor == 0 ||
  1770. ice->eeprom.subvendor == (unsigned int)-1) {
  1771. /* invalid subvendor from EEPROM, try the PCI
  1772. * subststem ID instead
  1773. */
  1774. u16 vendor, device;
  1775. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1776. &vendor);
  1777. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1778. ice->eeprom.subvendor =
  1779. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1780. if (ice->eeprom.subvendor == 0 ||
  1781. ice->eeprom.subvendor == (unsigned int)-1) {
  1782. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1783. return -ENXIO;
  1784. }
  1785. }
  1786. }
  1787. for (tbl = card_tables; *tbl; tbl++) {
  1788. for (c = *tbl; c->subvendor; c++) {
  1789. if (modelname && c->model &&
  1790. ! strcmp(modelname, c->model)) {
  1791. printk(KERN_INFO "ice1724: Using board model %s\n",
  1792. c->name);
  1793. ice->eeprom.subvendor = c->subvendor;
  1794. } else if (c->subvendor != ice->eeprom.subvendor)
  1795. continue;
  1796. if (! c->eeprom_size || ! c->eeprom_data)
  1797. goto found;
  1798. /* if the EEPROM is given by the driver, use it */
  1799. snd_printdd("using the defined eeprom..\n");
  1800. ice->eeprom.version = 2;
  1801. ice->eeprom.size = c->eeprom_size + 6;
  1802. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1803. goto read_skipped;
  1804. }
  1805. }
  1806. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1807. ice->eeprom.subvendor);
  1808. found:
  1809. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1810. if (ice->eeprom.size < 6)
  1811. ice->eeprom.size = 32;
  1812. else if (ice->eeprom.size > 32) {
  1813. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1814. ice->eeprom.size);
  1815. return -EIO;
  1816. }
  1817. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1818. if (ice->eeprom.version != 2)
  1819. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1820. ice->eeprom.version);
  1821. size = ice->eeprom.size - 6;
  1822. for (i = 0; i < size; i++)
  1823. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1824. read_skipped:
  1825. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1826. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1827. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1828. return 0;
  1829. }
  1830. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1831. {
  1832. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1833. udelay(200);
  1834. outb(0, ICEREG1724(ice, CONTROL));
  1835. udelay(200);
  1836. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1837. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1838. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1839. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1840. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1841. ice->gpio.direction = ice->eeprom.gpiodir;
  1842. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1843. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1844. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1845. outb(0, ICEREG1724(ice, POWERDOWN));
  1846. return 0;
  1847. }
  1848. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1849. {
  1850. int err;
  1851. struct snd_kcontrol *kctl;
  1852. snd_assert(ice->pcm != NULL, return -EIO);
  1853. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1854. if (err < 0)
  1855. return err;
  1856. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1857. if (err < 0)
  1858. return err;
  1859. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1860. if (err < 0)
  1861. return err;
  1862. kctl->id.device = ice->pcm->device;
  1863. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1864. if (err < 0)
  1865. return err;
  1866. kctl->id.device = ice->pcm->device;
  1867. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1868. if (err < 0)
  1869. return err;
  1870. kctl->id.device = ice->pcm->device;
  1871. #if 0 /* use default only */
  1872. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1873. if (err < 0)
  1874. return err;
  1875. kctl->id.device = ice->pcm->device;
  1876. ice->spdif.stream_ctl = kctl;
  1877. #endif
  1878. return 0;
  1879. }
  1880. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1881. {
  1882. int err;
  1883. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1884. if (err < 0)
  1885. return err;
  1886. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1887. if (err < 0)
  1888. return err;
  1889. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1890. if (err < 0)
  1891. return err;
  1892. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1893. if (err < 0)
  1894. return err;
  1895. if (ice->num_total_dacs > 0) {
  1896. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1897. tmp.count = ice->num_total_dacs;
  1898. if (ice->vt1720 && tmp.count > 2)
  1899. tmp.count = 2;
  1900. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1901. if (err < 0)
  1902. return err;
  1903. }
  1904. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1905. if (err < 0)
  1906. return err;
  1907. return 0;
  1908. }
  1909. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1910. {
  1911. if (! ice->port)
  1912. goto __hw_end;
  1913. /* mask all interrupts */
  1914. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1915. outb(0xff, ICEREG1724(ice, IRQMASK));
  1916. /* --- */
  1917. __hw_end:
  1918. if (ice->irq >= 0) {
  1919. synchronize_irq(ice->irq);
  1920. free_irq(ice->irq, ice);
  1921. }
  1922. pci_release_regions(ice->pci);
  1923. snd_ice1712_akm4xxx_free(ice);
  1924. pci_disable_device(ice->pci);
  1925. kfree(ice->spec);
  1926. kfree(ice);
  1927. return 0;
  1928. }
  1929. static int snd_vt1724_dev_free(struct snd_device *device)
  1930. {
  1931. struct snd_ice1712 *ice = device->device_data;
  1932. return snd_vt1724_free(ice);
  1933. }
  1934. static int __devinit snd_vt1724_create(struct snd_card *card,
  1935. struct pci_dev *pci,
  1936. const char *modelname,
  1937. struct snd_ice1712 ** r_ice1712)
  1938. {
  1939. struct snd_ice1712 *ice;
  1940. int err;
  1941. unsigned char mask;
  1942. static struct snd_device_ops ops = {
  1943. .dev_free = snd_vt1724_dev_free,
  1944. };
  1945. *r_ice1712 = NULL;
  1946. /* enable PCI device */
  1947. if ((err = pci_enable_device(pci)) < 0)
  1948. return err;
  1949. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1950. if (ice == NULL) {
  1951. pci_disable_device(pci);
  1952. return -ENOMEM;
  1953. }
  1954. ice->vt1724 = 1;
  1955. spin_lock_init(&ice->reg_lock);
  1956. mutex_init(&ice->gpio_mutex);
  1957. mutex_init(&ice->open_mutex);
  1958. mutex_init(&ice->i2c_mutex);
  1959. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1960. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1961. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1962. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1963. ice->card = card;
  1964. ice->pci = pci;
  1965. ice->irq = -1;
  1966. pci_set_master(pci);
  1967. snd_vt1724_proc_init(ice);
  1968. synchronize_irq(pci->irq);
  1969. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1970. kfree(ice);
  1971. pci_disable_device(pci);
  1972. return err;
  1973. }
  1974. ice->port = pci_resource_start(pci, 0);
  1975. ice->profi_port = pci_resource_start(pci, 1);
  1976. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1977. IRQF_SHARED, "ICE1724", ice)) {
  1978. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1979. snd_vt1724_free(ice);
  1980. return -EIO;
  1981. }
  1982. ice->irq = pci->irq;
  1983. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1984. snd_vt1724_free(ice);
  1985. return -EIO;
  1986. }
  1987. if (snd_vt1724_chip_init(ice) < 0) {
  1988. snd_vt1724_free(ice);
  1989. return -EIO;
  1990. }
  1991. /* unmask used interrupts */
  1992. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  1993. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  1994. else
  1995. mask = 0;
  1996. outb(mask, ICEREG1724(ice, IRQMASK));
  1997. /* don't handle FIFO overrun/underruns (just yet),
  1998. * since they cause machine lockups
  1999. */
  2000. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2001. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2002. snd_vt1724_free(ice);
  2003. return err;
  2004. }
  2005. snd_card_set_dev(card, &pci->dev);
  2006. *r_ice1712 = ice;
  2007. return 0;
  2008. }
  2009. /*
  2010. *
  2011. * Registration
  2012. *
  2013. */
  2014. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2015. const struct pci_device_id *pci_id)
  2016. {
  2017. static int dev;
  2018. struct snd_card *card;
  2019. struct snd_ice1712 *ice;
  2020. int pcm_dev = 0, err;
  2021. struct snd_ice1712_card_info * const *tbl, *c;
  2022. if (dev >= SNDRV_CARDS)
  2023. return -ENODEV;
  2024. if (!enable[dev]) {
  2025. dev++;
  2026. return -ENOENT;
  2027. }
  2028. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2029. if (card == NULL)
  2030. return -ENOMEM;
  2031. strcpy(card->driver, "ICE1724");
  2032. strcpy(card->shortname, "ICEnsemble ICE1724");
  2033. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2034. snd_card_free(card);
  2035. return err;
  2036. }
  2037. for (tbl = card_tables; *tbl; tbl++) {
  2038. for (c = *tbl; c->subvendor; c++) {
  2039. if (c->subvendor == ice->eeprom.subvendor) {
  2040. strcpy(card->shortname, c->name);
  2041. if (c->driver) /* specific driver? */
  2042. strcpy(card->driver, c->driver);
  2043. if (c->chip_init) {
  2044. if ((err = c->chip_init(ice)) < 0) {
  2045. snd_card_free(card);
  2046. return err;
  2047. }
  2048. }
  2049. goto __found;
  2050. }
  2051. }
  2052. }
  2053. c = &no_matched;
  2054. __found:
  2055. /*
  2056. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2057. * ICE1712 has only one for both (mixed up).
  2058. *
  2059. * Confusingly the analog PCM is named "professional" here because it
  2060. * was called so in ice1712 driver, and vt1724 driver is derived from
  2061. * ice1712 driver.
  2062. */
  2063. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2064. snd_card_free(card);
  2065. return err;
  2066. }
  2067. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2068. snd_card_free(card);
  2069. return err;
  2070. }
  2071. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2072. snd_card_free(card);
  2073. return err;
  2074. }
  2075. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2076. snd_card_free(card);
  2077. return err;
  2078. }
  2079. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2080. snd_card_free(card);
  2081. return err;
  2082. }
  2083. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2084. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2085. snd_card_free(card);
  2086. return err;
  2087. }
  2088. }
  2089. if (c->build_controls) {
  2090. if ((err = c->build_controls(ice)) < 0) {
  2091. snd_card_free(card);
  2092. return err;
  2093. }
  2094. }
  2095. if (! c->no_mpu401) {
  2096. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2097. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2098. ICEREG1724(ice, MPU_CTRL),
  2099. MPU401_INFO_INTEGRATED,
  2100. ice->irq, 0,
  2101. &ice->rmidi[0])) < 0) {
  2102. snd_card_free(card);
  2103. return err;
  2104. }
  2105. }
  2106. }
  2107. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2108. card->shortname, ice->port, ice->irq);
  2109. if ((err = snd_card_register(card)) < 0) {
  2110. snd_card_free(card);
  2111. return err;
  2112. }
  2113. pci_set_drvdata(pci, card);
  2114. dev++;
  2115. return 0;
  2116. }
  2117. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2118. {
  2119. snd_card_free(pci_get_drvdata(pci));
  2120. pci_set_drvdata(pci, NULL);
  2121. }
  2122. static struct pci_driver driver = {
  2123. .name = "ICE1724",
  2124. .id_table = snd_vt1724_ids,
  2125. .probe = snd_vt1724_probe,
  2126. .remove = __devexit_p(snd_vt1724_remove),
  2127. };
  2128. static int __init alsa_card_ice1724_init(void)
  2129. {
  2130. return pci_register_driver(&driver);
  2131. }
  2132. static void __exit alsa_card_ice1724_exit(void)
  2133. {
  2134. pci_unregister_driver(&driver);
  2135. }
  2136. module_init(alsa_card_ice1724_init)
  2137. module_exit(alsa_card_ice1724_exit)