libata-core.c 125 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. static unsigned int ata_dev_init_params(struct ata_port *ap,
  62. struct ata_device *dev,
  63. u16 heads,
  64. u16 sectors);
  65. static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
  66. int force_pio0);
  67. static int ata_down_sata_spd_limit(struct ata_port *ap);
  68. static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
  69. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  70. struct ata_device *dev);
  71. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
  72. static unsigned int ata_unique_id = 1;
  73. static struct workqueue_struct *ata_wq;
  74. int atapi_enabled = 1;
  75. module_param(atapi_enabled, int, 0444);
  76. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  77. int libata_fua = 0;
  78. module_param_named(fua, libata_fua, int, 0444);
  79. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  80. MODULE_AUTHOR("Jeff Garzik");
  81. MODULE_DESCRIPTION("Library module for ATA devices");
  82. MODULE_LICENSE("GPL");
  83. MODULE_VERSION(DRV_VERSION);
  84. /**
  85. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  86. * @tf: Taskfile to convert
  87. * @fis: Buffer into which data will output
  88. * @pmp: Port multiplier port
  89. *
  90. * Converts a standard ATA taskfile to a Serial ATA
  91. * FIS structure (Register - Host to Device).
  92. *
  93. * LOCKING:
  94. * Inherited from caller.
  95. */
  96. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  97. {
  98. fis[0] = 0x27; /* Register - Host to Device FIS */
  99. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  100. bit 7 indicates Command FIS */
  101. fis[2] = tf->command;
  102. fis[3] = tf->feature;
  103. fis[4] = tf->lbal;
  104. fis[5] = tf->lbam;
  105. fis[6] = tf->lbah;
  106. fis[7] = tf->device;
  107. fis[8] = tf->hob_lbal;
  108. fis[9] = tf->hob_lbam;
  109. fis[10] = tf->hob_lbah;
  110. fis[11] = tf->hob_feature;
  111. fis[12] = tf->nsect;
  112. fis[13] = tf->hob_nsect;
  113. fis[14] = 0;
  114. fis[15] = tf->ctl;
  115. fis[16] = 0;
  116. fis[17] = 0;
  117. fis[18] = 0;
  118. fis[19] = 0;
  119. }
  120. /**
  121. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  122. * @fis: Buffer from which data will be input
  123. * @tf: Taskfile to output
  124. *
  125. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  126. *
  127. * LOCKING:
  128. * Inherited from caller.
  129. */
  130. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  131. {
  132. tf->command = fis[2]; /* status */
  133. tf->feature = fis[3]; /* error */
  134. tf->lbal = fis[4];
  135. tf->lbam = fis[5];
  136. tf->lbah = fis[6];
  137. tf->device = fis[7];
  138. tf->hob_lbal = fis[8];
  139. tf->hob_lbam = fis[9];
  140. tf->hob_lbah = fis[10];
  141. tf->nsect = fis[12];
  142. tf->hob_nsect = fis[13];
  143. }
  144. static const u8 ata_rw_cmds[] = {
  145. /* pio multi */
  146. ATA_CMD_READ_MULTI,
  147. ATA_CMD_WRITE_MULTI,
  148. ATA_CMD_READ_MULTI_EXT,
  149. ATA_CMD_WRITE_MULTI_EXT,
  150. 0,
  151. 0,
  152. 0,
  153. ATA_CMD_WRITE_MULTI_FUA_EXT,
  154. /* pio */
  155. ATA_CMD_PIO_READ,
  156. ATA_CMD_PIO_WRITE,
  157. ATA_CMD_PIO_READ_EXT,
  158. ATA_CMD_PIO_WRITE_EXT,
  159. 0,
  160. 0,
  161. 0,
  162. 0,
  163. /* dma */
  164. ATA_CMD_READ,
  165. ATA_CMD_WRITE,
  166. ATA_CMD_READ_EXT,
  167. ATA_CMD_WRITE_EXT,
  168. 0,
  169. 0,
  170. 0,
  171. ATA_CMD_WRITE_FUA_EXT
  172. };
  173. /**
  174. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  175. * @qc: command to examine and configure
  176. *
  177. * Examine the device configuration and tf->flags to calculate
  178. * the proper read/write commands and protocol to use.
  179. *
  180. * LOCKING:
  181. * caller.
  182. */
  183. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  184. {
  185. struct ata_taskfile *tf = &qc->tf;
  186. struct ata_device *dev = qc->dev;
  187. u8 cmd;
  188. int index, fua, lba48, write;
  189. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  190. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  191. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  192. if (dev->flags & ATA_DFLAG_PIO) {
  193. tf->protocol = ATA_PROT_PIO;
  194. index = dev->multi_count ? 0 : 8;
  195. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  196. /* Unable to use DMA due to host limitation */
  197. tf->protocol = ATA_PROT_PIO;
  198. index = dev->multi_count ? 0 : 8;
  199. } else {
  200. tf->protocol = ATA_PROT_DMA;
  201. index = 16;
  202. }
  203. cmd = ata_rw_cmds[index + fua + lba48 + write];
  204. if (cmd) {
  205. tf->command = cmd;
  206. return 0;
  207. }
  208. return -1;
  209. }
  210. /**
  211. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  212. * @pio_mask: pio_mask
  213. * @mwdma_mask: mwdma_mask
  214. * @udma_mask: udma_mask
  215. *
  216. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  217. * unsigned int xfer_mask.
  218. *
  219. * LOCKING:
  220. * None.
  221. *
  222. * RETURNS:
  223. * Packed xfer_mask.
  224. */
  225. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  226. unsigned int mwdma_mask,
  227. unsigned int udma_mask)
  228. {
  229. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  230. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  231. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  232. }
  233. /**
  234. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  235. * @xfer_mask: xfer_mask to unpack
  236. * @pio_mask: resulting pio_mask
  237. * @mwdma_mask: resulting mwdma_mask
  238. * @udma_mask: resulting udma_mask
  239. *
  240. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  241. * Any NULL distination masks will be ignored.
  242. */
  243. static void ata_unpack_xfermask(unsigned int xfer_mask,
  244. unsigned int *pio_mask,
  245. unsigned int *mwdma_mask,
  246. unsigned int *udma_mask)
  247. {
  248. if (pio_mask)
  249. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  250. if (mwdma_mask)
  251. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  252. if (udma_mask)
  253. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  254. }
  255. static const struct ata_xfer_ent {
  256. int shift, bits;
  257. u8 base;
  258. } ata_xfer_tbl[] = {
  259. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  260. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  261. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  262. { -1, },
  263. };
  264. /**
  265. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  266. * @xfer_mask: xfer_mask of interest
  267. *
  268. * Return matching XFER_* value for @xfer_mask. Only the highest
  269. * bit of @xfer_mask is considered.
  270. *
  271. * LOCKING:
  272. * None.
  273. *
  274. * RETURNS:
  275. * Matching XFER_* value, 0 if no match found.
  276. */
  277. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  278. {
  279. int highbit = fls(xfer_mask) - 1;
  280. const struct ata_xfer_ent *ent;
  281. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  282. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  283. return ent->base + highbit - ent->shift;
  284. return 0;
  285. }
  286. /**
  287. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  288. * @xfer_mode: XFER_* of interest
  289. *
  290. * Return matching xfer_mask for @xfer_mode.
  291. *
  292. * LOCKING:
  293. * None.
  294. *
  295. * RETURNS:
  296. * Matching xfer_mask, 0 if no match found.
  297. */
  298. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  299. {
  300. const struct ata_xfer_ent *ent;
  301. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  302. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  303. return 1 << (ent->shift + xfer_mode - ent->base);
  304. return 0;
  305. }
  306. /**
  307. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  308. * @xfer_mode: XFER_* of interest
  309. *
  310. * Return matching xfer_shift for @xfer_mode.
  311. *
  312. * LOCKING:
  313. * None.
  314. *
  315. * RETURNS:
  316. * Matching xfer_shift, -1 if no match found.
  317. */
  318. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  319. {
  320. const struct ata_xfer_ent *ent;
  321. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  322. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  323. return ent->shift;
  324. return -1;
  325. }
  326. /**
  327. * ata_mode_string - convert xfer_mask to string
  328. * @xfer_mask: mask of bits supported; only highest bit counts.
  329. *
  330. * Determine string which represents the highest speed
  331. * (highest bit in @modemask).
  332. *
  333. * LOCKING:
  334. * None.
  335. *
  336. * RETURNS:
  337. * Constant C string representing highest speed listed in
  338. * @mode_mask, or the constant C string "<n/a>".
  339. */
  340. static const char *ata_mode_string(unsigned int xfer_mask)
  341. {
  342. static const char * const xfer_mode_str[] = {
  343. "PIO0",
  344. "PIO1",
  345. "PIO2",
  346. "PIO3",
  347. "PIO4",
  348. "MWDMA0",
  349. "MWDMA1",
  350. "MWDMA2",
  351. "UDMA/16",
  352. "UDMA/25",
  353. "UDMA/33",
  354. "UDMA/44",
  355. "UDMA/66",
  356. "UDMA/100",
  357. "UDMA/133",
  358. "UDMA7",
  359. };
  360. int highbit;
  361. highbit = fls(xfer_mask) - 1;
  362. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  363. return xfer_mode_str[highbit];
  364. return "<n/a>";
  365. }
  366. static const char *sata_spd_string(unsigned int spd)
  367. {
  368. static const char * const spd_str[] = {
  369. "1.5 Gbps",
  370. "3.0 Gbps",
  371. };
  372. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  373. return "<unknown>";
  374. return spd_str[spd - 1];
  375. }
  376. static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
  377. {
  378. if (ata_dev_enabled(dev)) {
  379. printk(KERN_WARNING "ata%u: dev %u disabled\n",
  380. ap->id, dev->devno);
  381. dev->class++;
  382. }
  383. }
  384. /**
  385. * ata_pio_devchk - PATA device presence detection
  386. * @ap: ATA channel to examine
  387. * @device: Device to examine (starting at zero)
  388. *
  389. * This technique was originally described in
  390. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  391. * later found its way into the ATA/ATAPI spec.
  392. *
  393. * Write a pattern to the ATA shadow registers,
  394. * and if a device is present, it will respond by
  395. * correctly storing and echoing back the
  396. * ATA shadow register contents.
  397. *
  398. * LOCKING:
  399. * caller.
  400. */
  401. static unsigned int ata_pio_devchk(struct ata_port *ap,
  402. unsigned int device)
  403. {
  404. struct ata_ioports *ioaddr = &ap->ioaddr;
  405. u8 nsect, lbal;
  406. ap->ops->dev_select(ap, device);
  407. outb(0x55, ioaddr->nsect_addr);
  408. outb(0xaa, ioaddr->lbal_addr);
  409. outb(0xaa, ioaddr->nsect_addr);
  410. outb(0x55, ioaddr->lbal_addr);
  411. outb(0x55, ioaddr->nsect_addr);
  412. outb(0xaa, ioaddr->lbal_addr);
  413. nsect = inb(ioaddr->nsect_addr);
  414. lbal = inb(ioaddr->lbal_addr);
  415. if ((nsect == 0x55) && (lbal == 0xaa))
  416. return 1; /* we found a device */
  417. return 0; /* nothing found */
  418. }
  419. /**
  420. * ata_mmio_devchk - PATA device presence detection
  421. * @ap: ATA channel to examine
  422. * @device: Device to examine (starting at zero)
  423. *
  424. * This technique was originally described in
  425. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  426. * later found its way into the ATA/ATAPI spec.
  427. *
  428. * Write a pattern to the ATA shadow registers,
  429. * and if a device is present, it will respond by
  430. * correctly storing and echoing back the
  431. * ATA shadow register contents.
  432. *
  433. * LOCKING:
  434. * caller.
  435. */
  436. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  437. unsigned int device)
  438. {
  439. struct ata_ioports *ioaddr = &ap->ioaddr;
  440. u8 nsect, lbal;
  441. ap->ops->dev_select(ap, device);
  442. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  443. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  444. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  445. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  446. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  447. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  448. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  449. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  450. if ((nsect == 0x55) && (lbal == 0xaa))
  451. return 1; /* we found a device */
  452. return 0; /* nothing found */
  453. }
  454. /**
  455. * ata_devchk - PATA device presence detection
  456. * @ap: ATA channel to examine
  457. * @device: Device to examine (starting at zero)
  458. *
  459. * Dispatch ATA device presence detection, depending
  460. * on whether we are using PIO or MMIO to talk to the
  461. * ATA shadow registers.
  462. *
  463. * LOCKING:
  464. * caller.
  465. */
  466. static unsigned int ata_devchk(struct ata_port *ap,
  467. unsigned int device)
  468. {
  469. if (ap->flags & ATA_FLAG_MMIO)
  470. return ata_mmio_devchk(ap, device);
  471. return ata_pio_devchk(ap, device);
  472. }
  473. /**
  474. * ata_dev_classify - determine device type based on ATA-spec signature
  475. * @tf: ATA taskfile register set for device to be identified
  476. *
  477. * Determine from taskfile register contents whether a device is
  478. * ATA or ATAPI, as per "Signature and persistence" section
  479. * of ATA/PI spec (volume 1, sect 5.14).
  480. *
  481. * LOCKING:
  482. * None.
  483. *
  484. * RETURNS:
  485. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  486. * the event of failure.
  487. */
  488. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  489. {
  490. /* Apple's open source Darwin code hints that some devices only
  491. * put a proper signature into the LBA mid/high registers,
  492. * So, we only check those. It's sufficient for uniqueness.
  493. */
  494. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  495. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  496. DPRINTK("found ATA device by sig\n");
  497. return ATA_DEV_ATA;
  498. }
  499. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  500. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  501. DPRINTK("found ATAPI device by sig\n");
  502. return ATA_DEV_ATAPI;
  503. }
  504. DPRINTK("unknown device\n");
  505. return ATA_DEV_UNKNOWN;
  506. }
  507. /**
  508. * ata_dev_try_classify - Parse returned ATA device signature
  509. * @ap: ATA channel to examine
  510. * @device: Device to examine (starting at zero)
  511. * @r_err: Value of error register on completion
  512. *
  513. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  514. * an ATA/ATAPI-defined set of values is placed in the ATA
  515. * shadow registers, indicating the results of device detection
  516. * and diagnostics.
  517. *
  518. * Select the ATA device, and read the values from the ATA shadow
  519. * registers. Then parse according to the Error register value,
  520. * and the spec-defined values examined by ata_dev_classify().
  521. *
  522. * LOCKING:
  523. * caller.
  524. *
  525. * RETURNS:
  526. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  527. */
  528. static unsigned int
  529. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  530. {
  531. struct ata_taskfile tf;
  532. unsigned int class;
  533. u8 err;
  534. ap->ops->dev_select(ap, device);
  535. memset(&tf, 0, sizeof(tf));
  536. ap->ops->tf_read(ap, &tf);
  537. err = tf.feature;
  538. if (r_err)
  539. *r_err = err;
  540. /* see if device passed diags */
  541. if (err == 1)
  542. /* do nothing */ ;
  543. else if ((device == 0) && (err == 0x81))
  544. /* do nothing */ ;
  545. else
  546. return ATA_DEV_NONE;
  547. /* determine if device is ATA or ATAPI */
  548. class = ata_dev_classify(&tf);
  549. if (class == ATA_DEV_UNKNOWN)
  550. return ATA_DEV_NONE;
  551. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  552. return ATA_DEV_NONE;
  553. return class;
  554. }
  555. /**
  556. * ata_id_string - Convert IDENTIFY DEVICE page into string
  557. * @id: IDENTIFY DEVICE results we will examine
  558. * @s: string into which data is output
  559. * @ofs: offset into identify device page
  560. * @len: length of string to return. must be an even number.
  561. *
  562. * The strings in the IDENTIFY DEVICE page are broken up into
  563. * 16-bit chunks. Run through the string, and output each
  564. * 8-bit chunk linearly, regardless of platform.
  565. *
  566. * LOCKING:
  567. * caller.
  568. */
  569. void ata_id_string(const u16 *id, unsigned char *s,
  570. unsigned int ofs, unsigned int len)
  571. {
  572. unsigned int c;
  573. while (len > 0) {
  574. c = id[ofs] >> 8;
  575. *s = c;
  576. s++;
  577. c = id[ofs] & 0xff;
  578. *s = c;
  579. s++;
  580. ofs++;
  581. len -= 2;
  582. }
  583. }
  584. /**
  585. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  586. * @id: IDENTIFY DEVICE results we will examine
  587. * @s: string into which data is output
  588. * @ofs: offset into identify device page
  589. * @len: length of string to return. must be an odd number.
  590. *
  591. * This function is identical to ata_id_string except that it
  592. * trims trailing spaces and terminates the resulting string with
  593. * null. @len must be actual maximum length (even number) + 1.
  594. *
  595. * LOCKING:
  596. * caller.
  597. */
  598. void ata_id_c_string(const u16 *id, unsigned char *s,
  599. unsigned int ofs, unsigned int len)
  600. {
  601. unsigned char *p;
  602. WARN_ON(!(len & 1));
  603. ata_id_string(id, s, ofs, len - 1);
  604. p = s + strnlen(s, len - 1);
  605. while (p > s && p[-1] == ' ')
  606. p--;
  607. *p = '\0';
  608. }
  609. static u64 ata_id_n_sectors(const u16 *id)
  610. {
  611. if (ata_id_has_lba(id)) {
  612. if (ata_id_has_lba48(id))
  613. return ata_id_u64(id, 100);
  614. else
  615. return ata_id_u32(id, 60);
  616. } else {
  617. if (ata_id_current_chs_valid(id))
  618. return ata_id_u32(id, 57);
  619. else
  620. return id[1] * id[3] * id[6];
  621. }
  622. }
  623. /**
  624. * ata_noop_dev_select - Select device 0/1 on ATA bus
  625. * @ap: ATA channel to manipulate
  626. * @device: ATA device (numbered from zero) to select
  627. *
  628. * This function performs no actual function.
  629. *
  630. * May be used as the dev_select() entry in ata_port_operations.
  631. *
  632. * LOCKING:
  633. * caller.
  634. */
  635. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  636. {
  637. }
  638. /**
  639. * ata_std_dev_select - Select device 0/1 on ATA bus
  640. * @ap: ATA channel to manipulate
  641. * @device: ATA device (numbered from zero) to select
  642. *
  643. * Use the method defined in the ATA specification to
  644. * make either device 0, or device 1, active on the
  645. * ATA channel. Works with both PIO and MMIO.
  646. *
  647. * May be used as the dev_select() entry in ata_port_operations.
  648. *
  649. * LOCKING:
  650. * caller.
  651. */
  652. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  653. {
  654. u8 tmp;
  655. if (device == 0)
  656. tmp = ATA_DEVICE_OBS;
  657. else
  658. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  659. if (ap->flags & ATA_FLAG_MMIO) {
  660. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  661. } else {
  662. outb(tmp, ap->ioaddr.device_addr);
  663. }
  664. ata_pause(ap); /* needed; also flushes, for mmio */
  665. }
  666. /**
  667. * ata_dev_select - Select device 0/1 on ATA bus
  668. * @ap: ATA channel to manipulate
  669. * @device: ATA device (numbered from zero) to select
  670. * @wait: non-zero to wait for Status register BSY bit to clear
  671. * @can_sleep: non-zero if context allows sleeping
  672. *
  673. * Use the method defined in the ATA specification to
  674. * make either device 0, or device 1, active on the
  675. * ATA channel.
  676. *
  677. * This is a high-level version of ata_std_dev_select(),
  678. * which additionally provides the services of inserting
  679. * the proper pauses and status polling, where needed.
  680. *
  681. * LOCKING:
  682. * caller.
  683. */
  684. void ata_dev_select(struct ata_port *ap, unsigned int device,
  685. unsigned int wait, unsigned int can_sleep)
  686. {
  687. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  688. ap->id, device, wait);
  689. if (wait)
  690. ata_wait_idle(ap);
  691. ap->ops->dev_select(ap, device);
  692. if (wait) {
  693. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  694. msleep(150);
  695. ata_wait_idle(ap);
  696. }
  697. }
  698. /**
  699. * ata_dump_id - IDENTIFY DEVICE info debugging output
  700. * @id: IDENTIFY DEVICE page to dump
  701. *
  702. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  703. * page.
  704. *
  705. * LOCKING:
  706. * caller.
  707. */
  708. static inline void ata_dump_id(const u16 *id)
  709. {
  710. DPRINTK("49==0x%04x "
  711. "53==0x%04x "
  712. "63==0x%04x "
  713. "64==0x%04x "
  714. "75==0x%04x \n",
  715. id[49],
  716. id[53],
  717. id[63],
  718. id[64],
  719. id[75]);
  720. DPRINTK("80==0x%04x "
  721. "81==0x%04x "
  722. "82==0x%04x "
  723. "83==0x%04x "
  724. "84==0x%04x \n",
  725. id[80],
  726. id[81],
  727. id[82],
  728. id[83],
  729. id[84]);
  730. DPRINTK("88==0x%04x "
  731. "93==0x%04x\n",
  732. id[88],
  733. id[93]);
  734. }
  735. /**
  736. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  737. * @id: IDENTIFY data to compute xfer mask from
  738. *
  739. * Compute the xfermask for this device. This is not as trivial
  740. * as it seems if we must consider early devices correctly.
  741. *
  742. * FIXME: pre IDE drive timing (do we care ?).
  743. *
  744. * LOCKING:
  745. * None.
  746. *
  747. * RETURNS:
  748. * Computed xfermask
  749. */
  750. static unsigned int ata_id_xfermask(const u16 *id)
  751. {
  752. unsigned int pio_mask, mwdma_mask, udma_mask;
  753. /* Usual case. Word 53 indicates word 64 is valid */
  754. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  755. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  756. pio_mask <<= 3;
  757. pio_mask |= 0x7;
  758. } else {
  759. /* If word 64 isn't valid then Word 51 high byte holds
  760. * the PIO timing number for the maximum. Turn it into
  761. * a mask.
  762. */
  763. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  764. /* But wait.. there's more. Design your standards by
  765. * committee and you too can get a free iordy field to
  766. * process. However its the speeds not the modes that
  767. * are supported... Note drivers using the timing API
  768. * will get this right anyway
  769. */
  770. }
  771. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  772. udma_mask = 0;
  773. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  774. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  775. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  776. }
  777. /**
  778. * ata_port_queue_task - Queue port_task
  779. * @ap: The ata_port to queue port_task for
  780. *
  781. * Schedule @fn(@data) for execution after @delay jiffies using
  782. * port_task. There is one port_task per port and it's the
  783. * user(low level driver)'s responsibility to make sure that only
  784. * one task is active at any given time.
  785. *
  786. * libata core layer takes care of synchronization between
  787. * port_task and EH. ata_port_queue_task() may be ignored for EH
  788. * synchronization.
  789. *
  790. * LOCKING:
  791. * Inherited from caller.
  792. */
  793. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  794. unsigned long delay)
  795. {
  796. int rc;
  797. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  798. return;
  799. PREPARE_WORK(&ap->port_task, fn, data);
  800. if (!delay)
  801. rc = queue_work(ata_wq, &ap->port_task);
  802. else
  803. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  804. /* rc == 0 means that another user is using port task */
  805. WARN_ON(rc == 0);
  806. }
  807. /**
  808. * ata_port_flush_task - Flush port_task
  809. * @ap: The ata_port to flush port_task for
  810. *
  811. * After this function completes, port_task is guranteed not to
  812. * be running or scheduled.
  813. *
  814. * LOCKING:
  815. * Kernel thread context (may sleep)
  816. */
  817. void ata_port_flush_task(struct ata_port *ap)
  818. {
  819. unsigned long flags;
  820. DPRINTK("ENTER\n");
  821. spin_lock_irqsave(&ap->host_set->lock, flags);
  822. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  823. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  824. DPRINTK("flush #1\n");
  825. flush_workqueue(ata_wq);
  826. /*
  827. * At this point, if a task is running, it's guaranteed to see
  828. * the FLUSH flag; thus, it will never queue pio tasks again.
  829. * Cancel and flush.
  830. */
  831. if (!cancel_delayed_work(&ap->port_task)) {
  832. DPRINTK("flush #2\n");
  833. flush_workqueue(ata_wq);
  834. }
  835. spin_lock_irqsave(&ap->host_set->lock, flags);
  836. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  837. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  838. DPRINTK("EXIT\n");
  839. }
  840. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  841. {
  842. struct completion *waiting = qc->private_data;
  843. qc->ap->ops->tf_read(qc->ap, &qc->tf);
  844. complete(waiting);
  845. }
  846. /**
  847. * ata_exec_internal - execute libata internal command
  848. * @ap: Port to which the command is sent
  849. * @dev: Device to which the command is sent
  850. * @tf: Taskfile registers for the command and the result
  851. * @dma_dir: Data tranfer direction of the command
  852. * @buf: Data buffer of the command
  853. * @buflen: Length of data buffer
  854. *
  855. * Executes libata internal command with timeout. @tf contains
  856. * command on entry and result on return. Timeout and error
  857. * conditions are reported via return value. No recovery action
  858. * is taken after a command times out. It's caller's duty to
  859. * clean up after timeout.
  860. *
  861. * LOCKING:
  862. * None. Should be called with kernel context, might sleep.
  863. */
  864. static unsigned
  865. ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
  866. struct ata_taskfile *tf,
  867. int dma_dir, void *buf, unsigned int buflen)
  868. {
  869. u8 command = tf->command;
  870. struct ata_queued_cmd *qc;
  871. DECLARE_COMPLETION(wait);
  872. unsigned long flags;
  873. unsigned int err_mask;
  874. spin_lock_irqsave(&ap->host_set->lock, flags);
  875. qc = ata_qc_new_init(ap, dev);
  876. BUG_ON(qc == NULL);
  877. qc->tf = *tf;
  878. qc->dma_dir = dma_dir;
  879. if (dma_dir != DMA_NONE) {
  880. ata_sg_init_one(qc, buf, buflen);
  881. qc->nsect = buflen / ATA_SECT_SIZE;
  882. }
  883. qc->private_data = &wait;
  884. qc->complete_fn = ata_qc_complete_internal;
  885. ata_qc_issue(qc);
  886. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  887. if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
  888. ata_port_flush_task(ap);
  889. spin_lock_irqsave(&ap->host_set->lock, flags);
  890. /* We're racing with irq here. If we lose, the
  891. * following test prevents us from completing the qc
  892. * again. If completion irq occurs after here but
  893. * before the caller cleans up, it will result in a
  894. * spurious interrupt. We can live with that.
  895. */
  896. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  897. qc->err_mask = AC_ERR_TIMEOUT;
  898. ata_qc_complete(qc);
  899. printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
  900. ap->id, command);
  901. }
  902. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  903. }
  904. *tf = qc->tf;
  905. err_mask = qc->err_mask;
  906. ata_qc_free(qc);
  907. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  908. * Until those drivers are fixed, we detect the condition
  909. * here, fail the command with AC_ERR_SYSTEM and reenable the
  910. * port.
  911. *
  912. * Note that this doesn't change any behavior as internal
  913. * command failure results in disabling the device in the
  914. * higher layer for LLDDs without new reset/EH callbacks.
  915. *
  916. * Kill the following code as soon as those drivers are fixed.
  917. */
  918. if (ap->flags & ATA_FLAG_DISABLED) {
  919. err_mask |= AC_ERR_SYSTEM;
  920. ata_port_probe(ap);
  921. }
  922. return err_mask;
  923. }
  924. /**
  925. * ata_pio_need_iordy - check if iordy needed
  926. * @adev: ATA device
  927. *
  928. * Check if the current speed of the device requires IORDY. Used
  929. * by various controllers for chip configuration.
  930. */
  931. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  932. {
  933. int pio;
  934. int speed = adev->pio_mode - XFER_PIO_0;
  935. if (speed < 2)
  936. return 0;
  937. if (speed > 2)
  938. return 1;
  939. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  940. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  941. pio = adev->id[ATA_ID_EIDE_PIO];
  942. /* Is the speed faster than the drive allows non IORDY ? */
  943. if (pio) {
  944. /* This is cycle times not frequency - watch the logic! */
  945. if (pio > 240) /* PIO2 is 240nS per cycle */
  946. return 1;
  947. return 0;
  948. }
  949. }
  950. return 0;
  951. }
  952. /**
  953. * ata_dev_read_id - Read ID data from the specified device
  954. * @ap: port on which target device resides
  955. * @dev: target device
  956. * @p_class: pointer to class of the target device (may be changed)
  957. * @post_reset: is this read ID post-reset?
  958. * @p_id: read IDENTIFY page (newly allocated)
  959. *
  960. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  961. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  962. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  963. * for pre-ATA4 drives.
  964. *
  965. * LOCKING:
  966. * Kernel thread context (may sleep)
  967. *
  968. * RETURNS:
  969. * 0 on success, -errno otherwise.
  970. */
  971. static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
  972. unsigned int *p_class, int post_reset, u16 **p_id)
  973. {
  974. unsigned int class = *p_class;
  975. struct ata_taskfile tf;
  976. unsigned int err_mask = 0;
  977. u16 *id;
  978. const char *reason;
  979. int rc;
  980. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  981. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  982. id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
  983. if (id == NULL) {
  984. rc = -ENOMEM;
  985. reason = "out of memory";
  986. goto err_out;
  987. }
  988. retry:
  989. ata_tf_init(ap, &tf, dev->devno);
  990. switch (class) {
  991. case ATA_DEV_ATA:
  992. tf.command = ATA_CMD_ID_ATA;
  993. break;
  994. case ATA_DEV_ATAPI:
  995. tf.command = ATA_CMD_ID_ATAPI;
  996. break;
  997. default:
  998. rc = -ENODEV;
  999. reason = "unsupported class";
  1000. goto err_out;
  1001. }
  1002. tf.protocol = ATA_PROT_PIO;
  1003. err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
  1004. id, sizeof(id[0]) * ATA_ID_WORDS);
  1005. if (err_mask) {
  1006. rc = -EIO;
  1007. reason = "I/O error";
  1008. goto err_out;
  1009. }
  1010. swap_buf_le16(id, ATA_ID_WORDS);
  1011. /* sanity check */
  1012. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1013. rc = -EINVAL;
  1014. reason = "device reports illegal type";
  1015. goto err_out;
  1016. }
  1017. if (post_reset && class == ATA_DEV_ATA) {
  1018. /*
  1019. * The exact sequence expected by certain pre-ATA4 drives is:
  1020. * SRST RESET
  1021. * IDENTIFY
  1022. * INITIALIZE DEVICE PARAMETERS
  1023. * anything else..
  1024. * Some drives were very specific about that exact sequence.
  1025. */
  1026. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1027. err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
  1028. if (err_mask) {
  1029. rc = -EIO;
  1030. reason = "INIT_DEV_PARAMS failed";
  1031. goto err_out;
  1032. }
  1033. /* current CHS translation info (id[53-58]) might be
  1034. * changed. reread the identify device info.
  1035. */
  1036. post_reset = 0;
  1037. goto retry;
  1038. }
  1039. }
  1040. *p_class = class;
  1041. *p_id = id;
  1042. return 0;
  1043. err_out:
  1044. printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
  1045. ap->id, dev->devno, reason);
  1046. kfree(id);
  1047. return rc;
  1048. }
  1049. static inline u8 ata_dev_knobble(const struct ata_port *ap,
  1050. struct ata_device *dev)
  1051. {
  1052. return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1053. }
  1054. /**
  1055. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1056. * @ap: Port on which target device resides
  1057. * @dev: Target device to configure
  1058. * @print_info: Enable device info printout
  1059. *
  1060. * Configure @dev according to @dev->id. Generic and low-level
  1061. * driver specific fixups are also applied.
  1062. *
  1063. * LOCKING:
  1064. * Kernel thread context (may sleep)
  1065. *
  1066. * RETURNS:
  1067. * 0 on success, -errno otherwise
  1068. */
  1069. static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
  1070. int print_info)
  1071. {
  1072. const u16 *id = dev->id;
  1073. unsigned int xfer_mask;
  1074. int i, rc;
  1075. if (!ata_dev_enabled(dev)) {
  1076. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1077. ap->id, dev->devno);
  1078. return 0;
  1079. }
  1080. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1081. /* print device capabilities */
  1082. if (print_info)
  1083. printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
  1084. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1085. ap->id, dev->devno, id[49], id[82], id[83],
  1086. id[84], id[85], id[86], id[87], id[88]);
  1087. /* initialize to-be-configured parameters */
  1088. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1089. dev->max_sectors = 0;
  1090. dev->cdb_len = 0;
  1091. dev->n_sectors = 0;
  1092. dev->cylinders = 0;
  1093. dev->heads = 0;
  1094. dev->sectors = 0;
  1095. /*
  1096. * common ATA, ATAPI feature tests
  1097. */
  1098. /* find max transfer mode; for printk only */
  1099. xfer_mask = ata_id_xfermask(id);
  1100. ata_dump_id(id);
  1101. /* ATA-specific feature tests */
  1102. if (dev->class == ATA_DEV_ATA) {
  1103. dev->n_sectors = ata_id_n_sectors(id);
  1104. if (ata_id_has_lba(id)) {
  1105. const char *lba_desc;
  1106. lba_desc = "LBA";
  1107. dev->flags |= ATA_DFLAG_LBA;
  1108. if (ata_id_has_lba48(id)) {
  1109. dev->flags |= ATA_DFLAG_LBA48;
  1110. lba_desc = "LBA48";
  1111. }
  1112. /* print device info to dmesg */
  1113. if (print_info)
  1114. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1115. "max %s, %Lu sectors: %s\n",
  1116. ap->id, dev->devno,
  1117. ata_id_major_version(id),
  1118. ata_mode_string(xfer_mask),
  1119. (unsigned long long)dev->n_sectors,
  1120. lba_desc);
  1121. } else {
  1122. /* CHS */
  1123. /* Default translation */
  1124. dev->cylinders = id[1];
  1125. dev->heads = id[3];
  1126. dev->sectors = id[6];
  1127. if (ata_id_current_chs_valid(id)) {
  1128. /* Current CHS translation is valid. */
  1129. dev->cylinders = id[54];
  1130. dev->heads = id[55];
  1131. dev->sectors = id[56];
  1132. }
  1133. /* print device info to dmesg */
  1134. if (print_info)
  1135. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1136. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1137. ap->id, dev->devno,
  1138. ata_id_major_version(id),
  1139. ata_mode_string(xfer_mask),
  1140. (unsigned long long)dev->n_sectors,
  1141. dev->cylinders, dev->heads, dev->sectors);
  1142. }
  1143. dev->cdb_len = 16;
  1144. }
  1145. /* ATAPI-specific feature tests */
  1146. else if (dev->class == ATA_DEV_ATAPI) {
  1147. rc = atapi_cdb_len(id);
  1148. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1149. printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
  1150. rc = -EINVAL;
  1151. goto err_out_nosup;
  1152. }
  1153. dev->cdb_len = (unsigned int) rc;
  1154. /* print device info to dmesg */
  1155. if (print_info)
  1156. printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
  1157. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1158. }
  1159. ap->host->max_cmd_len = 0;
  1160. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1161. ap->host->max_cmd_len = max_t(unsigned int,
  1162. ap->host->max_cmd_len,
  1163. ap->device[i].cdb_len);
  1164. /* limit bridge transfers to udma5, 200 sectors */
  1165. if (ata_dev_knobble(ap, dev)) {
  1166. if (print_info)
  1167. printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
  1168. ap->id, dev->devno);
  1169. dev->udma_mask &= ATA_UDMA5;
  1170. dev->max_sectors = ATA_MAX_SECTORS;
  1171. }
  1172. if (ap->ops->dev_config)
  1173. ap->ops->dev_config(ap, dev);
  1174. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1175. return 0;
  1176. err_out_nosup:
  1177. DPRINTK("EXIT, err\n");
  1178. return rc;
  1179. }
  1180. /**
  1181. * ata_bus_probe - Reset and probe ATA bus
  1182. * @ap: Bus to probe
  1183. *
  1184. * Master ATA bus probing function. Initiates a hardware-dependent
  1185. * bus reset, then attempts to identify any devices found on
  1186. * the bus.
  1187. *
  1188. * LOCKING:
  1189. * PCI/etc. bus probe sem.
  1190. *
  1191. * RETURNS:
  1192. * Zero on success, negative errno otherwise.
  1193. */
  1194. static int ata_bus_probe(struct ata_port *ap)
  1195. {
  1196. unsigned int classes[ATA_MAX_DEVICES];
  1197. int tries[ATA_MAX_DEVICES];
  1198. int i, rc, down_xfermask;
  1199. struct ata_device *dev;
  1200. ata_port_probe(ap);
  1201. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1202. tries[i] = ATA_PROBE_MAX_TRIES;
  1203. retry:
  1204. down_xfermask = 0;
  1205. /* reset and determine device classes */
  1206. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1207. classes[i] = ATA_DEV_UNKNOWN;
  1208. if (ap->ops->probe_reset) {
  1209. rc = ap->ops->probe_reset(ap, classes);
  1210. if (rc) {
  1211. printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
  1212. return rc;
  1213. }
  1214. } else {
  1215. ap->ops->phy_reset(ap);
  1216. if (!(ap->flags & ATA_FLAG_DISABLED))
  1217. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1218. classes[i] = ap->device[i].class;
  1219. ata_port_probe(ap);
  1220. }
  1221. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1222. if (classes[i] == ATA_DEV_UNKNOWN)
  1223. classes[i] = ATA_DEV_NONE;
  1224. /* read IDENTIFY page and configure devices */
  1225. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1226. dev = &ap->device[i];
  1227. dev->class = classes[i];
  1228. if (!tries[i]) {
  1229. ata_down_xfermask_limit(ap, dev, 1);
  1230. ata_dev_disable(ap, dev);
  1231. }
  1232. if (!ata_dev_enabled(dev))
  1233. continue;
  1234. kfree(dev->id);
  1235. dev->id = NULL;
  1236. rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
  1237. if (rc)
  1238. goto fail;
  1239. rc = ata_dev_configure(ap, dev, 1);
  1240. if (rc)
  1241. goto fail;
  1242. }
  1243. /* configure transfer mode */
  1244. if (ap->ops->set_mode) {
  1245. /* FIXME: make ->set_mode handle no device case and
  1246. * return error code and failing device on failure as
  1247. * ata_set_mode() does.
  1248. */
  1249. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1250. if (ata_dev_enabled(&ap->device[i])) {
  1251. ap->ops->set_mode(ap);
  1252. break;
  1253. }
  1254. rc = 0;
  1255. } else {
  1256. rc = ata_set_mode(ap, &dev);
  1257. if (rc) {
  1258. down_xfermask = 1;
  1259. goto fail;
  1260. }
  1261. }
  1262. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1263. if (ata_dev_enabled(&ap->device[i]))
  1264. return 0;
  1265. /* no device present, disable port */
  1266. ata_port_disable(ap);
  1267. ap->ops->port_disable(ap);
  1268. return -ENODEV;
  1269. fail:
  1270. switch (rc) {
  1271. case -EINVAL:
  1272. case -ENODEV:
  1273. tries[dev->devno] = 0;
  1274. break;
  1275. case -EIO:
  1276. ata_down_sata_spd_limit(ap);
  1277. /* fall through */
  1278. default:
  1279. tries[dev->devno]--;
  1280. if (down_xfermask &&
  1281. ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
  1282. tries[dev->devno] = 0;
  1283. }
  1284. goto retry;
  1285. }
  1286. /**
  1287. * ata_port_probe - Mark port as enabled
  1288. * @ap: Port for which we indicate enablement
  1289. *
  1290. * Modify @ap data structure such that the system
  1291. * thinks that the entire port is enabled.
  1292. *
  1293. * LOCKING: host_set lock, or some other form of
  1294. * serialization.
  1295. */
  1296. void ata_port_probe(struct ata_port *ap)
  1297. {
  1298. ap->flags &= ~ATA_FLAG_DISABLED;
  1299. }
  1300. /**
  1301. * sata_print_link_status - Print SATA link status
  1302. * @ap: SATA port to printk link status about
  1303. *
  1304. * This function prints link speed and status of a SATA link.
  1305. *
  1306. * LOCKING:
  1307. * None.
  1308. */
  1309. static void sata_print_link_status(struct ata_port *ap)
  1310. {
  1311. u32 sstatus, tmp;
  1312. if (!ap->ops->scr_read)
  1313. return;
  1314. sstatus = scr_read(ap, SCR_STATUS);
  1315. if (sata_dev_present(ap)) {
  1316. tmp = (sstatus >> 4) & 0xf;
  1317. printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
  1318. ap->id, sata_spd_string(tmp), sstatus);
  1319. } else {
  1320. printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
  1321. ap->id, sstatus);
  1322. }
  1323. }
  1324. /**
  1325. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1326. * @ap: SATA port associated with target SATA PHY.
  1327. *
  1328. * This function issues commands to standard SATA Sxxx
  1329. * PHY registers, to wake up the phy (and device), and
  1330. * clear any reset condition.
  1331. *
  1332. * LOCKING:
  1333. * PCI/etc. bus probe sem.
  1334. *
  1335. */
  1336. void __sata_phy_reset(struct ata_port *ap)
  1337. {
  1338. u32 sstatus;
  1339. unsigned long timeout = jiffies + (HZ * 5);
  1340. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1341. /* issue phy wake/reset */
  1342. scr_write_flush(ap, SCR_CONTROL, 0x301);
  1343. /* Couldn't find anything in SATA I/II specs, but
  1344. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1345. mdelay(1);
  1346. }
  1347. scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
  1348. /* wait for phy to become ready, if necessary */
  1349. do {
  1350. msleep(200);
  1351. sstatus = scr_read(ap, SCR_STATUS);
  1352. if ((sstatus & 0xf) != 1)
  1353. break;
  1354. } while (time_before(jiffies, timeout));
  1355. /* print link status */
  1356. sata_print_link_status(ap);
  1357. /* TODO: phy layer with polling, timeouts, etc. */
  1358. if (sata_dev_present(ap))
  1359. ata_port_probe(ap);
  1360. else
  1361. ata_port_disable(ap);
  1362. if (ap->flags & ATA_FLAG_DISABLED)
  1363. return;
  1364. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1365. ata_port_disable(ap);
  1366. return;
  1367. }
  1368. ap->cbl = ATA_CBL_SATA;
  1369. }
  1370. /**
  1371. * sata_phy_reset - Reset SATA bus.
  1372. * @ap: SATA port associated with target SATA PHY.
  1373. *
  1374. * This function resets the SATA bus, and then probes
  1375. * the bus for devices.
  1376. *
  1377. * LOCKING:
  1378. * PCI/etc. bus probe sem.
  1379. *
  1380. */
  1381. void sata_phy_reset(struct ata_port *ap)
  1382. {
  1383. __sata_phy_reset(ap);
  1384. if (ap->flags & ATA_FLAG_DISABLED)
  1385. return;
  1386. ata_bus_reset(ap);
  1387. }
  1388. /**
  1389. * ata_dev_pair - return other device on cable
  1390. * @ap: port
  1391. * @adev: device
  1392. *
  1393. * Obtain the other device on the same cable, or if none is
  1394. * present NULL is returned
  1395. */
  1396. struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
  1397. {
  1398. struct ata_device *pair = &ap->device[1 - adev->devno];
  1399. if (!ata_dev_enabled(pair))
  1400. return NULL;
  1401. return pair;
  1402. }
  1403. /**
  1404. * ata_port_disable - Disable port.
  1405. * @ap: Port to be disabled.
  1406. *
  1407. * Modify @ap data structure such that the system
  1408. * thinks that the entire port is disabled, and should
  1409. * never attempt to probe or communicate with devices
  1410. * on this port.
  1411. *
  1412. * LOCKING: host_set lock, or some other form of
  1413. * serialization.
  1414. */
  1415. void ata_port_disable(struct ata_port *ap)
  1416. {
  1417. ap->device[0].class = ATA_DEV_NONE;
  1418. ap->device[1].class = ATA_DEV_NONE;
  1419. ap->flags |= ATA_FLAG_DISABLED;
  1420. }
  1421. /**
  1422. * ata_down_sata_spd_limit - adjust SATA spd limit downward
  1423. * @ap: Port to adjust SATA spd limit for
  1424. *
  1425. * Adjust SATA spd limit of @ap downward. Note that this
  1426. * function only adjusts the limit. The change must be applied
  1427. * using ata_set_sata_spd().
  1428. *
  1429. * LOCKING:
  1430. * Inherited from caller.
  1431. *
  1432. * RETURNS:
  1433. * 0 on success, negative errno on failure
  1434. */
  1435. static int ata_down_sata_spd_limit(struct ata_port *ap)
  1436. {
  1437. u32 spd, mask;
  1438. int highbit;
  1439. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1440. return -EOPNOTSUPP;
  1441. mask = ap->sata_spd_limit;
  1442. if (mask <= 1)
  1443. return -EINVAL;
  1444. highbit = fls(mask) - 1;
  1445. mask &= ~(1 << highbit);
  1446. spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
  1447. if (spd <= 1)
  1448. return -EINVAL;
  1449. spd--;
  1450. mask &= (1 << spd) - 1;
  1451. if (!mask)
  1452. return -EINVAL;
  1453. ap->sata_spd_limit = mask;
  1454. printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
  1455. ap->id, sata_spd_string(fls(mask)));
  1456. return 0;
  1457. }
  1458. static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
  1459. {
  1460. u32 spd, limit;
  1461. if (ap->sata_spd_limit == UINT_MAX)
  1462. limit = 0;
  1463. else
  1464. limit = fls(ap->sata_spd_limit);
  1465. spd = (*scontrol >> 4) & 0xf;
  1466. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1467. return spd != limit;
  1468. }
  1469. /**
  1470. * ata_set_sata_spd_needed - is SATA spd configuration needed
  1471. * @ap: Port in question
  1472. *
  1473. * Test whether the spd limit in SControl matches
  1474. * @ap->sata_spd_limit. This function is used to determine
  1475. * whether hardreset is necessary to apply SATA spd
  1476. * configuration.
  1477. *
  1478. * LOCKING:
  1479. * Inherited from caller.
  1480. *
  1481. * RETURNS:
  1482. * 1 if SATA spd configuration is needed, 0 otherwise.
  1483. */
  1484. static int ata_set_sata_spd_needed(struct ata_port *ap)
  1485. {
  1486. u32 scontrol;
  1487. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1488. return 0;
  1489. scontrol = scr_read(ap, SCR_CONTROL);
  1490. return __ata_set_sata_spd_needed(ap, &scontrol);
  1491. }
  1492. /**
  1493. * ata_set_sata_spd - set SATA spd according to spd limit
  1494. * @ap: Port to set SATA spd for
  1495. *
  1496. * Set SATA spd of @ap according to sata_spd_limit.
  1497. *
  1498. * LOCKING:
  1499. * Inherited from caller.
  1500. *
  1501. * RETURNS:
  1502. * 0 if spd doesn't need to be changed, 1 if spd has been
  1503. * changed. -EOPNOTSUPP if SCR registers are inaccessible.
  1504. */
  1505. static int ata_set_sata_spd(struct ata_port *ap)
  1506. {
  1507. u32 scontrol;
  1508. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1509. return -EOPNOTSUPP;
  1510. scontrol = scr_read(ap, SCR_CONTROL);
  1511. if (!__ata_set_sata_spd_needed(ap, &scontrol))
  1512. return 0;
  1513. scr_write(ap, SCR_CONTROL, scontrol);
  1514. return 1;
  1515. }
  1516. /*
  1517. * This mode timing computation functionality is ported over from
  1518. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1519. */
  1520. /*
  1521. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1522. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1523. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1524. * is currently supported only by Maxtor drives.
  1525. */
  1526. static const struct ata_timing ata_timing[] = {
  1527. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1528. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1529. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1530. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1531. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1532. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1533. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1534. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1535. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1536. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1537. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1538. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1539. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1540. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1541. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1542. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1543. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1544. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1545. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1546. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1547. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1548. { 0xFF }
  1549. };
  1550. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1551. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1552. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1553. {
  1554. q->setup = EZ(t->setup * 1000, T);
  1555. q->act8b = EZ(t->act8b * 1000, T);
  1556. q->rec8b = EZ(t->rec8b * 1000, T);
  1557. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1558. q->active = EZ(t->active * 1000, T);
  1559. q->recover = EZ(t->recover * 1000, T);
  1560. q->cycle = EZ(t->cycle * 1000, T);
  1561. q->udma = EZ(t->udma * 1000, UT);
  1562. }
  1563. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1564. struct ata_timing *m, unsigned int what)
  1565. {
  1566. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1567. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1568. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1569. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1570. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1571. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1572. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1573. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1574. }
  1575. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1576. {
  1577. const struct ata_timing *t;
  1578. for (t = ata_timing; t->mode != speed; t++)
  1579. if (t->mode == 0xFF)
  1580. return NULL;
  1581. return t;
  1582. }
  1583. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1584. struct ata_timing *t, int T, int UT)
  1585. {
  1586. const struct ata_timing *s;
  1587. struct ata_timing p;
  1588. /*
  1589. * Find the mode.
  1590. */
  1591. if (!(s = ata_timing_find_mode(speed)))
  1592. return -EINVAL;
  1593. memcpy(t, s, sizeof(*s));
  1594. /*
  1595. * If the drive is an EIDE drive, it can tell us it needs extended
  1596. * PIO/MW_DMA cycle timing.
  1597. */
  1598. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1599. memset(&p, 0, sizeof(p));
  1600. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1601. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1602. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1603. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1604. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1605. }
  1606. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1607. }
  1608. /*
  1609. * Convert the timing to bus clock counts.
  1610. */
  1611. ata_timing_quantize(t, t, T, UT);
  1612. /*
  1613. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1614. * S.M.A.R.T * and some other commands. We have to ensure that the
  1615. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1616. */
  1617. if (speed > XFER_PIO_4) {
  1618. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1619. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1620. }
  1621. /*
  1622. * Lengthen active & recovery time so that cycle time is correct.
  1623. */
  1624. if (t->act8b + t->rec8b < t->cyc8b) {
  1625. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1626. t->rec8b = t->cyc8b - t->act8b;
  1627. }
  1628. if (t->active + t->recover < t->cycle) {
  1629. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1630. t->recover = t->cycle - t->active;
  1631. }
  1632. return 0;
  1633. }
  1634. /**
  1635. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1636. * @ap: Port associated with device @dev
  1637. * @dev: Device to adjust xfer masks
  1638. * @force_pio0: Force PIO0
  1639. *
  1640. * Adjust xfer masks of @dev downward. Note that this function
  1641. * does not apply the change. Invoking ata_set_mode() afterwards
  1642. * will apply the limit.
  1643. *
  1644. * LOCKING:
  1645. * Inherited from caller.
  1646. *
  1647. * RETURNS:
  1648. * 0 on success, negative errno on failure
  1649. */
  1650. static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
  1651. int force_pio0)
  1652. {
  1653. unsigned long xfer_mask;
  1654. int highbit;
  1655. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1656. dev->udma_mask);
  1657. if (!xfer_mask)
  1658. goto fail;
  1659. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1660. if (xfer_mask & ATA_MASK_UDMA)
  1661. xfer_mask &= ~ATA_MASK_MWDMA;
  1662. highbit = fls(xfer_mask) - 1;
  1663. xfer_mask &= ~(1 << highbit);
  1664. if (force_pio0)
  1665. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1666. if (!xfer_mask)
  1667. goto fail;
  1668. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1669. &dev->udma_mask);
  1670. printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
  1671. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1672. return 0;
  1673. fail:
  1674. return -EINVAL;
  1675. }
  1676. static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
  1677. {
  1678. unsigned int err_mask;
  1679. int rc;
  1680. dev->flags &= ~ATA_DFLAG_PIO;
  1681. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1682. dev->flags |= ATA_DFLAG_PIO;
  1683. err_mask = ata_dev_set_xfermode(ap, dev);
  1684. if (err_mask) {
  1685. printk(KERN_ERR
  1686. "ata%u: failed to set xfermode (err_mask=0x%x)\n",
  1687. ap->id, err_mask);
  1688. return -EIO;
  1689. }
  1690. rc = ata_dev_revalidate(ap, dev, 0);
  1691. if (rc)
  1692. return rc;
  1693. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1694. dev->xfer_shift, (int)dev->xfer_mode);
  1695. printk(KERN_INFO "ata%u: dev %u configured for %s\n",
  1696. ap->id, dev->devno,
  1697. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1698. return 0;
  1699. }
  1700. /**
  1701. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1702. * @ap: port on which timings will be programmed
  1703. * @r_failed_dev: out paramter for failed device
  1704. *
  1705. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1706. * ata_set_mode() fails, pointer to the failing device is
  1707. * returned in @r_failed_dev.
  1708. *
  1709. * LOCKING:
  1710. * PCI/etc. bus probe sem.
  1711. *
  1712. * RETURNS:
  1713. * 0 on success, negative errno otherwise
  1714. */
  1715. static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1716. {
  1717. struct ata_device *dev;
  1718. int i, rc = 0, used_dma = 0, found = 0;
  1719. /* step 1: calculate xfer_mask */
  1720. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1721. unsigned int pio_mask, dma_mask;
  1722. dev = &ap->device[i];
  1723. if (!ata_dev_enabled(dev))
  1724. continue;
  1725. ata_dev_xfermask(ap, dev);
  1726. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1727. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1728. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1729. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1730. found = 1;
  1731. if (dev->dma_mode)
  1732. used_dma = 1;
  1733. }
  1734. if (!found)
  1735. goto out;
  1736. /* step 2: always set host PIO timings */
  1737. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1738. dev = &ap->device[i];
  1739. if (!ata_dev_enabled(dev))
  1740. continue;
  1741. if (!dev->pio_mode) {
  1742. printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
  1743. ap->id, dev->devno);
  1744. rc = -EINVAL;
  1745. goto out;
  1746. }
  1747. dev->xfer_mode = dev->pio_mode;
  1748. dev->xfer_shift = ATA_SHIFT_PIO;
  1749. if (ap->ops->set_piomode)
  1750. ap->ops->set_piomode(ap, dev);
  1751. }
  1752. /* step 3: set host DMA timings */
  1753. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1754. dev = &ap->device[i];
  1755. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1756. continue;
  1757. dev->xfer_mode = dev->dma_mode;
  1758. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1759. if (ap->ops->set_dmamode)
  1760. ap->ops->set_dmamode(ap, dev);
  1761. }
  1762. /* step 4: update devices' xfer mode */
  1763. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1764. dev = &ap->device[i];
  1765. if (!ata_dev_enabled(dev))
  1766. continue;
  1767. rc = ata_dev_set_mode(ap, dev);
  1768. if (rc)
  1769. goto out;
  1770. }
  1771. /* Record simplex status. If we selected DMA then the other
  1772. * host channels are not permitted to do so.
  1773. */
  1774. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1775. ap->host_set->simplex_claimed = 1;
  1776. /* step5: chip specific finalisation */
  1777. if (ap->ops->post_set_mode)
  1778. ap->ops->post_set_mode(ap);
  1779. out:
  1780. if (rc)
  1781. *r_failed_dev = dev;
  1782. return rc;
  1783. }
  1784. /**
  1785. * ata_tf_to_host - issue ATA taskfile to host controller
  1786. * @ap: port to which command is being issued
  1787. * @tf: ATA taskfile register set
  1788. *
  1789. * Issues ATA taskfile register set to ATA host controller,
  1790. * with proper synchronization with interrupt handler and
  1791. * other threads.
  1792. *
  1793. * LOCKING:
  1794. * spin_lock_irqsave(host_set lock)
  1795. */
  1796. static inline void ata_tf_to_host(struct ata_port *ap,
  1797. const struct ata_taskfile *tf)
  1798. {
  1799. ap->ops->tf_load(ap, tf);
  1800. ap->ops->exec_command(ap, tf);
  1801. }
  1802. /**
  1803. * ata_busy_sleep - sleep until BSY clears, or timeout
  1804. * @ap: port containing status register to be polled
  1805. * @tmout_pat: impatience timeout
  1806. * @tmout: overall timeout
  1807. *
  1808. * Sleep until ATA Status register bit BSY clears,
  1809. * or a timeout occurs.
  1810. *
  1811. * LOCKING: None.
  1812. */
  1813. unsigned int ata_busy_sleep (struct ata_port *ap,
  1814. unsigned long tmout_pat, unsigned long tmout)
  1815. {
  1816. unsigned long timer_start, timeout;
  1817. u8 status;
  1818. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1819. timer_start = jiffies;
  1820. timeout = timer_start + tmout_pat;
  1821. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1822. msleep(50);
  1823. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1824. }
  1825. if (status & ATA_BUSY)
  1826. printk(KERN_WARNING "ata%u is slow to respond, "
  1827. "please be patient\n", ap->id);
  1828. timeout = timer_start + tmout;
  1829. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1830. msleep(50);
  1831. status = ata_chk_status(ap);
  1832. }
  1833. if (status & ATA_BUSY) {
  1834. printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
  1835. ap->id, tmout / HZ);
  1836. return 1;
  1837. }
  1838. return 0;
  1839. }
  1840. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1841. {
  1842. struct ata_ioports *ioaddr = &ap->ioaddr;
  1843. unsigned int dev0 = devmask & (1 << 0);
  1844. unsigned int dev1 = devmask & (1 << 1);
  1845. unsigned long timeout;
  1846. /* if device 0 was found in ata_devchk, wait for its
  1847. * BSY bit to clear
  1848. */
  1849. if (dev0)
  1850. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1851. /* if device 1 was found in ata_devchk, wait for
  1852. * register access, then wait for BSY to clear
  1853. */
  1854. timeout = jiffies + ATA_TMOUT_BOOT;
  1855. while (dev1) {
  1856. u8 nsect, lbal;
  1857. ap->ops->dev_select(ap, 1);
  1858. if (ap->flags & ATA_FLAG_MMIO) {
  1859. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1860. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1861. } else {
  1862. nsect = inb(ioaddr->nsect_addr);
  1863. lbal = inb(ioaddr->lbal_addr);
  1864. }
  1865. if ((nsect == 1) && (lbal == 1))
  1866. break;
  1867. if (time_after(jiffies, timeout)) {
  1868. dev1 = 0;
  1869. break;
  1870. }
  1871. msleep(50); /* give drive a breather */
  1872. }
  1873. if (dev1)
  1874. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1875. /* is all this really necessary? */
  1876. ap->ops->dev_select(ap, 0);
  1877. if (dev1)
  1878. ap->ops->dev_select(ap, 1);
  1879. if (dev0)
  1880. ap->ops->dev_select(ap, 0);
  1881. }
  1882. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1883. unsigned int devmask)
  1884. {
  1885. struct ata_ioports *ioaddr = &ap->ioaddr;
  1886. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1887. /* software reset. causes dev0 to be selected */
  1888. if (ap->flags & ATA_FLAG_MMIO) {
  1889. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1890. udelay(20); /* FIXME: flush */
  1891. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1892. udelay(20); /* FIXME: flush */
  1893. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1894. } else {
  1895. outb(ap->ctl, ioaddr->ctl_addr);
  1896. udelay(10);
  1897. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1898. udelay(10);
  1899. outb(ap->ctl, ioaddr->ctl_addr);
  1900. }
  1901. /* spec mandates ">= 2ms" before checking status.
  1902. * We wait 150ms, because that was the magic delay used for
  1903. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1904. * between when the ATA command register is written, and then
  1905. * status is checked. Because waiting for "a while" before
  1906. * checking status is fine, post SRST, we perform this magic
  1907. * delay here as well.
  1908. *
  1909. * Old drivers/ide uses the 2mS rule and then waits for ready
  1910. */
  1911. msleep(150);
  1912. /* Before we perform post reset processing we want to see if
  1913. * the bus shows 0xFF because the odd clown forgets the D7
  1914. * pulldown resistor.
  1915. */
  1916. if (ata_check_status(ap) == 0xFF)
  1917. return AC_ERR_OTHER;
  1918. ata_bus_post_reset(ap, devmask);
  1919. return 0;
  1920. }
  1921. /**
  1922. * ata_bus_reset - reset host port and associated ATA channel
  1923. * @ap: port to reset
  1924. *
  1925. * This is typically the first time we actually start issuing
  1926. * commands to the ATA channel. We wait for BSY to clear, then
  1927. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1928. * result. Determine what devices, if any, are on the channel
  1929. * by looking at the device 0/1 error register. Look at the signature
  1930. * stored in each device's taskfile registers, to determine if
  1931. * the device is ATA or ATAPI.
  1932. *
  1933. * LOCKING:
  1934. * PCI/etc. bus probe sem.
  1935. * Obtains host_set lock.
  1936. *
  1937. * SIDE EFFECTS:
  1938. * Sets ATA_FLAG_DISABLED if bus reset fails.
  1939. */
  1940. void ata_bus_reset(struct ata_port *ap)
  1941. {
  1942. struct ata_ioports *ioaddr = &ap->ioaddr;
  1943. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1944. u8 err;
  1945. unsigned int dev0, dev1 = 0, devmask = 0;
  1946. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  1947. /* determine if device 0/1 are present */
  1948. if (ap->flags & ATA_FLAG_SATA_RESET)
  1949. dev0 = 1;
  1950. else {
  1951. dev0 = ata_devchk(ap, 0);
  1952. if (slave_possible)
  1953. dev1 = ata_devchk(ap, 1);
  1954. }
  1955. if (dev0)
  1956. devmask |= (1 << 0);
  1957. if (dev1)
  1958. devmask |= (1 << 1);
  1959. /* select device 0 again */
  1960. ap->ops->dev_select(ap, 0);
  1961. /* issue bus reset */
  1962. if (ap->flags & ATA_FLAG_SRST)
  1963. if (ata_bus_softreset(ap, devmask))
  1964. goto err_out;
  1965. /*
  1966. * determine by signature whether we have ATA or ATAPI devices
  1967. */
  1968. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  1969. if ((slave_possible) && (err != 0x81))
  1970. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  1971. /* re-enable interrupts */
  1972. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  1973. ata_irq_on(ap);
  1974. /* is double-select really necessary? */
  1975. if (ap->device[1].class != ATA_DEV_NONE)
  1976. ap->ops->dev_select(ap, 1);
  1977. if (ap->device[0].class != ATA_DEV_NONE)
  1978. ap->ops->dev_select(ap, 0);
  1979. /* if no devices were detected, disable this port */
  1980. if ((ap->device[0].class == ATA_DEV_NONE) &&
  1981. (ap->device[1].class == ATA_DEV_NONE))
  1982. goto err_out;
  1983. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  1984. /* set up device control for ATA_FLAG_SATA_RESET */
  1985. if (ap->flags & ATA_FLAG_MMIO)
  1986. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1987. else
  1988. outb(ap->ctl, ioaddr->ctl_addr);
  1989. }
  1990. DPRINTK("EXIT\n");
  1991. return;
  1992. err_out:
  1993. printk(KERN_ERR "ata%u: disabling port\n", ap->id);
  1994. ap->ops->port_disable(ap);
  1995. DPRINTK("EXIT\n");
  1996. }
  1997. static int sata_phy_resume(struct ata_port *ap)
  1998. {
  1999. unsigned long timeout = jiffies + (HZ * 5);
  2000. u32 scontrol, sstatus;
  2001. scontrol = scr_read(ap, SCR_CONTROL);
  2002. scontrol = (scontrol & 0x0f0) | 0x300;
  2003. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2004. /* Wait for phy to become ready, if necessary. */
  2005. do {
  2006. msleep(200);
  2007. sstatus = scr_read(ap, SCR_STATUS);
  2008. if ((sstatus & 0xf) != 1)
  2009. return 0;
  2010. } while (time_before(jiffies, timeout));
  2011. return -1;
  2012. }
  2013. /**
  2014. * ata_std_probeinit - initialize probing
  2015. * @ap: port to be probed
  2016. *
  2017. * @ap is about to be probed. Initialize it. This function is
  2018. * to be used as standard callback for ata_drive_probe_reset().
  2019. *
  2020. * NOTE!!! Do not use this function as probeinit if a low level
  2021. * driver implements only hardreset. Just pass NULL as probeinit
  2022. * in that case. Using this function is probably okay but doing
  2023. * so makes reset sequence different from the original
  2024. * ->phy_reset implementation and Jeff nervous. :-P
  2025. */
  2026. void ata_std_probeinit(struct ata_port *ap)
  2027. {
  2028. if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
  2029. u32 spd;
  2030. sata_phy_resume(ap);
  2031. spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
  2032. if (spd)
  2033. ap->sata_spd_limit &= (1 << spd) - 1;
  2034. if (sata_dev_present(ap))
  2035. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2036. }
  2037. }
  2038. /**
  2039. * ata_std_softreset - reset host port via ATA SRST
  2040. * @ap: port to reset
  2041. * @verbose: fail verbosely
  2042. * @classes: resulting classes of attached devices
  2043. *
  2044. * Reset host port using ATA SRST. This function is to be used
  2045. * as standard callback for ata_drive_*_reset() functions.
  2046. *
  2047. * LOCKING:
  2048. * Kernel thread context (may sleep)
  2049. *
  2050. * RETURNS:
  2051. * 0 on success, -errno otherwise.
  2052. */
  2053. int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
  2054. {
  2055. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2056. unsigned int devmask = 0, err_mask;
  2057. u8 err;
  2058. DPRINTK("ENTER\n");
  2059. if (ap->ops->scr_read && !sata_dev_present(ap)) {
  2060. classes[0] = ATA_DEV_NONE;
  2061. goto out;
  2062. }
  2063. /* determine if device 0/1 are present */
  2064. if (ata_devchk(ap, 0))
  2065. devmask |= (1 << 0);
  2066. if (slave_possible && ata_devchk(ap, 1))
  2067. devmask |= (1 << 1);
  2068. /* select device 0 again */
  2069. ap->ops->dev_select(ap, 0);
  2070. /* issue bus reset */
  2071. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2072. err_mask = ata_bus_softreset(ap, devmask);
  2073. if (err_mask) {
  2074. if (verbose)
  2075. printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
  2076. ap->id, err_mask);
  2077. else
  2078. DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
  2079. err_mask);
  2080. return -EIO;
  2081. }
  2082. /* determine by signature whether we have ATA or ATAPI devices */
  2083. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2084. if (slave_possible && err != 0x81)
  2085. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2086. out:
  2087. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2088. return 0;
  2089. }
  2090. /**
  2091. * sata_std_hardreset - reset host port via SATA phy reset
  2092. * @ap: port to reset
  2093. * @verbose: fail verbosely
  2094. * @class: resulting class of attached device
  2095. *
  2096. * SATA phy-reset host port using DET bits of SControl register.
  2097. * This function is to be used as standard callback for
  2098. * ata_drive_*_reset().
  2099. *
  2100. * LOCKING:
  2101. * Kernel thread context (may sleep)
  2102. *
  2103. * RETURNS:
  2104. * 0 on success, -errno otherwise.
  2105. */
  2106. int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
  2107. {
  2108. u32 scontrol;
  2109. DPRINTK("ENTER\n");
  2110. if (ata_set_sata_spd_needed(ap)) {
  2111. /* SATA spec says nothing about how to reconfigure
  2112. * spd. To be on the safe side, turn off phy during
  2113. * reconfiguration. This works for at least ICH7 AHCI
  2114. * and Sil3124.
  2115. */
  2116. scontrol = scr_read(ap, SCR_CONTROL);
  2117. scontrol = (scontrol & 0x0f0) | 0x302;
  2118. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2119. ata_set_sata_spd(ap);
  2120. }
  2121. /* issue phy wake/reset */
  2122. scontrol = scr_read(ap, SCR_CONTROL);
  2123. scontrol = (scontrol & 0x0f0) | 0x301;
  2124. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2125. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2126. * 10.4.2 says at least 1 ms.
  2127. */
  2128. msleep(1);
  2129. /* bring phy back */
  2130. sata_phy_resume(ap);
  2131. /* TODO: phy layer with polling, timeouts, etc. */
  2132. if (!sata_dev_present(ap)) {
  2133. *class = ATA_DEV_NONE;
  2134. DPRINTK("EXIT, link offline\n");
  2135. return 0;
  2136. }
  2137. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2138. if (verbose)
  2139. printk(KERN_ERR "ata%u: COMRESET failed "
  2140. "(device not ready)\n", ap->id);
  2141. else
  2142. DPRINTK("EXIT, device not ready\n");
  2143. return -EIO;
  2144. }
  2145. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2146. *class = ata_dev_try_classify(ap, 0, NULL);
  2147. DPRINTK("EXIT, class=%u\n", *class);
  2148. return 0;
  2149. }
  2150. /**
  2151. * ata_std_postreset - standard postreset callback
  2152. * @ap: the target ata_port
  2153. * @classes: classes of attached devices
  2154. *
  2155. * This function is invoked after a successful reset. Note that
  2156. * the device might have been reset more than once using
  2157. * different reset methods before postreset is invoked.
  2158. *
  2159. * This function is to be used as standard callback for
  2160. * ata_drive_*_reset().
  2161. *
  2162. * LOCKING:
  2163. * Kernel thread context (may sleep)
  2164. */
  2165. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2166. {
  2167. DPRINTK("ENTER\n");
  2168. /* set cable type if it isn't already set */
  2169. if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
  2170. ap->cbl = ATA_CBL_SATA;
  2171. /* print link status */
  2172. if (ap->cbl == ATA_CBL_SATA)
  2173. sata_print_link_status(ap);
  2174. /* re-enable interrupts */
  2175. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2176. ata_irq_on(ap);
  2177. /* is double-select really necessary? */
  2178. if (classes[0] != ATA_DEV_NONE)
  2179. ap->ops->dev_select(ap, 1);
  2180. if (classes[1] != ATA_DEV_NONE)
  2181. ap->ops->dev_select(ap, 0);
  2182. /* bail out if no device is present */
  2183. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2184. DPRINTK("EXIT, no device\n");
  2185. return;
  2186. }
  2187. /* set up device control */
  2188. if (ap->ioaddr.ctl_addr) {
  2189. if (ap->flags & ATA_FLAG_MMIO)
  2190. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2191. else
  2192. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2193. }
  2194. DPRINTK("EXIT\n");
  2195. }
  2196. /**
  2197. * ata_std_probe_reset - standard probe reset method
  2198. * @ap: prot to perform probe-reset
  2199. * @classes: resulting classes of attached devices
  2200. *
  2201. * The stock off-the-shelf ->probe_reset method.
  2202. *
  2203. * LOCKING:
  2204. * Kernel thread context (may sleep)
  2205. *
  2206. * RETURNS:
  2207. * 0 on success, -errno otherwise.
  2208. */
  2209. int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
  2210. {
  2211. ata_reset_fn_t hardreset;
  2212. hardreset = NULL;
  2213. if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
  2214. hardreset = sata_std_hardreset;
  2215. return ata_drive_probe_reset(ap, ata_std_probeinit,
  2216. ata_std_softreset, hardreset,
  2217. ata_std_postreset, classes);
  2218. }
  2219. static int ata_do_reset(struct ata_port *ap,
  2220. ata_reset_fn_t reset, ata_postreset_fn_t postreset,
  2221. int verbose, unsigned int *classes)
  2222. {
  2223. int i, rc;
  2224. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2225. classes[i] = ATA_DEV_UNKNOWN;
  2226. rc = reset(ap, verbose, classes);
  2227. if (rc)
  2228. return rc;
  2229. /* If any class isn't ATA_DEV_UNKNOWN, consider classification
  2230. * is complete and convert all ATA_DEV_UNKNOWN to
  2231. * ATA_DEV_NONE.
  2232. */
  2233. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2234. if (classes[i] != ATA_DEV_UNKNOWN)
  2235. break;
  2236. if (i < ATA_MAX_DEVICES)
  2237. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2238. if (classes[i] == ATA_DEV_UNKNOWN)
  2239. classes[i] = ATA_DEV_NONE;
  2240. if (postreset)
  2241. postreset(ap, classes);
  2242. return 0;
  2243. }
  2244. /**
  2245. * ata_drive_probe_reset - Perform probe reset with given methods
  2246. * @ap: port to reset
  2247. * @probeinit: probeinit method (can be NULL)
  2248. * @softreset: softreset method (can be NULL)
  2249. * @hardreset: hardreset method (can be NULL)
  2250. * @postreset: postreset method (can be NULL)
  2251. * @classes: resulting classes of attached devices
  2252. *
  2253. * Reset the specified port and classify attached devices using
  2254. * given methods. This function prefers softreset but tries all
  2255. * possible reset sequences to reset and classify devices. This
  2256. * function is intended to be used for constructing ->probe_reset
  2257. * callback by low level drivers.
  2258. *
  2259. * Reset methods should follow the following rules.
  2260. *
  2261. * - Return 0 on sucess, -errno on failure.
  2262. * - If classification is supported, fill classes[] with
  2263. * recognized class codes.
  2264. * - If classification is not supported, leave classes[] alone.
  2265. * - If verbose is non-zero, print error message on failure;
  2266. * otherwise, shut up.
  2267. *
  2268. * LOCKING:
  2269. * Kernel thread context (may sleep)
  2270. *
  2271. * RETURNS:
  2272. * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
  2273. * if classification fails, and any error code from reset
  2274. * methods.
  2275. */
  2276. int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
  2277. ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
  2278. ata_postreset_fn_t postreset, unsigned int *classes)
  2279. {
  2280. int rc = -EINVAL;
  2281. if (probeinit)
  2282. probeinit(ap);
  2283. if (softreset && !ata_set_sata_spd_needed(ap)) {
  2284. rc = ata_do_reset(ap, softreset, postreset, 0, classes);
  2285. if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
  2286. goto done;
  2287. printk(KERN_INFO "ata%u: softreset failed, will try "
  2288. "hardreset in 5 secs\n", ap->id);
  2289. ssleep(5);
  2290. }
  2291. if (!hardreset)
  2292. goto done;
  2293. while (1) {
  2294. rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
  2295. if (rc == 0) {
  2296. if (classes[0] != ATA_DEV_UNKNOWN)
  2297. goto done;
  2298. break;
  2299. }
  2300. if (ata_down_sata_spd_limit(ap))
  2301. goto done;
  2302. printk(KERN_INFO "ata%u: hardreset failed, will retry "
  2303. "in 5 secs\n", ap->id);
  2304. ssleep(5);
  2305. }
  2306. if (softreset) {
  2307. printk(KERN_INFO "ata%u: hardreset succeeded without "
  2308. "classification, will retry softreset in 5 secs\n",
  2309. ap->id);
  2310. ssleep(5);
  2311. rc = ata_do_reset(ap, softreset, postreset, 0, classes);
  2312. }
  2313. done:
  2314. if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
  2315. rc = -ENODEV;
  2316. return rc;
  2317. }
  2318. /**
  2319. * ata_dev_same_device - Determine whether new ID matches configured device
  2320. * @ap: port on which the device to compare against resides
  2321. * @dev: device to compare against
  2322. * @new_class: class of the new device
  2323. * @new_id: IDENTIFY page of the new device
  2324. *
  2325. * Compare @new_class and @new_id against @dev and determine
  2326. * whether @dev is the device indicated by @new_class and
  2327. * @new_id.
  2328. *
  2329. * LOCKING:
  2330. * None.
  2331. *
  2332. * RETURNS:
  2333. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2334. */
  2335. static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
  2336. unsigned int new_class, const u16 *new_id)
  2337. {
  2338. const u16 *old_id = dev->id;
  2339. unsigned char model[2][41], serial[2][21];
  2340. u64 new_n_sectors;
  2341. if (dev->class != new_class) {
  2342. printk(KERN_INFO
  2343. "ata%u: dev %u class mismatch %d != %d\n",
  2344. ap->id, dev->devno, dev->class, new_class);
  2345. return 0;
  2346. }
  2347. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2348. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2349. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2350. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2351. new_n_sectors = ata_id_n_sectors(new_id);
  2352. if (strcmp(model[0], model[1])) {
  2353. printk(KERN_INFO
  2354. "ata%u: dev %u model number mismatch '%s' != '%s'\n",
  2355. ap->id, dev->devno, model[0], model[1]);
  2356. return 0;
  2357. }
  2358. if (strcmp(serial[0], serial[1])) {
  2359. printk(KERN_INFO
  2360. "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
  2361. ap->id, dev->devno, serial[0], serial[1]);
  2362. return 0;
  2363. }
  2364. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2365. printk(KERN_INFO
  2366. "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
  2367. ap->id, dev->devno, (unsigned long long)dev->n_sectors,
  2368. (unsigned long long)new_n_sectors);
  2369. return 0;
  2370. }
  2371. return 1;
  2372. }
  2373. /**
  2374. * ata_dev_revalidate - Revalidate ATA device
  2375. * @ap: port on which the device to revalidate resides
  2376. * @dev: device to revalidate
  2377. * @post_reset: is this revalidation after reset?
  2378. *
  2379. * Re-read IDENTIFY page and make sure @dev is still attached to
  2380. * the port.
  2381. *
  2382. * LOCKING:
  2383. * Kernel thread context (may sleep)
  2384. *
  2385. * RETURNS:
  2386. * 0 on success, negative errno otherwise
  2387. */
  2388. int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
  2389. int post_reset)
  2390. {
  2391. unsigned int class = dev->class;
  2392. u16 *id = NULL;
  2393. int rc;
  2394. if (!ata_dev_enabled(dev)) {
  2395. rc = -ENODEV;
  2396. goto fail;
  2397. }
  2398. /* allocate & read ID data */
  2399. rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
  2400. if (rc)
  2401. goto fail;
  2402. /* is the device still there? */
  2403. if (!ata_dev_same_device(ap, dev, class, id)) {
  2404. rc = -ENODEV;
  2405. goto fail;
  2406. }
  2407. kfree(dev->id);
  2408. dev->id = id;
  2409. /* configure device according to the new ID */
  2410. rc = ata_dev_configure(ap, dev, 0);
  2411. if (rc == 0)
  2412. return 0;
  2413. fail:
  2414. printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
  2415. ap->id, dev->devno, rc);
  2416. kfree(id);
  2417. return rc;
  2418. }
  2419. static const char * const ata_dma_blacklist [] = {
  2420. "WDC AC11000H", NULL,
  2421. "WDC AC22100H", NULL,
  2422. "WDC AC32500H", NULL,
  2423. "WDC AC33100H", NULL,
  2424. "WDC AC31600H", NULL,
  2425. "WDC AC32100H", "24.09P07",
  2426. "WDC AC23200L", "21.10N21",
  2427. "Compaq CRD-8241B", NULL,
  2428. "CRD-8400B", NULL,
  2429. "CRD-8480B", NULL,
  2430. "CRD-8482B", NULL,
  2431. "CRD-84", NULL,
  2432. "SanDisk SDP3B", NULL,
  2433. "SanDisk SDP3B-64", NULL,
  2434. "SANYO CD-ROM CRD", NULL,
  2435. "HITACHI CDR-8", NULL,
  2436. "HITACHI CDR-8335", NULL,
  2437. "HITACHI CDR-8435", NULL,
  2438. "Toshiba CD-ROM XM-6202B", NULL,
  2439. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2440. "CD-532E-A", NULL,
  2441. "E-IDE CD-ROM CR-840", NULL,
  2442. "CD-ROM Drive/F5A", NULL,
  2443. "WPI CDD-820", NULL,
  2444. "SAMSUNG CD-ROM SC-148C", NULL,
  2445. "SAMSUNG CD-ROM SC", NULL,
  2446. "SanDisk SDP3B-64", NULL,
  2447. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2448. "_NEC DV5800A", NULL,
  2449. "SAMSUNG CD-ROM SN-124", "N001"
  2450. };
  2451. static int ata_strim(char *s, size_t len)
  2452. {
  2453. len = strnlen(s, len);
  2454. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2455. while ((len > 0) && (s[len - 1] == ' ')) {
  2456. len--;
  2457. s[len] = 0;
  2458. }
  2459. return len;
  2460. }
  2461. static int ata_dma_blacklisted(const struct ata_device *dev)
  2462. {
  2463. unsigned char model_num[40];
  2464. unsigned char model_rev[16];
  2465. unsigned int nlen, rlen;
  2466. int i;
  2467. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2468. sizeof(model_num));
  2469. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2470. sizeof(model_rev));
  2471. nlen = ata_strim(model_num, sizeof(model_num));
  2472. rlen = ata_strim(model_rev, sizeof(model_rev));
  2473. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2474. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2475. if (ata_dma_blacklist[i+1] == NULL)
  2476. return 1;
  2477. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2478. return 1;
  2479. }
  2480. }
  2481. return 0;
  2482. }
  2483. /**
  2484. * ata_dev_xfermask - Compute supported xfermask of the given device
  2485. * @ap: Port on which the device to compute xfermask for resides
  2486. * @dev: Device to compute xfermask for
  2487. *
  2488. * Compute supported xfermask of @dev and store it in
  2489. * dev->*_mask. This function is responsible for applying all
  2490. * known limits including host controller limits, device
  2491. * blacklist, etc...
  2492. *
  2493. * FIXME: The current implementation limits all transfer modes to
  2494. * the fastest of the lowested device on the port. This is not
  2495. * required on most controllers.
  2496. *
  2497. * LOCKING:
  2498. * None.
  2499. */
  2500. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
  2501. {
  2502. struct ata_host_set *hs = ap->host_set;
  2503. unsigned long xfer_mask;
  2504. int i;
  2505. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2506. ap->mwdma_mask, ap->udma_mask);
  2507. /* Apply cable rule here. Don't apply it early because when
  2508. * we handle hot plug the cable type can itself change.
  2509. */
  2510. if (ap->cbl == ATA_CBL_PATA40)
  2511. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2512. /* FIXME: Use port-wide xfermask for now */
  2513. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2514. struct ata_device *d = &ap->device[i];
  2515. if (ata_dev_absent(d))
  2516. continue;
  2517. if (ata_dev_disabled(d)) {
  2518. /* to avoid violating device selection timing */
  2519. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2520. UINT_MAX, UINT_MAX);
  2521. continue;
  2522. }
  2523. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2524. d->mwdma_mask, d->udma_mask);
  2525. xfer_mask &= ata_id_xfermask(d->id);
  2526. if (ata_dma_blacklisted(d))
  2527. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2528. }
  2529. if (ata_dma_blacklisted(dev))
  2530. printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
  2531. "disabling DMA\n", ap->id, dev->devno);
  2532. if (hs->flags & ATA_HOST_SIMPLEX) {
  2533. if (hs->simplex_claimed)
  2534. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2535. }
  2536. if (ap->ops->mode_filter)
  2537. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2538. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2539. &dev->mwdma_mask, &dev->udma_mask);
  2540. }
  2541. /**
  2542. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2543. * @ap: Port associated with device @dev
  2544. * @dev: Device to which command will be sent
  2545. *
  2546. * Issue SET FEATURES - XFER MODE command to device @dev
  2547. * on port @ap.
  2548. *
  2549. * LOCKING:
  2550. * PCI/etc. bus probe sem.
  2551. *
  2552. * RETURNS:
  2553. * 0 on success, AC_ERR_* mask otherwise.
  2554. */
  2555. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  2556. struct ata_device *dev)
  2557. {
  2558. struct ata_taskfile tf;
  2559. unsigned int err_mask;
  2560. /* set up set-features taskfile */
  2561. DPRINTK("set features - xfer mode\n");
  2562. ata_tf_init(ap, &tf, dev->devno);
  2563. tf.command = ATA_CMD_SET_FEATURES;
  2564. tf.feature = SETFEATURES_XFER;
  2565. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2566. tf.protocol = ATA_PROT_NODATA;
  2567. tf.nsect = dev->xfer_mode;
  2568. err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  2569. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2570. return err_mask;
  2571. }
  2572. /**
  2573. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2574. * @ap: Port associated with device @dev
  2575. * @dev: Device to which command will be sent
  2576. *
  2577. * LOCKING:
  2578. * Kernel thread context (may sleep)
  2579. *
  2580. * RETURNS:
  2581. * 0 on success, AC_ERR_* mask otherwise.
  2582. */
  2583. static unsigned int ata_dev_init_params(struct ata_port *ap,
  2584. struct ata_device *dev,
  2585. u16 heads,
  2586. u16 sectors)
  2587. {
  2588. struct ata_taskfile tf;
  2589. unsigned int err_mask;
  2590. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2591. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2592. return AC_ERR_INVALID;
  2593. /* set up init dev params taskfile */
  2594. DPRINTK("init dev params \n");
  2595. ata_tf_init(ap, &tf, dev->devno);
  2596. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2597. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2598. tf.protocol = ATA_PROT_NODATA;
  2599. tf.nsect = sectors;
  2600. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2601. err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  2602. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2603. return err_mask;
  2604. }
  2605. /**
  2606. * ata_sg_clean - Unmap DMA memory associated with command
  2607. * @qc: Command containing DMA memory to be released
  2608. *
  2609. * Unmap all mapped DMA memory associated with this command.
  2610. *
  2611. * LOCKING:
  2612. * spin_lock_irqsave(host_set lock)
  2613. */
  2614. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2615. {
  2616. struct ata_port *ap = qc->ap;
  2617. struct scatterlist *sg = qc->__sg;
  2618. int dir = qc->dma_dir;
  2619. void *pad_buf = NULL;
  2620. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2621. WARN_ON(sg == NULL);
  2622. if (qc->flags & ATA_QCFLAG_SINGLE)
  2623. WARN_ON(qc->n_elem > 1);
  2624. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2625. /* if we padded the buffer out to 32-bit bound, and data
  2626. * xfer direction is from-device, we must copy from the
  2627. * pad buffer back into the supplied buffer
  2628. */
  2629. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2630. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2631. if (qc->flags & ATA_QCFLAG_SG) {
  2632. if (qc->n_elem)
  2633. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2634. /* restore last sg */
  2635. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2636. if (pad_buf) {
  2637. struct scatterlist *psg = &qc->pad_sgent;
  2638. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2639. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2640. kunmap_atomic(addr, KM_IRQ0);
  2641. }
  2642. } else {
  2643. if (qc->n_elem)
  2644. dma_unmap_single(ap->dev,
  2645. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2646. dir);
  2647. /* restore sg */
  2648. sg->length += qc->pad_len;
  2649. if (pad_buf)
  2650. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2651. pad_buf, qc->pad_len);
  2652. }
  2653. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2654. qc->__sg = NULL;
  2655. }
  2656. /**
  2657. * ata_fill_sg - Fill PCI IDE PRD table
  2658. * @qc: Metadata associated with taskfile to be transferred
  2659. *
  2660. * Fill PCI IDE PRD (scatter-gather) table with segments
  2661. * associated with the current disk command.
  2662. *
  2663. * LOCKING:
  2664. * spin_lock_irqsave(host_set lock)
  2665. *
  2666. */
  2667. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2668. {
  2669. struct ata_port *ap = qc->ap;
  2670. struct scatterlist *sg;
  2671. unsigned int idx;
  2672. WARN_ON(qc->__sg == NULL);
  2673. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2674. idx = 0;
  2675. ata_for_each_sg(sg, qc) {
  2676. u32 addr, offset;
  2677. u32 sg_len, len;
  2678. /* determine if physical DMA addr spans 64K boundary.
  2679. * Note h/w doesn't support 64-bit, so we unconditionally
  2680. * truncate dma_addr_t to u32.
  2681. */
  2682. addr = (u32) sg_dma_address(sg);
  2683. sg_len = sg_dma_len(sg);
  2684. while (sg_len) {
  2685. offset = addr & 0xffff;
  2686. len = sg_len;
  2687. if ((offset + sg_len) > 0x10000)
  2688. len = 0x10000 - offset;
  2689. ap->prd[idx].addr = cpu_to_le32(addr);
  2690. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2691. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2692. idx++;
  2693. sg_len -= len;
  2694. addr += len;
  2695. }
  2696. }
  2697. if (idx)
  2698. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2699. }
  2700. /**
  2701. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2702. * @qc: Metadata associated with taskfile to check
  2703. *
  2704. * Allow low-level driver to filter ATA PACKET commands, returning
  2705. * a status indicating whether or not it is OK to use DMA for the
  2706. * supplied PACKET command.
  2707. *
  2708. * LOCKING:
  2709. * spin_lock_irqsave(host_set lock)
  2710. *
  2711. * RETURNS: 0 when ATAPI DMA can be used
  2712. * nonzero otherwise
  2713. */
  2714. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2715. {
  2716. struct ata_port *ap = qc->ap;
  2717. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2718. if (ap->ops->check_atapi_dma)
  2719. rc = ap->ops->check_atapi_dma(qc);
  2720. return rc;
  2721. }
  2722. /**
  2723. * ata_qc_prep - Prepare taskfile for submission
  2724. * @qc: Metadata associated with taskfile to be prepared
  2725. *
  2726. * Prepare ATA taskfile for submission.
  2727. *
  2728. * LOCKING:
  2729. * spin_lock_irqsave(host_set lock)
  2730. */
  2731. void ata_qc_prep(struct ata_queued_cmd *qc)
  2732. {
  2733. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2734. return;
  2735. ata_fill_sg(qc);
  2736. }
  2737. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2738. /**
  2739. * ata_sg_init_one - Associate command with memory buffer
  2740. * @qc: Command to be associated
  2741. * @buf: Memory buffer
  2742. * @buflen: Length of memory buffer, in bytes.
  2743. *
  2744. * Initialize the data-related elements of queued_cmd @qc
  2745. * to point to a single memory buffer, @buf of byte length @buflen.
  2746. *
  2747. * LOCKING:
  2748. * spin_lock_irqsave(host_set lock)
  2749. */
  2750. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2751. {
  2752. struct scatterlist *sg;
  2753. qc->flags |= ATA_QCFLAG_SINGLE;
  2754. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2755. qc->__sg = &qc->sgent;
  2756. qc->n_elem = 1;
  2757. qc->orig_n_elem = 1;
  2758. qc->buf_virt = buf;
  2759. sg = qc->__sg;
  2760. sg_init_one(sg, buf, buflen);
  2761. }
  2762. /**
  2763. * ata_sg_init - Associate command with scatter-gather table.
  2764. * @qc: Command to be associated
  2765. * @sg: Scatter-gather table.
  2766. * @n_elem: Number of elements in s/g table.
  2767. *
  2768. * Initialize the data-related elements of queued_cmd @qc
  2769. * to point to a scatter-gather table @sg, containing @n_elem
  2770. * elements.
  2771. *
  2772. * LOCKING:
  2773. * spin_lock_irqsave(host_set lock)
  2774. */
  2775. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2776. unsigned int n_elem)
  2777. {
  2778. qc->flags |= ATA_QCFLAG_SG;
  2779. qc->__sg = sg;
  2780. qc->n_elem = n_elem;
  2781. qc->orig_n_elem = n_elem;
  2782. }
  2783. /**
  2784. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2785. * @qc: Command with memory buffer to be mapped.
  2786. *
  2787. * DMA-map the memory buffer associated with queued_cmd @qc.
  2788. *
  2789. * LOCKING:
  2790. * spin_lock_irqsave(host_set lock)
  2791. *
  2792. * RETURNS:
  2793. * Zero on success, negative on error.
  2794. */
  2795. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2796. {
  2797. struct ata_port *ap = qc->ap;
  2798. int dir = qc->dma_dir;
  2799. struct scatterlist *sg = qc->__sg;
  2800. dma_addr_t dma_address;
  2801. int trim_sg = 0;
  2802. /* we must lengthen transfers to end on a 32-bit boundary */
  2803. qc->pad_len = sg->length & 3;
  2804. if (qc->pad_len) {
  2805. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2806. struct scatterlist *psg = &qc->pad_sgent;
  2807. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2808. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2809. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2810. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2811. qc->pad_len);
  2812. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2813. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2814. /* trim sg */
  2815. sg->length -= qc->pad_len;
  2816. if (sg->length == 0)
  2817. trim_sg = 1;
  2818. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2819. sg->length, qc->pad_len);
  2820. }
  2821. if (trim_sg) {
  2822. qc->n_elem--;
  2823. goto skip_map;
  2824. }
  2825. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2826. sg->length, dir);
  2827. if (dma_mapping_error(dma_address)) {
  2828. /* restore sg */
  2829. sg->length += qc->pad_len;
  2830. return -1;
  2831. }
  2832. sg_dma_address(sg) = dma_address;
  2833. sg_dma_len(sg) = sg->length;
  2834. skip_map:
  2835. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2836. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2837. return 0;
  2838. }
  2839. /**
  2840. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2841. * @qc: Command with scatter-gather table to be mapped.
  2842. *
  2843. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2844. *
  2845. * LOCKING:
  2846. * spin_lock_irqsave(host_set lock)
  2847. *
  2848. * RETURNS:
  2849. * Zero on success, negative on error.
  2850. *
  2851. */
  2852. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2853. {
  2854. struct ata_port *ap = qc->ap;
  2855. struct scatterlist *sg = qc->__sg;
  2856. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2857. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2858. VPRINTK("ENTER, ata%u\n", ap->id);
  2859. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2860. /* we must lengthen transfers to end on a 32-bit boundary */
  2861. qc->pad_len = lsg->length & 3;
  2862. if (qc->pad_len) {
  2863. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2864. struct scatterlist *psg = &qc->pad_sgent;
  2865. unsigned int offset;
  2866. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2867. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2868. /*
  2869. * psg->page/offset are used to copy to-be-written
  2870. * data in this function or read data in ata_sg_clean.
  2871. */
  2872. offset = lsg->offset + lsg->length - qc->pad_len;
  2873. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2874. psg->offset = offset_in_page(offset);
  2875. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2876. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2877. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2878. kunmap_atomic(addr, KM_IRQ0);
  2879. }
  2880. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2881. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2882. /* trim last sg */
  2883. lsg->length -= qc->pad_len;
  2884. if (lsg->length == 0)
  2885. trim_sg = 1;
  2886. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2887. qc->n_elem - 1, lsg->length, qc->pad_len);
  2888. }
  2889. pre_n_elem = qc->n_elem;
  2890. if (trim_sg && pre_n_elem)
  2891. pre_n_elem--;
  2892. if (!pre_n_elem) {
  2893. n_elem = 0;
  2894. goto skip_map;
  2895. }
  2896. dir = qc->dma_dir;
  2897. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2898. if (n_elem < 1) {
  2899. /* restore last sg */
  2900. lsg->length += qc->pad_len;
  2901. return -1;
  2902. }
  2903. DPRINTK("%d sg elements mapped\n", n_elem);
  2904. skip_map:
  2905. qc->n_elem = n_elem;
  2906. return 0;
  2907. }
  2908. /**
  2909. * ata_poll_qc_complete - turn irq back on and finish qc
  2910. * @qc: Command to complete
  2911. * @err_mask: ATA status register content
  2912. *
  2913. * LOCKING:
  2914. * None. (grabs host lock)
  2915. */
  2916. void ata_poll_qc_complete(struct ata_queued_cmd *qc)
  2917. {
  2918. struct ata_port *ap = qc->ap;
  2919. unsigned long flags;
  2920. spin_lock_irqsave(&ap->host_set->lock, flags);
  2921. ap->flags &= ~ATA_FLAG_NOINTR;
  2922. ata_irq_on(ap);
  2923. ata_qc_complete(qc);
  2924. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  2925. }
  2926. /**
  2927. * ata_pio_poll - poll using PIO, depending on current state
  2928. * @qc: qc in progress
  2929. *
  2930. * LOCKING:
  2931. * None. (executing in kernel thread context)
  2932. *
  2933. * RETURNS:
  2934. * timeout value to use
  2935. */
  2936. static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
  2937. {
  2938. struct ata_port *ap = qc->ap;
  2939. u8 status;
  2940. unsigned int poll_state = HSM_ST_UNKNOWN;
  2941. unsigned int reg_state = HSM_ST_UNKNOWN;
  2942. switch (ap->hsm_task_state) {
  2943. case HSM_ST:
  2944. case HSM_ST_POLL:
  2945. poll_state = HSM_ST_POLL;
  2946. reg_state = HSM_ST;
  2947. break;
  2948. case HSM_ST_LAST:
  2949. case HSM_ST_LAST_POLL:
  2950. poll_state = HSM_ST_LAST_POLL;
  2951. reg_state = HSM_ST_LAST;
  2952. break;
  2953. default:
  2954. BUG();
  2955. break;
  2956. }
  2957. status = ata_chk_status(ap);
  2958. if (status & ATA_BUSY) {
  2959. if (time_after(jiffies, ap->pio_task_timeout)) {
  2960. qc->err_mask |= AC_ERR_TIMEOUT;
  2961. ap->hsm_task_state = HSM_ST_TMOUT;
  2962. return 0;
  2963. }
  2964. ap->hsm_task_state = poll_state;
  2965. return ATA_SHORT_PAUSE;
  2966. }
  2967. ap->hsm_task_state = reg_state;
  2968. return 0;
  2969. }
  2970. /**
  2971. * ata_pio_complete - check if drive is busy or idle
  2972. * @qc: qc to complete
  2973. *
  2974. * LOCKING:
  2975. * None. (executing in kernel thread context)
  2976. *
  2977. * RETURNS:
  2978. * Non-zero if qc completed, zero otherwise.
  2979. */
  2980. static int ata_pio_complete(struct ata_queued_cmd *qc)
  2981. {
  2982. struct ata_port *ap = qc->ap;
  2983. u8 drv_stat;
  2984. /*
  2985. * This is purely heuristic. This is a fast path. Sometimes when
  2986. * we enter, BSY will be cleared in a chk-status or two. If not,
  2987. * the drive is probably seeking or something. Snooze for a couple
  2988. * msecs, then chk-status again. If still busy, fall back to
  2989. * HSM_ST_POLL state.
  2990. */
  2991. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2992. if (drv_stat & ATA_BUSY) {
  2993. msleep(2);
  2994. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2995. if (drv_stat & ATA_BUSY) {
  2996. ap->hsm_task_state = HSM_ST_LAST_POLL;
  2997. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  2998. return 0;
  2999. }
  3000. }
  3001. drv_stat = ata_wait_idle(ap);
  3002. if (!ata_ok(drv_stat)) {
  3003. qc->err_mask |= __ac_err_mask(drv_stat);
  3004. ap->hsm_task_state = HSM_ST_ERR;
  3005. return 0;
  3006. }
  3007. ap->hsm_task_state = HSM_ST_IDLE;
  3008. WARN_ON(qc->err_mask);
  3009. ata_poll_qc_complete(qc);
  3010. /* another command may start at this point */
  3011. return 1;
  3012. }
  3013. /**
  3014. * swap_buf_le16 - swap halves of 16-bit words in place
  3015. * @buf: Buffer to swap
  3016. * @buf_words: Number of 16-bit words in buffer.
  3017. *
  3018. * Swap halves of 16-bit words if needed to convert from
  3019. * little-endian byte order to native cpu byte order, or
  3020. * vice-versa.
  3021. *
  3022. * LOCKING:
  3023. * Inherited from caller.
  3024. */
  3025. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  3026. {
  3027. #ifdef __BIG_ENDIAN
  3028. unsigned int i;
  3029. for (i = 0; i < buf_words; i++)
  3030. buf[i] = le16_to_cpu(buf[i]);
  3031. #endif /* __BIG_ENDIAN */
  3032. }
  3033. /**
  3034. * ata_mmio_data_xfer - Transfer data by MMIO
  3035. * @ap: port to read/write
  3036. * @buf: data buffer
  3037. * @buflen: buffer length
  3038. * @write_data: read/write
  3039. *
  3040. * Transfer data from/to the device data register by MMIO.
  3041. *
  3042. * LOCKING:
  3043. * Inherited from caller.
  3044. */
  3045. static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3046. unsigned int buflen, int write_data)
  3047. {
  3048. unsigned int i;
  3049. unsigned int words = buflen >> 1;
  3050. u16 *buf16 = (u16 *) buf;
  3051. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  3052. /* Transfer multiple of 2 bytes */
  3053. if (write_data) {
  3054. for (i = 0; i < words; i++)
  3055. writew(le16_to_cpu(buf16[i]), mmio);
  3056. } else {
  3057. for (i = 0; i < words; i++)
  3058. buf16[i] = cpu_to_le16(readw(mmio));
  3059. }
  3060. /* Transfer trailing 1 byte, if any. */
  3061. if (unlikely(buflen & 0x01)) {
  3062. u16 align_buf[1] = { 0 };
  3063. unsigned char *trailing_buf = buf + buflen - 1;
  3064. if (write_data) {
  3065. memcpy(align_buf, trailing_buf, 1);
  3066. writew(le16_to_cpu(align_buf[0]), mmio);
  3067. } else {
  3068. align_buf[0] = cpu_to_le16(readw(mmio));
  3069. memcpy(trailing_buf, align_buf, 1);
  3070. }
  3071. }
  3072. }
  3073. /**
  3074. * ata_pio_data_xfer - Transfer data by PIO
  3075. * @ap: port to read/write
  3076. * @buf: data buffer
  3077. * @buflen: buffer length
  3078. * @write_data: read/write
  3079. *
  3080. * Transfer data from/to the device data register by PIO.
  3081. *
  3082. * LOCKING:
  3083. * Inherited from caller.
  3084. */
  3085. static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3086. unsigned int buflen, int write_data)
  3087. {
  3088. unsigned int words = buflen >> 1;
  3089. /* Transfer multiple of 2 bytes */
  3090. if (write_data)
  3091. outsw(ap->ioaddr.data_addr, buf, words);
  3092. else
  3093. insw(ap->ioaddr.data_addr, buf, words);
  3094. /* Transfer trailing 1 byte, if any. */
  3095. if (unlikely(buflen & 0x01)) {
  3096. u16 align_buf[1] = { 0 };
  3097. unsigned char *trailing_buf = buf + buflen - 1;
  3098. if (write_data) {
  3099. memcpy(align_buf, trailing_buf, 1);
  3100. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3101. } else {
  3102. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3103. memcpy(trailing_buf, align_buf, 1);
  3104. }
  3105. }
  3106. }
  3107. /**
  3108. * ata_data_xfer - Transfer data from/to the data register.
  3109. * @ap: port to read/write
  3110. * @buf: data buffer
  3111. * @buflen: buffer length
  3112. * @do_write: read/write
  3113. *
  3114. * Transfer data from/to the device data register.
  3115. *
  3116. * LOCKING:
  3117. * Inherited from caller.
  3118. */
  3119. static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
  3120. unsigned int buflen, int do_write)
  3121. {
  3122. /* Make the crap hardware pay the costs not the good stuff */
  3123. if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
  3124. unsigned long flags;
  3125. local_irq_save(flags);
  3126. if (ap->flags & ATA_FLAG_MMIO)
  3127. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3128. else
  3129. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3130. local_irq_restore(flags);
  3131. } else {
  3132. if (ap->flags & ATA_FLAG_MMIO)
  3133. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3134. else
  3135. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3136. }
  3137. }
  3138. /**
  3139. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3140. * @qc: Command on going
  3141. *
  3142. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3143. *
  3144. * LOCKING:
  3145. * Inherited from caller.
  3146. */
  3147. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3148. {
  3149. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3150. struct scatterlist *sg = qc->__sg;
  3151. struct ata_port *ap = qc->ap;
  3152. struct page *page;
  3153. unsigned int offset;
  3154. unsigned char *buf;
  3155. if (qc->cursect == (qc->nsect - 1))
  3156. ap->hsm_task_state = HSM_ST_LAST;
  3157. page = sg[qc->cursg].page;
  3158. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3159. /* get the current page and offset */
  3160. page = nth_page(page, (offset >> PAGE_SHIFT));
  3161. offset %= PAGE_SIZE;
  3162. buf = kmap(page) + offset;
  3163. qc->cursect++;
  3164. qc->cursg_ofs++;
  3165. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3166. qc->cursg++;
  3167. qc->cursg_ofs = 0;
  3168. }
  3169. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3170. /* do the actual data transfer */
  3171. do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3172. ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
  3173. kunmap(page);
  3174. }
  3175. /**
  3176. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3177. * @qc: Command on going
  3178. * @bytes: number of bytes
  3179. *
  3180. * Transfer Transfer data from/to the ATAPI device.
  3181. *
  3182. * LOCKING:
  3183. * Inherited from caller.
  3184. *
  3185. */
  3186. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3187. {
  3188. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3189. struct scatterlist *sg = qc->__sg;
  3190. struct ata_port *ap = qc->ap;
  3191. struct page *page;
  3192. unsigned char *buf;
  3193. unsigned int offset, count;
  3194. if (qc->curbytes + bytes >= qc->nbytes)
  3195. ap->hsm_task_state = HSM_ST_LAST;
  3196. next_sg:
  3197. if (unlikely(qc->cursg >= qc->n_elem)) {
  3198. /*
  3199. * The end of qc->sg is reached and the device expects
  3200. * more data to transfer. In order not to overrun qc->sg
  3201. * and fulfill length specified in the byte count register,
  3202. * - for read case, discard trailing data from the device
  3203. * - for write case, padding zero data to the device
  3204. */
  3205. u16 pad_buf[1] = { 0 };
  3206. unsigned int words = bytes >> 1;
  3207. unsigned int i;
  3208. if (words) /* warning if bytes > 1 */
  3209. printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
  3210. ap->id, bytes);
  3211. for (i = 0; i < words; i++)
  3212. ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
  3213. ap->hsm_task_state = HSM_ST_LAST;
  3214. return;
  3215. }
  3216. sg = &qc->__sg[qc->cursg];
  3217. page = sg->page;
  3218. offset = sg->offset + qc->cursg_ofs;
  3219. /* get the current page and offset */
  3220. page = nth_page(page, (offset >> PAGE_SHIFT));
  3221. offset %= PAGE_SIZE;
  3222. /* don't overrun current sg */
  3223. count = min(sg->length - qc->cursg_ofs, bytes);
  3224. /* don't cross page boundaries */
  3225. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3226. buf = kmap(page) + offset;
  3227. bytes -= count;
  3228. qc->curbytes += count;
  3229. qc->cursg_ofs += count;
  3230. if (qc->cursg_ofs == sg->length) {
  3231. qc->cursg++;
  3232. qc->cursg_ofs = 0;
  3233. }
  3234. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3235. /* do the actual data transfer */
  3236. ata_data_xfer(ap, buf, count, do_write);
  3237. kunmap(page);
  3238. if (bytes)
  3239. goto next_sg;
  3240. }
  3241. /**
  3242. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3243. * @qc: Command on going
  3244. *
  3245. * Transfer Transfer data from/to the ATAPI device.
  3246. *
  3247. * LOCKING:
  3248. * Inherited from caller.
  3249. */
  3250. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3251. {
  3252. struct ata_port *ap = qc->ap;
  3253. struct ata_device *dev = qc->dev;
  3254. unsigned int ireason, bc_lo, bc_hi, bytes;
  3255. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3256. ap->ops->tf_read(ap, &qc->tf);
  3257. ireason = qc->tf.nsect;
  3258. bc_lo = qc->tf.lbam;
  3259. bc_hi = qc->tf.lbah;
  3260. bytes = (bc_hi << 8) | bc_lo;
  3261. /* shall be cleared to zero, indicating xfer of data */
  3262. if (ireason & (1 << 0))
  3263. goto err_out;
  3264. /* make sure transfer direction matches expected */
  3265. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3266. if (do_write != i_write)
  3267. goto err_out;
  3268. __atapi_pio_bytes(qc, bytes);
  3269. return;
  3270. err_out:
  3271. printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
  3272. ap->id, dev->devno);
  3273. qc->err_mask |= AC_ERR_HSM;
  3274. ap->hsm_task_state = HSM_ST_ERR;
  3275. }
  3276. /**
  3277. * ata_pio_block - start PIO on a block
  3278. * @qc: qc to transfer block for
  3279. *
  3280. * LOCKING:
  3281. * None. (executing in kernel thread context)
  3282. */
  3283. static void ata_pio_block(struct ata_queued_cmd *qc)
  3284. {
  3285. struct ata_port *ap = qc->ap;
  3286. u8 status;
  3287. /*
  3288. * This is purely heuristic. This is a fast path.
  3289. * Sometimes when we enter, BSY will be cleared in
  3290. * a chk-status or two. If not, the drive is probably seeking
  3291. * or something. Snooze for a couple msecs, then
  3292. * chk-status again. If still busy, fall back to
  3293. * HSM_ST_POLL state.
  3294. */
  3295. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3296. if (status & ATA_BUSY) {
  3297. msleep(2);
  3298. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3299. if (status & ATA_BUSY) {
  3300. ap->hsm_task_state = HSM_ST_POLL;
  3301. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  3302. return;
  3303. }
  3304. }
  3305. /* check error */
  3306. if (status & (ATA_ERR | ATA_DF)) {
  3307. qc->err_mask |= AC_ERR_DEV;
  3308. ap->hsm_task_state = HSM_ST_ERR;
  3309. return;
  3310. }
  3311. /* transfer data if any */
  3312. if (is_atapi_taskfile(&qc->tf)) {
  3313. /* DRQ=0 means no more data to transfer */
  3314. if ((status & ATA_DRQ) == 0) {
  3315. ap->hsm_task_state = HSM_ST_LAST;
  3316. return;
  3317. }
  3318. atapi_pio_bytes(qc);
  3319. } else {
  3320. /* handle BSY=0, DRQ=0 as error */
  3321. if ((status & ATA_DRQ) == 0) {
  3322. qc->err_mask |= AC_ERR_HSM;
  3323. ap->hsm_task_state = HSM_ST_ERR;
  3324. return;
  3325. }
  3326. ata_pio_sector(qc);
  3327. }
  3328. }
  3329. static void ata_pio_error(struct ata_queued_cmd *qc)
  3330. {
  3331. struct ata_port *ap = qc->ap;
  3332. if (qc->tf.command != ATA_CMD_PACKET)
  3333. printk(KERN_WARNING "ata%u: dev %u PIO error\n",
  3334. ap->id, qc->dev->devno);
  3335. /* make sure qc->err_mask is available to
  3336. * know what's wrong and recover
  3337. */
  3338. WARN_ON(qc->err_mask == 0);
  3339. ap->hsm_task_state = HSM_ST_IDLE;
  3340. ata_poll_qc_complete(qc);
  3341. }
  3342. static void ata_pio_task(void *_data)
  3343. {
  3344. struct ata_queued_cmd *qc = _data;
  3345. struct ata_port *ap = qc->ap;
  3346. unsigned long timeout;
  3347. int qc_completed;
  3348. fsm_start:
  3349. timeout = 0;
  3350. qc_completed = 0;
  3351. switch (ap->hsm_task_state) {
  3352. case HSM_ST_IDLE:
  3353. return;
  3354. case HSM_ST:
  3355. ata_pio_block(qc);
  3356. break;
  3357. case HSM_ST_LAST:
  3358. qc_completed = ata_pio_complete(qc);
  3359. break;
  3360. case HSM_ST_POLL:
  3361. case HSM_ST_LAST_POLL:
  3362. timeout = ata_pio_poll(qc);
  3363. break;
  3364. case HSM_ST_TMOUT:
  3365. case HSM_ST_ERR:
  3366. ata_pio_error(qc);
  3367. return;
  3368. }
  3369. if (timeout)
  3370. ata_port_queue_task(ap, ata_pio_task, qc, timeout);
  3371. else if (!qc_completed)
  3372. goto fsm_start;
  3373. }
  3374. /**
  3375. * atapi_packet_task - Write CDB bytes to hardware
  3376. * @_data: qc in progress
  3377. *
  3378. * When device has indicated its readiness to accept
  3379. * a CDB, this function is called. Send the CDB.
  3380. * If DMA is to be performed, exit immediately.
  3381. * Otherwise, we are in polling mode, so poll
  3382. * status under operation succeeds or fails.
  3383. *
  3384. * LOCKING:
  3385. * Kernel thread context (may sleep)
  3386. */
  3387. static void atapi_packet_task(void *_data)
  3388. {
  3389. struct ata_queued_cmd *qc = _data;
  3390. struct ata_port *ap = qc->ap;
  3391. u8 status;
  3392. /* sleep-wait for BSY to clear */
  3393. DPRINTK("busy wait\n");
  3394. if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
  3395. qc->err_mask |= AC_ERR_TIMEOUT;
  3396. goto err_out;
  3397. }
  3398. /* make sure DRQ is set */
  3399. status = ata_chk_status(ap);
  3400. if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
  3401. qc->err_mask |= AC_ERR_HSM;
  3402. goto err_out;
  3403. }
  3404. /* send SCSI cdb */
  3405. DPRINTK("send cdb\n");
  3406. WARN_ON(qc->dev->cdb_len < 12);
  3407. if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
  3408. qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
  3409. unsigned long flags;
  3410. /* Once we're done issuing command and kicking bmdma,
  3411. * irq handler takes over. To not lose irq, we need
  3412. * to clear NOINTR flag before sending cdb, but
  3413. * interrupt handler shouldn't be invoked before we're
  3414. * finished. Hence, the following locking.
  3415. */
  3416. spin_lock_irqsave(&ap->host_set->lock, flags);
  3417. ap->flags &= ~ATA_FLAG_NOINTR;
  3418. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3419. if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
  3420. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3421. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3422. } else {
  3423. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3424. /* PIO commands are handled by polling */
  3425. ap->hsm_task_state = HSM_ST;
  3426. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3427. }
  3428. return;
  3429. err_out:
  3430. ata_poll_qc_complete(qc);
  3431. }
  3432. /**
  3433. * ata_qc_timeout - Handle timeout of queued command
  3434. * @qc: Command that timed out
  3435. *
  3436. * Some part of the kernel (currently, only the SCSI layer)
  3437. * has noticed that the active command on port @ap has not
  3438. * completed after a specified length of time. Handle this
  3439. * condition by disabling DMA (if necessary) and completing
  3440. * transactions, with error if necessary.
  3441. *
  3442. * This also handles the case of the "lost interrupt", where
  3443. * for some reason (possibly hardware bug, possibly driver bug)
  3444. * an interrupt was not delivered to the driver, even though the
  3445. * transaction completed successfully.
  3446. *
  3447. * LOCKING:
  3448. * Inherited from SCSI layer (none, can sleep)
  3449. */
  3450. static void ata_qc_timeout(struct ata_queued_cmd *qc)
  3451. {
  3452. struct ata_port *ap = qc->ap;
  3453. struct ata_host_set *host_set = ap->host_set;
  3454. u8 host_stat = 0, drv_stat;
  3455. unsigned long flags;
  3456. DPRINTK("ENTER\n");
  3457. ap->hsm_task_state = HSM_ST_IDLE;
  3458. spin_lock_irqsave(&host_set->lock, flags);
  3459. switch (qc->tf.protocol) {
  3460. case ATA_PROT_DMA:
  3461. case ATA_PROT_ATAPI_DMA:
  3462. host_stat = ap->ops->bmdma_status(ap);
  3463. /* before we do anything else, clear DMA-Start bit */
  3464. ap->ops->bmdma_stop(qc);
  3465. /* fall through */
  3466. default:
  3467. ata_altstatus(ap);
  3468. drv_stat = ata_chk_status(ap);
  3469. /* ack bmdma irq events */
  3470. ap->ops->irq_clear(ap);
  3471. printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
  3472. ap->id, qc->tf.command, drv_stat, host_stat);
  3473. /* complete taskfile transaction */
  3474. qc->err_mask |= ac_err_mask(drv_stat);
  3475. break;
  3476. }
  3477. spin_unlock_irqrestore(&host_set->lock, flags);
  3478. ata_eh_qc_complete(qc);
  3479. DPRINTK("EXIT\n");
  3480. }
  3481. /**
  3482. * ata_eng_timeout - Handle timeout of queued command
  3483. * @ap: Port on which timed-out command is active
  3484. *
  3485. * Some part of the kernel (currently, only the SCSI layer)
  3486. * has noticed that the active command on port @ap has not
  3487. * completed after a specified length of time. Handle this
  3488. * condition by disabling DMA (if necessary) and completing
  3489. * transactions, with error if necessary.
  3490. *
  3491. * This also handles the case of the "lost interrupt", where
  3492. * for some reason (possibly hardware bug, possibly driver bug)
  3493. * an interrupt was not delivered to the driver, even though the
  3494. * transaction completed successfully.
  3495. *
  3496. * LOCKING:
  3497. * Inherited from SCSI layer (none, can sleep)
  3498. */
  3499. void ata_eng_timeout(struct ata_port *ap)
  3500. {
  3501. DPRINTK("ENTER\n");
  3502. ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
  3503. DPRINTK("EXIT\n");
  3504. }
  3505. /**
  3506. * ata_qc_new - Request an available ATA command, for queueing
  3507. * @ap: Port associated with device @dev
  3508. * @dev: Device from whom we request an available command structure
  3509. *
  3510. * LOCKING:
  3511. * None.
  3512. */
  3513. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3514. {
  3515. struct ata_queued_cmd *qc = NULL;
  3516. unsigned int i;
  3517. for (i = 0; i < ATA_MAX_QUEUE; i++)
  3518. if (!test_and_set_bit(i, &ap->qactive)) {
  3519. qc = ata_qc_from_tag(ap, i);
  3520. break;
  3521. }
  3522. if (qc)
  3523. qc->tag = i;
  3524. return qc;
  3525. }
  3526. /**
  3527. * ata_qc_new_init - Request an available ATA command, and initialize it
  3528. * @ap: Port associated with device @dev
  3529. * @dev: Device from whom we request an available command structure
  3530. *
  3531. * LOCKING:
  3532. * None.
  3533. */
  3534. struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
  3535. struct ata_device *dev)
  3536. {
  3537. struct ata_queued_cmd *qc;
  3538. qc = ata_qc_new(ap);
  3539. if (qc) {
  3540. qc->scsicmd = NULL;
  3541. qc->ap = ap;
  3542. qc->dev = dev;
  3543. ata_qc_reinit(qc);
  3544. }
  3545. return qc;
  3546. }
  3547. /**
  3548. * ata_qc_free - free unused ata_queued_cmd
  3549. * @qc: Command to complete
  3550. *
  3551. * Designed to free unused ata_queued_cmd object
  3552. * in case something prevents using it.
  3553. *
  3554. * LOCKING:
  3555. * spin_lock_irqsave(host_set lock)
  3556. */
  3557. void ata_qc_free(struct ata_queued_cmd *qc)
  3558. {
  3559. struct ata_port *ap = qc->ap;
  3560. unsigned int tag;
  3561. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3562. qc->flags = 0;
  3563. tag = qc->tag;
  3564. if (likely(ata_tag_valid(tag))) {
  3565. if (tag == ap->active_tag)
  3566. ap->active_tag = ATA_TAG_POISON;
  3567. qc->tag = ATA_TAG_POISON;
  3568. clear_bit(tag, &ap->qactive);
  3569. }
  3570. }
  3571. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3572. {
  3573. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3574. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3575. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3576. ata_sg_clean(qc);
  3577. /* atapi: mark qc as inactive to prevent the interrupt handler
  3578. * from completing the command twice later, before the error handler
  3579. * is called. (when rc != 0 and atapi request sense is needed)
  3580. */
  3581. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3582. /* call completion callback */
  3583. qc->complete_fn(qc);
  3584. }
  3585. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3586. {
  3587. struct ata_port *ap = qc->ap;
  3588. switch (qc->tf.protocol) {
  3589. case ATA_PROT_DMA:
  3590. case ATA_PROT_ATAPI_DMA:
  3591. return 1;
  3592. case ATA_PROT_ATAPI:
  3593. case ATA_PROT_PIO:
  3594. if (ap->flags & ATA_FLAG_PIO_DMA)
  3595. return 1;
  3596. /* fall through */
  3597. default:
  3598. return 0;
  3599. }
  3600. /* never reached */
  3601. }
  3602. /**
  3603. * ata_qc_issue - issue taskfile to device
  3604. * @qc: command to issue to device
  3605. *
  3606. * Prepare an ATA command to submission to device.
  3607. * This includes mapping the data into a DMA-able
  3608. * area, filling in the S/G table, and finally
  3609. * writing the taskfile to hardware, starting the command.
  3610. *
  3611. * LOCKING:
  3612. * spin_lock_irqsave(host_set lock)
  3613. */
  3614. void ata_qc_issue(struct ata_queued_cmd *qc)
  3615. {
  3616. struct ata_port *ap = qc->ap;
  3617. qc->ap->active_tag = qc->tag;
  3618. qc->flags |= ATA_QCFLAG_ACTIVE;
  3619. if (ata_should_dma_map(qc)) {
  3620. if (qc->flags & ATA_QCFLAG_SG) {
  3621. if (ata_sg_setup(qc))
  3622. goto sg_err;
  3623. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3624. if (ata_sg_setup_one(qc))
  3625. goto sg_err;
  3626. }
  3627. } else {
  3628. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3629. }
  3630. ap->ops->qc_prep(qc);
  3631. qc->err_mask |= ap->ops->qc_issue(qc);
  3632. if (unlikely(qc->err_mask))
  3633. goto err;
  3634. return;
  3635. sg_err:
  3636. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3637. qc->err_mask |= AC_ERR_SYSTEM;
  3638. err:
  3639. ata_qc_complete(qc);
  3640. }
  3641. /**
  3642. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3643. * @qc: command to issue to device
  3644. *
  3645. * Using various libata functions and hooks, this function
  3646. * starts an ATA command. ATA commands are grouped into
  3647. * classes called "protocols", and issuing each type of protocol
  3648. * is slightly different.
  3649. *
  3650. * May be used as the qc_issue() entry in ata_port_operations.
  3651. *
  3652. * LOCKING:
  3653. * spin_lock_irqsave(host_set lock)
  3654. *
  3655. * RETURNS:
  3656. * Zero on success, AC_ERR_* mask on failure
  3657. */
  3658. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3659. {
  3660. struct ata_port *ap = qc->ap;
  3661. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3662. switch (qc->tf.protocol) {
  3663. case ATA_PROT_NODATA:
  3664. ata_tf_to_host(ap, &qc->tf);
  3665. break;
  3666. case ATA_PROT_DMA:
  3667. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3668. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3669. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3670. break;
  3671. case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
  3672. ata_qc_set_polling(qc);
  3673. ata_tf_to_host(ap, &qc->tf);
  3674. ap->hsm_task_state = HSM_ST;
  3675. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3676. break;
  3677. case ATA_PROT_ATAPI:
  3678. ata_qc_set_polling(qc);
  3679. ata_tf_to_host(ap, &qc->tf);
  3680. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3681. break;
  3682. case ATA_PROT_ATAPI_NODATA:
  3683. ap->flags |= ATA_FLAG_NOINTR;
  3684. ata_tf_to_host(ap, &qc->tf);
  3685. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3686. break;
  3687. case ATA_PROT_ATAPI_DMA:
  3688. ap->flags |= ATA_FLAG_NOINTR;
  3689. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3690. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3691. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3692. break;
  3693. default:
  3694. WARN_ON(1);
  3695. return AC_ERR_SYSTEM;
  3696. }
  3697. return 0;
  3698. }
  3699. /**
  3700. * ata_host_intr - Handle host interrupt for given (port, task)
  3701. * @ap: Port on which interrupt arrived (possibly...)
  3702. * @qc: Taskfile currently active in engine
  3703. *
  3704. * Handle host interrupt for given queued command. Currently,
  3705. * only DMA interrupts are handled. All other commands are
  3706. * handled via polling with interrupts disabled (nIEN bit).
  3707. *
  3708. * LOCKING:
  3709. * spin_lock_irqsave(host_set lock)
  3710. *
  3711. * RETURNS:
  3712. * One if interrupt was handled, zero if not (shared irq).
  3713. */
  3714. inline unsigned int ata_host_intr (struct ata_port *ap,
  3715. struct ata_queued_cmd *qc)
  3716. {
  3717. u8 status, host_stat;
  3718. switch (qc->tf.protocol) {
  3719. case ATA_PROT_DMA:
  3720. case ATA_PROT_ATAPI_DMA:
  3721. case ATA_PROT_ATAPI:
  3722. /* check status of DMA engine */
  3723. host_stat = ap->ops->bmdma_status(ap);
  3724. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3725. /* if it's not our irq... */
  3726. if (!(host_stat & ATA_DMA_INTR))
  3727. goto idle_irq;
  3728. /* before we do anything else, clear DMA-Start bit */
  3729. ap->ops->bmdma_stop(qc);
  3730. /* fall through */
  3731. case ATA_PROT_ATAPI_NODATA:
  3732. case ATA_PROT_NODATA:
  3733. /* check altstatus */
  3734. status = ata_altstatus(ap);
  3735. if (status & ATA_BUSY)
  3736. goto idle_irq;
  3737. /* check main status, clearing INTRQ */
  3738. status = ata_chk_status(ap);
  3739. if (unlikely(status & ATA_BUSY))
  3740. goto idle_irq;
  3741. DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
  3742. ap->id, qc->tf.protocol, status);
  3743. /* ack bmdma irq events */
  3744. ap->ops->irq_clear(ap);
  3745. /* complete taskfile transaction */
  3746. qc->err_mask |= ac_err_mask(status);
  3747. ata_qc_complete(qc);
  3748. break;
  3749. default:
  3750. goto idle_irq;
  3751. }
  3752. return 1; /* irq handled */
  3753. idle_irq:
  3754. ap->stats.idle_irq++;
  3755. #ifdef ATA_IRQ_TRAP
  3756. if ((ap->stats.idle_irq % 1000) == 0) {
  3757. ata_irq_ack(ap, 0); /* debug trap */
  3758. printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
  3759. return 1;
  3760. }
  3761. #endif
  3762. return 0; /* irq not handled */
  3763. }
  3764. /**
  3765. * ata_interrupt - Default ATA host interrupt handler
  3766. * @irq: irq line (unused)
  3767. * @dev_instance: pointer to our ata_host_set information structure
  3768. * @regs: unused
  3769. *
  3770. * Default interrupt handler for PCI IDE devices. Calls
  3771. * ata_host_intr() for each port that is not disabled.
  3772. *
  3773. * LOCKING:
  3774. * Obtains host_set lock during operation.
  3775. *
  3776. * RETURNS:
  3777. * IRQ_NONE or IRQ_HANDLED.
  3778. */
  3779. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  3780. {
  3781. struct ata_host_set *host_set = dev_instance;
  3782. unsigned int i;
  3783. unsigned int handled = 0;
  3784. unsigned long flags;
  3785. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  3786. spin_lock_irqsave(&host_set->lock, flags);
  3787. for (i = 0; i < host_set->n_ports; i++) {
  3788. struct ata_port *ap;
  3789. ap = host_set->ports[i];
  3790. if (ap &&
  3791. !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
  3792. struct ata_queued_cmd *qc;
  3793. qc = ata_qc_from_tag(ap, ap->active_tag);
  3794. if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
  3795. (qc->flags & ATA_QCFLAG_ACTIVE))
  3796. handled |= ata_host_intr(ap, qc);
  3797. }
  3798. }
  3799. spin_unlock_irqrestore(&host_set->lock, flags);
  3800. return IRQ_RETVAL(handled);
  3801. }
  3802. /*
  3803. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  3804. * without filling any other registers
  3805. */
  3806. static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
  3807. u8 cmd)
  3808. {
  3809. struct ata_taskfile tf;
  3810. int err;
  3811. ata_tf_init(ap, &tf, dev->devno);
  3812. tf.command = cmd;
  3813. tf.flags |= ATA_TFLAG_DEVICE;
  3814. tf.protocol = ATA_PROT_NODATA;
  3815. err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
  3816. if (err)
  3817. printk(KERN_ERR "%s: ata command failed: %d\n",
  3818. __FUNCTION__, err);
  3819. return err;
  3820. }
  3821. static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
  3822. {
  3823. u8 cmd;
  3824. if (!ata_try_flush_cache(dev))
  3825. return 0;
  3826. if (ata_id_has_flush_ext(dev->id))
  3827. cmd = ATA_CMD_FLUSH_EXT;
  3828. else
  3829. cmd = ATA_CMD_FLUSH;
  3830. return ata_do_simple_cmd(ap, dev, cmd);
  3831. }
  3832. static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
  3833. {
  3834. return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
  3835. }
  3836. static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
  3837. {
  3838. return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
  3839. }
  3840. /**
  3841. * ata_device_resume - wakeup a previously suspended devices
  3842. * @ap: port the device is connected to
  3843. * @dev: the device to resume
  3844. *
  3845. * Kick the drive back into action, by sending it an idle immediate
  3846. * command and making sure its transfer mode matches between drive
  3847. * and host.
  3848. *
  3849. */
  3850. int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
  3851. {
  3852. if (ap->flags & ATA_FLAG_SUSPENDED) {
  3853. struct ata_device *failed_dev;
  3854. ap->flags &= ~ATA_FLAG_SUSPENDED;
  3855. while (ata_set_mode(ap, &failed_dev))
  3856. ata_dev_disable(ap, failed_dev);
  3857. }
  3858. if (!ata_dev_enabled(dev))
  3859. return 0;
  3860. if (dev->class == ATA_DEV_ATA)
  3861. ata_start_drive(ap, dev);
  3862. return 0;
  3863. }
  3864. /**
  3865. * ata_device_suspend - prepare a device for suspend
  3866. * @ap: port the device is connected to
  3867. * @dev: the device to suspend
  3868. *
  3869. * Flush the cache on the drive, if appropriate, then issue a
  3870. * standbynow command.
  3871. */
  3872. int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
  3873. {
  3874. if (!ata_dev_enabled(dev))
  3875. return 0;
  3876. if (dev->class == ATA_DEV_ATA)
  3877. ata_flush_cache(ap, dev);
  3878. if (state.event != PM_EVENT_FREEZE)
  3879. ata_standby_drive(ap, dev);
  3880. ap->flags |= ATA_FLAG_SUSPENDED;
  3881. return 0;
  3882. }
  3883. /**
  3884. * ata_port_start - Set port up for dma.
  3885. * @ap: Port to initialize
  3886. *
  3887. * Called just after data structures for each port are
  3888. * initialized. Allocates space for PRD table.
  3889. *
  3890. * May be used as the port_start() entry in ata_port_operations.
  3891. *
  3892. * LOCKING:
  3893. * Inherited from caller.
  3894. */
  3895. int ata_port_start (struct ata_port *ap)
  3896. {
  3897. struct device *dev = ap->dev;
  3898. int rc;
  3899. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  3900. if (!ap->prd)
  3901. return -ENOMEM;
  3902. rc = ata_pad_alloc(ap, dev);
  3903. if (rc) {
  3904. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3905. return rc;
  3906. }
  3907. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  3908. return 0;
  3909. }
  3910. /**
  3911. * ata_port_stop - Undo ata_port_start()
  3912. * @ap: Port to shut down
  3913. *
  3914. * Frees the PRD table.
  3915. *
  3916. * May be used as the port_stop() entry in ata_port_operations.
  3917. *
  3918. * LOCKING:
  3919. * Inherited from caller.
  3920. */
  3921. void ata_port_stop (struct ata_port *ap)
  3922. {
  3923. struct device *dev = ap->dev;
  3924. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3925. ata_pad_free(ap, dev);
  3926. }
  3927. void ata_host_stop (struct ata_host_set *host_set)
  3928. {
  3929. if (host_set->mmio_base)
  3930. iounmap(host_set->mmio_base);
  3931. }
  3932. /**
  3933. * ata_host_remove - Unregister SCSI host structure with upper layers
  3934. * @ap: Port to unregister
  3935. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  3936. *
  3937. * LOCKING:
  3938. * Inherited from caller.
  3939. */
  3940. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  3941. {
  3942. struct Scsi_Host *sh = ap->host;
  3943. DPRINTK("ENTER\n");
  3944. if (do_unregister)
  3945. scsi_remove_host(sh);
  3946. ap->ops->port_stop(ap);
  3947. }
  3948. /**
  3949. * ata_host_init - Initialize an ata_port structure
  3950. * @ap: Structure to initialize
  3951. * @host: associated SCSI mid-layer structure
  3952. * @host_set: Collection of hosts to which @ap belongs
  3953. * @ent: Probe information provided by low-level driver
  3954. * @port_no: Port number associated with this ata_port
  3955. *
  3956. * Initialize a new ata_port structure, and its associated
  3957. * scsi_host.
  3958. *
  3959. * LOCKING:
  3960. * Inherited from caller.
  3961. */
  3962. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  3963. struct ata_host_set *host_set,
  3964. const struct ata_probe_ent *ent, unsigned int port_no)
  3965. {
  3966. unsigned int i;
  3967. host->max_id = 16;
  3968. host->max_lun = 1;
  3969. host->max_channel = 1;
  3970. host->unique_id = ata_unique_id++;
  3971. host->max_cmd_len = 12;
  3972. ap->flags = ATA_FLAG_DISABLED;
  3973. ap->id = host->unique_id;
  3974. ap->host = host;
  3975. ap->ctl = ATA_DEVCTL_OBS;
  3976. ap->host_set = host_set;
  3977. ap->dev = ent->dev;
  3978. ap->port_no = port_no;
  3979. ap->hard_port_no =
  3980. ent->legacy_mode ? ent->hard_port_no : port_no;
  3981. ap->pio_mask = ent->pio_mask;
  3982. ap->mwdma_mask = ent->mwdma_mask;
  3983. ap->udma_mask = ent->udma_mask;
  3984. ap->flags |= ent->host_flags;
  3985. ap->ops = ent->port_ops;
  3986. ap->cbl = ATA_CBL_NONE;
  3987. ap->sata_spd_limit = UINT_MAX;
  3988. ap->active_tag = ATA_TAG_POISON;
  3989. ap->last_ctl = 0xFF;
  3990. INIT_WORK(&ap->port_task, NULL, NULL);
  3991. INIT_LIST_HEAD(&ap->eh_done_q);
  3992. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  3993. struct ata_device *dev = &ap->device[i];
  3994. dev->devno = i;
  3995. dev->pio_mask = UINT_MAX;
  3996. dev->mwdma_mask = UINT_MAX;
  3997. dev->udma_mask = UINT_MAX;
  3998. }
  3999. #ifdef ATA_IRQ_TRAP
  4000. ap->stats.unhandled_irq = 1;
  4001. ap->stats.idle_irq = 1;
  4002. #endif
  4003. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4004. }
  4005. /**
  4006. * ata_host_add - Attach low-level ATA driver to system
  4007. * @ent: Information provided by low-level driver
  4008. * @host_set: Collections of ports to which we add
  4009. * @port_no: Port number associated with this host
  4010. *
  4011. * Attach low-level ATA driver to system.
  4012. *
  4013. * LOCKING:
  4014. * PCI/etc. bus probe sem.
  4015. *
  4016. * RETURNS:
  4017. * New ata_port on success, for NULL on error.
  4018. */
  4019. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4020. struct ata_host_set *host_set,
  4021. unsigned int port_no)
  4022. {
  4023. struct Scsi_Host *host;
  4024. struct ata_port *ap;
  4025. int rc;
  4026. DPRINTK("ENTER\n");
  4027. if (!ent->port_ops->probe_reset &&
  4028. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4029. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4030. port_no);
  4031. return NULL;
  4032. }
  4033. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4034. if (!host)
  4035. return NULL;
  4036. host->transportt = &ata_scsi_transport_template;
  4037. ap = (struct ata_port *) &host->hostdata[0];
  4038. ata_host_init(ap, host, host_set, ent, port_no);
  4039. rc = ap->ops->port_start(ap);
  4040. if (rc)
  4041. goto err_out;
  4042. return ap;
  4043. err_out:
  4044. scsi_host_put(host);
  4045. return NULL;
  4046. }
  4047. /**
  4048. * ata_device_add - Register hardware device with ATA and SCSI layers
  4049. * @ent: Probe information describing hardware device to be registered
  4050. *
  4051. * This function processes the information provided in the probe
  4052. * information struct @ent, allocates the necessary ATA and SCSI
  4053. * host information structures, initializes them, and registers
  4054. * everything with requisite kernel subsystems.
  4055. *
  4056. * This function requests irqs, probes the ATA bus, and probes
  4057. * the SCSI bus.
  4058. *
  4059. * LOCKING:
  4060. * PCI/etc. bus probe sem.
  4061. *
  4062. * RETURNS:
  4063. * Number of ports registered. Zero on error (no ports registered).
  4064. */
  4065. int ata_device_add(const struct ata_probe_ent *ent)
  4066. {
  4067. unsigned int count = 0, i;
  4068. struct device *dev = ent->dev;
  4069. struct ata_host_set *host_set;
  4070. DPRINTK("ENTER\n");
  4071. /* alloc a container for our list of ATA ports (buses) */
  4072. host_set = kzalloc(sizeof(struct ata_host_set) +
  4073. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4074. if (!host_set)
  4075. return 0;
  4076. spin_lock_init(&host_set->lock);
  4077. host_set->dev = dev;
  4078. host_set->n_ports = ent->n_ports;
  4079. host_set->irq = ent->irq;
  4080. host_set->mmio_base = ent->mmio_base;
  4081. host_set->private_data = ent->private_data;
  4082. host_set->ops = ent->port_ops;
  4083. host_set->flags = ent->host_set_flags;
  4084. /* register each port bound to this device */
  4085. for (i = 0; i < ent->n_ports; i++) {
  4086. struct ata_port *ap;
  4087. unsigned long xfer_mode_mask;
  4088. ap = ata_host_add(ent, host_set, i);
  4089. if (!ap)
  4090. goto err_out;
  4091. host_set->ports[i] = ap;
  4092. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4093. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4094. (ap->pio_mask << ATA_SHIFT_PIO);
  4095. /* print per-port info to dmesg */
  4096. printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
  4097. "bmdma 0x%lX irq %lu\n",
  4098. ap->id,
  4099. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4100. ata_mode_string(xfer_mode_mask),
  4101. ap->ioaddr.cmd_addr,
  4102. ap->ioaddr.ctl_addr,
  4103. ap->ioaddr.bmdma_addr,
  4104. ent->irq);
  4105. ata_chk_status(ap);
  4106. host_set->ops->irq_clear(ap);
  4107. count++;
  4108. }
  4109. if (!count)
  4110. goto err_free_ret;
  4111. /* obtain irq, that is shared between channels */
  4112. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4113. DRV_NAME, host_set))
  4114. goto err_out;
  4115. /* perform each probe synchronously */
  4116. DPRINTK("probe begin\n");
  4117. for (i = 0; i < count; i++) {
  4118. struct ata_port *ap;
  4119. int rc;
  4120. ap = host_set->ports[i];
  4121. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4122. rc = ata_bus_probe(ap);
  4123. DPRINTK("ata%u: bus probe end\n", ap->id);
  4124. if (rc) {
  4125. /* FIXME: do something useful here?
  4126. * Current libata behavior will
  4127. * tear down everything when
  4128. * the module is removed
  4129. * or the h/w is unplugged.
  4130. */
  4131. }
  4132. rc = scsi_add_host(ap->host, dev);
  4133. if (rc) {
  4134. printk(KERN_ERR "ata%u: scsi_add_host failed\n",
  4135. ap->id);
  4136. /* FIXME: do something useful here */
  4137. /* FIXME: handle unconditional calls to
  4138. * scsi_scan_host and ata_host_remove, below,
  4139. * at the very least
  4140. */
  4141. }
  4142. }
  4143. /* probes are done, now scan each port's disk(s) */
  4144. DPRINTK("host probe begin\n");
  4145. for (i = 0; i < count; i++) {
  4146. struct ata_port *ap = host_set->ports[i];
  4147. ata_scsi_scan_host(ap);
  4148. }
  4149. dev_set_drvdata(dev, host_set);
  4150. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4151. return ent->n_ports; /* success */
  4152. err_out:
  4153. for (i = 0; i < count; i++) {
  4154. ata_host_remove(host_set->ports[i], 1);
  4155. scsi_host_put(host_set->ports[i]->host);
  4156. }
  4157. err_free_ret:
  4158. kfree(host_set);
  4159. VPRINTK("EXIT, returning 0\n");
  4160. return 0;
  4161. }
  4162. /**
  4163. * ata_host_set_remove - PCI layer callback for device removal
  4164. * @host_set: ATA host set that was removed
  4165. *
  4166. * Unregister all objects associated with this host set. Free those
  4167. * objects.
  4168. *
  4169. * LOCKING:
  4170. * Inherited from calling layer (may sleep).
  4171. */
  4172. void ata_host_set_remove(struct ata_host_set *host_set)
  4173. {
  4174. struct ata_port *ap;
  4175. unsigned int i;
  4176. for (i = 0; i < host_set->n_ports; i++) {
  4177. ap = host_set->ports[i];
  4178. scsi_remove_host(ap->host);
  4179. }
  4180. free_irq(host_set->irq, host_set);
  4181. for (i = 0; i < host_set->n_ports; i++) {
  4182. ap = host_set->ports[i];
  4183. ata_scsi_release(ap->host);
  4184. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4185. struct ata_ioports *ioaddr = &ap->ioaddr;
  4186. if (ioaddr->cmd_addr == 0x1f0)
  4187. release_region(0x1f0, 8);
  4188. else if (ioaddr->cmd_addr == 0x170)
  4189. release_region(0x170, 8);
  4190. }
  4191. scsi_host_put(ap->host);
  4192. }
  4193. if (host_set->ops->host_stop)
  4194. host_set->ops->host_stop(host_set);
  4195. kfree(host_set);
  4196. }
  4197. /**
  4198. * ata_scsi_release - SCSI layer callback hook for host unload
  4199. * @host: libata host to be unloaded
  4200. *
  4201. * Performs all duties necessary to shut down a libata port...
  4202. * Kill port kthread, disable port, and release resources.
  4203. *
  4204. * LOCKING:
  4205. * Inherited from SCSI layer.
  4206. *
  4207. * RETURNS:
  4208. * One.
  4209. */
  4210. int ata_scsi_release(struct Scsi_Host *host)
  4211. {
  4212. struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
  4213. int i;
  4214. DPRINTK("ENTER\n");
  4215. ap->ops->port_disable(ap);
  4216. ata_host_remove(ap, 0);
  4217. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4218. kfree(ap->device[i].id);
  4219. DPRINTK("EXIT\n");
  4220. return 1;
  4221. }
  4222. /**
  4223. * ata_std_ports - initialize ioaddr with standard port offsets.
  4224. * @ioaddr: IO address structure to be initialized
  4225. *
  4226. * Utility function which initializes data_addr, error_addr,
  4227. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4228. * device_addr, status_addr, and command_addr to standard offsets
  4229. * relative to cmd_addr.
  4230. *
  4231. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4232. */
  4233. void ata_std_ports(struct ata_ioports *ioaddr)
  4234. {
  4235. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4236. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4237. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4238. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4239. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4240. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4241. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4242. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4243. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4244. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4245. }
  4246. #ifdef CONFIG_PCI
  4247. void ata_pci_host_stop (struct ata_host_set *host_set)
  4248. {
  4249. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4250. pci_iounmap(pdev, host_set->mmio_base);
  4251. }
  4252. /**
  4253. * ata_pci_remove_one - PCI layer callback for device removal
  4254. * @pdev: PCI device that was removed
  4255. *
  4256. * PCI layer indicates to libata via this hook that
  4257. * hot-unplug or module unload event has occurred.
  4258. * Handle this by unregistering all objects associated
  4259. * with this PCI device. Free those objects. Then finally
  4260. * release PCI resources and disable device.
  4261. *
  4262. * LOCKING:
  4263. * Inherited from PCI layer (may sleep).
  4264. */
  4265. void ata_pci_remove_one (struct pci_dev *pdev)
  4266. {
  4267. struct device *dev = pci_dev_to_dev(pdev);
  4268. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4269. ata_host_set_remove(host_set);
  4270. pci_release_regions(pdev);
  4271. pci_disable_device(pdev);
  4272. dev_set_drvdata(dev, NULL);
  4273. }
  4274. /* move to PCI subsystem */
  4275. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4276. {
  4277. unsigned long tmp = 0;
  4278. switch (bits->width) {
  4279. case 1: {
  4280. u8 tmp8 = 0;
  4281. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4282. tmp = tmp8;
  4283. break;
  4284. }
  4285. case 2: {
  4286. u16 tmp16 = 0;
  4287. pci_read_config_word(pdev, bits->reg, &tmp16);
  4288. tmp = tmp16;
  4289. break;
  4290. }
  4291. case 4: {
  4292. u32 tmp32 = 0;
  4293. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4294. tmp = tmp32;
  4295. break;
  4296. }
  4297. default:
  4298. return -EINVAL;
  4299. }
  4300. tmp &= bits->mask;
  4301. return (tmp == bits->val) ? 1 : 0;
  4302. }
  4303. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4304. {
  4305. pci_save_state(pdev);
  4306. pci_disable_device(pdev);
  4307. pci_set_power_state(pdev, PCI_D3hot);
  4308. return 0;
  4309. }
  4310. int ata_pci_device_resume(struct pci_dev *pdev)
  4311. {
  4312. pci_set_power_state(pdev, PCI_D0);
  4313. pci_restore_state(pdev);
  4314. pci_enable_device(pdev);
  4315. pci_set_master(pdev);
  4316. return 0;
  4317. }
  4318. #endif /* CONFIG_PCI */
  4319. static int __init ata_init(void)
  4320. {
  4321. ata_wq = create_workqueue("ata");
  4322. if (!ata_wq)
  4323. return -ENOMEM;
  4324. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4325. return 0;
  4326. }
  4327. static void __exit ata_exit(void)
  4328. {
  4329. destroy_workqueue(ata_wq);
  4330. }
  4331. module_init(ata_init);
  4332. module_exit(ata_exit);
  4333. static unsigned long ratelimit_time;
  4334. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4335. int ata_ratelimit(void)
  4336. {
  4337. int rc;
  4338. unsigned long flags;
  4339. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4340. if (time_after(jiffies, ratelimit_time)) {
  4341. rc = 1;
  4342. ratelimit_time = jiffies + (HZ/5);
  4343. } else
  4344. rc = 0;
  4345. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4346. return rc;
  4347. }
  4348. /*
  4349. * libata is essentially a library of internal helper functions for
  4350. * low-level ATA host controller drivers. As such, the API/ABI is
  4351. * likely to change as new drivers are added and updated.
  4352. * Do not depend on ABI/API stability.
  4353. */
  4354. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4355. EXPORT_SYMBOL_GPL(ata_std_ports);
  4356. EXPORT_SYMBOL_GPL(ata_device_add);
  4357. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4358. EXPORT_SYMBOL_GPL(ata_sg_init);
  4359. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4360. EXPORT_SYMBOL_GPL(__ata_qc_complete);
  4361. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4362. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4363. EXPORT_SYMBOL_GPL(ata_tf_load);
  4364. EXPORT_SYMBOL_GPL(ata_tf_read);
  4365. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4366. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4367. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4368. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4369. EXPORT_SYMBOL_GPL(ata_check_status);
  4370. EXPORT_SYMBOL_GPL(ata_altstatus);
  4371. EXPORT_SYMBOL_GPL(ata_exec_command);
  4372. EXPORT_SYMBOL_GPL(ata_port_start);
  4373. EXPORT_SYMBOL_GPL(ata_port_stop);
  4374. EXPORT_SYMBOL_GPL(ata_host_stop);
  4375. EXPORT_SYMBOL_GPL(ata_interrupt);
  4376. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4377. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4378. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4379. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4380. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4381. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4382. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4383. EXPORT_SYMBOL_GPL(ata_port_probe);
  4384. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4385. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4386. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4387. EXPORT_SYMBOL_GPL(ata_std_probeinit);
  4388. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4389. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4390. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4391. EXPORT_SYMBOL_GPL(ata_std_probe_reset);
  4392. EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
  4393. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4394. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4395. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4396. EXPORT_SYMBOL_GPL(ata_port_disable);
  4397. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4398. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4399. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4400. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4401. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4402. EXPORT_SYMBOL_GPL(ata_scsi_error);
  4403. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4404. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4405. EXPORT_SYMBOL_GPL(ata_host_intr);
  4406. EXPORT_SYMBOL_GPL(ata_id_string);
  4407. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4408. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4409. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4410. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  4411. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4412. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4413. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4414. #ifdef CONFIG_PCI
  4415. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4416. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4417. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4418. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4419. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4420. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4421. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4422. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4423. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4424. #endif /* CONFIG_PCI */
  4425. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4426. EXPORT_SYMBOL_GPL(ata_device_resume);
  4427. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4428. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);