i2s.c 25 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassi.brar@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #include <sound/soc.h>
  19. #include <sound/pcm_params.h>
  20. #include <plat/audio.h>
  21. #include "dma.h"
  22. #include "idma.h"
  23. #include "i2s.h"
  24. #include "i2s-regs.h"
  25. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  26. struct i2s_dai {
  27. /* Platform device for this DAI */
  28. struct platform_device *pdev;
  29. /* IOREMAP'd SFRs */
  30. void __iomem *addr;
  31. /* Physical base address of SFRs */
  32. u32 base;
  33. /* Rate of RCLK source clock */
  34. unsigned long rclk_srcrate;
  35. /* Frame Clock */
  36. unsigned frmclk;
  37. /*
  38. * Specifically requested RCLK,BCLK by MACHINE Driver.
  39. * 0 indicates CPU driver is free to choose any value.
  40. */
  41. unsigned rfs, bfs;
  42. /* I2S Controller's core clock */
  43. struct clk *clk;
  44. /* Clock for generating I2S signals */
  45. struct clk *op_clk;
  46. /* Array of clock names for op_clk */
  47. const char **src_clk;
  48. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  49. struct i2s_dai *pri_dai;
  50. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  51. struct i2s_dai *sec_dai;
  52. #define DAI_OPENED (1 << 0) /* Dai is opened */
  53. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  54. unsigned mode;
  55. /* Driver for this DAI */
  56. struct snd_soc_dai_driver i2s_dai_drv;
  57. /* DMA parameters */
  58. struct s3c_dma_params dma_playback;
  59. struct s3c_dma_params dma_capture;
  60. struct s3c_dma_params idma_playback;
  61. u32 quirks;
  62. u32 suspend_i2smod;
  63. u32 suspend_i2scon;
  64. u32 suspend_i2spsr;
  65. };
  66. /* Lock for cross i/f checks */
  67. static DEFINE_SPINLOCK(lock);
  68. /* If this is the 'overlay' stereo DAI */
  69. static inline bool is_secondary(struct i2s_dai *i2s)
  70. {
  71. return i2s->pri_dai ? true : false;
  72. }
  73. /* If operating in SoC-Slave mode */
  74. static inline bool is_slave(struct i2s_dai *i2s)
  75. {
  76. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  77. }
  78. /* If this interface of the controller is transmitting data */
  79. static inline bool tx_active(struct i2s_dai *i2s)
  80. {
  81. u32 active;
  82. if (!i2s)
  83. return false;
  84. active = readl(i2s->addr + I2SCON);
  85. if (is_secondary(i2s))
  86. active &= CON_TXSDMA_ACTIVE;
  87. else
  88. active &= CON_TXDMA_ACTIVE;
  89. return active ? true : false;
  90. }
  91. /* If the other interface of the controller is transmitting data */
  92. static inline bool other_tx_active(struct i2s_dai *i2s)
  93. {
  94. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  95. return tx_active(other);
  96. }
  97. /* If any interface of the controller is transmitting data */
  98. static inline bool any_tx_active(struct i2s_dai *i2s)
  99. {
  100. return tx_active(i2s) || other_tx_active(i2s);
  101. }
  102. /* If this interface of the controller is receiving data */
  103. static inline bool rx_active(struct i2s_dai *i2s)
  104. {
  105. u32 active;
  106. if (!i2s)
  107. return false;
  108. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  109. return active ? true : false;
  110. }
  111. /* If the other interface of the controller is receiving data */
  112. static inline bool other_rx_active(struct i2s_dai *i2s)
  113. {
  114. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  115. return rx_active(other);
  116. }
  117. /* If any interface of the controller is receiving data */
  118. static inline bool any_rx_active(struct i2s_dai *i2s)
  119. {
  120. return rx_active(i2s) || other_rx_active(i2s);
  121. }
  122. /* If the other DAI is transmitting or receiving data */
  123. static inline bool other_active(struct i2s_dai *i2s)
  124. {
  125. return other_rx_active(i2s) || other_tx_active(i2s);
  126. }
  127. /* If this DAI is transmitting or receiving data */
  128. static inline bool this_active(struct i2s_dai *i2s)
  129. {
  130. return tx_active(i2s) || rx_active(i2s);
  131. }
  132. /* If the controller is active anyway */
  133. static inline bool any_active(struct i2s_dai *i2s)
  134. {
  135. return this_active(i2s) || other_active(i2s);
  136. }
  137. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  138. {
  139. return snd_soc_dai_get_drvdata(dai);
  140. }
  141. static inline bool is_opened(struct i2s_dai *i2s)
  142. {
  143. if (i2s && (i2s->mode & DAI_OPENED))
  144. return true;
  145. else
  146. return false;
  147. }
  148. static inline bool is_manager(struct i2s_dai *i2s)
  149. {
  150. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  151. return true;
  152. else
  153. return false;
  154. }
  155. /* Read RCLK of I2S (in multiples of LRCLK) */
  156. static inline unsigned get_rfs(struct i2s_dai *i2s)
  157. {
  158. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  159. switch (rfs) {
  160. case 3: return 768;
  161. case 2: return 384;
  162. case 1: return 512;
  163. default: return 256;
  164. }
  165. }
  166. /* Write RCLK of I2S (in multiples of LRCLK) */
  167. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  168. {
  169. u32 mod = readl(i2s->addr + I2SMOD);
  170. mod &= ~MOD_RCLK_MASK;
  171. switch (rfs) {
  172. case 768:
  173. mod |= MOD_RCLK_768FS;
  174. break;
  175. case 512:
  176. mod |= MOD_RCLK_512FS;
  177. break;
  178. case 384:
  179. mod |= MOD_RCLK_384FS;
  180. break;
  181. default:
  182. mod |= MOD_RCLK_256FS;
  183. break;
  184. }
  185. writel(mod, i2s->addr + I2SMOD);
  186. }
  187. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  188. static inline unsigned get_bfs(struct i2s_dai *i2s)
  189. {
  190. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  191. switch (bfs) {
  192. case 3: return 24;
  193. case 2: return 16;
  194. case 1: return 48;
  195. default: return 32;
  196. }
  197. }
  198. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  199. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  200. {
  201. u32 mod = readl(i2s->addr + I2SMOD);
  202. mod &= ~MOD_BCLK_MASK;
  203. switch (bfs) {
  204. case 48:
  205. mod |= MOD_BCLK_48FS;
  206. break;
  207. case 32:
  208. mod |= MOD_BCLK_32FS;
  209. break;
  210. case 24:
  211. mod |= MOD_BCLK_24FS;
  212. break;
  213. case 16:
  214. mod |= MOD_BCLK_16FS;
  215. break;
  216. default:
  217. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  218. return;
  219. }
  220. writel(mod, i2s->addr + I2SMOD);
  221. }
  222. /* Sample-Size */
  223. static inline int get_blc(struct i2s_dai *i2s)
  224. {
  225. int blc = readl(i2s->addr + I2SMOD);
  226. blc = (blc >> 13) & 0x3;
  227. switch (blc) {
  228. case 2: return 24;
  229. case 1: return 8;
  230. default: return 16;
  231. }
  232. }
  233. /* TX Channel Control */
  234. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  235. {
  236. void __iomem *addr = i2s->addr;
  237. u32 con = readl(addr + I2SCON);
  238. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  239. if (on) {
  240. con |= CON_ACTIVE;
  241. con &= ~CON_TXCH_PAUSE;
  242. if (is_secondary(i2s)) {
  243. con |= CON_TXSDMA_ACTIVE;
  244. con &= ~CON_TXSDMA_PAUSE;
  245. } else {
  246. con |= CON_TXDMA_ACTIVE;
  247. con &= ~CON_TXDMA_PAUSE;
  248. }
  249. if (any_rx_active(i2s))
  250. mod |= MOD_TXRX;
  251. else
  252. mod |= MOD_TXONLY;
  253. } else {
  254. if (is_secondary(i2s)) {
  255. con |= CON_TXSDMA_PAUSE;
  256. con &= ~CON_TXSDMA_ACTIVE;
  257. } else {
  258. con |= CON_TXDMA_PAUSE;
  259. con &= ~CON_TXDMA_ACTIVE;
  260. }
  261. if (other_tx_active(i2s)) {
  262. writel(con, addr + I2SCON);
  263. return;
  264. }
  265. con |= CON_TXCH_PAUSE;
  266. if (any_rx_active(i2s))
  267. mod |= MOD_RXONLY;
  268. else
  269. con &= ~CON_ACTIVE;
  270. }
  271. writel(mod, addr + I2SMOD);
  272. writel(con, addr + I2SCON);
  273. }
  274. /* RX Channel Control */
  275. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  276. {
  277. void __iomem *addr = i2s->addr;
  278. u32 con = readl(addr + I2SCON);
  279. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  280. if (on) {
  281. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  282. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  283. if (any_tx_active(i2s))
  284. mod |= MOD_TXRX;
  285. else
  286. mod |= MOD_RXONLY;
  287. } else {
  288. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  289. con &= ~CON_RXDMA_ACTIVE;
  290. if (any_tx_active(i2s))
  291. mod |= MOD_TXONLY;
  292. else
  293. con &= ~CON_ACTIVE;
  294. }
  295. writel(mod, addr + I2SMOD);
  296. writel(con, addr + I2SCON);
  297. }
  298. /* Flush FIFO of an interface */
  299. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  300. {
  301. void __iomem *fic;
  302. u32 val;
  303. if (!i2s)
  304. return;
  305. if (is_secondary(i2s))
  306. fic = i2s->addr + I2SFICS;
  307. else
  308. fic = i2s->addr + I2SFIC;
  309. /* Flush the FIFO */
  310. writel(readl(fic) | flush, fic);
  311. /* Be patient */
  312. val = msecs_to_loops(1) / 1000; /* 1 usec */
  313. while (--val)
  314. cpu_relax();
  315. writel(readl(fic) & ~flush, fic);
  316. }
  317. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  318. int clk_id, unsigned int rfs, int dir)
  319. {
  320. struct i2s_dai *i2s = to_info(dai);
  321. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  322. u32 mod = readl(i2s->addr + I2SMOD);
  323. switch (clk_id) {
  324. case SAMSUNG_I2S_CDCLK:
  325. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  326. if (dir == SND_SOC_CLOCK_IN)
  327. rfs = 0;
  328. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  329. (any_active(i2s) &&
  330. (((dir == SND_SOC_CLOCK_IN)
  331. && !(mod & MOD_CDCLKCON)) ||
  332. ((dir == SND_SOC_CLOCK_OUT)
  333. && (mod & MOD_CDCLKCON))))) {
  334. dev_err(&i2s->pdev->dev,
  335. "%s:%d Other DAI busy\n", __func__, __LINE__);
  336. return -EAGAIN;
  337. }
  338. if (dir == SND_SOC_CLOCK_IN)
  339. mod |= MOD_CDCLKCON;
  340. else
  341. mod &= ~MOD_CDCLKCON;
  342. i2s->rfs = rfs;
  343. break;
  344. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  345. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  346. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  347. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  348. clk_id = 0;
  349. else
  350. clk_id = 1;
  351. if (!any_active(i2s)) {
  352. if (i2s->op_clk) {
  353. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  354. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  355. clk_disable(i2s->op_clk);
  356. clk_put(i2s->op_clk);
  357. } else {
  358. i2s->rclk_srcrate =
  359. clk_get_rate(i2s->op_clk);
  360. return 0;
  361. }
  362. }
  363. i2s->op_clk = clk_get(&i2s->pdev->dev,
  364. i2s->src_clk[clk_id]);
  365. clk_enable(i2s->op_clk);
  366. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  367. /* Over-ride the other's */
  368. if (other) {
  369. other->op_clk = i2s->op_clk;
  370. other->rclk_srcrate = i2s->rclk_srcrate;
  371. }
  372. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  373. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  374. dev_err(&i2s->pdev->dev,
  375. "%s:%d Other DAI busy\n", __func__, __LINE__);
  376. return -EAGAIN;
  377. } else {
  378. /* Call can't be on the active DAI */
  379. i2s->op_clk = other->op_clk;
  380. i2s->rclk_srcrate = other->rclk_srcrate;
  381. return 0;
  382. }
  383. if (clk_id == 0)
  384. mod &= ~MOD_IMS_SYSMUX;
  385. else
  386. mod |= MOD_IMS_SYSMUX;
  387. break;
  388. default:
  389. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  390. return -EINVAL;
  391. }
  392. writel(mod, i2s->addr + I2SMOD);
  393. return 0;
  394. }
  395. static int i2s_set_fmt(struct snd_soc_dai *dai,
  396. unsigned int fmt)
  397. {
  398. struct i2s_dai *i2s = to_info(dai);
  399. u32 mod = readl(i2s->addr + I2SMOD);
  400. u32 tmp = 0;
  401. /* Format is priority */
  402. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  403. case SND_SOC_DAIFMT_RIGHT_J:
  404. tmp |= MOD_LR_RLOW;
  405. tmp |= MOD_SDF_MSB;
  406. break;
  407. case SND_SOC_DAIFMT_LEFT_J:
  408. tmp |= MOD_LR_RLOW;
  409. tmp |= MOD_SDF_LSB;
  410. break;
  411. case SND_SOC_DAIFMT_I2S:
  412. tmp |= MOD_SDF_IIS;
  413. break;
  414. default:
  415. dev_err(&i2s->pdev->dev, "Format not supported\n");
  416. return -EINVAL;
  417. }
  418. /*
  419. * INV flag is relative to the FORMAT flag - if set it simply
  420. * flips the polarity specified by the Standard
  421. */
  422. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  423. case SND_SOC_DAIFMT_NB_NF:
  424. break;
  425. case SND_SOC_DAIFMT_NB_IF:
  426. if (tmp & MOD_LR_RLOW)
  427. tmp &= ~MOD_LR_RLOW;
  428. else
  429. tmp |= MOD_LR_RLOW;
  430. break;
  431. default:
  432. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  433. return -EINVAL;
  434. }
  435. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  436. case SND_SOC_DAIFMT_CBM_CFM:
  437. tmp |= MOD_SLAVE;
  438. break;
  439. case SND_SOC_DAIFMT_CBS_CFS:
  440. /* Set default source clock in Master mode */
  441. if (i2s->rclk_srcrate == 0)
  442. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  443. 0, SND_SOC_CLOCK_IN);
  444. break;
  445. default:
  446. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  447. return -EINVAL;
  448. }
  449. if (any_active(i2s) &&
  450. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  451. | MOD_SLAVE)) != tmp)) {
  452. dev_err(&i2s->pdev->dev,
  453. "%s:%d Other DAI busy\n", __func__, __LINE__);
  454. return -EAGAIN;
  455. }
  456. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  457. mod |= tmp;
  458. writel(mod, i2s->addr + I2SMOD);
  459. return 0;
  460. }
  461. static int i2s_hw_params(struct snd_pcm_substream *substream,
  462. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  463. {
  464. struct i2s_dai *i2s = to_info(dai);
  465. u32 mod = readl(i2s->addr + I2SMOD);
  466. if (!is_secondary(i2s))
  467. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  468. switch (params_channels(params)) {
  469. case 6:
  470. mod |= MOD_DC2_EN;
  471. case 4:
  472. mod |= MOD_DC1_EN;
  473. break;
  474. case 2:
  475. break;
  476. default:
  477. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  478. params_channels(params));
  479. return -EINVAL;
  480. }
  481. if (is_secondary(i2s))
  482. mod &= ~MOD_BLCS_MASK;
  483. else
  484. mod &= ~MOD_BLCP_MASK;
  485. if (is_manager(i2s))
  486. mod &= ~MOD_BLC_MASK;
  487. switch (params_format(params)) {
  488. case SNDRV_PCM_FORMAT_S8:
  489. if (is_secondary(i2s))
  490. mod |= MOD_BLCS_8BIT;
  491. else
  492. mod |= MOD_BLCP_8BIT;
  493. if (is_manager(i2s))
  494. mod |= MOD_BLC_8BIT;
  495. break;
  496. case SNDRV_PCM_FORMAT_S16_LE:
  497. if (is_secondary(i2s))
  498. mod |= MOD_BLCS_16BIT;
  499. else
  500. mod |= MOD_BLCP_16BIT;
  501. if (is_manager(i2s))
  502. mod |= MOD_BLC_16BIT;
  503. break;
  504. case SNDRV_PCM_FORMAT_S24_LE:
  505. if (is_secondary(i2s))
  506. mod |= MOD_BLCS_24BIT;
  507. else
  508. mod |= MOD_BLCP_24BIT;
  509. if (is_manager(i2s))
  510. mod |= MOD_BLC_24BIT;
  511. break;
  512. default:
  513. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  514. params_format(params));
  515. return -EINVAL;
  516. }
  517. writel(mod, i2s->addr + I2SMOD);
  518. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  519. snd_soc_dai_set_dma_data(dai, substream,
  520. (void *)&i2s->dma_playback);
  521. else
  522. snd_soc_dai_set_dma_data(dai, substream,
  523. (void *)&i2s->dma_capture);
  524. i2s->frmclk = params_rate(params);
  525. return 0;
  526. }
  527. /* We set constraints on the substream acc to the version of I2S */
  528. static int i2s_startup(struct snd_pcm_substream *substream,
  529. struct snd_soc_dai *dai)
  530. {
  531. struct i2s_dai *i2s = to_info(dai);
  532. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  533. unsigned long flags;
  534. spin_lock_irqsave(&lock, flags);
  535. i2s->mode |= DAI_OPENED;
  536. if (is_manager(other))
  537. i2s->mode &= ~DAI_MANAGER;
  538. else
  539. i2s->mode |= DAI_MANAGER;
  540. /* Enforce set_sysclk in Master mode */
  541. i2s->rclk_srcrate = 0;
  542. spin_unlock_irqrestore(&lock, flags);
  543. return 0;
  544. }
  545. static void i2s_shutdown(struct snd_pcm_substream *substream,
  546. struct snd_soc_dai *dai)
  547. {
  548. struct i2s_dai *i2s = to_info(dai);
  549. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  550. unsigned long flags;
  551. spin_lock_irqsave(&lock, flags);
  552. i2s->mode &= ~DAI_OPENED;
  553. i2s->mode &= ~DAI_MANAGER;
  554. if (is_opened(other))
  555. other->mode |= DAI_MANAGER;
  556. /* Reset any constraint on RFS and BFS */
  557. i2s->rfs = 0;
  558. i2s->bfs = 0;
  559. spin_unlock_irqrestore(&lock, flags);
  560. /* Gate CDCLK by default */
  561. if (!is_opened(other))
  562. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  563. 0, SND_SOC_CLOCK_IN);
  564. }
  565. static int config_setup(struct i2s_dai *i2s)
  566. {
  567. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  568. unsigned rfs, bfs, blc;
  569. u32 psr;
  570. blc = get_blc(i2s);
  571. bfs = i2s->bfs;
  572. if (!bfs && other)
  573. bfs = other->bfs;
  574. /* Select least possible multiple(2) if no constraint set */
  575. if (!bfs)
  576. bfs = blc * 2;
  577. rfs = i2s->rfs;
  578. if (!rfs && other)
  579. rfs = other->rfs;
  580. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  581. dev_err(&i2s->pdev->dev,
  582. "%d-RFS not supported for 24-blc\n", rfs);
  583. return -EINVAL;
  584. }
  585. if (!rfs) {
  586. if (bfs == 16 || bfs == 32)
  587. rfs = 256;
  588. else
  589. rfs = 384;
  590. }
  591. /* If already setup and running */
  592. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  593. dev_err(&i2s->pdev->dev,
  594. "%s:%d Other DAI busy\n", __func__, __LINE__);
  595. return -EAGAIN;
  596. }
  597. /* Don't bother RFS, BFS & PSR in Slave mode */
  598. if (is_slave(i2s))
  599. return 0;
  600. set_bfs(i2s, bfs);
  601. set_rfs(i2s, rfs);
  602. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  603. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  604. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  605. dev_dbg(&i2s->pdev->dev,
  606. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  607. i2s->rclk_srcrate, psr, rfs, bfs);
  608. }
  609. return 0;
  610. }
  611. static int i2s_trigger(struct snd_pcm_substream *substream,
  612. int cmd, struct snd_soc_dai *dai)
  613. {
  614. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  615. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  616. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  617. unsigned long flags;
  618. switch (cmd) {
  619. case SNDRV_PCM_TRIGGER_START:
  620. case SNDRV_PCM_TRIGGER_RESUME:
  621. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  622. local_irq_save(flags);
  623. if (config_setup(i2s)) {
  624. local_irq_restore(flags);
  625. return -EINVAL;
  626. }
  627. if (capture)
  628. i2s_rxctrl(i2s, 1);
  629. else
  630. i2s_txctrl(i2s, 1);
  631. local_irq_restore(flags);
  632. break;
  633. case SNDRV_PCM_TRIGGER_STOP:
  634. case SNDRV_PCM_TRIGGER_SUSPEND:
  635. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  636. local_irq_save(flags);
  637. if (capture) {
  638. i2s_rxctrl(i2s, 0);
  639. i2s_fifo(i2s, FIC_RXFLUSH);
  640. } else {
  641. i2s_txctrl(i2s, 0);
  642. i2s_fifo(i2s, FIC_TXFLUSH);
  643. }
  644. local_irq_restore(flags);
  645. break;
  646. }
  647. return 0;
  648. }
  649. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  650. int div_id, int div)
  651. {
  652. struct i2s_dai *i2s = to_info(dai);
  653. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  654. switch (div_id) {
  655. case SAMSUNG_I2S_DIV_BCLK:
  656. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  657. || (other && other->bfs && (other->bfs != div))) {
  658. dev_err(&i2s->pdev->dev,
  659. "%s:%d Other DAI busy\n", __func__, __LINE__);
  660. return -EAGAIN;
  661. }
  662. i2s->bfs = div;
  663. break;
  664. default:
  665. dev_err(&i2s->pdev->dev,
  666. "Invalid clock divider(%d)\n", div_id);
  667. return -EINVAL;
  668. }
  669. return 0;
  670. }
  671. static snd_pcm_sframes_t
  672. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  673. {
  674. struct i2s_dai *i2s = to_info(dai);
  675. u32 reg = readl(i2s->addr + I2SFIC);
  676. snd_pcm_sframes_t delay;
  677. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  678. delay = FIC_RXCOUNT(reg);
  679. else if (is_secondary(i2s))
  680. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  681. else
  682. delay = FIC_TXCOUNT(reg);
  683. return delay;
  684. }
  685. #ifdef CONFIG_PM
  686. static int i2s_suspend(struct snd_soc_dai *dai)
  687. {
  688. struct i2s_dai *i2s = to_info(dai);
  689. if (dai->active) {
  690. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  691. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  692. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  693. }
  694. return 0;
  695. }
  696. static int i2s_resume(struct snd_soc_dai *dai)
  697. {
  698. struct i2s_dai *i2s = to_info(dai);
  699. if (dai->active) {
  700. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  701. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  702. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  703. }
  704. return 0;
  705. }
  706. #else
  707. #define i2s_suspend NULL
  708. #define i2s_resume NULL
  709. #endif
  710. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  711. {
  712. struct i2s_dai *i2s = to_info(dai);
  713. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  714. if (other && other->clk) /* If this is probe on secondary */
  715. goto probe_exit;
  716. i2s->addr = ioremap(i2s->base, 0x100);
  717. if (i2s->addr == NULL) {
  718. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  719. return -ENXIO;
  720. }
  721. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  722. if (IS_ERR(i2s->clk)) {
  723. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  724. iounmap(i2s->addr);
  725. return -ENOENT;
  726. }
  727. clk_enable(i2s->clk);
  728. if (other) {
  729. other->addr = i2s->addr;
  730. other->clk = i2s->clk;
  731. }
  732. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  733. writel(CON_RSTCLR, i2s->addr + I2SCON);
  734. if (i2s->quirks & QUIRK_SEC_DAI)
  735. idma_reg_addr_init(i2s->addr,
  736. i2s->sec_dai->idma_playback.dma_addr);
  737. probe_exit:
  738. /* Reset any constraint on RFS and BFS */
  739. i2s->rfs = 0;
  740. i2s->bfs = 0;
  741. i2s_txctrl(i2s, 0);
  742. i2s_rxctrl(i2s, 0);
  743. i2s_fifo(i2s, FIC_TXFLUSH);
  744. i2s_fifo(other, FIC_TXFLUSH);
  745. i2s_fifo(i2s, FIC_RXFLUSH);
  746. /* Gate CDCLK by default */
  747. if (!is_opened(other))
  748. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  749. 0, SND_SOC_CLOCK_IN);
  750. return 0;
  751. }
  752. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  753. {
  754. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  755. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  756. if (!other || !other->clk) {
  757. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  758. writel(0, i2s->addr + I2SCON);
  759. clk_disable(i2s->clk);
  760. clk_put(i2s->clk);
  761. iounmap(i2s->addr);
  762. }
  763. i2s->clk = NULL;
  764. return 0;
  765. }
  766. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  767. .trigger = i2s_trigger,
  768. .hw_params = i2s_hw_params,
  769. .set_fmt = i2s_set_fmt,
  770. .set_clkdiv = i2s_set_clkdiv,
  771. .set_sysclk = i2s_set_sysclk,
  772. .startup = i2s_startup,
  773. .shutdown = i2s_shutdown,
  774. .delay = i2s_delay,
  775. };
  776. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  777. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  778. SNDRV_PCM_FMTBIT_S16_LE | \
  779. SNDRV_PCM_FMTBIT_S24_LE)
  780. static __devinit
  781. struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  782. {
  783. struct i2s_dai *i2s;
  784. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  785. if (i2s == NULL)
  786. return NULL;
  787. i2s->pdev = pdev;
  788. i2s->pri_dai = NULL;
  789. i2s->sec_dai = NULL;
  790. i2s->i2s_dai_drv.symmetric_rates = 1;
  791. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  792. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  793. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  794. i2s->i2s_dai_drv.suspend = i2s_suspend;
  795. i2s->i2s_dai_drv.resume = i2s_resume;
  796. i2s->i2s_dai_drv.playback.channels_min = 2;
  797. i2s->i2s_dai_drv.playback.channels_max = 2;
  798. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  799. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  800. if (!sec) {
  801. i2s->i2s_dai_drv.capture.channels_min = 2;
  802. i2s->i2s_dai_drv.capture.channels_max = 2;
  803. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  804. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  805. } else { /* Create a new platform_device for Secondary */
  806. i2s->pdev = platform_device_register_resndata(NULL,
  807. pdev->name, pdev->id + SAMSUNG_I2S_SECOFF,
  808. NULL, 0, NULL, 0);
  809. if (IS_ERR(i2s->pdev))
  810. return NULL;
  811. }
  812. /* Pre-assign snd_soc_dai_set_drvdata */
  813. dev_set_drvdata(&i2s->pdev->dev, i2s);
  814. return i2s;
  815. }
  816. static __devinit int samsung_i2s_probe(struct platform_device *pdev)
  817. {
  818. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  819. struct i2s_dai *pri_dai, *sec_dai = NULL;
  820. struct s3c_audio_pdata *i2s_pdata;
  821. struct samsung_i2s *i2s_cfg;
  822. struct resource *res;
  823. u32 regs_base, quirks;
  824. int ret = 0;
  825. /* Call during Seconday interface registration */
  826. if (pdev->id >= SAMSUNG_I2S_SECOFF) {
  827. sec_dai = dev_get_drvdata(&pdev->dev);
  828. snd_soc_register_dai(&sec_dai->pdev->dev,
  829. &sec_dai->i2s_dai_drv);
  830. return 0;
  831. }
  832. i2s_pdata = pdev->dev.platform_data;
  833. if (i2s_pdata == NULL) {
  834. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  835. return -EINVAL;
  836. }
  837. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  838. if (!res) {
  839. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  840. return -ENXIO;
  841. }
  842. dma_pl_chan = res->start;
  843. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  844. if (!res) {
  845. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  846. return -ENXIO;
  847. }
  848. dma_cp_chan = res->start;
  849. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  850. if (res)
  851. dma_pl_sec_chan = res->start;
  852. else
  853. dma_pl_sec_chan = 0;
  854. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  855. if (!res) {
  856. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  857. return -ENXIO;
  858. }
  859. if (!request_mem_region(res->start, resource_size(res),
  860. "samsung-i2s")) {
  861. dev_err(&pdev->dev, "Unable to request SFR region\n");
  862. return -EBUSY;
  863. }
  864. regs_base = res->start;
  865. i2s_cfg = &i2s_pdata->type.i2s;
  866. quirks = i2s_cfg->quirks;
  867. pri_dai = i2s_alloc_dai(pdev, false);
  868. if (!pri_dai) {
  869. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  870. ret = -ENOMEM;
  871. goto err;
  872. }
  873. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  874. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  875. pri_dai->dma_playback.client =
  876. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  877. pri_dai->dma_capture.client =
  878. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  879. pri_dai->dma_playback.channel = dma_pl_chan;
  880. pri_dai->dma_capture.channel = dma_cp_chan;
  881. pri_dai->src_clk = i2s_cfg->src_clk;
  882. pri_dai->dma_playback.dma_size = 4;
  883. pri_dai->dma_capture.dma_size = 4;
  884. pri_dai->base = regs_base;
  885. pri_dai->quirks = quirks;
  886. if (quirks & QUIRK_PRI_6CHAN)
  887. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  888. if (quirks & QUIRK_SEC_DAI) {
  889. sec_dai = i2s_alloc_dai(pdev, true);
  890. if (!sec_dai) {
  891. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  892. ret = -ENOMEM;
  893. goto err;
  894. }
  895. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  896. sec_dai->dma_playback.client =
  897. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  898. /* Use iDMA always if SysDMA not provided */
  899. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  900. sec_dai->src_clk = i2s_cfg->src_clk;
  901. sec_dai->dma_playback.dma_size = 4;
  902. sec_dai->base = regs_base;
  903. sec_dai->quirks = quirks;
  904. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  905. sec_dai->pri_dai = pri_dai;
  906. pri_dai->sec_dai = sec_dai;
  907. }
  908. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  909. dev_err(&pdev->dev, "Unable to configure gpio\n");
  910. ret = -EINVAL;
  911. goto err;
  912. }
  913. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  914. pm_runtime_enable(&pdev->dev);
  915. return 0;
  916. err:
  917. release_mem_region(regs_base, resource_size(res));
  918. return ret;
  919. }
  920. static __devexit int samsung_i2s_remove(struct platform_device *pdev)
  921. {
  922. struct i2s_dai *i2s, *other;
  923. struct resource *res;
  924. i2s = dev_get_drvdata(&pdev->dev);
  925. other = i2s->pri_dai ? : i2s->sec_dai;
  926. if (other) {
  927. other->pri_dai = NULL;
  928. other->sec_dai = NULL;
  929. } else {
  930. pm_runtime_disable(&pdev->dev);
  931. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  932. if (res)
  933. release_mem_region(res->start, resource_size(res));
  934. }
  935. i2s->pri_dai = NULL;
  936. i2s->sec_dai = NULL;
  937. snd_soc_unregister_dai(&pdev->dev);
  938. return 0;
  939. }
  940. static struct platform_driver samsung_i2s_driver = {
  941. .probe = samsung_i2s_probe,
  942. .remove = __devexit_p(samsung_i2s_remove),
  943. .driver = {
  944. .name = "samsung-i2s",
  945. .owner = THIS_MODULE,
  946. },
  947. };
  948. module_platform_driver(samsung_i2s_driver);
  949. /* Module information */
  950. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  951. MODULE_DESCRIPTION("Samsung I2S Interface");
  952. MODULE_ALIAS("platform:samsung-i2s");
  953. MODULE_LICENSE("GPL");