Kconfig 3.9 KB

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  1. if (BF561)
  2. source "arch/blackfin/mach-bf561/boards/Kconfig"
  3. menu "BF561 Specific Configuration"
  4. if (!SMP)
  5. comment "Core B Support"
  6. config BF561_COREB
  7. bool "Enable Core B loader"
  8. default y
  9. endif
  10. comment "Interrupt Priority Assignment"
  11. menu "Priority"
  12. config IRQ_PLL_WAKEUP
  13. int "PLL Wakeup Interrupt"
  14. default 7
  15. config IRQ_DMA1_ERROR
  16. int "DMA1 Error (generic)"
  17. default 7
  18. config IRQ_DMA2_ERROR
  19. int "DMA2 Error (generic)"
  20. default 7
  21. config IRQ_IMDMA_ERROR
  22. int "IMDMA Error (generic)"
  23. default 7
  24. config IRQ_PPI0_ERROR
  25. int "PPI0 Error Interrupt"
  26. default 7
  27. config IRQ_PPI1_ERROR
  28. int "PPI1 Error Interrupt"
  29. default 7
  30. config IRQ_SPORT0_ERROR
  31. int "SPORT0 Error Interrupt"
  32. default 7
  33. config IRQ_SPORT1_ERROR
  34. int "SPORT1 Error Interrupt"
  35. default 7
  36. config IRQ_SPI_ERROR
  37. int "SPI Error Interrupt"
  38. default 7
  39. config IRQ_UART_ERROR
  40. int "UART Error Interrupt"
  41. default 7
  42. config IRQ_RESERVED_ERROR
  43. int "Reserved Interrupt"
  44. default 7
  45. config IRQ_DMA1_0
  46. int "DMA1 0 Interrupt(PPI1)"
  47. default 8
  48. config IRQ_DMA1_1
  49. int "DMA1 1 Interrupt(PPI2)"
  50. default 8
  51. config IRQ_DMA1_2
  52. int "DMA1 2 Interrupt"
  53. default 8
  54. config IRQ_DMA1_3
  55. int "DMA1 3 Interrupt"
  56. default 8
  57. config IRQ_DMA1_4
  58. int "DMA1 4 Interrupt"
  59. default 8
  60. config IRQ_DMA1_5
  61. int "DMA1 5 Interrupt"
  62. default 8
  63. config IRQ_DMA1_6
  64. int "DMA1 6 Interrupt"
  65. default 8
  66. config IRQ_DMA1_7
  67. int "DMA1 7 Interrupt"
  68. default 8
  69. config IRQ_DMA1_8
  70. int "DMA1 8 Interrupt"
  71. default 8
  72. config IRQ_DMA1_9
  73. int "DMA1 9 Interrupt"
  74. default 8
  75. config IRQ_DMA1_10
  76. int "DMA1 10 Interrupt"
  77. default 8
  78. config IRQ_DMA1_11
  79. int "DMA1 11 Interrupt"
  80. default 8
  81. config IRQ_DMA2_0
  82. int "DMA2 0 (SPORT0 RX)"
  83. default 9
  84. config IRQ_DMA2_1
  85. int "DMA2 1 (SPORT0 TX)"
  86. default 9
  87. config IRQ_DMA2_2
  88. int "DMA2 2 (SPORT1 RX)"
  89. default 9
  90. config IRQ_DMA2_3
  91. int "DMA2 3 (SPORT2 TX)"
  92. default 9
  93. config IRQ_DMA2_4
  94. int "DMA2 4 (SPI)"
  95. default 9
  96. config IRQ_DMA2_5
  97. int "DMA2 5 (UART RX)"
  98. default 9
  99. config IRQ_DMA2_6
  100. int "DMA2 6 (UART TX)"
  101. default 9
  102. config IRQ_DMA2_7
  103. int "DMA2 7 Interrupt"
  104. default 9
  105. config IRQ_DMA2_8
  106. int "DMA2 8 Interrupt"
  107. default 9
  108. config IRQ_DMA2_9
  109. int "DMA2 9 Interrupt"
  110. default 9
  111. config IRQ_DMA2_10
  112. int "DMA2 10 Interrupt"
  113. default 9
  114. config IRQ_DMA2_11
  115. int "DMA2 11 Interrupt"
  116. default 9
  117. config IRQ_TIMER0
  118. int "TIMER 0 Interrupt"
  119. default 8
  120. config IRQ_TIMER1
  121. int "TIMER 1 Interrupt"
  122. default 10
  123. config IRQ_TIMER2
  124. int "TIMER 2 Interrupt"
  125. default 10
  126. config IRQ_TIMER3
  127. int "TIMER 3 Interrupt"
  128. default 10
  129. config IRQ_TIMER4
  130. int "TIMER 4 Interrupt"
  131. default 10
  132. config IRQ_TIMER5
  133. int "TIMER 5 Interrupt"
  134. default 10
  135. config IRQ_TIMER6
  136. int "TIMER 6 Interrupt"
  137. default 10
  138. config IRQ_TIMER7
  139. int "TIMER 7 Interrupt"
  140. default 10
  141. config IRQ_TIMER8
  142. int "TIMER 8 Interrupt"
  143. default 10
  144. config IRQ_TIMER9
  145. int "TIMER 9 Interrupt"
  146. default 10
  147. config IRQ_TIMER10
  148. int "TIMER 10 Interrupt"
  149. default 10
  150. config IRQ_TIMER11
  151. int "TIMER 11 Interrupt"
  152. default 10
  153. config IRQ_PROG0_INTA
  154. int "Programmable Flags0 A (8)"
  155. default 11
  156. config IRQ_PROG0_INTB
  157. int "Programmable Flags0 B (8)"
  158. default 11
  159. config IRQ_PROG1_INTA
  160. int "Programmable Flags1 A (8)"
  161. default 11
  162. config IRQ_PROG1_INTB
  163. int "Programmable Flags1 B (8)"
  164. default 11
  165. config IRQ_PROG2_INTA
  166. int "Programmable Flags2 A (8)"
  167. default 11
  168. config IRQ_PROG2_INTB
  169. int "Programmable Flags2 B (8)"
  170. default 11
  171. config IRQ_DMA1_WRRD0
  172. int "MDMA1 0 write/read INT"
  173. default 8
  174. config IRQ_DMA1_WRRD1
  175. int "MDMA1 1 write/read INT"
  176. default 8
  177. config IRQ_DMA2_WRRD0
  178. int "MDMA2 0 write/read INT"
  179. default 9
  180. config IRQ_DMA2_WRRD1
  181. int "MDMA2 1 write/read INT"
  182. default 9
  183. config IRQ_IMDMA_WRRD0
  184. int "IMDMA 0 write/read INT"
  185. default 12
  186. config IRQ_IMDMA_WRRD1
  187. int "IMDMA 1 write/read INT"
  188. default 12
  189. config IRQ_WDTIMER
  190. int "Watch Dog Timer"
  191. default 13
  192. help
  193. Enter the priority numbers between 7-13 ONLY. Others are Reserved.
  194. This applies to all the above. It is not recommended to assign the
  195. highest priority number 7 to UART or any other device.
  196. endmenu
  197. endmenu
  198. endif